Dual-gate planar nano-air-channel transistor

Abstract

Disclosed in the present invention is a dual-gate planar nano-air-channel transistor, comprising: an insulating substrate, a cathode, an anode, a first gate arranged adjacent to the cathode for controlling electron emission from the cathode, and a second gate arranged adjacent to the anode for shielding the effect of the anode on the cathode, wherein channels between the cathode, the anode, the first gate and the second gate are filled with air at atmospheric pressure or under vacuum; gaps of 1000 nanometers or less are maintained between the cathode and the first gate, between the anode and the second gate, between the first gate and the second gate, and between the cathode and the anode; and when a first gate voltage higher than the voltage of the cathode for inducing field emission of electrons is applied to the first gate, electrons emitted from the cathode travel towards the anode under the combined action of the first gate voltage, a second gate voltage and an anode voltage, and reach the anode to form an anode current. In the present invention, using a dual-gate structure achieves saturation characteristics in transistor output characteristic curves, reduces electron interception by transistor gates, and thereby increases the electron utilization efficiency.

Description

A dual-gate planar nano-air channel transistor Technical Field

[0001] This invention belongs to the field of vacuum micro / nano structures and field emission devices, specifically a dual-gate planar nano-air channel transistor. Background Technology

[0002] Vacuum electronic devices possess advantages such as high power, wide bandwidth, and high frequency, and are widely used in fields such as communication, radar, navigation, and imaging. However, due to limitations such as complex machining, traditional vacuum electronic systems are often bulky, making miniaturization, weight reduction, and integration difficult. The development of nanotechnology, including advanced processing techniques and the emergence of novel nanomaterials, has provided a possibility to overcome the bottlenecks of traditional vacuum electronic devices. In recent years, the emergence of nano-air channel structures has injected new vitality into vacuum nanoelectronic devices.

[0003] Nanoscale air channels are air electron transport channels operating under atmospheric pressure or vacuum. The average size of these channels is smaller than the mean free path of electrons in air (approximately 378 nanometers under atmospheric pressure, and even longer in a vacuum depending on the vacuum level). Electrons within nanoscale air channels are not affected by scattering or other factors. Furthermore, the emission mode of electrons at the cathode within the nanoscale air channel satisfies field emission, meaning that when a large electric field is applied to the cathode surface, the potential barrier width decreases, allowing free electrons to be released from the cathode through the quantum effect of barrier penetration. Nanoscale air channel transistors will combine the wide bandwidth, high operating frequency, and fast response of field emission electronic devices with integration into solid-state devices, reducing device size and power consumption, thus revolutionizing vacuum electronics technology.

[0004] Nanochannel devices utilize the field emission characteristics of the cathode, and the magnitude of the cathode emission current density affects the device's power efficiency. When fabricating the cathode using metallic or semiconductor materials, it is necessary to create a pointed shape to increase the field enhancement factor at the cathode surface and minimize the work function of the material, or to use semiconductor materials with negative electron affinity to improve cathode electron emission at the same gate voltage. Using nanomaterials such as carbon nanotubes, graphene, molybdenum disulfide, tungsten disulfide, and zinc oxide nanowires to fabricate the cathode, utilizing the tips and edges of the nanomaterials themselves to replace the metal cathode, is also a commonly used technique in field emission research in recent years.

[0005] When applying nano-air channel transistors to power amplification in radio frequency devices, certain requirements are placed on the saturation characteristics of their output waveform to ensure minimal nonlinearity and distortion. Specifically, the anode must have a relatively small influence on the cathode's field emission, with the cathode's electron emission primarily controlled by the gate. To improve electron utilization efficiency and device power, the cathode's emission capability needs to be enhanced, while the gate's interception needs to be minimized.

[0006] Current planar nano-air channel transistors with side gate or back gate structures (as shown in Figures 1 and 2) have difficulty obtaining saturation characteristics in the transistor output characteristic curve because the shielding effect of the gate on the anode is not obvious. In the back gate structure, electrons are also more likely to hit the dielectric layer above the back gate, affecting the electron utilization efficiency.

[0007] Using a ring-shaped gate between the cathode and anode can solve the saturation characteristics of the output characteristic curve, but it presents difficulties in implementing a planar structure. A semi-ring-shaped gate structure can overcome fabrication difficulties (see Figure 3), but like the ring-shaped gate, it suffers from large gate interception, affecting the device's electron utilization efficiency. Here, "ring-shaped" and "semi-ring-shaped" only indicate whether electrons are completely or partially surrounded by the gate when passing through it, and do not represent the specific shape of the electron channel of the gate. Summary of the Invention

[0008] Purpose of the invention: Novel transistors based on nano-air channel structures can be widely used in vacuum nanoelectronic devices, optoelectronic devices, and other fields. Especially in high-frequency and terahertz radio frequency power amplifier applications, high requirements are placed on the output characteristics, cathode emission performance, and electron utilization efficiency of the devices. Existing device structures are still difficult to meet the application requirements. Therefore, this invention proposes a dual-gate planar nano-air channel transistor. This invention improves the performance of vacuum channel devices by improving the device structure, solves the saturation characteristics of the output characteristic curve in vacuum channel devices, and effectively reduces the gate intercept current.

[0009] Technical solution: A dual-gate planar nano-air channel transistor, comprising: an insulating substrate, a cathode and an anode disposed on the insulating substrate, and two gates disposed on the insulating substrate between the cathode and the anode;

[0010] The cathode and anode are on the same plane; the two gates include a first gate near the cathode to control the emission of electrons from the cathode and a second gate near the anode to shield the anode from the effect of the anode on the cathode;

[0011] The channel between the cathode, anode, first gate, and second gate is atmospheric pressure or air in a vacuum state; and the gap between the cathode and the first gate, the anode and the second gate, the first gate and the second gate, and the cathode and the anode is maintained within 1000 nanometers.

[0012] When a first gate voltage higher than that of the cathode is applied to the first gate, the electrons emitted by the cathode move toward the anode under the combined action of the first gate voltage, the second gate voltage, and the anode voltage and reach the anode to form an anode current.

[0013] Furthermore, the first gate voltage is synthesized from a DC voltage and a high-frequency signal modulation voltage; the second gate voltage is a DC voltage.

[0014] When a dual-gate planar nano-air channel transistor operates as a power amplifier device, the electric field between the first gate and the cathode is changed by adjusting the second gate voltage, thereby reducing the influence of the anode on the cathode emission.

[0015] Furthermore, grooves for placing the first gate and the second gate are formed on the insulating substrate located between the cathode and the anode, the grooves positioning the first gate and the second gate on the periphery of the relative cathode spatial position.

[0016] Furthermore, the cathode is made of a metallic material, semiconductor material, or nanomaterial having a pointed tip in the planar direction.

[0017] Furthermore, a vacuum-sealed structure is adopted.

[0018] Furthermore, the two gates disposed on the insulating substrate between the cathode and the anode can be replaced by three or more gates disposed on the insulating substrate between the cathode and the anode.

[0019] Furthermore, the cathode, anode, and two gates disposed on the insulating substrate and located on the insulating substrate between the cathode and anode can be replaced by: the spatial positions of the cathode, first gate, second gate, and anode being perpendicular to the insulating substrate, and each electrode being isolated by a dielectric layer.

[0020] Furthermore, both the first gate and the second gate are planar gates, or both the first gate and the second gate are annular or semi-annular gates formed by material growth in the direction perpendicular to the insulating substrate and planar electrodes on the insulating substrate, or one of the first gate and the second gate is an annular or semi-annular gate formed by material growth in the direction perpendicular to the insulating substrate and planar electrodes on the insulating substrate, and the other gate is a planar gate; the annular or semi-annular gate only indicates whether electrons are completely or partially surrounded by the gate when passing through the gate.

[0021] The present invention also discloses an amplification device, which is composed of multiple unit transistors connected in parallel, each of which is a dual-gate planar nano-air channel transistor disclosed above.

[0022] Beneficial effects: Compared with the prior art, the present invention has the following advantages:

[0023] (1) Compared with the traditional single-gate and back-gate structures, the dual-gate air-channel device structure proposed in this invention can effectively improve the control effect of the gate on the cathode, reduce the influence of the anode on the cathode, make the output characteristic curve meet the requirements of power amplifier devices, ensure the linearity of the device, and at the same time reduce the interception of the cathode emission current by the gate, improve the electronic utilization efficiency of the device, and reduce power consumption.

[0024] (2) The dual-gate air channel device proposed in this invention has electrical characteristics similar to those of traditional field-effect transistors. However, the electron transport is carried out in the air channel in a ballistic or tunneling manner. Since the air channel is smaller than or close to the mean free path of electrons, the device can work normally in atmospheric conditions or without strict vacuum packaging.

[0025] (3) The dual-gate air channel device structure proposed in this invention combines vacuum electronic devices with current semiconductor processing technology to obtain miniaturized, planarized, and integrated nanoelectronic devices, aiming to achieve the technical advantages of high frequency, fast response and no need for strict vacuum packaging. It has high application potential in new electronic components such as terahertz and radio frequency power amplification, switching, and logic, laying a technical foundation for the future realization of on-chip integrated nanoelectronic devices. Attached Figure Description

[0026] Figure 1 is a schematic diagram of the structure of a conventional side-gate and back-gate nano-air channel transistor.

[0027] Figure 2 is a schematic diagram of the structure of a traditional ring gate nano-air channel transistor.

[0028] Figure 3 is a schematic diagram of the structure of a traditional semi-ring gate.

[0029] Figure 4 is a schematic diagram of the dual-plane gate air channel transistor structure proposed in Example 1.

[0030] Figure 5 is a schematic diagram of the air channel transistor structure composed of a semi-ring gate and a planar gate proposed in Example 2.

[0031] Figure 6 is a schematic diagram of the air channel transistor structure composed of a double half-ring gate proposed in Example 3.

[0032] Figure 7 is a schematic diagram of the air channel transistor structure composed of a ring gate and a planar gate proposed in Example 4.

[0033] Figure 8 is a schematic diagram of the air channel transistor structure proposed in Example 5, in which both the first gate and the second gate are composed of double-sided gates.

[0034] Figure 9 is a schematic diagram of the air channel transistor structure proposed in Example 6, which consists of a double-sided gate for the first gate and a planar gate for the second gate.

[0035] Figure 10 is a schematic diagram of the flat, single-pointed, multi-pointed, and circular-topped cathodes proposed in Example 7.

[0036] Figure 11 is a schematic diagram of the voltage applied to the gate and anode.

[0037] Figure 12 is a comparison of electron trajectories in a single half-ring gate air-channel transistor with two parallel units obtained from simulation and an air-channel transistor with a first gate being a half-ring gate and a second gate being a flat gate.

[0038] Figure 13 is a schematic diagram of the dual-gate vertical structure air channel transistor proposed in Example 8. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of the present invention clearer, the technical solutions of the present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0040] Example 1:

[0041] Combining the characteristics of vacuum tube technology, this embodiment discloses a dual-gate planar nano-air channel transistor. Figure 4 shows the basic structure of the dual-gate. First, on the insulating substrate material 1 of the semiconductor wafer, the cathode material and the anode material are chemically or physically deposited through the semiconductor process line. Then, the patterned cathode 2 and anode 3 are fabricated by photolithography and etching. Between the cathode 2 and the anode 3, a groove is fabricated on the insulating substrate material 1 through photolithography, etching, metal coating and other processes. The metal dual-gate first gate 4 and the second gate 5 are fabricated in the groove. The dual gate, together with the cathode and anode, constitute the dual-gate planar air channel transistor structure shown in Figure 4.

[0042] The dual-gate planar air-channel transistor structure will now be further explained with reference to Figure 4. In this embodiment, a cathode 2 and an anode 3 are fabricated on the same plane using a conductive material on an insulating substrate 1. A first gate 4, made of conductive material, is fabricated near the cathode to control cathode electron emission, and a second gate 5, made of conductive material, is fabricated near the anode to shield the anode from the cathode's effect, thus forming a dual-gate structure. The channels between the cathode 2, anode 3, first gate 4, and second gate 5 are atmospheric pressure or vacuum air, i.e., air channels. Furthermore, a gap of less than 1000 nanometers is maintained between the cathode 2 and the first gate 4, the anode 3 and the second gate 5, the first gate 4 and the second gate 5, and the cathode 2 and the anode 3.

[0043] When a first gate voltage higher than that applied to the first gate 4, which is higher than that applied to the cathode to form field-emitted electrons, the electrons emitted from the cathode 2 move towards the anode 3 under the combined action of the first gate voltage Ug1, the second gate voltage Ug2, and the anode voltage Ua, forming an anode current. The first gate voltage is synthesized from a DC voltage Ug1dc and a high-frequency signal modulation voltage Ug1rf, resulting in high-frequency signal modulated electron emission. The second gate voltage Ug2 is a DC voltage to reduce the influence of the anode 3 voltage on cathode emission and to reduce the interception of electrons emitted from the cathode by the first gate 4.

[0044] To reduce the interception of electrons by the gate, a groove can be made on the insulating substrate and a first gate 4 and a second gate 5 of metal can be made in the groove, so that the first gate 4 and the second gate 5 are located on the periphery of the relative spatial position of the cathode 2.

[0045] When an air-channel transistor operates as a power amplifier, the electric field between the first gate and the cathode can be changed by adjusting the DC voltage on the second gate, thereby further reducing the interception of electrons emitted by the cathode by the first gate.

[0046] Air-channel transistors are based on cathode field emission. To ensure good power amplification, the cathode needs excellent field emission performance, meaning a high emission current density at a relatively low first gate modulation voltage. To achieve this, the cathode is fabricated using planar materials such as metals, semiconductors, carbon nanotubes, graphene, molybdenum disulfide, tungsten disulfide, and zinc oxide nanowires with pointed tips. The field enhancement effect at the tips or edges of the metals, semiconductors, or nanomaterials increases the surface electric field of the cathode at the same first gate voltage, thereby improving the cathode's field emission efficiency.

[0047] To avoid electron emission under a certain electric field, which would affect the performance of the device, the gate and anode of an air-channel transistor are generally not suitable for use with low work function or low electron affinity. Instead, metals such as gold, silver, platinum, copper, aluminum, iron, tungsten, and molybdenum, alloys, or combinations thereof can be used, or conductive semiconductor materials can be used.

[0048] In air-channel transistors, field-emission electrons at the cathode collide with air molecules during transport, causing ionization of the gas molecules. These ions, accelerated towards the cathode under the influence of the electric field, bombard the cathode, potentially damaging it. To reduce the probability of electron-gas molecule collisions, two methods can be employed: reducing the distance between electrodes and encapsulating the transistor in a vacuum environment to reduce gas molecule density. This effectively lowers the probability of collisions and is a more efficient way to ensure normal device operation. Therefore, in practical applications, employing a vacuum-encapsulated structure increases the mean electron free path of electrons within the device, thereby improving the transistor's electron utilization efficiency and overall device performance.

[0049] Although this embodiment only presents the basic structure of a planar dual-gate air-channel transistor, its performance can be further optimized in practical applications by adding electrodes, such as a third gate or an equivalent structure. Furthermore, the dual-gate configuration of this embodiment is also applicable to vertical air-channel devices when the spatial positions of the planar cathode, first gate, second gate, and anode are transformed into a vertical structure where the cathode electron emission channel is perpendicular to the insulating substrate.

[0050] The structure proposed in this embodiment can be used as a basic unit transistor. By connecting more unit transistors in parallel or adding more stages of gate structure, the power and performance of the overall amplifier device can be improved.

[0051] Example 2:

[0052] Based on Example 1, this example obtains a first planar gate by performing semiconductor processes such as fabricating an insulating dielectric, photolithography, etching, and then metal plating. A sidewall metal material is then fabricated on the first planar gate to form a semi-annular gate. The sidewall and the first planar gate together form a semi-annular first gate, thus forming a dual-gate air-channel transistor structure as shown in Figure 5, where the first gate is a semi-annular gate and the second gate is a planar gate.

[0053] The dual-gate air-channel transistor with this structure was simulated, and the simulation results are shown in Figure 12. Figure 12 shows the case of two units connected in parallel. Comparing the electron trajectory with that of a single half-ring gate (left figure), it can be seen that some electrons in the single half-ring gate structure hit the dielectric layer and cannot form an effective anode current. However, in the dual-gate structure formed by the half-ring gate and the planar gate (right figure), all electrons hit the anode.

[0054] Example 3:

[0055] Based on Example 2, that is, while fabricating the semi-ring first gate, a semi-ring second gate is also fabricated to form an air channel transistor structure as shown in Figure 6, where both the first gate and the second gate are semi-ring gates, further reducing the influence of the anode on the cathode emission.

[0056] Example 4:

[0057] Based on Example 2, after fabricating the semi-circular first gate, a metal bridge is fabricated on the upper part of the semi-circular part to form a ring-shaped first gate structure, reducing the influence of the anode on the cathode. The second gate is a planar gate. By controlling the voltage to reduce the interception of the first gate, an air-channel transistor structure with a first gate ring gate and a second gate planar gate is formed as shown in Figure 7.

[0058] Example 5:

[0059] Based on Example 1, while fabricating the cathode and anode, a double-sided gate structure as shown in Figure 8 is fabricated, with the first gate and the second gate being discrete on both sides of the cathode electron emission channel. Since there is no process of etching grooves on the insulating substrate and depositing metal electrodes, the fabrication process is relatively simple. It can also solve the problem of shielding the anode from the cathode and the gate from trapping electrons. However, the gate structures on both sides of the cathode electron emission channel need to be connected by external electrode leads to ensure that the voltage applied to the gates on both sides is the same.

[0060] Example 6:

[0061] Combining the fabrication processes of side gate and planar gate in Embodiments 1 and 5, the first gate is fabricated as a side gate structure and the second gate is fabricated as a planar gate structure, forming a dual-gate air-channel transistor structure with a combination of a dual-side gate and a planar gate as shown in Figure 9.

[0062] Example 7:

[0063] To improve the field enhancement effect of the cathode, the cathode can be made of metal materials or semiconductors or nanomaterials such as carbon nanotubes, graphene, molybdenum disulfide, tungsten disulfide, and zinc oxide nanowires with sharp points in the planar direction. For example, it can be made into a single-pointed, multi-pointed, or arc-shaped structure as shown in Figure 10, but is not limited to these structures.

[0064] The cathode field emission efficiency is improved by enhancing the cathode surface electric field at the same first gate voltage through the tip or edge of a metal, semiconductor, or nanomaterial.

[0065] Example 8:

[0066] As shown in Figure 13, this embodiment applies the dual-gate structure proposed in Embodiment 1 to a vertical structure air channel transistor. The cathode 2, anode 3 on the planar insulating substrate and the two gates disposed on the insulating substrate between the cathode and anode are replaced with the following: the spatial positions of the cathode 2, the first gate 4, the second gate 5, and the anode 3 are perpendicular to the insulating substrate. Each electrode is isolated by a dielectric layer 11 to form a vertical structure device. The way signals are applied to each electrode is the same as in Embodiment 1.

[0067] As can be seen from the above embodiments, in a dual-gate air-channel transistor, the first gate and the second gate can be planar electrodes fabricated on an insulating substrate, or they can be annular or semi-annular gates formed by material growth in the direction perpendicular to the substrate and the planar electrodes on the substrate. Alternatively, one of the first gate and the second gate can be annular or semi-annular, while the other gate is a planar gate. Annular or semi-annular gates can more effectively shield the influence of anode voltage on cathode emission, but they also increase the difficulty of fabrication to some extent. Here, annular and semi-annular gates only indicate whether electrons are completely or partially surrounded by the gate when passing through it, and do not represent the specific shape of the electron channel of the gate.

Claims

1. A dual-gate planar nano-air channel transistor, characterized in that: include: An insulating substrate, a cathode and an anode disposed on the insulating substrate, and two gates disposed on the insulating substrate between the cathode and the anode; The cathode and anode are on the same plane; the two gates include a first gate near the cathode to control the emission of electrons from the cathode and a second gate near the anode to shield the anode from the effect of the anode on the cathode; The channel between the cathode, anode, first gate, and second gate is atmospheric pressure or air in a vacuum state; and the gap between the cathode and the first gate, the anode and the second gate, the first gate and the second gate, and the cathode and the anode is maintained within 1000 nanometers. When a first gate voltage higher than that of the cathode is applied to the first gate, the electrons emitted by the cathode move toward the anode under the combined action of the first gate voltage, the second gate voltage, and the anode voltage and reach the anode to form an anode current.

2. The dual-gate planar nano-air channel transistor according to claim 1, characterized in that: The first gate voltage is synthesized from a DC voltage and a high-frequency signal modulation voltage; the second gate voltage is a DC voltage. When a dual-gate planar nano-air channel transistor operates as a power amplifier device, the electric field between the first gate and the cathode is changed by adjusting the second gate voltage, thereby reducing the influence of the anode on the cathode emission.

3. The dual-gate planar nano-air channel transistor according to claim 1, characterized in that: A groove is formed on an insulating substrate located between the cathode and the anode for placing a first gate and a second gate, respectively, such that the first gate and the second gate are located on the periphery of the relative cathode spatial position.

4. The dual-gate planar nano-air channel transistor according to claim 1, characterized in that: The cathode is made of a metallic material, semiconductor material, or nanomaterial with a pointed tip in the planar direction.

5. The dual-gate planar nano-air channel transistor according to claim 1, characterized in that: It adopts a vacuum-sealed structure.

6. The dual-gate planar nano-air channel transistor according to claim 1, characterized in that: The two gates disposed on the insulating substrate between the cathode and the anode can be replaced by three or more gates disposed on the insulating substrate between the cathode and the anode.

7. The dual-gate planar nano-air channel transistor according to claim 1, characterized in that: The cathode, anode, and two gates disposed on the insulating substrate and located on the insulating substrate between the cathode and anode can be replaced by: the spatial positions of the cathode, first gate, second gate, and anode being perpendicular to the insulating substrate, and each electrode being isolated by a dielectric layer.

8. The dual-gate planar nano-air channel transistor according to claim 1, characterized in that: Both the first gate and the second gate are planar gates, or both the first gate and the second gate are annular or semi-annular gates formed by material growth in the direction perpendicular to the insulating substrate and planar electrodes on the insulating substrate, or one of the first gate and the second gate is an annular or semi-annular gate formed by material growth in the direction perpendicular to the insulating substrate and planar electrodes on the insulating substrate, and the other gate is a planar gate; the annular or semi-annular gate only indicates whether electrons are completely or partially surrounded by the gate when passing through the gate.

9. An amplifying device, characterized in that: It is composed of multiple unit transistors connected in parallel, and each of the unit transistors is a dual-gate planar nano-air channel transistor as described in any one of claims 1 to 8.

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