Integrated circuit, communication system, and backlight driving system

Abstract

An integrated circuit, a communication system, and a backlight driving system. The integrated circuit is provided with an input port and an output port. The integrated circuit comprises: a register; and a control component, which is connected to the register, the input port, and the output port. The control component is configured to: transmit to the output port a data verification instruction received by the input port, and after the data verification instruction is transmitted to the output port, control the input port and the output port to be short-circuited to form a conductive path; when the data verification instruction indicates that data verification is required, verify data in the register; and when a data verification result is a preset verification result, set the level of the conductive path to a level used for indicating the preset verification result.

Description

Integrated circuits, communication systems and backlight driving systems

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202510373114.9, filed on March 26, 2025, and Chinese Patent Application No. 202510371196.3, filed on March 26, 2025, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of communication technology, specifically to an integrated circuit, a communication system, and a backlight driving system. Background Technology

[0004] In related technical solutions, when the controller calibrates the data in the integrated circuit, the integrated circuit sends the target data to the controller in the form of a message. Correspondingly, the controller acquires and parses the message, and calibrates the target data based on the parsing result. However, transmitting target data in message form suffers from high communication costs and slow communication speed, reducing data calibration efficiency. Furthermore, the controller needs to parse the message, which places high demands on its operational capabilities. If the controller's operational capabilities are insufficient, it can easily become overloaded, further reducing data calibration efficiency. Therefore, how to reduce communication costs and improve data calibration efficiency remains a pressing issue. Summary of the Invention

[0005] In a first aspect, some embodiments of this application provide an integrated circuit having an input port and an output port; the integrated circuit includes: a register; a control component connected to the register, the input port, and the output port respectively; the control component is configured to: transmit a data verification instruction received at the input port to the output port, and after transmission to the output port, control the input port and the output port to short-circuit to form a path; when the data verification instruction indicates that it needs to verify data, verify the data in the register; and when the data verification result is a preset verification result, set the level of the path to a level used to characterize the preset verification result.

[0006] In the above embodiments, by setting unidirectional input and output ports, the processing result for the communication command can be obtained based on the path level even when the communication command can only be transmitted unidirectionally. This eliminates the need to receive the processing result message after processing the communication command through a bidirectional input / output port, as was previously required. This reduces the controller's load and lowers the requirements for its operational capabilities. Furthermore, using unidirectional input / output ports is less expensive than using bidirectional input / output ports, thus reducing the overall manufacturing cost of the integrated circuit.

[0007] In the above embodiments, the control component can process the data in the register and control the input and output ports to form a path, reflecting the instruction processing result to the controller in the form of a voltage level on the path. Specifically, when the communication instruction is a data verification instruction, the verification result can be reflected by the voltage level on the path; conversely, when the communication instruction is a data verification instruction, the data verification result can be reflected by the voltage level on the path. Compared to related solutions where the controller needs to parse the message before processing, this embodiment only requires the controller to determine the instruction processing result by judging the voltage level on the path. This not only reduces the requirements on the controller's operational capabilities but also provides a faster and more direct way to reflect the instruction processing result through the voltage level on the path, improving communication efficiency. The control component can also control the input and output ports to be short-circuited, facilitating subsequent feedback of the instruction processing result in the form of a voltage level.

[0008] Secondly, some embodiments of this application provide a communication system, including: N integrated circuits as described in the first aspect, where N is a natural number greater than zero; when N is greater than 1, the N integrated circuits are connected in series; every two adjacent paths in i paths are connected to form a transmission link; i is greater than 0 and less than or equal to N; a controller connected to the input port of the first integrated circuit; the controller is configured to: send a data verification instruction to the input port of the first integrated circuit; and determine the data verification result based on the level on the transmission link.

[0009] Thirdly, some embodiments of this application provide a backlight driving system, including: a backlight component; N integrated circuits as described in the first aspect, where N is a natural number greater than zero; when N is greater than 1, the N integrated circuits are connected in series sequentially; every two adjacent paths in i paths are connected to form a transmission link; i is greater than 0 and less than or equal to N; a control chip connected to the input port of the first integrated circuit; the integrated circuits are configured to: drive the backlight component to emit light; the control chip is configured to: send a data verification instruction to the input port of the first integrated circuit; and determine the data verification result based on the level on the transmission link. Attached Figure Description

[0010] To more clearly illustrate the technical solutions in the embodiments or related technologies of this application, the accompanying drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 is a schematic diagram of the structure of an integrated circuit provided in some embodiments of this application;

[0012] Figure 2 is a schematic diagram of integrated circuit processing communication instructions provided in some embodiments of this application;

[0013] Figure 3 is a schematic diagram of the structure of the control component in the integrated circuit provided in some embodiments of this application;

[0014] Figure 4 is another structural schematic diagram of the control component in an integrated circuit provided in some embodiments of this application;

[0015] Figure 5 is a schematic diagram of the structure of a level maintenance unit in an integrated circuit provided in some embodiments of this application;

[0016] Figure 6 is another structural schematic diagram of a level maintenance unit in an integrated circuit provided in some embodiments of this application;

[0017] Figure 7 is another structural schematic diagram of a level maintenance unit in an integrated circuit provided in some embodiments of this application;

[0018] Figure 8 is an interactive schematic diagram of data verification instructions provided in some embodiments of this application;

[0019] Figure 9 is an interactive schematic diagram of data reading instructions provided in some embodiments of this application;

[0020] Figure 10 is a schematic diagram of the data structure of the data verification instruction provided in some embodiments of this application;

[0021] Figure 11 is a schematic diagram of the structure of a communication system provided in some embodiments of this application;

[0022] Figure 12 is a schematic diagram of a communication system provided in some embodiments of this application, in which the controller is provided with a transmission port;

[0023] Figure 13 is a schematic diagram of a communication system provided in some embodiments of this application, in which the controller is provided with at least two transmission ports;

[0024] Figure 14(a) is a schematic diagram of the structure of a level maintenance unit in a communication system provided in some embodiments of this application;

[0025] Figure 14(b) is another structural schematic diagram of a level maintenance unit in a communication system provided in some embodiments of this application;

[0026] Figure 15(a) is a schematic diagram of the structure of a level maintenance unit in a communication system provided in some embodiments of this application;

[0027] Figure 15(b) is another structural schematic diagram of a level maintenance unit in a communication system provided in some embodiments of this application;

[0028] Figure 16(a) is another structural schematic diagram of a level maintenance unit in a communication system provided in some embodiments of this application;

[0029] Figure 16(b) is another structural schematic diagram of a level maintenance unit in a communication system provided in some embodiments of this application;

[0030] Figure 17 is a schematic diagram of the backlight driving system provided in some embodiments of this application;

[0031] Figure 18 is a schematic diagram of a backlight driving system provided in some embodiments of this application, showing that the control chip has a transmission port;

[0032] Figure 19 is a schematic diagram of the structure of a display device provided in some embodiments of this application;

[0033] Figure 20 is a schematic diagram of the physical structure of the backlight assembly and display panel provided in some embodiments of this application. Detailed Implementation

[0034] Some embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0035] In the description of this application, it should be understood that the terms "center," "lateral," "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "axial," "radial," and "circumferential," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, features defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0036] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can also refer to indirect connections through an intermediate medium, or to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0037] In a communication system comprised of a controller and an integrated circuit (IC), the IC stores data, and the controller reads and verifies the data stored in the IC. In related technical solutions, when the controller reads and verifies data from the IC, the IC sends the target verification data to the controller in message form. Correspondingly, the controller acquires and parses the message, and reads or verifies the target data based on the parsing result. However, transmitting target data in message form suffers from high communication costs and slow communication speed, reducing communication efficiency. Furthermore, the controller needs to parse the message, which places high demands on its operational capabilities. Insufficient controller capabilities can easily lead to overload, further reducing communication efficiency.

[0038] Therefore, some embodiments of this application provide an integrated circuit to solve at least one of the above-mentioned technical problems. The technical concept of this application is: the integrated circuit receives and processes communication commands (performing data reading and data verification), and reflects the command processing result in the form of an electrical level. The controller can determine the command processing result by detecting the electrical level. Compared with related technical solutions, using electrical levels to represent the command processing result reduces data transmission links and improves communication speed. Furthermore, placing the data processing (data reading and data verification) process within the integrated circuit avoids the problem of low communication efficiency caused by insufficient controller processing capabilities, thus improving communication efficiency.

[0039] The technical solutions of this application will be described in detail below with reference to specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0040] In some embodiments, referring to the circuit structure shown in FIG1, the integrated circuit 10 is provided with an input port 11 and an output port 12. The input port is used to receive communication commands (e.g., data read commands, data verification commands). In some scenarios where data verification commands need to be transmitted to the next-level integrated circuit 10 (e.g., multiple integrated circuits 10 connected in series to form part of a communication system), the output port 12 can be configured to output communication commands. In some scenarios where commands do not need to be transmitted to the next-level integrated circuit 10 (e.g., the output port of integrated circuit 10 is not connected to other integrated circuits), the output port 12 may not output communication commands.

[0041] The data verification instruction is used to instruct the target integrated circuit 10 to verify the target verification data. The data read instruction is used to instruct the target integrated circuit 10 to read the target data. The target integrated circuit 10 can be the currently receiving instruction integrated circuit 10, or it can be a different integrated circuit 10. The target integrated circuit 10 can be selected according to actual needs.

[0042] The input port 11 can be connected to a controller, which can be at least one of a system-on-a-chip (SoC), a timing controller (TCON) chip, a backlight controller (BCON), or a dimming controller (DCON). The controller 230 can be a composite chip with the functions of both a SoC and a timing controller. The controller 230 can also be other types of chips, as long as they can achieve the above functions; this embodiment is not limited to any of these.

[0043] In some embodiments, the input port 11 is a unidirectional input port, such as a serial data input (SDI). The output port 12 is a unidirectional output port, such as a serial data output (SDO).

[0044] In some embodiments, the input port 11 is a bidirectional input port (e.g., SDI). The output port 12 is a bidirectional output port (e.g., SDO). When multiple integrated circuits 10 are connected in series to form part of a communication system, for the non-last stage of the series-connected integrated circuits 10, the integrated circuit 10 may have at least one bidirectional input port and at least one bidirectional output port. For the last stage of the series-connected integrated circuits 10, the integrated circuit 10 may have at least one bidirectional input port.

[0045] In some embodiments, the input port 11 and the output port 12 are adjusted to a high impedance state after the communication command is output, thereby reducing the influence of the level of the following path on the input port 11 and the output port 12.

[0046] In the above embodiments, by setting unidirectional input and output ports, the processing result for the communication command can be obtained based on the path level even when the communication command can only be transmitted unidirectionally. This eliminates the need to receive the processing result message after processing the communication command through a bidirectional input / output port, as was previously required. This eliminates the need for the controller to process the result message, thereby reducing the controller's load and lowering the requirements for its operational capabilities. Furthermore, using unidirectional input / output ports is less expensive than using bidirectional input / output ports, thus reducing the overall manufacturing cost of the integrated circuit.

[0047] In some embodiments, referring to the circuit structure shown in FIG1, the integrated circuit 10 includes a register 13. The integrated circuit 10 includes a register 13. The register 13 is configured to store data. For example, during the driving process of the backlight module in a display device, the register 13 is used to store the driving data of the backlight module. The register 13 can be viewed as a complex circuit structure composed of multiple gate circuits (such as AND gates, OR gates, NOT gates, etc.). These gate circuits work together to realize the data storage and transmission functions of the register 13.

[0048] In some embodiments, referring to the circuit structure shown in FIG1, the integrated circuit 10 includes a control component 14. The control component 14 is connected to the register 13, the input port 11, and the output port 12, respectively. Specifically, a first terminal of the control component 14 is connected to the register 13, a second terminal is connected to the input port 11, and a third terminal is connected to the output port 12. The control component 14 is configured to receive a communication command input through the input port 11 and transmit the communication command input through the input port 11 to the output port 12. The control component 14 is also configured to, after transmitting the communication command input through the input port 11 to the output port 12, control the input port 11 and the output port 12 to form a path (as shown by the dotted line in the figure). Specifically, the path can be formed by short-circuiting the input port 11 and the output port 12. After the path is formed, if a communication command is received again, the path is broken to transmit the communication command input through the input port 11 to the output port 12.

[0049] In the first mode, the input port 11 of the integrated circuit 10 is coupled to the output port 12 via the control component 14. In the second mode, the input port 11 and the output port 12 are short-circuited. The integrated circuit 10 is in the first mode to receive communication commands from the controller or the preceding integrated circuit 10 and forward them to the following integrated circuit 10. In the second mode, the integrated circuit 10 short-circuits its own input port 11 and output port 12 to form a path. When the communication system is operating in communication mode, the integrated circuit 10 always operates in the first mode. When the communication system is operating in calibration mode, the integrated circuit 10 first operates in the first mode to pass the received data calibration commands to the next integrated circuit 10, and then operates in the second mode. In some embodiments, when the controller detects that the time of the voltage level on the path exceeds a preset time threshold, the integrated circuit 10 is controlled to exit the second mode and operate in the first mode.

[0050] The control component 14 is configured to process the data in register 13, such as calibrating and reading the data in register 13, when a communication command indicates that it needs to process the data. Whether the control component 14 calibrates or reads the data in register 13 depends on the type of communication command. When the communication command is a data calibration command, the control component 14 is further configured to set the level of the path to a level indicating that the data calibration result is a preset calibration result if the data calibration result is a preset calibration result. When the communication command is a read command, the control component 14 is further configured to set the level of the path to a level indicating that the data calibration result is a preset calibration result if the data calibration result is a preset calibration result. Thus, an external device, such as a controller, can determine whether the data calibration result is a preset calibration result by detecting the level of the path, improving data calibration efficiency. Similarly, by detecting the level of the path, the data read result can be determined, improving data read efficiency.

[0051] When the communication command is a data verification command, in some embodiments, the level used to represent the preset verification result can be a high level, and the level used to represent the non-preset verification result is a low level; of course, it can also be the other way around, that is, in some embodiments, the level used to represent the preset verification result can be a low level, and the level used to represent the non-preset verification result is a high level. The preset verification result can be verification consistent or the opposite, and this application does not specifically limit this. When the communication command is a data read command, the data read result can be a bit value, such as 0 or 1; in some embodiments, 0 can correspond to a high level and 1 to a low level; of course, it can also be the other way around, that is, in some embodiments, 0 can correspond to a low level and 1 to a high level.

[0052] In some embodiments, the preset calibration result can be normal, and correspondingly, the level used to characterize the preset calibration result can be high. Conversely, if the data calibration result is not the preset calibration result (e.g., the data calibration result is abnormal), the level of the path is not set to the level used to characterize the preset calibration result. If the level of the path is not set to the level used to characterize the preset calibration result, the level on the path can be low. In another embodiment, the preset calibration result can be normal, and correspondingly, the level used to characterize the preset calibration result can also be low. If the level of the path is not set to the level used to characterize the preset calibration result, the level on the path can be high.

[0053] In some embodiments, the preset calibration result may be abnormal, and correspondingly, the level used to characterize the preset calibration result may be low. Correspondingly, if the data calibration result is not the preset calibration result (e.g., the data calibration result is normal), the level of the path is not set to the level used to characterize the preset calibration result. If the level of the path is not set to the level used to characterize the preset calibration result, the level on the path may be high. In another embodiment, the preset calibration result may be abnormal, and correspondingly, the level used to characterize the preset calibration result may also be high. If the level of the path is not set to the level used to characterize the preset calibration result, the level on the path may be low.

[0054] In some embodiments, after the input port 11 and the output port 12 are shorted, the control component 14 can maintain the connection with the input port 11 and disconnect the connection with the output port 12. In some embodiments, after the input port 11 and the output port 12 are shorted, the control component 14 can maintain the connection with the output port 12 and disconnect the connection with the input port 11.

[0055] In some embodiments, the control component 14 can also process and forward communication instructions, including modifying relevant data in the communication instructions. Referring to Figure 2, which shows a schematic diagram of the integrated circuit 10 processing communication instructions, after receiving a communication instruction in the first mode, the integrated circuit 10 processes the instruction and outputs it. The integrated circuit 10 can also determine if the communication instruction is of the data verification type, verify the data in register 13, switch to the second mode, control the level of the control path based on the data verification result, and then end the level output. Alternatively, the integrated circuit 10 can determine if the communication instruction is of the data read type, read the data in register 13, switch to the second mode, control the level of the control path based on the data read result, and then end the level output. In some embodiments, the value of a certain register 13 can be obtained through multiple read / write operations.

[0056] In the above embodiments, the control component 14 can process the data in register 13 and control the input port 11 and output port 12 to form a path, reflecting the instruction processing result to the controller in the form of a voltage level on the path. Specifically, when the communication instruction is a data verification instruction, the verification result can be reflected by the voltage level on the path; and when the communication instruction is a data read instruction, the data read result can be reflected by the voltage level on the path. Compared to related solutions where the controller needs to parse the message before processing, this embodiment only requires the controller to determine the instruction processing result by judging the voltage level on the path. This not only reduces the requirements on the controller's operational capabilities but also makes reflecting the instruction processing result through the voltage level on the path faster and more direct, improving communication efficiency. The control component can also control the input port and output port to be short-circuited, facilitating subsequent feedback of the instruction processing result in the form of a voltage level.

[0057] In some embodiments, referring to the circuit structure shown in FIG3, the control component 14 includes a control unit 15. The control unit 15 is connected to the register 13. The control unit 15 is configured to process the data in the register 13 accordingly when a communication instruction indicates that it needs to process data. For example, when a data verification instruction indicates that it needs to verify data, it verifies the data in the register 13. For example, when a data read instruction indicates that it needs to read data, it reads the data in the register 13.

[0058] In some embodiments, referring to the circuit structure shown in FIG3, the control unit 15 is also connected to the input port 11. The control unit 15 is configured to transmit the communication command received at the input port 11 to the output port 12 before transmitting it to the output port 12. That is, the control unit 15 is responsible for transmitting the communication command to the output port 12. Regardless of whether the communication command is transmitted, the control unit 15 maintains a connection with the input port 11. Before transmitting the communication command to the output port 12, the control unit 15 maintains a connection with the output port 12 to transmit the communication command to the output port 12.

[0059] In some embodiments, after transmitting the communication command to the output port 12, the control unit 15 disconnects from the output port 12. In some embodiments, after transmitting the communication command to the output port 12, the control unit 15 may also maintain the connection with the output port 12.

[0060] In some embodiments, referring to the circuit structure shown in FIG4, the control unit 15 is also connected to the output port 12. The control unit 15 is configured to control the transmission of the communication command received by the input port 11 to the output port 12 before transmitting it to the output port 12. That is, the control unit 15 is responsible for transmitting the communication command to the output port 12. Regardless of whether the communication command is transmitted, the control unit 15 maintains a connection with the output port 12. Before transmitting the communication command to the output port 12, the control unit 15 maintains a connection with the input port 11 to receive the communication command and transmit it to the output port 12.

[0061] In some embodiments, after transmitting the communication command to the output port 12, the control unit 15 disconnects from the input port 11. In some embodiments, after transmitting the communication command to the output port 12, the control unit 15 maintains the connection with the input port 11.

[0062] In some embodiments, please refer to the circuit structure shown in Figure 3 or Figure 4. The control unit 15 is also configured to: after transmitting to the output port 12, control the input port 11 and the output port 12 to be short-circuited. Here, short-circuiting the input port 11 and the output port 12 means that the input port 11 and the output port 12 are directly connected.

[0063] In some embodiments, a switch may be provided between the input port 11 and the output port 12, with one end of the switch connected to the input port 11 and the other end connected to the output port 12. When the switch is on, the input port 11 and the output port 12 are short-circuited. When the switch is off, the connection between the input port 11 and the output port 12 is disconnected. The control unit 15 is configured to control the switch to be on or off. Specifically, the control unit 15 is configured to: control the switch to be off before transmitting a communication command to the output port 12; and control the switch to be on after transmitting a communication command to the output port 12.

[0064] In the above embodiments, the control unit 15 can receive and process communication commands transmitted from the input port 11. Specifically, if the communication command is a data verification command, it can verify the data in the register 13; if the communication command is a data read command, it can read the data in the register 13. Alternatively, the control unit can be fixedly connected to the input port 11. Before transmitting the communication command received at the input port 11 to the output port 12, the control unit can be connected to the output port 12 to transmit the communication command to the output port 12. After transmission to the output port 12, the control unit can be disconnected from the output port 12, and the input port 11 and output port 12 can be directly short-circuited. Or, the control unit can be fixedly connected to the output port 12. Before transmitting the communication command received at the input port 11 to the output port 12, the control unit can be connected to the input port 11 to transmit the communication command to the output port 12. After transmission to the output port 12, the control unit can be disconnected from the input port 11, and the input port 11 and output port 12 can be directly short-circuited. By employing at least two of the above connection schemes, different design requirements can be met, thus broadening the applicable scenarios. Shorting input port 11 and output port 12 facilitates subsequent feedback of instruction processing results in the form of electrical levels.

[0065] In some embodiments, please refer to the circuit structure shown in FIG3. The control component 14 further includes a shorting unit 16. When the control unit 15 is connected to the input port 11, the fixed end of the shorting unit 16 is connected to the output port 12. Before receiving a control signal sent by the control unit 15, the movable end of the shorting unit 16 is connected to the control unit 15. Correspondingly, the control unit 15 is configured to, when the fixed end of the shorting unit 16 is connected to the output port 12, after transmitting the communication command to the output port 12, send a control signal to the shorting unit 16 to control the movable end of the shorting unit 16 to connect to the input port 11, so that the input port 11 and the output port 12 are shorted to form the path.

[0066] That is, before the control unit 15 outputs the communication command, the active end of the shorting unit 16 is connected to the control unit 15. After the control unit 15 outputs the data verification, it sends a control signal to the shorting unit 16, and accordingly, the active end of the shorting unit 16 is connected to the input port 11, so that the output port 12 and the input port 11 are shorted.

[0067] The shorting unit 16 can be understood as a mode selection circuit. When the movable terminal of the shorting unit is connected to the control unit 15, the integrated circuit 10 operates in the first mode. When the fixed terminal of the shorting unit 16 is connected to the output port 12, and the movable terminal of the shorting unit is switched to the input port 11, the integrated circuit 10 operates in the second mode. When the fixed terminal of the shorting unit is connected to the input port 11, and the movable terminal of the shorting unit is switched to the output port 12, the integrated circuit 10 operates in the second mode.

[0068] The shorting unit 16 can be a single-pole double-throw switch (switch S1) as shown in Figure 3. The fixed end of the single-pole double-throw switch is the fixed end of the shorting unit 16, and the movable end of the single-pole double-throw switch is the movable end of the shorting unit 16. When the movable end of the single-pole double-throw switch is connected to point b, the input port 11 is connected to the control unit 15. When the movable end of the single-pole double-throw switch is connected to point a, the input port 11 is short-circuited to the output port 12. The shorting unit 16 can also be a ball switch, a double-pole double-throw switch, etc. The number of switches in the shorting unit 16 can also be greater than one. In another embodiment, the function of a single-pole double-throw switch can be achieved using two ordinary switches.

[0069] In some embodiments, please refer to the circuit structure shown in FIG4. The control component 14 further includes a shorting unit 16. When the control unit 15 is connected to the output port 12, the fixed end of the shorting unit 16 is connected to the input port 11. Before receiving a control signal sent by the control unit 15, the movable end of the shorting unit 16 is connected to the control unit 15. Correspondingly, the control unit 15 is configured to, when the fixed end of the shorting unit 16 is connected to the input port 11, send a control signal to the shorting unit 16 after transmitting the communication command to the output port 12, to control the movable end of the shorting unit 16 to connect to the output port 12, so that the input port 11 and the output port 12 are shorted to form the path. That is, before the control unit 15 outputs the communication command, the movable end of the shorting unit 16 is connected to the control unit 15. After the control unit 15 outputs the communication, it sends a control signal to the shorting unit 16. Accordingly, the shorting unit 16 is connected to the output port 12 so that the output port 12 and the input port 11 are shorted.

[0070] The shorting unit 16 can be a single-pole double-throw switch (switch S1) as shown in Figure 4. The fixed end of the single-pole double-throw switch is the fixed end of the shorting unit 16, and the movable end of the single-pole double-throw switch is the movable end of the shorting unit 16. When the movable end of the single-pole double-throw switch is connected to point b, the input port 11 is connected to the control unit 15. When the movable end of the single-pole double-throw switch is connected to point a, the input port 11 is shorted to the output port 12.

[0071] In the above embodiments, the fixed end of the shorting unit 16 can be connected to the input port 11. This allows the control unit 15 to connect to the input port 11 via the movable end of the shorting unit 16 before receiving a control signal from the control unit 15. After receiving the control signal from the control unit 15, the input port 11 is no longer connected to the control unit 15, but bypasses the control unit 15 and is directly shorted to the output port 12. Alternatively, the fixed end of the shorting unit 16 can be connected to the output port 12. This allows the control unit 15 to connect to the output port 12 via the movable end of the shorting unit 16 before receiving a control signal from the control unit 15. After receiving the control signal from the control unit 15, the output port 12 is no longer connected to the control unit 15, but bypasses the control unit 15 and is directly shorted to the input port 11. The shorting unit 16 enables at least two of the aforementioned connection schemes, thereby meeting different design requirements and broadening the applicable scenarios. Furthermore, the shorting unit 16 has a simple structure, is easy to control, and can reduce overall manufacturing costs.

[0072] In some embodiments, please refer to the circuit structure shown in Figure 3 or Figure 4. The control component 14 further includes a level setting unit 17. The first terminal of the level setting unit 17 is connected to the control unit 15, the second terminal is connected to the first power supply 40, and the third terminal is connected to the path. The first power supply 40 is used to provide a level indicating that the instruction processing result is a preset instruction processing result (such as the level of a preset read result for a data read result, or the level of a preset correction result for a data verification result). Correspondingly, the control unit 15 is configured to: when the instruction processing result is a preset instruction processing result, control the third terminal of the level setting unit 17 to be turned on to the first power supply 40, so that the level on the path is equal to the voltage of the first power supply 40.

[0073] The control unit 15 controls the third terminal of the level setting unit 17 to be connected to the first power supply 40, so that the level of the path is set to a level that characterizes the processing result of a preset instruction. At this time, the voltage of the first power supply 40 is configured to characterize the preset calibration result. The level setting unit 17 may include a power switch, and the control unit 15 may control the power switch to be connected to the first power supply 40 when the data calibration result is a preset calibration result. In some embodiments, the level setting unit 17 is configured to set the initial value of the potential on the path to the level provided by the second power supply 41 within a preset time threshold.

[0074] In the above embodiment, by setting the level setting unit 17, the control unit 15 can control whether to generate a level to characterize the processing result of a preset instruction. When not needed, the level setting unit 17 is not connected to the first power supply 40, and the level on the path will not be set to any other level. When it is necessary to generate a level to characterize the processing result of a preset instruction, the level setting unit 17 is connected to the first power supply 40, and the level on the path is set to the level characterizing the processing result of the preset instruction. Therefore, by controlling whether the level setting unit 17 is connected to the first power supply 40, different levels can be controlled to appear on the path, correspondingly enabling the controller to recognize different instruction processing results. The control method of the level setting unit 17 is simple and efficient, indirectly improving instruction processing efficiency.

[0075] In some embodiments, referring to the circuit structure shown in Figure 3 or Figure 4, the level setting unit 17 may include at least one field-effect transistor (FET). Figure 3 or Figure 4 shows a schematic diagram of the level setting unit 17 including a FET Q1. When a FET Q1 is included, the control terminal of the FET Q1 is the first terminal of the level setting unit 17, the second terminal of the FET Q1 is the second terminal of the level setting unit 17, and the third terminal of the FET Q1 is the third terminal of the level setting unit 17.

[0076] In Figure 3, the first power supply 40 is ground, providing a low level to represent a preset read result or preset calibration result. In Figure 4, the first power supply 40 is a positive power supply voltage VDD, providing a high level to represent a preset read result or preset calibration result. It should be noted that Figures 3 and 4 are merely examples of the level setting unit 17 including one field-effect transistor. In actual implementation, multiple field-effect transistors can be connected in series to form the level setting unit 17. This application embodiment does not specifically limit this.

[0077] In the above embodiment, the first terminal of the field-effect transistor (FET) is connected to the control unit 15, the second terminal is connected to the first power supply 40, and the third terminal is connected to the path. The control unit 15 controls the path formed between the second and third terminals based on the first terminal. When the instruction processing result is a preset processing result, the third terminal is turned on to the first power supply 40, so that the path can be set to the level provided by the first power supply 40. Since the FET has the advantage of fast switching speed, the integrated circuit 10 can generate the level used to characterize the preset instruction processing result in a timely manner, thereby improving the feedback efficiency of the instruction processing result. In addition, since the FET has a simple structure and is easy to control, the overall manufacturing cost can also be reduced.

[0078] In some embodiments, referring to the circuit structure shown in Figure 5, the path is connected to one end of the level maintenance unit 18, and the other end of the level maintenance unit 18 is connected to the second power supply 41. The control component 14 is also configured to: if the instruction processing result is not a preset calibration result, not set the level of the path to the level used to characterize the preset instruction processing result. In this case, the level maintenance unit 18 is configured to: set the level of the path to the level provided by the second power supply 41. The level maintenance unit 18 can be connected to any position of the path. If the control component 14 does not need to feedback the preset instruction processing result, the level of the path remains the level provided by the second power supply 41.

[0079] In some embodiments, the level maintenance unit 18 is disposed outside the integrated circuit 10. A communication link consisting of multiple series-coupled integrated circuits 10 shares one level maintenance unit 18. In some embodiments, the level maintenance unit 18 includes a resistor R, one end of which is connected to the path, and the other end is connected to the second power supply 41. The resistance value of the resistor R can be selected according to actual needs, and is not limited in this embodiment. In some embodiments, the level maintenance unit 18 includes a current source, which is coupled between any node on the path and the second power supply. By controlling the operation of the current source, the level of the path can be set to the level provided by the second power supply.

[0080] In some embodiments, referring to FIG6, if the level used to characterize the processing result of the preset instruction is low, then the first power supply 40 can be ground. Correspondingly, the level provided by the second power supply 41 is high, and the second power supply 41 can be VDD. In this case, the level setting unit 17 can be understood as a pull-down unit, and the level holding unit 18 can be understood as a pull-up unit.

[0081] In some embodiments, referring to FIG7, if the level used to characterize the processing result of the preset instruction is high, then the first power supply 40 can be VDD. Correspondingly, the level provided by the second power supply 41 is low, and the second power supply 41 can be ground. In this case, the level setting unit 17 can be understood as a pull-up unit, and the level holding unit 18 can be understood as a pull-down unit.

[0082] In the above embodiments, the level maintenance unit 18 can set the level on the path to the level provided by the second power supply 41 to indicate that the instruction processing result is not a preset instruction processing result. Through the first power supply 40 and the second power supply 41, different levels can be provided to represent different situations when the instruction processing result is a preset instruction processing result and when the instruction processing result is not a preset instruction processing result. This allows the controller to determine the instruction processing result through easily identifiable levels, eliminating the need for the data transmission link previously involved in transmitting the instruction processing result via return messages, thus improving communication speed. Furthermore, the level maintenance unit 18 has a simple structure and low repair costs after damage; simultaneously, the level maintenance unit 18 can be connected to any position on the path, offering flexible connection methods to meet different design requirements and broaden its application scenarios.

[0083] In some embodiments, referring to Figure 8, the data verification instruction includes the address of the target register 13 (as shown in the figure) and reference data. When the control component 14 executes the data verification instruction to verify the data in register 13, it is configured to: determine that the data verification instruction indicates that it needs to verify data when the address of the target register 13 is the address of the connected register 13; and verify the data stored at the corresponding address of the target register 13 based on the reference data. The data verification instruction also includes a command and an end command. The reference data can be a data range. The control component 14 compares the data read from register 13 with the reference data to obtain the data verification result. If the data read from register 13 is inconsistent with the reference data, the data verification result is determined to be abnormal. Conversely, if the data read from register 13 is consistent with the reference data, the data verification result is determined to be normal.

[0084] Figure 8 illustrates two switching processes. The first switching occurs after the controller sends a communication command, switching the transmission port to receive mode to facilitate reading high and low voltage levels. The second switching occurs after the controller reads the high and low voltage levels, switching the transmission port to transmit mode to facilitate sending the next communication command.

[0085] In some embodiments, the data verification instruction does not contain reference data, but rather a target data address. The control component 14 reads the data corresponding to the target data address from the register 13, reflecting the different data read through the level on the path. Correspondingly, the controller determines the read data based on the level on the path, and then verifies the read data.

[0086] In some embodiments, referring to Figure 9, the data read instruction includes target address bits, which contain a target register address and a target data address. The target register address may include the address of integrated circuit 10 and the address of register 13. The target data address may contain the address bits of the target data.

[0087] When the control component 14 executes a data read instruction indicating that it needs to read data, and reads data from register 13, it is configured to: determine that the data read instruction indicates that it needs to read data when the target register address is the address of the connected register; and read the data stored at the target register address based on the target data address. The data read instruction also includes a command and an end command.

[0088] Figure 9 illustrates two switching processes. The first switching occurs after the controller sends a communication command, switching the transmission port to receive mode to facilitate reading high and low voltage levels. The second switching occurs after the controller reads the high and low voltage levels, switching the transmission port to transmit mode to facilitate sending the next communication command.

[0089] In the above embodiments, communication commands can be divided into data read commands and data verification commands, both of which can be processed by the control component 14. This eliminates the need for the controller to process the result messages, thereby reducing the controller's load and lowering the requirements for its operational capabilities. Furthermore, the processing results of both commands can be represented by the level of the communication path, reflecting the processing results more quickly and directly, thus improving communication efficiency.

[0090] Please refer to Figure 10 for a schematic diagram of the data verification instruction. This data verification instruction can also be considered a data read instruction, where Data Number indicates the location of the bit to be read in register 13. The structure of the data verification instruction is Command + Device Address + Register Address + Data Number + Data + End. Command indicates the operation content of this communication: register 13 comparison, register 13 bitwise read, or register 13 read. Bitwise read is used to read the value of a specific bit. Register 13 read is used to read the values ​​of all bits in register 13. Device Address indicates the address of integrated circuit 10, used to specify the address of the target integrated circuit 10 in this communication. This can refer to the address of a single integrated circuit 10 in a communication system 20 composed of multiple integrated circuits 10, or the addresses of multiple integrated circuits 10 in the communication system 20, or the addresses of all integrated circuits 10 in the communication system 20. Register Address indicates the address of register 13 in the target integrated circuit 10 in this communication. Data represents reference data, which can be a single data item or multiple data items. Data Number indicates the amount of data. In bitwise read mode, this data can be used to specify the position of the bit to be read in register address 13. End can indicate an end command or be included in the data verification instruction; this embodiment is not limited to this.

[0091] Figure 10 shows a schematic diagram of the data verification instruction passing through five sequentially connected integrated circuits 10. SDIn represents the input port 11 of the nth integrated circuit 10 (n = 1, 2, 3, 4, 5 in the figure). It can be seen from the figure that there is a delay when the data verification instruction is transmitted to the next integrated circuit 10. The above is a description of the integrated circuit 10 provided in this embodiment. It is understood that the integrated circuit 10 may also include other devices, as long as they can achieve the above functions. This embodiment does not impose any limitations.

[0092] Some embodiments of this application also provide a communication system 20, as shown in the circuit structure in Figure 11. The communication system 20 includes N integrated circuits 10 as provided in any of the preceding embodiments, where N is a natural number greater than zero. The figure shows the case where N equals 2. When N is greater than 1, the N integrated circuits 10 are connected in series. For example, when N equals 3, the output port 12 of the first integrated circuit 10 is connected to the input port 11 of the second integrated circuit 10, and the output port 12 of the second integrated circuit 10 is connected to the input port 11 of the third integrated circuit 10.

[0093] In each integrated circuit 10, the communication command can be transmitted from the input port 11 of the integrated circuit 10 to the control component 14, and then from the control component 14 to the output port 12. Since the N integrated circuits 10 are connected in series, the communication command can be transmitted from the first integrated circuit 10 to the Nth integrated circuit 10.

[0094] Understandably, each control component 14 in each integrated circuit 10, after outputting the communication command, controls the input port 11 and the output port 12 to short-circuit to form a path. When i (i greater than 0 and less than or equal to N) integrated circuits 10 form a path, every two adjacent paths in the i paths are connected to form a transmission link. The voltage level of this path is equal to the voltage level on the transmission link.

[0095] Within a preset time threshold, if the voltage level of a path in one integrated circuit 10 is set to the level provided by the first power supply 40, then the voltage level of the communication link is set to the level provided by the first power supply 40. Within the preset time threshold, if none of the paths in all integrated circuits 10 are set to the level provided by the first power supply 40, then the voltage level on the transmission link remains at the level provided by the second power supply 41.

[0096] Before the first integrated circuit 10 processes the communication command, the initial value of the voltage level on the communication link is set to the level provided by the second power supply 41. After the voltage level of the path in any integrated circuit 10 is set to the level provided by the first power supply 40, the voltage levels of the paths in the other integrated circuits 10 are all set to the level provided by the first power supply 40.

[0097] For example, the integrated circuit 10 set to the level provided by the second power supply 41 is the i-th integrated circuit 10. The i-th integrated circuit 10 operates in a first mode to receive communication commands issued by the (i-1)-th integrated circuit 10 and forward them to the (i+1)-th integrated circuit 10. Then, the i-th integrated circuit 10 is controlled to operate in a second mode to form a path by short-circuiting its own input and output ports. At this time, since the level on the sub-transmission link formed by the series coupling of the path in the first integrated circuit 10 to the path in the i-th integrated circuit 10 is set to the level provided by the second power supply 41, the level of the path in the i-th integrated circuit 10 is set to the level provided by the second power supply 41.

[0098] If the communication command is a data verification command, the i-th integrated circuit 10 performs a comparison. If the comparison is inconsistent, the level of the path in the i-th integrated circuit 10 is set to the level provided by the first power supply 40, that is, the level provided by the second power supply 41 is switched to the level provided by the first power supply 40. Correspondingly, the level of the sub-transmission link formed by the series coupling of the path in the first integrated circuit 10 to the path in the i-th integrated circuit 10 is set to the level provided by the first power supply 40, and the level of the transmission link is also set to the level provided by the first power supply 40. The controller 230 receives the level provided by the first power supply 40 as a representation of the preset read result or preset verification result.

[0099] In some embodiments, the controller 230 has detected that the level on the communication link is the level provided by the first power supply 40, but the transmission of the communication command and the processing of the communication command by the integrated circuit 10 continue. For example, the path in the i-th integrated circuit 10 is set to the level provided by the first power supply 40, but after the (i+1)-th integrated circuit 10 receives the communication command, it continues to transmit it to the (i+2)-th integrated circuit 10, and the (i+1)-th integrated circuit still processes the communication command. Afterwards, the level on the path in the (i+2)-th to the N-th integrated circuit 10 is sequentially set to the level provided by the first power supply 40.

[0100] In some embodiments, the transmission of the communication command and / or the processing of the communication command by the integrated circuit 10 stops after the controller 230 has detected that the level on the communication link is the level provided by the first power supply 40. For example, if the path in the i-th integrated circuit 10 is set to the level provided by the first power supply 40, the communication command is no longer transmitted to the (i+1)-th integrated circuit 10. The structure of each of the N integrated circuits 10 can be completely identical or different, and this embodiment does not limit this.

[0101] In the above embodiment, N integrated circuits 10 are connected in series, allowing communication commands to be transmitted from the first integrated circuit 10 to the Nth integrated circuit 10. The control component 14 in each integrated circuit 10 forms a path after transmitting the communication command, and every two adjacent paths are connected to form a transmission link. Thus, by connecting N integrated circuits 10 in series, not only is the transmission of communication commands achieved, but the communication result can also be obtained by detecting the level on the transmission link, improving communication speed and further enhancing communication efficiency. Simultaneously, since it is no longer necessary to receive the processing result message after processing the communication command through a bidirectional input / output port as before, the controller no longer needs to process the processing result message, thereby reducing the controller's load and lowering the requirements for its operational capabilities.

[0102] In addition, since input port 11 and output port 12 are shorted to form a path after the communication command is forwarded, the effect of multiplexing input port 11 and output port 12 is achieved. This solves the problem in related technical solutions that both input port 11 and output port 12 of integrated circuit 10 need to use bidirectional transmission port 21. The integrated circuit 10 provided in this embodiment has an active data transmission function, which can effectively reduce the overall manufacturing cost of integrated circuits.

[0103] In some embodiments, please refer to the circuit structure shown in FIG11. The communication system 20 also includes a controller 230. The controller 230 is configured to: send communication instructions (e.g., data read instructions, data verification instructions) to the input port 11 of the first integrated circuit 10; and determine the instruction processing result (e.g., data read result, data verification result) based on the level on the transmission link. The controller 230 can be understood as a master, and the integrated circuit 10 can be understood as a slave.

[0104] In some embodiments, the controller 230 and N integrated circuits 10 are connected in series via a daisy chain.

[0105] In some embodiments, when the communication system 20 is operating in communication mode, the controller 230 communicates serially with a plurality of the integrated circuits 10. The controller 230 sends communication commands to the first integrated circuit 10, which is operating in a first mode at this time. The input port 11 of the integrated circuit 10 is coupled to its output port 12 through the control component 14.

[0106] In some embodiments, when the communication system 20 is operating in an instruction processing mode (e.g., read mode, calibration mode), the i-th integrated circuit 10 first operates in the first mode, and the communication instruction is passed to the (i+1)-th integrated circuit 10. Then, the i-th integrated circuit 10 operates in the second mode (input port 11 and output port 12 are shorted to form a path), so that when it obtains a preset instruction processing result, it reflects the level used to characterize the preset instruction processing result to the controller 230 based on the path.

[0107] The controller 230 is configured to send a communication command to the first directly connected integrated circuit 10. As described above, the communication command is then transmitted from the first integrated circuit 10 to the Nth integrated circuit 10, and each integrated circuit 10 can determine whether the communication command indicates that it needs to process (e.g., read data, verify data). It is important to emphasize that the action of the controller 230 in sending the communication command must be completed before the integrated circuit 10 switches from the first mode to the second mode.

[0108] In some embodiments, the controller 230 is provided with a port for outputting data calibration instructions and a port for sensing voltage levels. The data calibration instructions can be output to the first integrated circuit 10 via the port for outputting data calibration instructions. The voltage level on the transmission link can be detected via the port for sensing voltage levels. The controller 230 determines the instruction processing result based on the voltage level on the transmission link.

[0109] Referring to the above description of the integrated circuit 10, for example, if the level on the transmission link indicates a data read result of 1, then the controller 230 can determine that the data read result is 1 based on the level on the transmission link. If the level on the transmission link is the level provided by the second power supply 41, the controller 230 can determine that the data read result may be the opposite of the preset read result based on the level on the transmission link. For example, if the preset read result is 1, and the controller 230 detects that the level on the transmission link is the level provided by the second power supply 41, then it determines that the data read result is 0.

[0110] Referring to the above description of the integrated circuit 10, for example, if the level on the transmission link indicates that the data calibration result is normal, then the controller 230 can determine that the data calibration result is normal based on the level on the transmission link. If the level on the transmission link is the level provided by the second power supply 41, the controller 230 can determine that the data calibration result may be the opposite of the preset calibration result based on the level on the transmission link. For example, if the preset calibration result is normal, and the controller 230 detects that the level on the transmission link is the level provided by the second power supply 41, then it determines that the data calibration result is abnormal.

[0111] The solution provided in the above embodiments has a greater advantage in communication systems where the output port of the last integrated circuit 10 is not coupled to the controller 230. Data reading and data verification are completed within the integrated circuit 10, and the signal (which can also be understood as a level) representing the instruction processing result is reflected to the controller 230 in a direct manner by shorting the input port 11 and the output port 12 of the integrated circuit 10, thus reducing the difficulty of wiring.

[0112] In some embodiments, in order to facilitate individual detection to improve the accuracy of communication instructions (e.g., data verification instructions, data reading instructions), the communication instruction instructs an integrated circuit 10 to process the communication instruction, and the data verification result (e.g., data verification result, data reading result) of the integrated circuit 10 is determined by the level on the transmission link.

[0113] In some embodiments, to save on data verification costs through batch testing, the communication command can instruct multiple integrated circuits 10 to be processed, and the command processing results of the multiple integrated circuits 10 can be determined by the level on the transmission link. The type of controller 230 can be selected according to actual needs, and the type of controller 230 can be referred to the above description, which will not be repeated here.

[0114] In some embodiments, the system-on-a-chip (SoC) is configured to generate backlight brightness data and display data based on a video input signal or an image input signal. In some embodiments, the controller 230 may include a timing controller 230 electrically connected to the SoC, configured to obtain intermediate display data, process the intermediate display data, and output display data in a timing sequence. The intermediate display data cannot be directly processed by the display panel, while the display data is data that the display panel can process. In some embodiments, the timing controller 230 is electrically connected to the display panel and configured to map the display data to the positions of liquid crystal molecules, so that the display data obtained by the display panel corresponds to the data to be displayed. In some embodiments, the controller 230 may include a backlight controller or a dimming controller, configured to obtain processed data associated with the backlight brightness data, generate and output backlight driving data from the processed data.

[0115] In some embodiments, please refer to the circuit structure shown in FIG12. The controller 230 is provided with a transmission port 21. Specifically, when a transmission port 21 is provided, the transmission port 21 is connected to the input port 11 of the first integrated circuit 10. At this time, the transmission port is an input / output multiplexed port. The transmission port 21 is capable of outputting the communication command. The level of the transmission port 21 is equal to the level on the transmission link. The level on the transmission link can be the level provided by the first power supply 40 as described above, or it can be the level provided by the second power supply 41. The output port 21 is in the transmitting state before the communication command is issued, and switches to the receiving state after the communication command is issued.

[0116] In some embodiments, the transmission port 21 is set to a high-impedance state after a communication command is issued to reduce the impact of the voltage level on the communication link on the transmission port 21. In some embodiments, the transmission port 21 is connected to the input port 11 of the first integrated circuit 10 via a signal transmission line, and can also be connected to any location on the transmission link via a signal detection line.

[0117] In the above embodiment, the controller 230 is provided with a transmission port 21. The transmission port 21 can both output data verification commands and connect to the transmission link so that the controller 230 can detect the level on the transmission link. In other words, the transmission port 21 is an input / output multiplexed port. This design of a single transmission port 21 solves the problems of multiple ports, multiple wiring, and complex design of the controller 230.

[0118] In some embodiments, please refer to the circuit structure shown in Figure 13. The controller 230 is provided with a transmission port 21. Specifically, when at least two transmission ports 21 are provided, the at least two transmission ports 21 include a first transmission port 22 and a second transmission port 23. The first transmission port 22 is configured as an output port, and the second transmission port 23 is configured as an input port.

[0119] The first transmission port 22 is connected to the input port 11 of the first integrated circuit 10. The first transmission port 22 is configured to output communication commands. In some embodiments, the first transmission port 22 can be connected to the input port 11 of the first integrated circuit 10 via a signal transmission line to receive the level on the transmission link. In some embodiments, the first transmission port 22 is set to a high-impedance state to reduce the impact of the level on the communication link on the first transmission port 22.

[0120] In some other embodiments, the second transmission port 23 is connected to at least one output port 12 and / or input port 11 of the integrated circuit 10. That is, the second transmission port 23 can be connected to any input port 11 of the integrated circuit 10, any output port 12 of the integrated circuit 10, any number of input ports 11 of the integrated circuit 10, any number of output ports 12 of the integrated circuit 10, any input port 11 and output port 12 of the integrated circuit 10, or any number of input ports 11 and output ports 12 of the integrated circuit 10. Figure 11 shows a schematic diagram of the second transmission port 23 connected to the input ports 11 of the first and second integrated circuits 10. The actual connection method is not limited to the connection method shown in the figure. As long as the second transmission port 23 can be connected to the transmission link, the actual connection method is not overly limited.

[0121] In some embodiments, to reduce routing complexity, the second transmission port 23 is not connected to the output port 12 of the Nth integrated circuit 10. In some embodiments, to further reduce routing complexity, the second transmission port 23 is connected to the output port 12 of the first integrated circuit 10. The voltage level of the second transmission port 23 is equal to the voltage level on the transmission link. The voltage level on the transmission link can be the voltage level provided by the first power supply as described above, or it can be the voltage level provided by the second power supply 41.

[0122] In some embodiments, please refer to the circuit structures shown in Figures 14(a) and 14(b). The controller 230 includes a level maintenance unit 18. The number of level maintenance units 18 may be one or more.

[0123] When the controller 230 has a transmission port 21, one end of the level maintenance unit 18 is connected to the transmission port 21 of the controller 230, and the other end is connected to the second power supply 41. The second power supply 41 is used to provide the power level. The level maintenance unit 18 is configured to set the level of the transmission link to the level provided by the second power supply 41 when the level of the transmission link is not set to a level that characterizes the processing result of a preset instruction. A description of the level maintenance unit 18 can be found in the above description, and will not be repeated here.

[0124] In some embodiments, referring to FIG14(a), the level used to characterize the processing result of the preset instruction is a low level, and the first power supply 40 can be ground. Correspondingly, the level provided by the second power supply 41 is a high level, and the second power supply 41 can be VDD. The level maintenance unit 18 can be understood as a pull-up circuit, and the level setting unit 17 can be understood as a pull-down circuit.

[0125] In some embodiments, referring to FIG14(b), the level used to characterize the processing result of the preset instruction is a high level, and the first power supply 40 can be VDD. Correspondingly, the level provided by the second power supply 41 is a low level, and the second power supply 41 can be ground. The level maintenance unit 18 can be understood as a pull-down circuit, and the level setting unit 17 can be understood as a pull-up circuit.

[0126] In some embodiments, please refer to the circuit structures shown in Figures 15(a) and 15(b). The controller 230 includes a level maintenance unit 18. When the controller 230 is provided with at least two transmission ports (including a first transmission port 22 and a second transmission port 23), one end of the level maintenance unit 18 is connected to the second transmission port 23, and the other end is connected to the second power supply 41. The level maintenance unit 18 is configured to set the level of the transmission link to the level provided by the second power supply 41 when the level of the transmission link is not set to a level used to characterize the processing result of a preset instruction.

[0127] In some embodiments, referring to FIG15(a), the level used to characterize the processing result of the preset instruction is a low level, and the first power supply 40 can be ground. Correspondingly, the level provided by the second power supply 41 is a high level, and the second power supply 41 can be VDD. The level maintenance unit 18 can be understood as a pull-up circuit, and the level setting unit 17 in the integrated circuit 10 can be understood as a pull-down circuit.

[0128] In some embodiments, referring to FIG15(b), the level used to characterize the processing result of the preset instruction is a high level, and the first power supply 40 can be VDD. Correspondingly, the level provided by the second power supply 41 is a low level, and the second power supply 41 can be ground. The level maintenance unit 18 can be understood as a pull-down circuit, and the level setting unit 17 in the integrated circuit 10 can be understood as a pull-up circuit.

[0129] In some embodiments, please refer to the circuit structures shown in Figures 16(a) and 16(b). The controller 230 includes a level maintenance unit 18. One end of the level maintenance unit 18 is connected to either the input port 11 or the output port 12 of any of the integrated circuits 10, and the other end is connected to the second power supply 41. Alternatively, one end of the level maintenance unit 18 can be connected at any location on the transmission link. The level maintenance unit 18 is configured to set the level of the transmission link to the level provided by the second power supply 41 when the level of the transmission link is not set to a level that characterizes the result of a preset instruction processing.

[0130] In some embodiments, referring to FIG16(a), the level used to characterize the processing result of the preset instruction is a low level, and the first power supply 40 can be ground. Correspondingly, the level provided by the second power supply 41 is a high level, and the second power supply 41 can be VDD. The level maintenance unit 18 can be understood as a pull-up circuit, and the level setting unit 17 in the integrated circuit 10 can be understood as a pull-down circuit.

[0131] In some embodiments, as shown in FIG16(b), the level used to characterize the processing result of the preset instruction is a high level, and the first power supply 40 can be VDD. Correspondingly, the level provided by the second power supply 41 is a low level, and the second power supply 41 can be ground. The level maintenance unit 18 can be understood as a pull-down circuit, and the level setting unit 17 in the integrated circuit 10 can be understood as a pull-up circuit. In the above embodiments, the position of the level maintenance unit 18 only needs to be connected to any one of the input ports 11 or output ports 12 of the integrated circuit 10, and the connection method is relatively flexible, thereby meeting different design requirements and broadening the applicable scenarios.

[0132] The above is a description of the communication system 20 provided in the embodiments of this application. It can be understood that the communication system 20 may also include other devices, as long as they can achieve the above functions. This embodiment does not impose too many limitations.

[0133] Some embodiments of this application also provide a backlight driving system 30. Referring to the circuit structure shown in FIG17, the backlight driving system 30 includes a backlight assembly 220. The backlight assembly 220 is configured to emit light based on backlight driving data. The display panel can display an image based on the backlight provided by the backlight assembly 220.

[0134] The backlight assembly 220 may include multiple LEDs, at least one of which is electrically connected to form a light-emitting unit group, which emits light based on a driving signal. The LEDs may be composed of MiniLED, MicroLED, WLED, RGB-LED, GB-rLED, or QLED (quantum dot).

[0135] In some embodiments, in the light-emitting unit group, at least one LED bead is connected in series to form a light string. The connection process is simple, the production cost is low, and the layout is convenient.

[0136] In some embodiments, in the light-emitting unit group, at least one LED is connected in parallel, and the working states of each LED do not affect each other.

[0137] In some embodiments, in the light-emitting unit group, after at least one lamp bead is connected in series to form a lamp string, at least one lamp string is connected in parallel, which facilitates the simple implementation of the balanced connection process and the stability of the lamp bead's light emission.

[0138] In some embodiments, the backlight assembly 220 has multiple LED arrays distributed in a single string. The LED string can be a string of LEDs connected in series from left to right or from right to left, or it can be a string of LEDs connected in series from top to bottom or bottom to top. It can also be a string of LEDs connected in series according to a preset order (e.g., rotation, bending, etc.) to adapt to the display order of the display panel and ensure the display quality of the display device.

[0139] In the above embodiments, the backlight driving system 30 includes a backlight component 220, which can emit light based on backlight driving data. By changing the distribution of LEDs in the backlight component 220, the manufacturing process can be simplified, the production cost can be reduced, and the light emission stability of the backlight component 220 can be improved.

[0140] In some embodiments, referring to the circuit structure shown in FIG17, the backlight driving system 30 further includes N (N is a natural number greater than zero) integrated circuits 10 as described above.

[0141] When N is greater than 1, N of these integrated circuits 10 are connected in series.

[0142] For a description of N such integrated circuits 10, please refer to the relevant descriptions above, which will not be repeated here.

[0143] In the above embodiment, the backlight driving system 30, through the series connection of N integrated circuits 10, not only realizes the transmission of communication commands, but also obtains the command processing results by detecting the level on the transmission link, thereby improving communication speed and efficiency.

[0144] In some embodiments, referring to the circuit structure shown in FIG17, the backlight driving system 30 includes a control chip 31. The control chip 31 is connected to the input port 11 of the first integrated circuit 10.

[0145] The control chip 31 can be understood as the controller 230 mentioned above. For a description of the control chip 31, please refer to the description of the controller 230 mentioned above. It will not be repeated here.

[0146] In some embodiments, the control chip 31 includes a level maintenance unit 18. A description of the level maintenance unit 18 can be found in the above description of the level maintenance unit 18, and will not be repeated here.

[0147] The above is a description of the backlight driving system 30 provided in the embodiments of this application. It can be understood that the backlight driving system 30 may also include other devices, as long as they can achieve the above functions. This embodiment does not impose too many limitations.

[0148] Some embodiments of this application also provide a display device 200. The display device 200 includes the backlight driving system 30 as described above.

[0149] In this application embodiment, display device 200 generally refers to a device with screen display and data processing capabilities. For example, display devices include, but are not limited to, smart TVs, laser projection devices, monitors, electronic bulletin boards, electronic tables, mobile terminals, computers, surveillance monitors, advertising screens, wearable devices, virtual reality devices, augmented reality devices, etc.

[0150] Figure 18 is a schematic diagram of an operation scenario between a display device 200 and a control device 100 provided in some embodiments of this application. As shown in Figure 18, a user can operate the display device 200 through the control device 100 or the smart device 300.

[0151] In some embodiments, the control device 100 may be a remote control, a stylus, a gamepad, etc. Taking a remote control as an example, the communication between the remote control and the display device 200 includes infrared protocol communication or Bluetooth protocol communication, as well as other short-range communication methods, to control the display device 200 wirelessly or via wired means. Users can input user commands through buttons on the remote control, voice input, control panel input, etc., to control the display device 200.

[0152] In some embodiments, a smart device 300 (such as a mobile terminal, tablet computer, computer, laptop computer, etc.) can also be used to control the display device 200. For example, an application running on the smart device can be used to control the display device 200. In some embodiments, the display device 200 may receive instructions without using the aforementioned smart device or control device, but instead receive user control through touch or gestures. In some embodiments, the display device 200 may also be controlled in ways other than the control device 100 and the smart device 300. For example, it can directly receive user voice commands through a module configured inside the display device 200 that acquires voice commands, or it can receive user voice commands through a voice control device external to the display device 200.

[0153] In some embodiments, the display device 200 also communicates with the server 400. The display device 200 may be communicatively coupled via a local area network (LAN), wireless local area network (WLAN), and other networks. The server 400 may provide various content and interactive features to the display device 200. The server 400 may be a cluster or multiple clusters, and may include one or more types of servers.

[0154] Figure 19 is a schematic diagram of the structure of a display device 200 provided in some embodiments of this application. As shown in Figure 19, in some embodiments, the display device 200 includes a display panel 210, which includes liquid crystal molecules configured to deflect based on received processed display data. In some embodiments, the display device 200 includes a backlight assembly 220 as described above. In some embodiments, the display device 200 includes a controller 230, which is configured to receive a video input signal or an image input signal, obtain backlight brightness data and display data based on the video input signal or the image input signal, and perform format conversion, timing control, and other processing on the backlight brightness data and display data before outputting them.

[0155] In some embodiments, the controller 230 is configured to obtain video input signals or image input signals (hereinafter referred to as input signals) from an external input port or a network port, and perform operations such as format conversion, data processing, and image rendering on the input signals to improve the display quality of the input signals. In some embodiments, the controller 230 may be configured to output data based on a preset protocol, such as an AM driving protocol, which is a protocol supported by the backlight assembly 220. The backlight assembly 220 can process the driving data of the preset protocol to generate corresponding brightness.

[0156] In some embodiments, the AM driver protocol includes the Serial Peripheral Interface (SPI) protocol, which is widely used in display devices and has strong versatility. In some embodiments, the AM driver protocol includes the Single Wire Protocol (SWP). The Single Wire Protocol aims to transmit data via a single communication line, thereby simplifying hardware connections, reducing the number of required pins, and thus reducing costs and improving the reliability of the display system. In some embodiments, the AM driver protocol includes the SPB protocol, in which an electrical signal with a transition during the data cycle corresponds to a 1 in the drive data code, and an electrical signal with no transition during the data cycle corresponds to a 0 in the drive data code. Furthermore, a level transition occurs after each data cycle, providing higher stability compared to the SPI protocol.

[0157] Figure 20 is a schematic diagram of the physical structure of a backlight assembly and a display panel provided in some embodiments of this application. In some embodiments, as shown in Figure 20, the display panel 210 is placed above the backlight assembly 220 (not shown in the figure), and an image can be displayed on the upper side of the display panel 210. In some embodiments, the backlight assembly 220 includes a diaphragm 501, configured to improve the reflection efficiency of the backlight generated by the backlight assembly, adjust the light, increase the brightness and color saturation of the output image of the display, increase the light utilization rate, and enable the screen to display images normally. In some embodiments, the backlight assembly 220 includes a diffuser plate 502, configured to scatter light and guide light uniformly, making the brightness distribution of the entire display panel more uniform. In some embodiments, the backlight assembly 220 includes a bracket 503, configured to support the diffuser plate 502 and the diaphragm 501, etc., to maintain the optical spacing between the lamp plate 508 and the diffuser plate 502.

[0158] In some embodiments, the backlight assembly 220 includes a reflective sheet 504 configured to reflect the backlight of the lamp panel 508 in the direction of the diffuser plate 502. In some embodiments, the backlight assembly 220 includes a back plate 507 configured to provide a supporting substrate. In some embodiments, the backlight assembly 220 includes a lamp panel 508 on which LEDs are disposed, configured to provide backlight. In some embodiments, taking a micro LED display device as an example, the backlight assembly 220 has multiple lamp panels 508, which are spliced ​​together to emit light together to provide backlight to the display panel 210. Each lamp panel 508 includes multiple light-emitting areas, and each light-emitting area (also called a partition) includes multiple micro LEDs. The lamp panel 508 is electrically connected to at least one driver group 221. In some embodiments, the driver group 221 is disposed on the lamp panel 508.

[0159] The driver group 221 includes one or more driver chips 2210. Each driver chip 2210 receives backlight driving data from the backlight controller 233 and drives the corresponding LEDs to emit light based on the backlight driving data, thereby achieving local backlight control of the backlight component 220, i.e., realizing local dimming. This enables more precise regional light control, resulting in more uniform and harmonious screen brightness. The display device 200 includes the backlight driving system described above. The above is a description of the display device 200 provided in this application embodiment. It is understood that the display device 200 may also include other devices, as long as they can achieve the above functions. This embodiment does not impose any limitations.

[0160] Some embodiments of this application also provide a data reading method, which can be applied to the controller in the communication system described above, the control chip in the backlight driving system, and the controller in the display device. The data reading method includes:

[0161] S2101, output a data read command to determine the data read result based on the level on the communication link. Specifically, if the level on the communication link is detected to be the level used to characterize a preset read result, then the data read result is determined to be the preset read result. The preset read result can be 1. Specifically, if the level on the communication link is detected to be the level provided by the second power supply 41 as described above, then the data read result can be determined to be the opposite of the preset read result. For example, the preset read result is 1, and the opposite result is 0. In some embodiments, if the data read result is determined to be 1, a data read command can be output again to verify whether the read data is accurate.

[0162] Some embodiments of this application also provide a data calibration method, which can be applied to the controller in the communication system described above, the control chip in the backlight driving system, and the controller in the display device. The data calibration method includes: S2201, outputting a data calibration command and determining the data calibration result based on the level on the communication link. Specifically, if the level on the communication link is detected to be a level used to characterize a preset calibration result, then the data calibration result is determined to be the preset calibration result. The preset calibration result can be abnormal. Specifically, if the level on the communication link is detected to be the level provided by the second power supply 41 described above, then the data calibration result can be determined to be the opposite of the preset calibration result. For example, the preset calibration result is abnormal, and the result opposite to the preset calibration result is normal.

[0163] In some embodiments, if the data verification result is determined to be abnormal, a data write command can be output to rewrite the correct data. In some embodiments, if the data verification result is determined to be abnormal, a data read command can be output to further determine whether the reread data is indeed abnormal.

[0164] It should be understood that the phrase "an embodiment" or "one embodiment" throughout the specification means that a particular feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in one embodiment" appearing throughout the specification does not necessarily refer to the same embodiment.

Claims

1. An integrated circuit having an input port and an output port; The integrated circuit includes: register; A control component is connected to the register, the input port, and the output port, respectively; The control component is configured as follows: The data verification command received at the input port is transmitted to the output port, and after being transmitted to the output port, the input port and the output port are short-circuited to form a path; When the data verification instruction indicates that it needs to verify data, the data in the register is verified. If the data verification result is the preset verification result, the level of the channel is set to the level used to characterize the preset verification result.

2. The integrated circuit according to claim 1, wherein the control component comprises: The control unit is connected to the register and also to the input port or output port; The control unit is configured to: When the data verification instruction indicates that it needs to verify data, the data in the register is verified. Before transmitting the data verification command received at the input port to the output port, the control unit transmits the data verification command to the output port. After the data is transmitted to the output port, the input port and the output port are short-circuited.

3. The integrated circuit according to claim 2, wherein the control component further comprises: A shorting unit, wherein when the control unit is connected to the input port, the fixed end of the shorting unit is connected to the output port; When the control unit is connected to the output port, the fixed end of the shorting unit is connected to the input port; before receiving a control signal from the control unit, the movable end of the shorting unit is connected to the control unit. The level setting unit has a first end connected to the control unit, a second end connected to the first power supply, and a third end connected to the path. The first power supply is used to provide a level that indicates the data calibration result is a preset calibration result. The control unit is configured as follows: When the fixed end of the shorting unit is connected to the output port, after the data calibration instruction is transmitted to the output port, a control signal is sent to the shorting unit to control the movable end of the shorting unit to connect to the input port, so that the input port and the output port are shorted to form the path. When the fixed end of the shorting unit is connected to the input port, after the data calibration instruction is transmitted to the output port, a control signal is sent to the shorting unit to control the movable end of the shorting unit to connect to the output port, so that the input port and the output port are shorted to form the path; If the data verification result is the preset verification result, the third terminal of the level setting unit is controlled to be turned on to the first power supply.

4. The integrated circuit according to claim 3, wherein the level setting unit comprises: At least one field-effect transistor; In the case of including a field-effect transistor (FET), the control terminal of the FET is the first terminal of the level setting unit, the second terminal of the FET is the second terminal of the level setting unit, and the third terminal of the FET is the third terminal of the level setting unit.

5. The integrated circuit according to any one of claims 1-4, wherein the path is connected to one end of the level maintenance unit, and the other end of the level maintenance unit is connected to a second power supply; The control component is further configured to: If the data verification result is not the preset verification result, the level of the path will not be set to the level used to characterize the preset verification result; Accordingly, the level maintenance unit is configured as follows: Set the level of the path to the level provided by the second power supply.

6. The integrated circuit according to any one of claims 1-4, wherein the data verification instruction includes a target register address and reference data; When the control component performs data verification in the register as instructed by the data verification instruction, it is configured to: If the target register address is the address of the connected register, it is determined that the data verification instruction indicates that it needs to verify data. Based on the reference data, the data stored at the target register address is checked.

7. An integrated circuit having an input port and an output port; The integrated circuit includes: register; A control component is connected to the register, the input port, and the output port, respectively; The control component is configured as follows: The data read command received at the input port is transmitted to the output port, and after being transmitted to the output port, the input port and the output port are short-circuited to form a path; When the data read instruction indicates that it needs to read data, the data in the register is read. If the data reading result is a preset reading result, the level of the channel is set to the level used to characterize the preset reading result.

8. The integrated circuit according to claim 7, wherein the control component comprises: The control unit is connected to the register and also to the input port or output port; The control unit is configured to: When the data read instruction indicates that it needs to read data, the data in the register is read. Before transmitting the data read command received at the input port to the output port, the control unit transmits the data read command to the output port. After the data is transmitted to the output port, the input port and the output port are short-circuited.

9. The integrated circuit according to claim 8, wherein the control component further comprises: A shorting unit, wherein when the control unit is connected to the input port, the fixed end of the shorting unit is connected to the output port; When the control unit is connected to the output port, the fixed end of the shorting unit is connected to the input port; before receiving a control signal from the control unit, the movable end of the shorting unit is connected to the control unit. The level setting unit has a first terminal connected to the control unit, a second terminal connected to the first power supply, and a third terminal connected to the path. The first power supply is used to provide a level that characterizes the preset reading result. The control unit is configured as follows: When the fixed end of the shorting unit is connected to the output port, after the data reading instruction is transmitted to the output port, a control signal is sent to the shorting unit to control the movable end of the shorting unit to connect to the input port, so that the input port and the output port are shorted to form the path; When the fixed end of the shorting unit is connected to the input port, after the data reading instruction is transmitted to the output port, a control signal is sent to the shorting unit to control the movable end of the shorting unit to connect to the output port, so that the input port and the output port are shorted to form the path; If the data reading result is a preset reading result, the third terminal of the level setting unit is controlled to be turned on to the first power supply.

10. The integrated circuit according to claim 9, wherein the level setting unit comprises: At least one field-effect transistor; In the case of including a field-effect transistor (FET), the control terminal of the FET is the first terminal of the level setting unit, the second terminal of the FET is the second terminal of the level setting unit, and the third terminal of the FET is the third terminal of the level setting unit.

11. The integrated circuit according to any one of claims 7-10, wherein the path is connected to one end of the level maintenance unit, and the other end of the level maintenance unit is connected to a second power supply; The control component is further configured to: If the data reading result is not the preset reading result, the level of the path will not be set to the level used to characterize the preset reading result; The level maintenance unit is configured as follows: Set the level of the path to the level provided by the second power supply.

12. The integrated circuit according to any one of claims 7-10, wherein the data read instruction includes a target register address and a target data address; When the control component reads data from the register in response to the data read instruction indicating that it needs to read data, it is configured to: If the target register address is the address of the connected register, it is determined that the data read instruction indicates that it needs to read data; Based on the target data address, the data stored at the corresponding target register address is read.

13. A communication system, comprising: N integrated circuits as described in any one of claims 1-6, where N is a natural number greater than zero; when N is greater than 1, the N integrated circuits are connected in series; every two adjacent paths in the i paths are connected to form a transmission link; i is greater than 0 and less than or equal to N; The controller is connected to the input port of the first integrated circuit; The controller is configured as follows: Send the data verification command to the input port of the first integrated circuit; The data verification result is determined based on the level on the transmission link.

14. The communication system according to claim 13, wherein the controller is provided with a transmission port; If a transmission port is provided, the transmission port is connected to the input port of the first integrated circuit; When at least two transmission ports are provided, the at least two transmission ports include a first transmission port and a second transmission port, the first transmission port being connected to the input port of the first integrated circuit; and the second transmission port being connected to the output port and / or input port of at least one integrated circuit.

15. The communication system according to claim 14, wherein the controller comprises: The level maintenance unit, when the controller has a transmission port, has one end connected to the transmission port of the controller and the other end connected to the second power supply; If the controller has at least two transmission ports, one end is connected to the second transmission port and the other end is connected to the second power supply. Alternatively, one end can be connected to the input or output port of any of the integrated circuits, and the other end can be connected to a second power supply. The level maintenance unit is configured as follows: If the level of the transmission link is not set to a level that characterizes the preset calibration result, the level of the transmission link is set to the level provided by the second power supply.

16. A communication system, comprising: N integrated circuits as described in any one of claims 7-12, where N is a natural number greater than zero; When N is a natural number greater than 1, the N integrated circuits are connected in series; every two adjacent paths in the i paths are connected to form a transmission link; i is greater than 0 and less than or equal to N; The controller is connected to the input port of the first integrated circuit; The controller is configured as follows: Send the data read command to the input port of the first integrated circuit; The data reading result is determined based on the level on the transmission link.

17. The communication system according to claim 16, wherein the controller is provided with a transmission port; If a transmission port is provided, the transmission port is connected to the input port of the first integrated circuit; When at least two transmission ports are provided, the at least two transmission ports include a first transmission port and a second transmission port, the first transmission port being connected to the input port of the first integrated circuit; and the second transmission port being connected to the output port and / or input port of at least one integrated circuit.

18. The communication system according to claim 17, wherein the controller comprises: The level maintenance unit, when the controller has a transmission port, has one end connected to the transmission port of the controller and the other end connected to the second power supply; If the controller has at least two transmission ports, one end is connected to the second transmission port and the other end is connected to the second power supply. Alternatively, one end can be connected to the input or output port of any of the integrated circuits, and the other end can be connected to a second power supply. The level maintenance unit is configured as follows: If the level of the transmission link is not set to a level that characterizes a preset reading result, the level of the transmission link is set to the level provided by the second power supply.

19. A backlight driving system, comprising: Backlight assembly; N integrated circuits as described in any one of claims 1-6, where N is a natural number greater than zero; When N is greater than 1, the N integrated circuits are connected in series; every two adjacent paths in the i paths are connected to form a transmission link; i is greater than 0 and less than or equal to N; The control chip is connected to the input port of the first integrated circuit; The integrated circuit is configured as follows: Drive the backlight assembly to emit light; The control chip is configured as follows: Send the data verification command to the input port of the first integrated circuit; The data verification result is determined based on the level on the transmission link.

20. A backlight driving system, comprising: Backlight assembly; N integrated circuits as described in any one of claims 7-12, where N is a natural number greater than zero; when N is greater than 1, the N integrated circuits are connected in series; every two adjacent paths in the i paths are connected to form a transmission link; i is greater than 0 and less than or equal to N; The control chip is connected to the input port of the first integrated circuit; The integrated circuit is configured as follows: Drive the backlight assembly to emit light; The control chip is configured as follows: Send the data read command to the input port of the first integrated circuit; The data reading result is determined based on the level on the transmission link.

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