Inductance parameter extraction method and apparatus, and electronic device and storage medium
Patent Information
- Application Number
- PCT/CN2025/118582
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-03-28
- Filing Date
- 2025-09-03
- Publication Date
- 2026-10-01
Smart Images
Figure CN2025118582_01102026_PF_FP_ABST
Abstract
Description
Methods, apparatus, electronic devices and storage media for extracting inductance parameters Technical Field
[0001] This application relates to a method, apparatus, electronic device, and storage medium for extracting inductance parameters, and belongs to the field of conductor parameter solving. Background Technology
[0002] Existing inductance parameter extraction tools based on volume integral equations perform volume partitioning of the target model. Currently, there are two popular volume partitioning modes. The first is based on filament partitioning, which first divides the target conductor into different segments, and then each segment is further divided into several filaments. For complex encapsulation structures with ground planes composed of many vias and holes, this filament-based partitioning mode is inefficient. The other method is tetrahedral partitioning, which is relatively flexible and can provide a good approximation for arbitrary shapes. However, this partitioning requires the introduction of SWG basis functions, resulting in more unknowns and more time-consuming integration calculations compared to filament partitioning. Summary of the Invention
[0003] In view of this, this application provides a method, apparatus, electronic device and storage medium for extracting inductance parameters. The embodiments of this application solve the problem of low efficiency in extracting inductance parameters in related technologies.
[0004] The first aspect of this application discloses a method for extracting inductance parameters, the method comprising:
[0005] Establish the electromagnetic field control equations for the conductor, which include volume integral equations and current continuity equations;
[0006] The conductor is partitioned, and a volume mesh is generated using at least two geometric element types;
[0007] Construct basis functions to discrete volume currents;
[0008] Linear system equations were constructed using Galerkin tests and Kirchhoff's voltage law.
[0009] The fast multipole algorithm is used to accelerate matrix operations, and the iterative solution process is optimized by combining a preprocessor.
[0010] The inductance parameters of the conductor are extracted based on the solution results.
[0011] Furthermore, the basis function is constructed using discrete volume currents, as shown in the following equation:
[0012] Where, for r′∈V l w l (r′) = 1, otherwise, w l (r′)=0;V lLet l represent the volume of the l-th voxel, where l = 1, 2, ..., N. v I v1 I v2 I v3 Indicates the volume current coefficient; Represents a sparse matrix; adjacent volume elements V i and V j The centroids are considered circuit nodes, and the common plane f is the circuit branch connecting these two nodes; I f N represents the global current vector; f N represents the f-th face element. v Let v represent the v-th individual element, and r' represent the source location in volume V'.
[0013] Furthermore, Where R represents a real number.
[0014] Furthermore, The steps to obtain it include:
[0015] S11 obtains the volume element V respectively. i and V j Vector of all local current coefficients ρ ik and ρ jl Where k and l are the volume elements V i and V j The numbering of the middle surface;
[0016] S12 if ρ ik The direction of the global current vector I f If the directions are the same, then otherwise,
[0017] S13 If ρ jl The direction of the global current vector I f If the directions are the same, then otherwise,
[0018] Where x, y, and z represent the x, y, and z components of the local current coefficient vector.
[0019] Furthermore, the linear system equations constructed using the Galerkin test and Kirchhoff's voltage law are as follows:
[0020] in, It is a sparse circuit matrix, N l It is the number of loops, I l V l These are the loop current and voltage vectors, respectively.
[0021] If the loop contains surface f, and I face The direction of (f) is the same as the direction of loop l, then If the loop contains surface f, and I face The direction of (f) is opposite to the direction of loop l, then
[0022] Elements in the system matrix for:
[0023] Where σ is the conductivity of the conductor, f, ω = 2πf, μ0 represent the frequency, angular frequency, and free-space permeability, respectively, r and r' represent the observation point and source location in volume V', and w k (r′), k = 1, 2, ..., N v .
[0024] Furthermore, the method of using the fast multipole algorithm to accelerate matrix operations, combined with a preprocessor to optimize the iterative solution process, includes:
[0025] according to The calculation formula, the linear equation group is divided into two parts:
[0026] Acceleration using a low-frequency fast multipole algorithm
[0027] Pick The diagonal lines form the P-diagonalization preprocessor to reduce the number of iterations in the iterative solution of linear equation systems. The P-diagonalization preprocessor is defined as follows:
[0028] in A diagonal matrix whose non-zero elements are The diagonal elements are preprocessed during each matrix-vector multiplication, as follows:
[0029] Furthermore, after iteratively solving the linear equations, the volume current distribution is obtained, and the inductance parameters are obtained through post-processing, including: under the excitation voltage, the port current is the Y parameter, the inverse of the Y parameter is the Z parameter, the real part of the Z parameter is the resistance parameter, and the imaginary part of the Z parameter is the inductance parameter;
[0030] The geometric unit types include one of the following: triangular prism; square prism; tetrahedron; pyramid.
[0031] A second aspect of this application discloses an inductance parameter extraction device, the device comprising:
[0032] A module is established to establish the electromagnetic field control equations for a conductor, which include volume integral equations and current continuity equations.
[0033] A meshing module is used to mesh the conductor, generating a volume mesh using at least two geometric element types;
[0034] The first building block is used to construct basis functions to discretize volume currents;
[0035] The second building module is used to construct linear system equations through Galerkin tests and Kirchhoff's voltage law;
[0036] The optimization module is used to accelerate matrix operations using the fast multipole algorithm and to optimize the iterative solution process using a preprocessor.
[0037] The extraction module is used to extract the inductance parameters of the conductor based on the solution results.
[0038] A third aspect of this application discloses a computer-readable storage medium comprising a stored program, wherein the inductor parameter extraction method of the above embodiments is executed in the processor of the device during the execution of the program.
[0039] A fourth aspect of this application discloses an electronic device, the electronic device comprising: one or more processors; a storage device for storing one or more programs; and when the one or more programs are executed by the one or more processors, the one or more processors execute the inductance parameter extraction method of the above embodiments.
[0040] Beneficial effects of the technical solution:
[0041] 1. In the embodiments of this application, the volume of the conductor is discretized by triangular prisms, quadrangular prisms, tetrahedrons and pyramids, providing flexible mesh division for complex three-dimensional geometries.
[0042] 2. The embodiments of this application utilize centroid-centroid basis functions to convert the vector bit integral calculation of the SWG basis functions into the scalar bit integral calculation of the impulse functions, which can directly call the fast multipole algorithm, resulting in faster calculation speed.
[0043] 3. The embodiments of this application employ loop analysis based on Kirchhoff's voltage law to reduce unknowns.
[0044] 4. The embodiments of this application employ a P-diagonalization preprocessor to ensure rapid convergence of the iterative solution. Attached Figure Description
[0045] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.
[0046] Figure 1 is a flowchart illustrating an inductance parameter extraction method provided in an embodiment of this application.
[0047] Figure 2 is a schematic diagram of an inductance parameter extraction device provided in an embodiment of this application. Detailed Implementation
[0048] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0049] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0050] Example 1:
[0051] Figure 1 is a flowchart illustrating an inductance parameter extraction method provided in an embodiment of this application. As shown in Figure 1, the method may include the following steps:
[0052] S101 establishes the electromagnetic field control equations for the conductor, which include volume integral equations and current continuity equations.
[0053] In this embodiment, the volume integral equation and the current continuity equation are as follows:
[0054] S102 divides the conductor and generates a volume mesh using at least two geometric unit types.
[0055] In some embodiments, the geometric unit type includes one of the following: triangular prism; square prism; tetrahedron; pyramid.
[0056] In this embodiment, the conductor is divided into triangular prisms, square prisms, tetrahedrons, and pyramids, with the number of face elements being N. f The number of volume elements is N v .
[0057] S103 constructs basis functions to discrete volume currents.
[0058] Preferably, the basis function is constructed using discrete volume currents, as shown in the following equation:
[0059] Where, for r′∈V l w l (r′) = 1, otherwise, w l (r′)=0;V l Let l represent the volume of the l-th voxel, where l = 1, 2, ..., N. v I v1 I v2 I v3 Indicates the volume current coefficient; Represents a sparse matrix; adjacent volume elements V i and V j The centroids are considered circuit nodes, and the common plane f is the circuit branch connecting these two nodes; I f N represents the global current vector; f N represents the f-th face element. v Let v represent the v-th individual element, and r' represent the source location in volume V'.
[0060] Furthermore, Where R represents a real number.
[0061] Furthermore, The steps to obtain it include:
[0062] S11 obtains the volume element V respectively. i and V j Vector of all local current coefficients ρ ik and ρ jl Where k and l are the volume elements V i and V j The numbering of the middle surface;
[0063] S12 if ρ ik The direction of the global current vector I f If the directions are the same, then otherwise,
[0064] S13 If ρ jl The direction of the global current vector I f If the directions are the same, then otherwise,
[0065] Where x, y, and z represent the x, y, and z components of the local current coefficient vector.
[0066] It should be noted that, according to the PEEC model, the neighboring volume elements V i and V j The centroids are considered circuit nodes, and the common plane f is the circuit branch connecting these two nodes. Global current vector I f The flow occurs between two nodes. A novel basis function, centroid-centroid (CC) basis function, is used to discretize the volume current J. A local current coefficient vector ρ = c is introduced. f -c v , where c f and c v These are the common surface and the centroid of the volume element, respectively. To map the interaction of the currents to the volume element, the three sparse matrices generated in one step, as described above, are introduced.
[0067] S104 constructs linear system equations using the Galerkin test and Kirchhoff's voltage law.
[0068] In this step, the result obtained in step 102 is substituted into the equation of step 101, using w k (r′), k = 1, 2, ..., N v The obtained equations were subjected to Galerkin tests, and a linear equation system (LSE) was obtained by loop analysis based on Kirchhoff's voltage law.
[0069] Specifically, the linear system equations constructed using the Galerkin test and Kirchhoff's voltage law are as follows:
[0070] in, It is a sparse circuit matrix, N l It is the number of loops, I l V l These are the loop current and voltage vectors, respectively.
[0071] If the loop contains surface f, and I face The direction of (f) is the same as the direction of loop l, then If the loop contains surface f, and I faceThe direction of (f) is opposite to the direction of loop l, then
[0072] Elements in the system matrix for:
[0073] Where σ is the conductivity of the conductor, f, ω = 2πf, μ0 represent the frequency, angular frequency and free space permeability, respectively, and r and r' represent the observation point and source location in volume V'.
[0074] S105 employs the Fast Multipole Algorithm to accelerate matrix operations, combined with a preprocessor to optimize the iterative solution process.
[0075] In this step, the Fast Multipole Algorithm (FMM) can be used to accelerate MVM during the iterative solution of LSE.
[0076] Specifically, the method of using the fast multipole algorithm to accelerate matrix operations, combined with a preprocessor to optimize the iterative solution process, includes:
[0077] According to Z kl The calculation formula, the linear equation group is divided into two parts:
[0078] Acceleration using a low-frequency fast multipole algorithm
[0079] Pick The diagonal lines form the P-diagonalization preprocessor to reduce the number of iterations in the iterative solution of linear equation systems. The P-diagonalization preprocessor is defined as follows:
[0080] in A diagonal matrix whose non-zero elements are The diagonal elements are preprocessed during each matrix-vector multiplication, as follows:
[0081] S106 Extracts the inductance parameters of the conductor based on the solution results.
[0082] In this step, after iteratively solving the linear equation system, the volume current distribution is obtained, and the inductance parameters are obtained through post-processing. Specifically, under the excitation voltage, the port current is the Y parameter, the inverse of the Y parameter is the Z parameter, the real part of the Z parameter is the resistance parameter, and the imaginary part of the Z parameter is the inductance parameter.
[0083] Example 2:
[0084] Figure 2 is a schematic diagram of an inductance parameter extraction device provided in an embodiment of this application. As shown in Figure 2, the device may include the following modules:
[0085] Module 201 is used to establish the electromagnetic field control equations of the conductor, which include volume integral equations and current continuity equations.
[0086] The partitioning module 202 is used to partition the conductor by generating a volume mesh using at least two geometric unit types.
[0087] The first building module 203 is used to build basis functions to discrete volume currents.
[0088] The second building module 204 is used to construct linear system equations using the Galerkin test and Kirchhoff's voltage law.
[0089] Optimization module 205 is used to accelerate matrix operations using the fast multipole algorithm and to optimize the iterative solution process in conjunction with the preprocessor.
[0090] Extraction module 206 is used to extract the inductance parameters of the conductor based on the solution results.
[0091] Example 3:
[0092] Embodiments of this application also provide an electronic device, including: a memory storing an executable program; and a processor for running the program, wherein the program executes the methods in various embodiments of the present invention during runtime.
[0093] The aforementioned memory can refer to devices inside a computer used to store data and programs, including RAM, hard disks, etc. RAM can be used to temporarily store running programs and data, while hard disks can be used to store programs and data long-term. Memory enables the computer to read and write data and execute programs. The aforementioned processor is responsible for executing instructions in computer programs and performing data processing. It can also be responsible for controlling and executing various operations, including arithmetic operations, logical operations, and data transmission.
[0094] Example 4:
[0095] Embodiments of this application also provide a computer-readable storage medium including a stored executable program, wherein, when the executable program is running, it controls the device where the computer-readable storage medium is located to perform the methods of various embodiments of the present invention.
[0096] The aforementioned computer storage media can refer to the media used in computer memory to store certain discontinuous physical quantities. Computer storage media mainly include semiconductors, magnetic cores, magnetic drums, magnetic tapes, laser discs, etc. Computer-readable storage media include stored programs, which can be a set of instructions that a computer can recognize and execute, running on an electronic computer to meet certain information needs.
[0097] Example 5:
[0098] Embodiments of this application also provide a computer program product, including a computer program that, when executed by a processor, implements the methods of various embodiments of the present invention.
[0099] The aforementioned computer program products can refer to software programs that have been written, tested, and released, and can run on computers or other devices. Computer program products can include application programs, operating systems, utility software, etc., used to achieve specific functions or solve specific problems.
[0100] Example 6:
[0101] Embodiments of this application also provide a computer program product, including a non-volatile computer-readable storage medium for storing a computer program that, when executed by a processor, implements the methods in various embodiments of the present invention.
[0102] The aforementioned non-volatile computer-readable storage medium can refer to a medium for storing data. Non-volatile computer-readable storage media can retain data without loss when power is off and can be used to store long-term data, such as operating systems, applications, and user files. Non-volatile storage media can include hard disk drives, solid-state drives, optical disks, and flash memory storage devices, etc.
[0103] Example 7:
[0104] Embodiments of this application also provide a computer program that, when executed by a processor, implements the methods described in the various embodiments of the present invention.
[0105] The aforementioned computer program can refer to a set of instructions used to tell the computer to perform specific tasks or operations. Computer programs can be written by programmers using specific programming languages and can include algorithms, data structures, logic, and control flow. Computer programs can be used for a variety of purposes, including application software, operating systems, etc.
[0106] In the above embodiments of the present invention, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0107] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling, direct coupling, or communication connection may be through some interfaces; the indirect coupling or communication connection between units or modules may be electrical or other forms.
[0108] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0109] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.
[0110] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.
[0111] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A method for extracting inductance parameters, characterized in that, include: Establish the electromagnetic field control equations for the conductor, which include volume integral equations and current continuity equations; The conductor is partitioned, and a volume mesh is generated using at least two geometric element types; Construct basis functions to discrete volume currents; Linear system equations were constructed using Galerkin tests and Kirchhoff's voltage law. The fast multipole algorithm is used to accelerate matrix operations, and the iterative solution process is optimized by combining a preprocessor. The inductance parameters of the conductor are extracted based on the solution results.
2. The inductance parameter extraction method according to claim 1, characterized in that, The basis function is constructed using discrete volume currents, as shown in the following equation: Where, for r′∈V l w l (r′) = 1, otherwise, w l (r′)=0;V l Let l represent the volume of the l-th voxel, where l = 1, 2, ..., N. v I v1 I v2 I v3 Indicates the volume current coefficient; Represents a sparse matrix; adjacent volume elements V i and V j The centroids are considered circuit nodes, and the common plane f is the circuit branch connecting these two nodes; I f N represents the global current vector; f N represents the f-th face element. v Let v represent the v-th individual element, and r' represent the source location in volume V'.
3. The inductance parameter extraction method according to claim 2, characterized in that, Where R represents a real number.
4. The inductance parameter extraction method according to claim 3, characterized in that, The steps to obtain it include: S11 obtains the volume element V respectively. i and V j Vector of all local current coefficients ρ ik and ρ jl Where k and l are the volume elements V i and V j The numbering of the middle surface; S12 if ρ ik The direction of the global current vector I f If the directions are the same, then otherwise, S13 If ρ jl The direction of the global current vector I f If the directions are the same, then otherwise, Where x, y, and z represent the x, y, and z components of the local current coefficient vector.
5. The inductance parameter extraction method according to claim 4, characterized in that, The linear system equations constructed using the Galerkin test and Kirchhoff's voltage law are as follows: in, It is a sparse circuit matrix, N l It is the number of loops, I l V l These are the loop current and voltage vectors, respectively. If the loop contains surface f, and I face The direction of (f) is the same as the direction of loop l, then If the loop contains surface f, and I face The direction of (f) is opposite to the direction of loop l, then Elements in the system matrix for: Where σ is the conductivity of the conductor, f, ω = 2πf, μ0 represent the frequency, angular frequency, and free-space permeability, respectively, r and r' represent the observation point and source location in volume V', and w k (r′), k = 1, 2, ..., N v .
6. The inductance parameter extraction method according to claim 5, characterized in that, The method employs a fast multipole algorithm to accelerate matrix operations, combined with a preprocessor to optimize the iterative solution process, including: according to The calculation formula, the linear equation group is divided into two parts: Acceleration using a low-frequency fast multipole algorithm i＝1,2,3； Pick The diagonal lines form the P-diagonalization preprocessor to reduce the number of iterations in the iterative solution of linear equation systems. The P-diagonalization preprocessor is defined as follows: in A diagonal matrix whose non-zero elements are The diagonal elements are preprocessed during each matrix-vector multiplication, as follows:
7. The inductance parameter extraction method according to claim 1, characterized in that, After iteratively solving the linear equations, the volume current distribution is obtained. The inductance parameters are obtained through post-processing, including: under the excitation voltage, the port current is the Y parameter, the inverse of the Y parameter is the Z parameter, the real part of the Z parameter is the resistance parameter, and the imaginary part of the Z parameter is the inductance parameter. The geometric unit types include one of the following: triangular prism; square prism; tetrahedron; pyramid.
8. An inductance parameter extraction device, characterized in that, include: A module is established to establish the electromagnetic field control equations for a conductor, which include volume integral equations and current continuity equations. A meshing module is used to mesh the conductor, generating a volume mesh using at least two geometric element types; The first building block is used to construct basis functions to discretize volume currents; The second building module is used to construct linear system equations through Galerkin tests and Kirchhoff's voltage law; The optimization module is used to accelerate matrix operations using the fast multipole algorithm and to optimize the iterative solution process using a preprocessor. The extraction module is used to extract the inductance parameters of the conductor based on the solution results.
9. A computer-readable storage medium, characterized in that, The computer-readable storage medium includes a stored program, wherein, when the program is executed, it controls the execution of the inductance parameter extraction method according to any one of claims 1 to 7 in the processor of the device.
10. An electronic device, characterized in that, include: One or more processors; Storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors perform the inductor parameter extraction method according to any one of claims 1 to 7.