Persistent-photoconductivity-based bio-inspired sensing-memory-computing integrated photoelectric detection system for moving target

Abstract

The present application relates to the fields of bio-inspired intelligent vision and brain-inspired computing. Disclosed is a persistent-photoconductivity-based bio-inspired sensing-memory-computing integrated photoelectric detection system for a moving target. The system comprises a synapse-like bio-inspired photodetector array and a brain-inspired memristor array, which are interconnected, wherein the synapse-like bio-inspired photodetector array applies a fixed bias voltage to a device in each pixel when detecting visual information of the moving target, so as to convert spatial illumination information corresponding to each pixel into a persistently decaying photocurrent, and the synapse-like bio-inspired photodetector array continuously receives, during the persistent decay of the photocurrent, a plurality of frames of illumination information of the moving target, and reads the photocurrent of each pixel after the last frame of illumination information is inputted, so as to determine a feature map that stores all historical moment information; and the brain-inspired memristor array executes deep-neural-network operations on the feature map on the basis of Ohm's law and Kirchhoff's laws, and outputs a current corresponding to a task result label, so as to identify the moving target. The present application can meet the requirements of deep neural networks and complex dynamic vision tasks.

Description

A biomimetic target sensing and in-memory computing integrated photoelectric detection system based on continuous photoconductivity Technical Field

[0001] This application relates to the fields of biomimetic intelligent vision and brain-like computing, and in particular to a biomimetic target sensing and storage-computing integrated photoelectric detection system based on continuous photoconductivity. Background Technology

[0002] In recent years, with the rapid development of artificial intelligence applications, many new application scenarios have emerged, placing higher demands on detection systems. Traditional detection systems typically employ a discrete architecture, resulting in high latency issues in imaging computation, making it difficult to meet the needs of rapid detection, recognition, and judgment in fields such as intelligent driving and robot vision. Therefore, there is an urgent need to develop lightweight, intelligent infrared photoelectric sensing systems with edge computing capabilities to achieve rapid target detection and recognition.

[0003] In dynamic motion recognition tasks, because objects are constantly moving, detectors need to perform frequent frame-by-frame analysis to ensure accurate capture and identification of motion trajectories and dynamic changes. This frame-by-frame analysis paradigm leads to a dramatic increase in data transmission volume, placing extremely high demands on data transmission efficiency.

[0004] Currently, the traditional visual perception system has a separate architecture for the detection and processing modules, which results in a relatively limited function for the biomimetic sensing and computing integrated photoelectric detection system. It can only build simple single-layer perception models and perform basic image preprocessing tasks, making it difficult to meet the needs of deep neural networks and complex dynamic vision tasks. Summary of the Invention

[0005] The purpose of this application is to provide a biomimetic target sensing and computing integrated photoelectric detection system based on continuous photoconductivity, so as to solve the problem that existing biomimetic sensing and computing integrated photoelectric detection systems are unable to meet the needs of deep neural networks and complex dynamic vision tasks.

[0006] To achieve the above objectives, this application provides the following solution.

[0007] In a first aspect, this application provides a biomimetic target sensing and computing integrated photoelectric detection system based on continuous photoconductivity, comprising: an interconnected synaptic biomimetic photodetector array and a brain-like memristor array.

[0008] When the synaptic-like bionic photodetector array is used to detect visual information of moving targets, a fixed bias voltage is applied to the device in each pixel of the synaptic-like bionic photodetector array to convert the spatial illumination information corresponding to each pixel into a continuously decaying photocurrent. During the continuous decay of the photocurrent, multiple frames of illumination information of moving targets are continuously received, and after the last frame of illumination information is input, the photocurrent of each pixel is read to determine the feature map that has memorized all historical moment information.

[0009] The neuromorphic memristor array is used to perform deep neural network operations on the feature map based on Ohm's law and Kirchhoff's laws, output a current corresponding to the task result label, and identify moving targets based on the current; the current is used to characterize the probability of the task result label.

[0010] Based on the specific embodiments provided in this application, the following technical effects are disclosed.

[0011] This application utilizes a synaptic-like bionic photodetector array to detect visual information of moving targets. By applying a fixed bias voltage to the devices in each pixel, the spatial illumination information corresponding to each pixel is converted into a continuously decaying photocurrent. During the continuous decay of the photocurrent, multiple frames of illumination information of moving targets are continuously received without frame-by-frame electrical signal readout. The magnitude of the photocurrent continuously decays or increases over time. After the last frame of illumination information is input, the photocurrent state of each pixel in the array is read out, resulting in a feature map that remembers all historical moment information, achieving multi-frame fusion detection and computation in the intrasensory time domain. The photocurrents extracted from all pixels are combined into a feature map, which is used as the output of the first-layer network and input into a neuromorphic memristor array to perform deep neural network operations. Finally, the current corresponding to the task result label is output, representing its probability, thus completing the task of identifying and classifying moving targets. In-memory computing deep neural network operations are performed in the memristor array. By applying a voltage sequence, the conductance value of each memristor in the array is read, and the output current of each memristor is calculated. The output current is used as the result of the recognition task. Among them, the synaptic bionic photodetector array utilizes the continuous photoconductivity effect of the photodetector when performing time-domain multi-frame fusion detection and reading, and the photocurrent decays nonlinearly over time, while completing the linear and nonlinear calculations of a single-layer neural network; the neuromorphic memristor array realizes fully connected neural network calculation through Ohm's law and Kirchhoff's law, outputs current results, and completes the moving target classification task.

[0012] Compared with the traditional visual perception system's separate architecture of detection and processing modules and frame-by-frame transmission computing paradigm, this application can meet the needs of deep neural networks and complex dynamic visual tasks, greatly improve the network's recognition speed, reduce network power consumption, and achieve rapid recognition of moving targets at the entire hardware level. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 is a schematic diagram of the structure of the retina-like photodetector unit of this application.

[0015] Figure 2 is a schematic diagram of the positive and negative electrodes of the retina-like photodetector unit of this application.

[0016] Figure 3 is a schematic diagram of the neuromorphic memristor array with a 1T1R structure used in this application.

[0017] Figure 4 shows the IV characteristic curve of the retina-like photodetector unit of this application.

[0018] Figure 5 is a graph showing the continuous photoconductivity characteristics of the retina-like photodetector unit of this application.

[0019] Figure 6 is a schematic diagram of the 4×4 pixel synaptic bionic photodetector array structure of this application.

[0020] Figure 7 is a schematic diagram of the photoelectric detection system for motion-sensing and computing integrated in this application.

[0021] Figure 8 is a thermal diagram of the conductance of the memristor cross array of this application.

[0022] Figure 9 shows the recognition accuracy curve for the moving target recognition task scenario of this application.

[0023] Figure 10 is a schematic diagram of the structure of the retina-like photodetector unit of this application;

[0024] Figure 11 is a schematic diagram of the neuromorphic memristor array of this application;

[0025] Figure 12 shows the connection relationship between the driving circuit of this application and the synaptic bionic photodetector array and the neuromorphic memristor array. Detailed Implementation

[0026] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0027] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0028] To realize large-scale integrated sensing-memory-computing devices that support deep neural networks and complex image recognition tasks, breakthroughs in network integration technology are urgently needed to promote the joint design of synaptic-like bionic photodetectors and brain-like neural network hardware. Memristors, with their brain-like synaptic function and excellent integration capabilities, offer new opportunities for integrated sensing-memory-computing technology. However, there is currently no research on bionic intelligent photodetector arrays based on continuous photoconductivity and multi-frame unified detection, nor on their integrated integration with brain-like memristor arrays.

[0029] To meet the high demands of data transmission efficiency, enhancing the processing power within the detector has become crucial for addressing energy consumption and latency issues in machine vision systems. Based on research into specific materials and device structures, the applicant has discovered that photodetector materials and structures with continuous photoconductivity can offer a promising approach to overcoming this bottleneck. In these devices, the photocurrent decays over time rather than disappearing instantaneously after illumination ends. By utilizing the continuous photoconductivity effect of the photodetector, this application proposes a novel paradigm for moving target recognition based on multi-frame fusion imaging computation. This paradigm continuously detects multiple frames of light signals during the continuous decay of the photocurrent, storing the information from these multiple frames into a single frame for readout. Without compromising accuracy, it significantly reduces the number of data transmissions and processing operations, which is highly beneficial for reducing power consumption and latency.

[0030] Based on this, embodiments of this application provide a biomimetic target sensing and computing integrated photoelectric detection system based on continuous photoconductivity, including: an interconnected synaptic biomimetic photodetector array and a brain-like memristor array.

[0031] When the synaptic-like bionic photodetector array is used to detect visual information of moving targets, a fixed bias voltage is applied to the device in each pixel of the synaptic-like bionic photodetector array to convert the spatial illumination information corresponding to each pixel into a continuously decaying photocurrent. During the continuous decay of the photocurrent, multiple frames of illumination information of moving targets are continuously received, and after the last frame of illumination information is input, the photocurrent of each pixel is read to determine the feature map that has memorized all historical moment information.

[0032] The neuromorphic memristor array is used to perform deep neural network operations on the feature map based on Ohm's law and Kirchhoff's laws, output a current corresponding to the task result label, and identify moving targets based on the current; the current is used to characterize the probability of the task result label.

[0033] In one exemplary embodiment, the synaptic-like bionic photodetector array specifically includes: a plurality of pixels distributed in the array, each pixel containing a retina-like photodetector unit.

[0034] In practical applications, the synaptic-like bionic photodetector array includes 4×4 pixels, each pixel containing one retina-like photodetector unit, for a total of 16 retina-like photodetector units.

[0035] In an exemplary embodiment, each of the retina-like photodetector units includes a substrate, a light-absorbing layer, and two interdigitated electrodes stacked sequentially from bottom to top; wherein, the light-absorbing layer region corresponding to the channel formed between the two interdigitated electrodes is a light-response region; the light-response region is used to provide linear light response and nonlinear photocurrent attenuation, and to regulate the voltage of the interdigitated electrodes at both ends of each of the retina-like photodetector units to encode the light response of the retina-like photodetector unit.

[0036] In an exemplary embodiment, the substrate is an insulating Al2O3 substrate; the light-absorbing layer is a two-dimensional MoS2 material; a pattern is designed on the two-dimensional MoS2 material by photolithography etching, and a metal electrode is deposited on the surface of the two-dimensional MoS2 material by electron beam evaporation; the metal electrode is the interdigitated electrode.

[0037] In an exemplary embodiment, the interdigitated electrode is a rectangular interdigitated structure forming multiple photoresponse units; two interdigitated electrodes are a positive electrode and a negative electrode, respectively; the positive electrode and the negative electrode are arranged alternately.

[0038] In practical applications, the width of the positive and negative electrodes is 15 μm, and the spacing between adjacent electrodes is 5 μm.

[0039] In one exemplary embodiment, the light responsivity of the retina-like photodetector unit is a random fixed value;

[0040] The photocurrent is the product of photoresponsivity and light intensity.

[0041] In one exemplary embodiment, the photocurrent exhibits a non-linear, continuous decay between frames.

[0042] In practical applications, synaptic-like bionic photodetector arrays realize linear and nonlinear computations in single-layer neural networks. The photoresponsivity R of the synaptic-like bionic photodetector array represents the network weight value, and the illumination intensity P serves as the network input signal. The resulting photocurrent is I. ph =R×P, which completes the linear multiplication operation.

[0043] The photocurrent is generated and then continuously decays. During this decaying process, multiple frames of light from moving targets are continuously received. The photocurrent I at the next moment... t+1 It is the remaining photocurrent I after the previous moment. t The light intensity P produced by the light at the next moment t+1 Joint decision, i.e., I t+1 =I t +R×P t+1 Due to the remaining photocurrent I after the previous moment t It decays exponentially over time in a nonlinear manner, thus being equivalent to performing a nonlinear calculation that iterates over time.

[0044] In one exemplary embodiment, the neuromorphic memristor array utilizes word line circuits, source line circuits, and bit line circuits interwoven into a mesh layout; a memristor unit is placed at each intersection within the mesh layout; these three circuits are used to input or read signals from the memristor unit.

[0045] The memristor unit includes a transistor and a memristor.

[0046] The word line circuit is connected to the gate of the transistor, the source line circuit is connected to the source of the transistor, and the bit line circuit is connected to the top electrode of the memristor.

[0047] The bottom electrode of the memristor is also directly connected to the drain of the transistor; by adjusting the gate voltage of the transistor, the conductivity state of the neuromorphic memristor array can be effectively controlled; the conductivity state includes an on state and an off state. This design can effectively solve the signal crosstalk problem and improve the performance and stability of the neuromorphic memristor array.

[0048] In practical applications, each memristor in a neuromorphic memristor array can adjust its resistance value according to the applied voltage, and maintain its conductance value after the external voltage is removed. It can stably maintain the adjusted resistance state, thereby deploying the weights of a hardware deep neural network, which is the neuromorphic memristor array.

[0049] As the hardware foundation for neural network implementations, these memristors can precisely map and write the weights of a hardware deep neural network, obtained through training, into their respective resistance values ​​by applying appropriate voltages.

[0050] In one exemplary embodiment, the memristor array has a top electrode layer, a middle resistive switching layer, and a bottom electrode layer.

[0051] The top electrode layer input voltage is selected by row gating, and the bottom electrode layer output current is selected by column gating.

[0052] The memristor array follows Ohm's law and Kirchhoff's law to perform multiplication and accumulation operations, reads current from each column, and performs vector matrix multiplication operations in the deep neural network, realizing a hardware deep neural network that integrates in-memory computing.

[0053] In practical applications, neuromorphic memristor arrays perform in-memory computing deep neural network operations, and the extracted feature maps are input into the hardware deep neural network for recognition. m The voltage value of each pixel in the image information is obtained by multiplying the photocurrent obtained from the synaptic bionic photodetector array by a fixed coefficient, G. i,j Let the conductance of each memristor be the value of the current, and apply Ohm's law and Kirchhoff's law I. n =∑G i,j ×V m It performs in-memory deep neural network operations and finally outputs current I. n This represents the task identification result.

[0054] In an exemplary embodiment, the biomimetic target sensing and computing integrated photoelectric detection system further includes: a driving circuit; the driving circuit is directly connected to each electrode (i.e., each of the positive electrodes and each of the negative electrodes) of the synaptic biomimetic photoelectric detector array, and is used to read the photocurrent.

[0055] The driving circuit is directly connected to the top electrode of the neuromorphic memristor array, and is used to convert the photocurrent into a voltage signal and input the voltage signal into the neuromorphic memristor array.

[0056] Please refer to Figure 12. This drive circuit includes a power supply module, a bias control module, a signal reading module, and a host computer, which are used to provide necessary power supply, reading, and current-to-voltage conversion auxiliary functions.

[0057] The signal reading module can be, for example, two modules, specifically a first signal reading module and a second signal reading module. The host computer can be, for example, a computer or a processor such as an FPGA. The host computer's functions include at least one of the following: 1. Sending control clock and row / column gating instructions to the bias control module, and applying the bias to the synaptic bionic photodetector array through the bias control module; 2. Reading data from the first signal reading module and inputting this data into the neuromorphic memristor array; 3. Reading the final output signal of the neuromorphic memristor array through the second signal reading module and outputting the result.

[0058] In one exemplary embodiment, the power supply module, the bias control module, and the signal reading module may each be one or more processors, controllers, or chips with communication interfaces capable of implementing communication protocols. If necessary, they may also include memory and related interfaces, system transmission buses, etc. The processor, controller, or chip executes program-related code to implement the corresponding functions. Alternatively, an alternative approach is that the power supply module, the bias control module, and the signal reading module share an integrated chip or share a processor, controller, memory, or other devices. The shared processor, controller, or chip executes program-related code to implement the corresponding functions.

[0059] This application achieves inductive calculation and readout of a synaptic-like bionic photodetector array by constructing a collaborative design of sensitivity modulation and signal readout.

[0060] This application utilizes a novel multi-frame integrated sensing, storage, and computing paradigm for moving target perception and recognition. It simulates the biological function of retinal receptors in the human eye using a synaptic-like biomimetic photodetector array, employing the photocurrent calculation formula I... ph =R×P and Recurrent Neural Network Computation Paradigm I t+1 =I t +R×P t+1 Nonlinear iterative calculations are performed at the moving target detection end (i.e., a synaptic-like bionic photodetector array). All feature information of the entire motion history is retained in a single feature map. Then, the current is converted into voltage and directly input into a neuromorphic memristor-based in-memory neural network array (i.e., the neuromorphic memristor array) to complete the recognition task. The memristor-based in-memory neural network, i.e., the neuromorphic memristor array, enables direct calculation and storage of neural network weight information, thereby eliminating the energy consumption required for data exchange between computing and storage units. This is achieved through Ohm's law and Kirchhoff's law I. n =∑G i,j ×V m By performing in-memory computing fusion deep neural network operations on a neuromorphic memristor array, the infrared image recognition task was efficiently completed.

[0061] In another exemplary embodiment, inspired by biological visual systems, this application is based on a neuromorphic photodetector that fuses multiple frames of image information of a moving target into a single frame, reads it out as a feature map, and inputs it into a brain-like hardware deep neural network for recognition. Ultimately, a neuromorphic moving target sensing and computing integrated photodetector system with fast edge computing capabilities is developed.

[0062] The retina-like photodetector unit in this application, hereinafter referred to as the device, adopts an MSM (metal-semiconductor-metal) structure to achieve a linear light response.

[0063] As shown in Figures 1-2, the device and array are based on a molybdenum disulfide (MoS2) light-absorbing layer 2 on a sapphire substrate 1. Each device has a positive electrode 3 at one end and a negative electrode 4 at the other end. During detection, a fixed bias voltage is applied between the positive electrode 3 and the negative electrode 4, and the current magnitude of the negative electrode 4 is recorded.

[0064] The implementation method is as follows: a MoS2 light-absorbing layer 2 of about 3-5 atomic layers is grown on an insulating sapphire (aluminum oxide Al2O3) substrate 1 by chemical vapor deposition. The MoS2 light-absorbing layer 2 is patterned by photolithography etching technology. Then, metal electrodes (i.e., positive electrode 3 and negative electrode 4) are deposited on the surface of the MoS2 light-absorbing layer 2 by electron beam evaporation. Finally, the mask is cleaned, and the photogenerated carriers generated by the device under illumination are led out through the positive electrode 3 and negative electrode 4.

[0065] In this application, the MSM structure is a metal-semiconductor-metal structure.

[0066] As shown in Figure 6, the synapse-like bionic photodetector array in this application consists of 16 retina-like photodetector units in a 4×4 configuration. The photocurrent of the detector is read through a pre-designed signal readout module.

[0067] In this application, the synaptic-like bionic photodetector array is equipped with a driving circuit. The driving circuit system includes a power supply module, a bias control module, a signal readout module, and a host computer. The driving circuit mainly provides necessary power supply, readout, and current-to-voltage conversion auxiliary functions, and is directly connected to each electrode of the synaptic-like bionic photodetector array. By constructing a synergistic design for sensitivity control and signal readout, the intrinsic calculation and readout of the synaptic-like bionic photodetector array are realized.

[0068] In this application, a neuromorphic memristor array (i.e., a cross array) is used to build a deep neural network that integrates in-memory computing. Each memristor can adjust its resistance value through an external voltage and maintain its current resistance value after the external voltage is removed. Therefore, the neuromorphic memristor array is used as the hardware carrier of the neural network, and the weights of the trained neural network are mapped to resistance values ​​and written into the memristors through an external voltage.

[0069] Each memristor cell adopts a 1T1R structure, which refers to a structure combining a transistor and a memristor. "1T" represents a transistor (field-effect transistor), and "1R" represents a memristor. In a 1T1R structure, when a memristor cell is operated, the corresponding transistor turns on, while the transistors corresponding to other memristor cells turn off. This avoids erroneous operation on surrounding memristor cells and prevents read crosstalk.

[0070] In this application, the word line circuit includes multiple word lines (WL), the source line circuit includes multiple source lines (SL), and the bit line circuit includes multiple bit lines (BL). As shown in Figures 3 and 11, the line connecting the gate of a row of transistors is called a word line (WL), the line connecting the top electrode of a column of neuromorphic memristors is called a bit line (BL), and the line connecting the source of a column of transistors is called a source line (SL). In use, the selection of WL is controlled by an analog switch (i.e., a transistor), turning on the transistors of a specified row, applying the input signal to the BL terminal, and reading the calculation results of the neuromorphic memristor array from the BL terminal. WL refers to the line connecting the gate of each row of transistors, used to control the switching state of the transistors. SL refers to the line connecting the source of each row of transistors, used to provide a current path. BL refers to the line connecting the top electrode of each column of memristors, used to read or write data. MUX is a multiplexer circuit used to select a specific row or column, thereby enabling access to a specific memristor cell (or a group of memristor cells) in a memristor array.

[0071] In an exemplary embodiment, this application uses chemical vapor deposition (CVD) to grow a MoS2 light-absorbing layer material. A 3nm thick MoS2 light-absorbing layer is grown on an 800μm thick Al2O3 substrate 1. AZ5214 photoresist is uniformly coated on the material surface. After exposure, it is developed using RZX3038 developer. Subsequently, electron beam evaporation is used to deposit 51nm thick Cr and 35nm thick Au as metal electrodes to form the device and array pattern. The pattern structure is drawn using L-Edit software, as shown in Figures 1-2. The interdigitated electrodes (i.e., positive electrode 3 and negative electrode 4) of the device have a rectangular interdigitated structure. The electrode width 5 and electrode spacing 6 are 15µm and 5µm, respectively. The MoS2 light-absorbing layer region 7 between the interdigitated electrodes is the photoresponse region, as shown in Figure 10.

[0072] The metal outside the electrode area was stripped with acetone, cleaned with ethanol, and dried with nitrogen gas to complete the fabrication of the synaptic biomimetic photodetector array.

[0073] Figure 4 shows the IV characteristic curves of the retina-like photodetector unit of this application, namely the IV curves under dark conditions and under different powers of 520nm laser illumination, demonstrating the good photoresponse characteristics of this device. Figure 5 shows the continuous photoconductivity characteristic curve of the retina-like photodetector unit of this application. With a fixed bias voltage of 0.2V applied to the positive and negative electrodes of the device, three frames of light pulse signals were continuously irradiated with a period of 2s and a pulse width of 100ms. It can be seen that after three consecutive cycles, the photocurrent decays to a final value. This photocurrent value remembers the historical information of all past moments, proving the good continuous photoconductivity characteristics.

[0074] The device prepared above is spot-welded onto a 4×4 array board, as shown in Figure 6, and then connected to the signal reading module in sequence through DuPont connection wires.

[0075] This application employs techniques such as photolithography, etching, deposition, and sputtering to fabricate a sandwich-structured neuromorphic memristor array device on a silicon substrate.

[0076] First, a top-gate field-effect transistor (FET) is fabricated on a silicon substrate to serve as a multiplexer. Then, the bottom electrode region of the memristor is etched into the drain region of the FET using photolithography and etching processes. The metal bottom electrode of the memristor is deposited in this region using thermal evaporation and then peeled off under heated conditions to obtain the metal bottom electrode. Next, a metal oxide thin film is fabricated on the bottom electrode as the resistive switching layer of the memristor using sputtering and deposition processes. The selected oxide materials are hafnium dioxide (HfO2) and tantalum oxide (TaO2) for Complementary Metal-Oxide-Semiconductor (CMOS) processes. x Materials such as [material name missing] were used; the top electrode region of the memristor was etched on the resistive switching layer thin film using photolithography and etching processes; then, a metal top electrode was deposited in this region by thermal evaporation and peeled off under heating conditions to obtain the metal top electrode. Finally, a memristor cross array with field-effect transistors as the gating devices and forming a 1T1R unit structure was completed, namely a neuromorphic memristor array, as shown in Figure 3.

[0077] This application also proposes a precise modulation method based on dynamic pulses for resistance adjustment of neuromorphic memristor arrays, achieving high-precision memristor read / write operations. By selecting rows and columns in the neuromorphic memristor array through external control signals, precise control of each memristor can be achieved. Simultaneously, combining time-division multiplexing technology further reduces the need for digital-to-analog conversion, effectively shrinking the circuit area and significantly reducing the overall power consumption of the circuit. In the read operation of the neuromorphic memristor array, the target memristor is first selected via an analog switch at the WL terminal, and a voltage signal is input at the SL terminal through a drive circuit. At this time, a pulse below a threshold voltage (0.2V) is applied to the selected memristor, where the threshold voltage is the minimum voltage that can cause a change in the memristor's resistance. After the voltage pulse is applied to the memristor, the calculation result is directly obtained based on Ohm's law, and the output current is read through the SL terminal to calculate the current resistance value of the memristor, thus realizing the resistance value readout. In specific applications, the SL terminal can be connected to a host computer or FPGA processor, for example, to read the memristor's resistance value through the host computer or FPGA processor.

[0078] The write operation consists of two processes: setting and resetting. The setting process uses a positive voltage to decrease the memristor's resistance, while the resetting process uses a negative voltage to increase it. In the setting operation, the analog switch at the WL terminal first selects the desired memristor, and the drive circuit inputs a pulse higher than the memristor's write voltage threshold (1V) at the SL terminal. After each write pulse, a read pulse is immediately applied at the SL terminal to monitor whether the memristor's resistance has reached the target value. If the target resistance has not been reached, the write pulse voltage is increased in 0.2V increments until the target resistance is reached. If the memristor's resistance is lower than the target resistance after applying the write pulse, a negative voltage pulse is applied until the target resistance is reached. If the memristor's resistance is higher than the target resistance, a positive voltage pulse is applied until the resistance returns to the target value. Through this method, this application achieves precise adjustment of the memristor weights, providing an effective technical means for constructing in-memory computing hardware deep neural networks.

[0079] By deploying a hardware visual neural network using a fabricated 4×4 pixel synaptic bionic photodetector array and a 1T1R brain-like memristor array, a multi-frame integrated rapid detection and recognition of moving targets can be achieved.

[0080] Figure 7 shows a biomimetic target sensing and computing integrated photodetector system based on continuous photoconductivity. A moving target light source continuously illuminates the synaptic biomimetic photodetector array. Compared to existing technologies, this application's new multi-frame integrated sensing and computing paradigm does not read out the photocurrent in each frame. Instead, it simulates the biological function of the human eye's retinal receptors and uses the photocurrent calculation formula I... ph =R×P and Recurrent Neural Network Computation Paradigm I t+1 =It +R×P t+1 The photocurrent, while continuously decaying, receives multiple illuminations and undergoes nonlinear iterative calculations at the moving target detection end. A single feature map preserves all feature information of the entire motion history. The current is then converted into voltage and directly input into the neuromorphic memristor-based in-memory computing neural network array to complete the recognition task. The memristor-based in-memory computing neural network enables direct calculation and storage of neural network weight information. The trainable neural network weights are mapped to the conductance value of the memristor, as shown in Figure 8. Figure 8 is a heatmap of the conductance value of the memristor cross array of this application, thereby eliminating the energy consumption required for data exchange between computing and storage units. This is achieved through Ohm's law and Kirchhoff's law I. n =∑G i,j ×V m It performs in-memory computing fusion deep neural network operations on a neuromorphic memristor hardware platform, efficiently completing the infrared image recognition task.

[0081] Figure 9 shows the recognition accuracy curve for the moving target recognition task scenario of this application. Compared with traditional networks, this application can complete tasks that traditional single-layer fully connected neural network technology cannot complete based on single-frame image information.

[0082] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0083] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A photoelectric detection system based on continuous photoconductivity, characterized in that, The photoelectric detection system includes: an interconnected array of synaptic-like bionic photodetectors and a neuromorphic memristor array; When the synaptic-like bionic photodetector array is used to detect visual information of moving targets, a fixed bias voltage is applied to the device in each pixel of the array to convert the spatial illumination information corresponding to each pixel into a continuously decaying photocurrent. During the continuous decay of the photocurrent, multiple frames of illumination information of moving targets are continuously received. After the last frame of illumination information is input, the photocurrent of each pixel is read to determine the feature map that has memorized all historical moment information. The photocurrent exhibits a non-linear continuous decay between frames. When the synaptic-like bionic photodetector array performs time-domain multi-frame fusion detection and reading, it utilizes the continuous photoconductivity effect of the photodetector. The photocurrent decays non-linearly with time, and at the same time, it completes the linear and non-linear calculations of a single-layer neural network. The neuromorphic memristor array is used to perform deep neural network operations on the feature map based on Ohm's law and Kirchhoff's laws, output a current corresponding to the task result label, and identify moving targets based on the current; the current is used to characterize the probability of the task result label.

2. The photoelectric detection system based on continuous photoconductivity and inductively coupled target sensing and computing as described in claim 1, characterized in that, The synaptic-like bionic photodetector array specifically includes: multiple pixels distributed in the array, each pixel containing a retina-like photodetector unit.

3. The photoelectric detection system based on continuous photoconductivity and inductively coupled target sensing and computing as described in claim 2, characterized in that, Each of the aforementioned retinal-like photodetector units includes a substrate, a light-absorbing layer, and two interdigitated electrodes stacked sequentially from bottom to top; wherein, the light-absorbing layer region corresponding to the channel formed between the two interdigitated electrodes is a light-response region; the light-response region is used to provide linear light response and nonlinear photocurrent attenuation, and to regulate the voltage of the interdigitated electrodes at both ends of each of the aforementioned retinal-like photodetector units in order to encode the light response of the aforementioned retinal-like photodetector unit.

4. The photoelectric detection system based on continuous photoconductivity and inductively coupled object sensing and computing as described in claim 3, characterized in that, The substrate is an insulating Al2O3 substrate; the light-absorbing layer is a two-dimensional MoS2 material; The image design was carried out on the MoS2 two-dimensional material by photolithography etching process, and metal electrodes were deposited on the surface of the MoS2 two-dimensional material by electron beam evaporation. The metal electrode is the interdigitated electrode.

5. The photoelectric detection system based on continuous photoconductivity and inductively coupled target sensing and computing as described in claim 3, characterized in that, The interdigitated electrode has a rectangular, interlaced structure; the two interdigitated electrodes are a positive electrode and a negative electrode, respectively; the positive and negative electrodes are arranged alternately.

6. The photoelectric detection system based on continuous photoconductivity and inductively coupled target sensing and computing as described in claim 2, characterized in that, The light responsivity of the retina-like photodetector unit is a random fixed value. The photocurrent is the product of the photoresponsivity and the light intensity.

7. The photoelectric detection system based on continuous photoconductivity and inductively coupled target sensing and computing as described in claim 1, characterized in that, The neuromorphic memristor array utilizes word line circuits, source line circuits, and bit line circuits to form a mesh layout; a memristor unit is arranged at each intersection point in the mesh layout. The memristor unit includes a transistor and a memristor; The word line circuit is connected to the gate of the transistor, the source line circuit is connected to the source of the transistor, and the bit line circuit is connected to the top electrode of the memristor. The bottom electrode of the memristor is also directly connected to the drain of the transistor; the conduction state of the neuromorphic memristor array is controlled by adjusting the gate voltage of the transistor; the conduction state includes an on state and an off state.

8. The photoelectric detection system based on continuous photoconductivity and inductively coupled target sensing and computing as described in claim 7, characterized in that, The top layer of the memristor array is the top electrode layer, the middle layer is the resistive switching layer, and the bottom layer is the bottom electrode layer. The top electrode layer is input voltage through row gating, and the bottom electrode layer is output current through column gating; The memristor array follows Ohm's law and Kirchhoff's law to perform multiplication and accumulation operations, reads current from each column, and performs vector matrix multiplication operations in the deep neural network, realizing a hardware deep neural network that integrates in-memory computing.

9. The photoelectric detection system based on continuous photoconductivity and inductively coupled target sensing and computing as described in claim 1, characterized in that, Also includes: Drive circuit; The driving circuit is directly connected to each electrode of the synaptic-like bionic photodetector array and is used to read the photocurrent. The driving circuit is directly connected to the top electrode of the neuromorphic memristor array, and is used to convert the photocurrent into a voltage signal and input the voltage signal into the neuromorphic memristor array.

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