Method for manufacturing substrate frame layer, package substrate, and product

Abstract

The present application relates to the technical field substrate manufacturing, and discloses a method for manufacturing a substrate frame layer, a package substrate, and a product. In the method, each frame board is slotted, and devices that need to be embedded in the frame boards are fixed in slots obtained by means of slotting, so that a chip lead-out surface of each device and a first surface of the corresponding frame board are kept at a same height; a prepreg is placed between second surfaces of the two frame boards, and a prepreg and a metal layer are sequentially stacked on the first surface of each frame board; a stacked panel is laminated; blind holes are formed to expose pads on the chip lead-out surfaces; the blind holes and through holes formed in the panel are electroplated; and the surfaces of the electroplated panel are patterned to form surface circuit traces of a frame layer. Interconnection between the devices embedded at different heights is achieved by means of the blind holes and the through holes, so that the embedding and interconnection of the devices at different depths is achieved, thereby increasing the number of the embedded devices in the height direction, and improving the embedding density.

Description

Fabrication method of substrate frame layer, packaging substrate and products

[0001] This application claims priority to Chinese Patent Application No. 202510357412.9, filed on March 25, 2025, entitled “Method for manufacturing a substrate frame layer, encapsulated substrate and product”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of substrate manufacturing technology, and in particular to a method for manufacturing a substrate frame layer, a packaged substrate, and a product. Background Technology

[0003] Embedded packaging is an advanced packaging technology that embeds semiconductor devices or functional modules directly into a substrate or frame layer. Currently, with the development of high integration and miniaturization, there is an increasing number of devices that need to be integrated into products with limited size.

[0004] Therefore, how to increase the embedding density of devices has become an urgent problem to be solved. Summary of the Invention

[0005] Therefore, it is necessary to provide a method for fabricating a substrate frame layer, a packaging substrate, and a product to address the aforementioned technical problems and improve the embedding density of devices.

[0006] In a first aspect, a method for fabricating a substrate frame layer is provided, the method comprising: providing two frame plates for embedding devices; slotting each frame plate and fixing the device to be embedded in the frame plate within the slotted holes, such that the chip lead-out surface of the device and the first surface of the frame plate are at the same height; placing a prepreg between the second surfaces of the two frame plates, and sequentially stacking the prepreg and a metal layer on the first surface of each frame plate to obtain a stacked substrate; pressing the stacked substrate together; machining blind holes on the chip lead-out surface to expose the pads of the chip lead-out surface through the blind holes; machining through holes penetrating the substrate in areas other than the chip lead-out surface; electroplating the blind holes and the through holes; and patterning the surface of the electroplated substrate to fabricate surface circuitry to obtain the frame layer.

[0007] In this embodiment, the step of slotting each frame plate and fixing the device to be embedded in the frame plate within the slotted hole, so that the chip lead-out surface of the device and the first surface of the frame plate are at the same height, includes: slotting the frame plate to process a through-hole; applying a protective film to the first surface of the frame plate; attaching the device into the slot, so that the chip lead-out surface of the device and the first surface are at the same height; fixing the device in the slot by filling and curing resin in the slot, and removing the protective film after the resin has cured.

[0008] In this embodiment, the cross-sectional dimension of the slot is larger than the maximum cross-sectional dimension of the device, and the slot is filled by filling with resin.

[0009] In this embodiment of the application, before sequentially stacking the prepreg and the metal layer on the first surface of each of the frame plates, the method further includes: aligning the two frame plates.

[0010] In this embodiment of the application, the step of processing blind holes on the chip lead-out surface includes: opening windows in the metal layer laminated above the chip lead-out surface; and performing laser drilling on the prepreg layer in the windowed area to process the blind holes.

[0011] In this embodiment of the application, the electroplating of the blind holes and the through holes includes: filling the blind holes with electroplating; and plating the walls of the through holes with copper.

[0012] In this embodiment of the application, the electroplating of the blind holes and the through holes includes: performing hole-filling electroplating on both the blind holes and the through holes.

[0013] In this embodiment, the device includes at least one of the following: a chip, a resistor, a capacitor, and an inductor; the chip lead-out surface refers to the surface on the device where the conductive terminals are located.

[0014] In a second aspect, a packaging substrate is provided, comprising at least one frame layer, said frame layer being manufactured by the substrate frame layer manufacturing method proposed in the first aspect above.

[0015] Thirdly, an embedded packaging product is proposed, including the packaging substrate proposed in the second aspect.

[0016] In any of the above-mentioned solutions, two pre-fabricated frame boards are first provided. Slots are cut into each frame board, and the devices to be embedded in the frame boards are fixed in the slots. The chip lead-out surfaces of the devices and the first surface of the frame boards are kept at the same height. A prepreg is placed between the second surfaces of the two frame boards, and a prepreg and a metal layer are stacked sequentially on the first surface of each frame board. The stacked boards are pressed together. After pressing, blind holes are processed on the chip lead-out surfaces to expose the pads of the chip lead-out surfaces. Then, through holes are processed in other areas besides the chip lead-out surfaces to penetrate the boards. The blind holes and through holes are then electroplated. The surface of the electroplated boards is patterned to create the surface circuitry of the frame layer. This application embeds devices on each frame board, ensuring that the chip lead-out surface of the device is at the same height as one surface of the frame board. By placing two frame boards back-to-back, devices placed at different heights can expose their chip lead-out surfaces from the two surfaces of the frame layer respectively. Then, by creating blind holes in the prepreg and metal layer laminated above the chip lead-out surface, the pads on the chip lead-out surface are exposed, facilitating electrical connection between the device and external circuit layers or other devices. Combined with through holes plated on the board, interconnection between devices embedded at different heights is achieved. This enables the embedding and interconnection of devices at different depths, thereby increasing the number of embedded devices in terms of height and thus improving the embedding density.

[0017] Details of one or more embodiments of this application are set forth in the following drawings and description, and other features and advantages of this application will become apparent from the specification, drawings and claims. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 is a flowchart illustrating a method for fabricating a substrate frame layer according to an exemplary embodiment of this application;

[0020] Figure 2 is a flowchart illustrating a method for fabricating a substrate frame layer according to another exemplary embodiment of this application;

[0021] Figure 3 is a flowchart illustrating a method for fabricating a substrate frame layer according to another exemplary embodiment of this application;

[0022] Figure 4 is a cross-sectional view of the finished frame shown in one embodiment of this application;

[0023] Figure 5 is a cross-sectional view of the finished grooved frame shown in one embodiment of this application;

[0024] Figure 6 is a cross-sectional view of the finished frame after tape has been applied, as shown in one embodiment of this application;

[0025] Figure 7 is a cross-sectional view of the finished frame after the device is attached, as shown in one embodiment of this application;

[0026] Figure 8 is a cross-sectional view of a resin-filled and cured frame product shown in one embodiment of this application;

[0027] Figure 9 is a cross-sectional view of the finished frame after the tape has been removed, as shown in one embodiment of this application;

[0028] Figure 10 is a cross-sectional view of the frame layer after embedding the device, as shown in another embodiment of this application;

[0029] Figure 11 is a cross-sectional view of the pressed sheet material shown in one embodiment of this application;

[0030] Figure 12 is a cross-sectional view of the plate after the graphic window is opened according to an embodiment of this application;

[0031] Figure 13 is a cross-sectional view of a plate after laser drilling, as shown in one embodiment of this application;

[0032] Figure 14 is a cross-sectional view of the plate after drilling a through hole, as shown in one embodiment of this application;

[0033] Figure 15 is a cross-sectional view of the electroplated plate shown in one embodiment of this application;

[0034] Figure 16 is a cross-sectional view of a graphic-processed plate shown in one embodiment of this application. Detailed Implementation

[0035] To make the technical problems, technical solutions and beneficial effects solved by this application clearer, the following detailed description of this application is provided in conjunction with the accompanying drawings and embodiments.

[0036] It should be understood that the embodiments described below represent essential information to enable those skilled in the art to implement the embodiments and to illustrate the best mode of implementation. Upon reading the following description in conjunction with the accompanying drawings, those skilled in the art will understand the concepts of this disclosure and recognize the applications of these concepts not specifically mentioned herein. It should be understood that these concepts and applications fall within the scope of this disclosure and the appended claims.

[0037] It should also be understood that the terms “upper,” “lower,” “left,” “right,” “front,” “back,” “bottom,” “middle,” “top,” etc., may be used herein to describe various elements, and the orientation or positional relationship indicated is based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, these elements should not be limited by these terms.

[0038] To be further understood, the terms “comprising” or “including” as used herein specify the presence of the said feature, integer, step, operation, element, and / or component, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0039] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that the terms used herein should be interpreted as having the same meaning as they mean in the context of this specification and related art, and will not be interpreted in an idealized or overly formal sense unless expressly defined herein.

[0040] The method for fabricating the frame layer proposed in this application can be used to fabricate a packaging substrate for embedded packaging products. By embedding devices in layers, the embedding density of devices is increased, and the number of devices that can be embedded is increased, thereby providing a solution for high-density integration of products when product size is limited.

[0041] Figure 1 is a flowchart illustrating a method for fabricating a substrate frame layer according to an exemplary embodiment of this application.

[0042] As shown in Figure 1, the method for manufacturing this frame board may include the following steps:

[0043] S101 provides two frame plates for embedding devices.

[0044] A frame board can be understood as a finished, pre-fabricated frame. Components may include, but are not limited to, at least one of the following: chips, resistors, capacitors, and inductors, etc.

[0045] The frame layer fabricated in this application can be understood as the lead frame in the substrate.

[0046] The lead frame is a key component of the package structure, mainly used to support the chip, make electrical connections, and protect the chip from the influence of the external environment.

[0047] In this embodiment, the frame plate can be made of a material with high mechanical strength and good thermal conductivity.

[0048] For example, the frame board can be a core board or a finished frame that has already had its inner layer graphics made as needed.

[0049] S102, slots are cut into each frame board, and the devices that need to be embedded in the frame board are fixed in the slots obtained by slotting, so that the chip lead-out surface of the device and the first surface of the frame board are kept at the same height.

[0050] For example, each frame plate is slotted by laser processing or machining to create slots for embedding devices on each frame plate.

[0051] The devices that need to be embedded in the frame layer are fixed in the slots, and the chip lead surface of the fixed devices and the first surface of the frame board are kept at the same height.

[0052] In this context, the chip lead surface can be understood as the surface where the conductive terminals of a device are located. For example, if the device is a chip, the chip lead surface can be the surface where the chip pads are located. If the device is a resistor, the chip lead surface can be the surface where the copper terminals of the resistor are located. It should be noted that the pads and copper terminals described here are merely illustrative examples of conductive terminals and are not intended to limit their application.

[0053] The first surface of the frame board can be either the upper or lower surface of the frame board. Alternatively, depending on the design requirements, the side of the frame board through which the embedded device needs to be interconnected with the external circuit board or other devices can be used as the first surface.

[0054] For example, the chip lead-out surface of the device and the first surface of the frame board can be kept at the same height by placing the frame board on the platform with the first surface facing down, and then placing the device in the slot with the chip lead-out surface facing down. Due to gravity, the first surface of the frame board and the chip lead-out surface of the device are in contact with the platform, so that the first surface and the chip lead-out surface are at the same height.

[0055] By setting the chip lead-out surface and the first surface of the frame board at the same height, the pads on the chip lead-out surface are equivalent to the pads on the surface of the frame board. When it is necessary to interconnect the embedded device with the external circuit layer or other devices, it is easier to build electrical connections for the pads.

[0056] S103, a prepreg is placed between the second surfaces of the two frame plates, and a prepreg and a metal layer are stacked sequentially on the first surface of each frame plate to obtain a stacked plate.

[0057] For example, for ease of description, the other surface in the frame plate opposite to the first surface in step S102 above is referred to as the second surface.

[0058] After fixing the device inside the frame board, the two frame boards are stacked with their second surfaces close to each other, and a prepreg is placed between the second surfaces of the two frame boards. In this way, the chip lead-out surfaces of the devices fixed in the frame boards will be exposed.

[0059] Then, prepreg and metal layers are sequentially stacked on the first surface of each frame plate.

[0060] For ease of description, the structure consisting of the first metal layer, the first prepreg, the first frame plate, the second prepreg, the second frame plate, the third prepreg, and the second metal layer stacked in sequence is referred to as a stacked sheet.

[0061] S104, pressing the stacked boards together.

[0062] For example, a vacuum hot press can be used to press the stacked sheets together so that the prepreg reaches a cured state.

[0063] S105, blind holes are processed on the chip lead-out surface to expose the pads on the chip lead-out surface through the blind holes.

[0064] On the laminated board, blind holes are made above the area corresponding to the chip lead-out surface, through which the pads on the chip lead-out surface can be exposed.

[0065] For example, after lamination, the board consists of, from the outside in, a metal layer, a cured prepreg layer, a frame plate, and another cured prepreg layer. When drilling blind holes, holes can be made in the metal layer and the adjacent prepreg layer on the outer surface of the board. For example, laser drilling can be used to ablate the location where blind holes are needed, up to the chip lead-out surface on the frame plate, thus creating blind holes that expose the pads of the chip lead-out surface.

[0066] S106, through holes are machined in areas other than the chip lead-out surface to penetrate the substrate.

[0067] For example, according to design requirements, through holes can be made in areas other than the area corresponding to the chip lead-out surface on the laminated board, and the through holes can extend from the upper surface of the board to the lower surface of the board.

[0068] S107 is used for electroplating blind holes and through holes.

[0069] After the blind holes and through holes are machined, they are electroplated.

[0070] In some embodiments, both blind vias and through-holes can be filled with electroplating, forming copper pillars within the holes. The copper pillars of blind vias contact the pads on the chip's lead-out surface, thus enabling interconnection between the pads and other external circuit layers or devices besides embedded devices. Through-holes penetrate the entire substrate, allowing the copper pillars within them to electrically connect the upper and lower surfaces of the substrate. This allows for interconnection between devices embedded at different depths, and between embedded devices and circuit layers at different depths, through a combination of copper pillars in through-holes and blind vias. It should be noted that the copper pillars described here are merely illustrative examples of conductive pillars formed in the holes after electroplating and are not a limitation on the material of the conductive pillars.

[0071] In other embodiments, blind holes can be filled with electroplating to create copper pillars within them; when electroplating through holes, copper can be plated only on the hole walls. This reduces the complexity of through-hole electroplating, saves plating time, and enables electrical connectivity between the upper and lower surfaces of the substrate.

[0072] S108, pattern processing is performed on the surface of the electroplated board to create surface lines and obtain the frame layer.

[0073] For example, after completing the electroplating of blind holes and through holes, the surface of the board is patterned according to the design requirements, and the required lines are etched on the surface of the board.

[0074] After completing the surface patterning process, a frame layer that can be applied to the packaging substrate can be obtained.

[0075] The frame layer can be further processed to obtain a packaged substrate. For example, other circuit boards can be laminated on the frame layer, new circuit layers can be fabricated, or other frame layers can be laminated, etc. This application does not limit the scope of the application.

[0076] In summary, the method for fabricating the substrate frame layer proposed in this application first provides two pre-fabricated frame boards, slots are cut into each frame board, and devices to be embedded in the frame boards are fixed in the slots, so that the chip lead-out surface of the devices and the first surface of the frame boards are kept at the same height. A prepreg is placed between the second surfaces of the two frame boards, and a prepreg and a metal layer are stacked sequentially on the first surface of each frame board. The stacked boards are then pressed together. After pressing, blind holes are processed on the chip lead-out surface to expose the pads of the chip lead-out surface. Then, through holes are processed in other areas besides the chip lead-out surface to penetrate the board. The blind holes and through holes are then electroplated, and the surface of the electroplated board is patterned to form the surface circuit of the frame layer. This application embeds devices on each frame board, ensuring that the chip lead-out surface of the device is at the same height as one surface of the frame board. By placing two frame boards back-to-back, devices placed at different heights can expose their chip lead-out surfaces from the two surfaces of the frame layer. Blind holes are then created in the prepreg and metal layer laminated above the chip lead-out surface to expose the pads on the chip lead-out surface, facilitating electrical connection between the device and external circuit layers or other devices. Combined with through-holes plated in the board, interconnection between devices embedded at different heights is achieved. This allows for the embedding and interconnection of devices at different depths, thereby increasing the number of embedded devices in terms of height and thus improving the embedding density.

[0077] In some embodiments, as shown in FIG2, step S102 above, "slotting each frame board and fixing the device to be embedded in the frame board in the slotted hole, so that the chip lead-out surface of the device and the first surface of the frame board are kept at the same height", includes:

[0078] S201, Grooving is performed on the frame plate to create slots that penetrate the frame plate.

[0079] For example, the frame plate is laser-grooved or mechanically milled to create slots that can penetrate the frame plate. The depth of the slot is greater than the height of the device, and the cross-sectional dimension of the slot is greater than the maximum cross-sectional dimension of the device, so that the slot can completely accommodate the device while still providing space for resin filling.

[0080] S202, apply a protective film to the first surface of the frame plate.

[0081] For example, tape is applied to the first surface of the frame board to prevent resin subsequently filled into the slots from overflowing onto the first surface and to prevent resin from covering the pads on the chip lead-out side. It should be noted that the tape is only an illustrative example of a protective film and is not a limitation on the material of the protective film.

[0082] The description of the first surface in the above embodiments is provided for reference and will not be repeated here.

[0083] S203, the device is attached into the slot so that the chip lead-out surface of the device and the first surface are at the same height.

[0084] For example, a high-precision pick-and-place machine can be used to place the device into the slot of the frame board, so that the chip lead-out surface of the device and the first surface of the frame board are kept at the same height.

[0085] S204, the device is fixed in the slot by filling and curing the resin in the slot, and the protective film is removed after the resin has cured.

[0086] For example, a vacuum hot pressing process can be used, in which liquid resin is impregnated into the slots of the device and the frame plate by high temperature (150-200°C) and high pressure (5-30 bar), and then heat-cured (30-90 minutes) to allow the resin to reach a stable cured state, thereby achieving three-dimensional integration and fixation of the device and the frame plate.

[0087] For example, a vacuum hot press can be used to press the resin to reduce resin bubbles and increase the resin filling rate in the slots, thereby ensuring the mechanical, thermal, and electrical properties and long-term reliability of the final packaged substrate.

[0088] In some embodiments, the resin may overflow the slots and flow onto the second surface of the frame layer, or simply fill the slots, thus avoiding unfilled gaps / air bubbles in the slots after resin filling.

[0089] In this embodiment, a through-hole is formed within the frame board. Before placing the device, a protective film is applied to the first surface of the frame board to prevent contamination of the chip lead-out surface of the device during resin lamination. The through-hole facilitates device placement and increases the resin filling space, thereby improving the stability of device embedding.

[0090] In some embodiments, as shown in FIG3, step S105 above, "processing blind vias on the chip lead-out surface", includes:

[0091] S301 creates a window on the metal layer laminated above the chip's lead-out surface.

[0092] S302, in the windowed area, laser drilling is performed on the semi-cured sheet to create blind holes.

[0093] For example, a patterned window, or copper window, is made on the metal layer laminated above the chip lead surface to expose the substrate below the metal layer, such as exposing the prepreg layer below the metal layer.

[0094] Laser drilling is performed in the windowed area, reaching the chip lead surface, thereby creating blind holes that expose the pads on the chip lead surface.

[0095] In this embodiment of the application, laser drilling is performed after pattern windowing of the metal layer, which can slow down the time it takes for the metal layer to be ablated by laser drilling.

[0096] For ease of understanding, the method for fabricating the substrate encapsulation layer proposed in the embodiments of this application will be fully described in conjunction with Figures 4-16:

[0097] Step 1: Provide a pre-made frame (frame1, i.e., the frame board mentioned above). Figure 4 is a cross-sectional view of a pre-made frame.

[0098] Step 2: Grooving the finished frame 1 using laser or mechanical processing. Figure 5 shows a cross-sectional view of the finished frame after grooving.

[0099] Step 3: Apply tape to the first surface of the finished frame 1. Figure 6 is a cross-sectional view of the finished frame after applying the tape.

[0100] Step 4: Using a high-precision pick-and-place machine, the device to be embedded is placed into the slot of the frame 1, ensuring that the chip lead surface of the device and the first surface of the frame 1 are at the same height. Figure 7 is a cross-sectional view of the frame 1 after the device is placed.

[0101] Step 5: The resin is filled and cured into the slots of the finished frame 1 using a vacuum press, so that the device can be fixed in the slots of frame 1 by the heat-cured resin. Figure 8 is a cross-sectional view of the finished frame after resin filling and curing.

[0102] Step 6: Remove the tape from the first surface of the finished frame 1. Figure 9 shows a cross-sectional view of the finished frame after the tape has been removed.

[0103] Repeat steps 1-6 above to process another finished frame, frame2, containing the embedded components. The components embedded in frame1 and frame2 can be the same or different; this application does not impose any limitations on this. Furthermore, the number of slots in the same finished frame and the number of components placed horizontally in each slot are not limited. Figure 10 is a cross-sectional view of the finished frame after the other component has been embedded.

[0104] Step 7: Place a prepreg between the second surfaces of the two finished frames, and align the two finished frames into which the device is embedded using an alignment system. Then, stack the prepreg and copper foil sequentially on the first surface of each finished frame to obtain a stacked board. Finally, use a vacuum hot press to press the stacked board together until the resin in the prepreg cures. Figure 11 is a cross-sectional view of the pressed board.

[0105] Step 8: Create a patterned window on the surface copper foil of the laminated board to expose the prepreg material that needs to be laser-drilled. Figure 12 shows a cross-sectional view of the board after the patterned window is created.

[0106] Step 9: Perform laser drilling at the window location to create blind vias on the chip lead-out surface, exposing the pads on the chip lead-out surface through these blind vias. Figure 13 shows a cross-sectional view of the board after laser drilling.

[0107] Step 10: Drill through holes in all areas of the board except for the area corresponding to the chip lead-out face. Figure 14 is a cross-sectional view of the board after drilling through holes.

[0108] Step 11: Electroplating the blind holes and through holes. Figure 15 shows a cross-sectional view of the plated material after electroplating.

[0109] Step 12: Perform pattern processing on the surface of the electroplated board to etch the required circuitry. Figure 16 shows a cross-sectional view of the board after pattern processing.

[0110] It should be noted that the structures shown in Figures 4-16 above are merely illustrative examples and are not intended to limit the finished frame, sheet metal, through holes, blind holes, components, etc.

[0111] This application employs multi-layer embedding to increase the density of devices embedded in the packaging substrate, achieving high-density integration and effectively reducing the size of embedded packaging products.

[0112] This application also proposes a packaging substrate including at least one frame layer, which is manufactured by the method for manufacturing a substrate frame layer described in any of the above embodiments.

[0113] This application also proposes an embedded packaging product, which includes the packaging substrate provided in the above embodiments.

[0114] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for fabricating a substrate frame layer, the method comprising: Two frame plates are provided for embedding the device; Slots are made in each of the frame boards, and the devices that need to be embedded in the frame boards are fixed in the slots obtained by slotting, so that the chip lead-out surface of the device and the first surface of the frame board are kept at the same height. A prepreg is placed between the second surfaces of the two frame plates, and a prepreg and a metal layer are stacked sequentially on the first surface of each frame plate to obtain a stacked plate. The stacked boards are pressed together; Blind holes are machined on the chip lead-out surface to expose the pads on the chip lead-out surface through the blind holes; Through holes are machined through the substrate in areas other than the chip lead-out surface; Electroplating is performed on the blind holes and the through holes; The surface of the electroplated board is patterned to create surface lines, thus obtaining a frame layer.

2. The method according to claim 1, wherein slotting is performed on each of the frame boards, and the device to be embedded in the frame board is fixed in the slotted hole, such that the chip lead-out surface of the device and the first surface of the frame board are kept at the same height, comprising: The frame plate is slotted to create a through-hole. A protective film is applied to the first surface of the frame plate; The device is attached into the slot so that the chip lead-out surface of the device and the first surface are at the same height; The device is fixed in the slot by filling and curing the resin in the slot, and the protective film is removed after the resin has cured.

3. The method according to claim 2, wherein the cross-sectional dimension of the slot is larger than the maximum cross-sectional dimension of the device, and the slot is filled by filling with the resin.

4. The method according to claim 1, wherein before sequentially stacking the prepreg and the metal layer on the first surface of each of the frame plates, the method further comprises: Align the two frame plates.

5. The method according to claim 1, wherein processing a blind via on the chip lead-out surface comprises: A window is made in the metal layer laminated above the chip's lead-out surface; In the windowed area, the semi-cured sheet is laser-drilled to create the blind holes.

6. The method according to claim 1, wherein electroplating the blind hole and the through hole comprises: The blind holes are filled by electroplating. The walls of the through holes are plated with copper.

7. The method according to claim 1, wherein electroplating the blind hole and the through hole comprises: Both the blind holes and the through holes are filled by electroplating.

8. The method according to any one of claims 1-7, wherein the device comprises at least one of the following: a chip, a resistor, a capacitor, and an inductor; The chip lead-out surface refers to the surface on the device where the conductive terminals are located.

9. A packaging substrate comprising at least one frame layer, said frame layer being manufactured by the method for manufacturing a substrate frame layer according to any one of claims 1-8.

10. An embedded packaging product, comprising the packaging substrate of claim 9.

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