Display device

Abstract

A display device (1000). A support (10) of at least one light-emitting unit (100) in the display device (1000) has a first end (10a) and a second end (10b) arranged in a first direction (X), and a third end (10c) and a fourth end (10d) arranged in a second direction (Y). A first chip (21) is configured as a red light chip, and at least one of a second chip (22) and a third chip (23) emits light having a wavelength different from the wavelength of light emitted by the first chip (21). A first pad (31) and a second pad (32) are separately connected to the first chip (21), a third pad (33) and a fourth pad (34) are separately connected to the second chip (22), and a fifth pad (35) and a sixth pad (36) are separately connected to the third chip (23). The first pad (31) and the second pad (32) are located at the first end (10a) and the second end (10b), respectively, the third pad (33) and the fourth pad (34) are located at the third end (10c) and the fourth end (10d), respectively, and the fifth pad (35) and the sixth pad (36) are located at the third end (10c) and the fourth end (10d), respectively. Moreover, the third pad (33) and the fifth pad (35), as well as the fourth pad (34) and the sixth pad (36), are spaced apart in the first direction (X).

Description

Display device

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese patent applications filed on March 27, 2025, application number 202510377492.4 and 202510379188.3, ​​the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of display technology, and more particularly to display devices. Background Technology

[0004] Currently, with the rapid development of LED display technology, chips capable of emitting light of different wavelengths are typically integrated into the same bracket, such as red, green, and blue light chips, and electrically connected to the substrate via external solder pads. However, with the increase in pixel density and miniaturization of package size, the number of solder pads has increased significantly. In a water-oxygen environment, localized electrolyte microenvironments can easily form between adjacent solder pads, leading to spontaneous electrochemical reactions between the pads. This can cause performance failure of the display device and affect its lifespan. Summary of the Invention

[0005] According to some embodiments of this application, a display device is provided, including: a display panel; a backlight module, the display panel being disposed on the light-emitting side of the backlight module, the backlight module including: a plurality of light-emitting units, at least one of the light-emitting units including: a bracket, the bracket having a receiving groove, the bracket having a first end and a second end disposed along a first direction, and a third end and a fourth end disposed along a second direction; a first chip, a second chip, and a third chip, the first chip, the second chip, and the third chip all being disposed in the receiving groove, the first chip being configured as a red light chip, at least one of the second chip and the third chip emitting light of a different wavelength from the first chip; a first pad, a second pad, a third pad, and... A fourth, fifth, and sixth pad are disposed on the bracket. The first and second pads are respectively connected to the first chip, the third and fourth pads are respectively connected to the second chip, and the fifth and sixth pads are respectively connected to the third chip. The first and second pads are respectively located at the first and second ends. The third and fourth pads are respectively located at the third and fourth ends. The fifth and sixth pads are respectively located at the third and fourth ends, and the third and fifth pads, as well as the fourth and sixth pads, are all spaced apart along the first direction, wherein the first direction is perpendicular to the second direction.

[0006] Because different chips use different epitaxial materials, the voltage difference between the first chip and the second chip is relatively large, making them prone to electrochemical reactions. The aforementioned display device, by placing the first and second pads connected to the first chip at the first and second ends of the support, and placing the third and fourth pads connected to the second chip, and the fifth and sixth pads connected to the third chip at the third and fourth ends of the support, respectively, places the first and second pads of the first chip at different ends of the support compared to the pads of the other two chips. This allows the distance between the first and second pads of the first chip and the pads of the other two chips to be set as far as possible. This increases the distance between the pads of the first chip and the pads of the other two chips, reduces the electric field gradient between them, and thus suppresses the migration path of silver ions. This makes it less likely for the pads of the first chip to react with the pads of the other two chips, reducing or preventing the risk of electrochemical reactions between the pads, improving the reliability of the light-emitting unit performance, and ultimately extending the lifespan of the display device.

[0007] According to some embodiments of this application, a display device is provided, including: a display panel; a backlight module, the display panel being disposed on the light-emitting side of the backlight module, the backlight module including: a plurality of light-emitting units, at least one of the light-emitting units including: a bracket, the bracket having a first surface and a second surface disposed opposite to each other along a first direction, the first surface having a receiving groove; a first chip, a second chip, and a third chip disposed in the receiving groove, at least two of the first chip, the second chip, and the third chip emitting light of different wavelengths; a first pad, a second pad, a third pad, a fourth pad, a fifth pad, and a sixth pad disposed on the second surface, the first pad and the second pad respectively being connected to the light-emitting unit. A chip connection is provided, wherein the third and fourth pads are respectively connected to the second chip, and the fifth and sixth pads are respectively connected to the third chip; the first, third, and fifth pads are spaced apart along a second direction, and the first and second pads, the third and fourth pads, and the fifth and sixth pads are respectively arranged opposite to each other along a third direction; a barrier portion is provided on the second surface, the barrier portion is located between the first and third pads, and the barrier portion is configured to space between the first and third pads; wherein, the first direction is the thickness direction of the bracket, and the first direction, the second direction, and the third direction are perpendicular to each other.

[0008] The aforementioned display device has first, third, and fifth pads spaced apart along a second direction, and first and second pads, third and fourth pads, and fifth and sixth pads respectively arranged opposite each other along a third direction. A barrier portion is provided on the second surface of the bracket and is positioned between the first and third pads. This barrier portion physically isolates the pads of two adjacent chips, thereby preventing the formation of ion migration channels between the pads of two adjacent chips in a water-oxygen environment. This inhibits or reduces the migration and deposition of silver ions, that is, it blocks the path of electrochemical reaction between two adjacent sets of first pads, preventing electrochemical reactions between multiple sets of first pads, thereby improving the reliability of the light-emitting unit performance and extending the service life of the display device. Attached Figure Description

[0009] Figure 1 is a schematic diagram of the structure of a display device provided according to some embodiments of this application;

[0010] Figure 2 is an exploded view of a display device provided according to some embodiments of this application;

[0011] Figure 3 is a schematic diagram of one of the structures of a light-emitting unit provided according to some embodiments of this application;

[0012] Figure 4 is a top view schematic diagram of a light-emitting unit provided according to some embodiments of this application;

[0013] Figure 5 is a second schematic diagram of the structure of a light-emitting unit provided according to some embodiments of this application;

[0014] Figure 6 is one of the side view schematic diagrams of the light-emitting unit when the barrier portion is a groove according to some embodiments of this application;

[0015] Figure 7 is one of the side view schematic diagrams of the light-emitting unit when the barrier portion is a protrusion according to some embodiments of this application;

[0016] Figure 8 is one of the bottom views of a light-emitting unit provided according to some embodiments of this application;

[0017] Figure 9 is a second bottom view schematic diagram of a light-emitting unit provided according to some embodiments of this application;

[0018] Figure 10 is a third bottom view schematic diagram of a light-emitting unit provided according to some embodiments of this application;

[0019] Figure 11 is one of the structural schematic diagrams of a colloid filled in a barrier portion according to some embodiments of this application;

[0020] Figure 12 is one of the structural schematic diagrams of a colloid covering a pad located on a side surface according to some embodiments of this application;

[0021] Figure 13 is one of the structural schematic diagrams of a light-emitting unit disposed on a substrate according to some embodiments of this application;

[0022] Figure 14 is a third schematic diagram of the structure of a light-emitting unit provided according to some embodiments of this application;

[0023] Figure 15 is a top view schematic diagram of a light-emitting unit provided according to some embodiments of this application;

[0024] Figure 16 is a fourth schematic diagram of the structure of a light-emitting unit provided according to some embodiments of this application;

[0025] Figure 17 is a second side view of the light-emitting unit when the barrier portion is a groove according to some embodiments of this application;

[0026] Figure 18 is a second side view of the light-emitting unit when the barrier portion is raised, according to some embodiments of this application;

[0027] Figure 19 is a third bottom view schematic diagram of a light-emitting unit provided according to some embodiments of this application;

[0028] Figure 20 is a second schematic diagram of a structure in which an adhesive covers a pad located on a side surface, according to some embodiments of this application.

[0029] Figure 21 is a second schematic diagram of a structure in which colloid is filled in a barrier portion according to some embodiments of this application;

[0030] Figure 22 is a second schematic diagram of a structure in which a light-emitting unit is disposed on a substrate according to some embodiments of this application.

[0031] Explanation of reference numerals in the attached drawings: 1000, display device; 1, display panel; 2, backlight module; 2a, light-emitting area; 100, light-emitting unit; 10, bracket; 101, receiving groove; 10a, first end; 10b, second end; 10c, third end; 10d, fourth end; 10e, first edge; 10f, second edge; 102, first surface; 103, second surface; 104, side surface; 11, barrier portion; 11a, fifth end; 11b, sixth end; 20, chip; 21, first chip; 22, second chip; 23, third chip; 301, first pad group; 302, second pad group; 303, third pad group; 31, first pad; 32 33, 34, 45, 56, 67, 40, 78, 40a, 39, 40b, 49, 50, colloid; 200, substrate; 201, 8th pad; 202, groove; X, first direction; Y, second direction; Z, third direction; T, dimension of the support in the first direction; 1 / 4T, distance from the third and fourth pads to the first edge / distance from the fifth and sixth pads to the second edge; H, dimension of the barrier in the third direction; W, width of the barrier; L1, length of the colloid filled in the barrier; L2, length of the barrier. Detailed Implementation

[0032] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, not all of them. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0033] In this application, the terms "upper," "left," "right," "front," and "rear," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for better describing this application and its embodiments and are not intended to limit the indicated devices, elements, or components to having a specific orientation, or to be constructed and operated in a specific orientation. Furthermore, some of the above terms may have other meanings besides indicating orientation or positional relationship; for example, the term "upper" may also be used in some cases to indicate a certain dependency or connection relationship. Those skilled in the art can understand the specific meaning of these terms in this application according to the specific circumstances. In addition, the terms "set," "equipped with," and "connected" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, elements, or components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances. Furthermore, the terms "first," "second," etc., are primarily used to distinguish different devices, elements, or components (which may be the same or different in specific type and construction), and are not intended to indicate or imply the relative importance or quantity of the indicated devices, elements, or components. Unless otherwise stated, "a plurality of" means two or more.

[0034] The solution of this application will be further described below with reference to the embodiments and accompanying drawings.

[0035] Referring to Figures 1 and 2, this application discloses a display device 1000, which includes a display panel 1 and a backlight module 2. The display panel 1 is disposed on the light-emitting side of the backlight module 2. The backlight module 2 is used to provide backlight, and the display panel 1 is used to display image information for user viewing.

[0036] In some embodiments, the display device 1000 can be, but is not limited to, electronic display products such as televisions, computer monitors, and liquid crystal display panels, and can be widely used in places such as homes, offices, conference halls, exhibition halls, stations, hospitals, or shopping malls.

[0037] In some embodiments, the backlight module 2 may include a lamp plate, a reflector, a diffuser, and an optical film group (not shown) arranged sequentially from back to front. The display panel 1 is located in front of the optical film group. The light emitted by the lamp plate is reflected by the reflector and then passes through the diffuser and the optical film group in sequence before reaching the display panel 1. The liquid crystal molecules in the front panel are deflected by the electric field, reducing the transmittance of the light emitted by the optical film group into the liquid crystal panel. This causes the light to be projected onto filters of different colors to form an image, thereby displaying image information on the display panel 1.

[0038] The optical film assembly may include multiple films. These films may include brightness enhancement films and multiple prism sheets, or multiple films may include multiple prism sheets.

[0039] Referring again to Figure 2, in some embodiments, the backlight module 2 includes a plurality of light-emitting units 100, which can serve as light-emitting sources for the backlight module 2.

[0040] In some embodiments, the backlight module 2 includes a substrate 200, and a plurality of light-emitting units 100 are disposed on the substrate 200. It is understood that the substrate 200, as a carrier substrate for the light-emitting units 100, can be electrically connected to the light-emitting units 100 to provide light-emitting driving signals to the light-emitting units 100. The substrate 200 can be a rigid substrate, such as glass.

[0041] It should be noted that multiple light-emitting units 100 can form multiple light-emitting regions 2a on the substrate 200. For example, multiple light-emitting regions 2a are spaced apart along the height direction (vertical direction) of the display panel 1, each light-emitting region 2a is rectangular, the length direction of each light-emitting region 2a extends along the width direction of the display panel 1, and the width direction of each light-emitting region 2a extends along the height direction of the display panel 1. Each light-emitting region 2a can have multiple light-emitting units 100. Of course, in other examples, multiple light-emitting regions 2a can be spaced apart along the width direction (horizontal direction) of the display panel 1, each light-emitting region 2a is rectangular, the length direction of each light-emitting region 2a extends along the height direction of the display panel 1, and the width direction of each light-emitting region extends along the width direction of the display panel 1.

[0042] Please refer to Figures 3 to 5 together. In some embodiments, at least one light-emitting unit 100 includes a support 10, which has a receiving groove 101. The support 10 can be disposed on a substrate 200 to realize the electrical connection of the light-emitting unit. It should be noted that the receiving groove 101 has an opening, and the side wall of the receiving groove 101 is sloping and forms a reflective inner cavity. That is, the receiving groove 101 is roughly bowl-shaped, and the side wall of the receiving groove 101 can reflect light. The opening can be circular, square, or rectangular, etc., but whether it is a circular or square opening, it makes the receiving groove 101 of the support 10 sloping. The specific shape is not limited in this embodiment.

[0043] In some embodiments, the bracket 10 has a first end 10a and a second end 10b disposed along a first direction X, and a third end 10c and a fourth end 10d disposed along a second direction Y. The first direction X is perpendicular to the second direction Y. Specifically, the angle between the first direction X and the second direction Y can be 90°, or the angle between the first direction X and the second direction Y can be within the range of 90° ± 5°, for example, it can be 87°, 89°, or 91°, etc.

[0044] It is understandable that during the production process, process factors such as equipment precision and measurement errors may affect the actual molding effect of the bracket 10, making the width direction, length direction and thickness direction of the bracket 10 "approximately perpendicular", that is, the included angle of the first direction X, the second direction Y and the third direction Z can be approximately equal to 90°, such as 88°, 89°, 91° or 92°.

[0045] Optionally, the support 10 can be a square block structure, such as a square or rectangle. When the block structure support 10 is rectangular, it means that the support 10 can have two opposite long sides and two opposite short sides. Of course, as other examples, the support 10 can also be an irregular block structure, a plate structure, etc.

[0046] Referring to Figures 3 and 5, in some embodiments, the bracket 10 further has a first surface 102 and a second surface 103 disposed opposite to each other along a third direction Z, and a receiving groove is recessed on the first surface 102. The third direction Z is the thickness direction of the bracket 10, and is perpendicular to the first direction X and the second direction Y, respectively.

[0047] It is understood that the second surface 103 of the support 10 refers to the outer surface opposite to the surface of the receiving groove 101 used to set the chip along the thickness direction of the support 10. After being soldered to the substrate 200, the second surface 103 can refer to the side facing the substrate 200.

[0048] In some embodiments, at least one light-emitting unit includes a plurality of chips 20 disposed in a receiving groove 101. The plurality of chips 20 emit light of different colors. The light emitted by the plurality of chips 20 is reflected by the sidewall of the receiving groove 101 and exits from the opening.

[0049] Referring to Figures 3 and 4, in some embodiments, at least one light-emitting unit includes a first chip 21, a second chip 22, and a third chip 23, all of which are disposed in a receiving groove.

[0050] In some embodiments, at least one light-emitting unit 100 includes a first pad 31, a second pad 32, a third pad 33, a fourth pad 34, a fifth pad 35, and a sixth pad 36, all of which are disposed on the bracket 10.

[0051] The first pad 31 and the second pad 32 are connected to the first chip 21, the third pad 33 and the fourth pad 34 are connected to the second chip 22, and the fifth pad 35 and the sixth pad 36 are connected to the third chip 23.

[0052] In some possible implementations, the first pad 31 and the second pad 32 are connected to the positive and negative terminals of the first chip 21, respectively; that is, the first pad 31 and the second pad 32 are the positive and negative pads of the first chip 21, respectively. The third pad 33 and the fourth pad 34 are connected to the positive and negative terminals of the second chip 22, respectively; that is, the third pad 33 and the fourth pad 34 are the positive and negative pads of the second chip 22, respectively. The fifth pad 35 and the sixth pad 36 are connected to the positive and negative terminals of the third chip 23, respectively; that is, the fifth pad 35 and the sixth pad 36 are the positive and negative pads of the third chip 23, respectively. Of course, in other implementations, the first pad 31 and the second pad 32 can also be connected to the negative and positive terminals of the first chip 21, respectively; that is, the first pad 31 and the second pad 32 are the negative and positive pads of the first chip 21, respectively. The third pad 33 and the fourth pad 34 can also be connected to the negative and positive terminals of the second chip 22, respectively. That is, the third pad 33 and the fourth pad 34 are the negative and positive pads of the second chip 22, respectively. The fifth pad 35 and the sixth pad 36 can also be connected to the negative and positive terminals of the third chip 23, respectively. That is, the fifth pad 35 and the sixth pad 36 are the negative and positive pads of the third chip 23, respectively.

[0053] It should be noted that, referring to Figure 4, the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 can each include two parts. One part is located inside the receiving groove 101, which is used for the positive or negative electrical connection of the first chip 21, the second chip 22, and the third chip 23. The other part is located outside the receiving groove 101 and is at least partially located on the second surface 103 of the bracket 10. Any one of the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 can be integrally formed, extending from inside the receiving groove 101 of the bracket 10 to the outside of the bracket 10, thereby ensuring that the bracket 10 has pads both inside and outside.

[0054] The bracket 10 can be soldered to the substrate 200 via the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35 and the sixth pad 36 located on the second surface 103.

[0055] In some embodiments, the first chip 21 is configured as a red light chip, and at least one of the second chip 22 and the third chip 23 emits light of a different wavelength than the first chip 21.

[0056] Because different chips use different epitaxial materials, the voltage difference between the red light chip and other chips is relatively large, making them prone to electrochemical reactions. Based on this, referring to Figures 4 and 5, in some embodiments, the first pad 31 and the second pad 32 are located at the first end 10a and the second end 10b, respectively.

[0057] In some embodiments, the third pad 33 and the fourth pad 34 are located at the third end 10c and the fourth end 10d, respectively.

[0058] In some embodiments, the fifth pad 35 and the sixth pad 36 are located at the third end 10c and the fourth end 10d, respectively, and the third pad 33 and the fifth pad 35, the fourth pad 34 and the sixth pad 36 are all spaced apart along the first direction X.

[0059] That is, the first end 10a of the bracket 10 has a first pad 31 of the first chip 21, and the second end 10b has a second pad 32 of the first chip 21. The third end 10c of the bracket 10 has a third pad 33 of the second chip 22 and a fifth pad 35 of the third chip 23, which are spaced apart along the first direction X. The fourth end 10d of the bracket 10 has a fourth pad 34 of the second chip 22 and a sixth pad 36 of the third chip 23, which are spaced apart along the first direction X.

[0060] By placing the first pad 31 and the second pad 32 connected to the first chip 21 at the first end 10a and the second end 10b of the bracket 10, and placing the third pad 33 and the fourth pad 34 connected to the second chip 22, and the fifth pad 35 and the sixth pad 36 connected to the third chip 23 at the third end 10c and the fourth end 10d of the bracket 10, that is, placing the first pad 31 and the second pad 32 of the first chip 21 at different ends of the bracket 10 with the pads of the other two chips, the distance between the first pad 31 and the second pad 32 of the first chip 21 and the pads of the other chips can be set as far as possible. This increases the distance between the pads of the first chip 21 and the pads of the other two chips, reduces the electric field gradient between the pads of the first chip 21 and the pads of the other two chips, thereby suppressing the migration path of silver ions and making it less likely for the pads of the first chip 21 to react with the pads of the other two chips. This reduces or prevents the risk of electrochemical reactions between the pads, improves the reliability of the light-emitting unit performance, and thus helps to extend the service life of the display device.

[0061] It can be understood that, taking a rectangular bracket 10 as an example, the first direction X can be the length direction of the bracket 10, and the second direction Y can be the width direction of the bracket 10. Therefore, the two first ends 10a and the second end 10b can be the two oppositely arranged short sides of the bracket 10, and the two third ends 10c and the fourth end 10d can be the two oppositely arranged long sides of the bracket 10. Alternatively, the first direction X can be the width direction of the bracket 10, and the second direction Y can be the length direction of the bracket 10. Therefore, the first ends 10a and the second end 10b can be the two oppositely arranged long sides of the bracket 10, and the third ends 10c and the fourth end 10d can be the two oppositely arranged long sides of the bracket 10.

[0062] Since the two pads of the first chip 21 are separately located at the first end 10a and the second end 10b of the bracket 10, and the pads of the second chip 22 and the third chip 23 are located at the third end 10c and the fourth end 10d, that is, both the third end 10c and the fourth end 10d have two pads, in order to ensure that the spacing between adjacent pads is not too small, preferably, the bracket 10 is rectangular in shape, with the first end 10a and the second end 10b being the two short sides of the bracket 10, and the third end 10c and the fourth end 10d being the two long sides of the bracket 10. That is, the first direction X is the length direction of the bracket 10, and the second direction Y is the width direction of the bracket 10. In this way, the first pad 31 and the second pad 32 are respectively located on the two short sides of the bracket 10, and the third pad 33 and the fourth pad 34, the fifth pad 35 and the sixth pad 36 are respectively located on the two long sides of the bracket 10, which ensures that the spacing between adjacent third pads 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36 is not too small, reducing the risk of short circuits.

[0063] Optionally, the first chip 21 can be connected to the first pad 31 and the second pad 32 via wires, or the first chip 21 can be directly soldered to the first pad 31 and the second pad 32 without wires. Taking different chips on the market as examples, the PN junction of a standard chip is on the front side of the chip, and is connected to the pads by wire bonding; while the PN junction of a flip chip is on the bottom of the chip, and is connected by soldering, without wire bonding, thus enhancing the reliability of the connection. Correspondingly, the second chip 22 can also be connected to the third pad 33 and the fourth pad 34, and the third chip 23 can also be connected to the fifth pad 35 and the sixth pad 36 via wires or soldering.

[0064] Optionally, when the chip is connected to the pad via wires, the wires can be gold wires or copper wires. Since gold wires have stable performance, connecting via gold wires can extend the lifespan of the wires, thereby increasing the lifespan of the light-emitting unit 100.

[0065] In some embodiments, the receiving groove 101 is further filled with a transparent colloid (not shown), which is used to encapsulate the chip 20. The transparent colloid may be hemispherical in shape and possess high refractive index and high light transmittance, which facilitates a large light emission angle for the chip 20, thereby increasing the luminous flux. Furthermore, the transparent colloid also provides protection, preventing defects in the chip 20 caused by moisture, dust corrosion, or poor contact and detachment due to vibration, thus improving the lifespan and reliability of the chip 20 and the light-emitting unit 100.

[0066] Alternatively, the transparent colloid can be a plastic material such as epoxy resin or silicone resin.

[0067] In this embodiment, the chip 20 is fixed by the bracket 10, and then the positive and negative terminals of the chip 20 are connected to the pads by bonding wires, and then encapsulated with potting resin to obtain a complete light-emitting unit 100.

[0068] In some embodiments, one of the second chip 22 and the third chip 23 is configured as a green light chip, and the other of the second chip 22 and the third chip 23 is configured as a blue light chip.

[0069] By setting the first chip 21, the second chip 22, and the third chip 23 as red, green, and blue light chips, respectively, the light-emitting unit can create various colors by mixing these three colors. Furthermore, by placing the pads of the three color chips at different ends of the bracket 10, especially by positioning the pads of the red light chip far away from the pads of the green and blue light chips, crosstalk between different drive current signals can be avoided, reducing the risk of color mixing and ensuring the stability of color output.

[0070] In one example, the second chip 22 and the third chip 23 are configured as a green light chip and a blue light chip, respectively. That is, the first chip 21, the second chip 22 and the third chip 23 are red light chips, green light chips and blue light chips, respectively. When powered on, the first chip 21 can emit red light, the second chip 22 can emit red light, and the third chip 23 can emit blue light.

[0071] Optionally, the first chip 21, the second chip 22, and the third chip 23 can be controlled independently. For example, in a red scene, the red chip 20 can be controlled to work alone so that the light-emitting unit 100 emits red light; in a green scene, the green chip 20 can be controlled to work alone so that the light-emitting unit 100 emits green light; in a blue scene, the blue chip 20 can be controlled to work alone so that the light-emitting unit 100 emits blue light; and in a white scene, the first chip 21, the second chip 22, and the third chip 23 can be controlled to work simultaneously so that the three colors of light are mixed so that the light-emitting unit 100 emits white light.

[0072] Of course, as other examples, the first chip 21, the second chip 22, and the third chip 23 are respectively a red light chip, a blue light chip, and a green light chip, or the first chip 21, the second chip 22, and the third chip 23 are respectively a red light chip, a blue light chip, and a blue light chip. That is, when the first chip 21 is a red light chip, the other two chips can emit light rays different from red light. The specific settings are not limited in the embodiments of this application.

[0073] Taking RGB LEDs as an example, the first chip 21 is a red light chip, which is usually vertical and uses GaN (gallium arsenide) epitaxial material. It is significantly different from the upright structure and GaN (gallium nitride) epitaxial material used by the third chip 23 (blue light chip) and the second chip 22 (blue light chip). As a result, the luminous flux of the first chip 21 decreases rapidly with increasing temperature compared to the third chip 23 (blue light chip) and the second chip 22 (blue light chip), leading to a reduction in luminous efficiency.

[0074] To reduce the impact of temperature rise on the first chip 21, in some embodiments, the size of the first pad 31 and / or the second pad 32 is larger than the size of any one of the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36. It should be noted that the aforementioned pad size refers to the size of the first pad 31, the second pad 32, and the third pad 33 located on the second surface 103.

[0075] Because the first chip 21 has a low voltage but a high current requirement, by setting the size of the pads connected to the first chip 21 to be larger than the size of the pads connected to other chips, while still allowing for increased distance between the first pad 31, the second pad 32, and other pads to block the electrochemical reaction path, the pads can have a larger heat dissipation area. This reduces the impact of temperature rise on the first chip 21, thus improving the overall heat dissipation performance of the light-emitting unit. Simultaneously, increasing the size of the pads connected to the first chip 21 reduces resistance and localized heating, decreasing the risk of silver ion dissociation due to current concentration. Furthermore, the larger pads can disperse the electric field strength, reduce the silver ion dissociation rate, and delay the formation of Ag2O (silver oxide) gel, thereby ensuring the performance of the display device.

[0076] In some possible implementations, the dimensions of the first pad 31 and the second pad 32 in the first direction X are both greater than the dimensions of any one of the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 in the first direction X; or, the dimensions of the first pad 31 and the second pad 32 in the second direction Y are greater than the dimensions of any one of the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 in the second direction Y; or, the dimensions of the first pad 31 and the second pad 32 in the first direction X and the second direction Y are both greater than the dimensions of any one of the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 in the first direction X and the second direction Y. Regardless of the dimensions in the first direction X and / or the second direction Y, as long as the area of ​​the first pad 31 and / or the second pad 32 located on the second surface 103 is greater than the area of ​​the pads of the other two chips, it is acceptable.

[0077] Referring again to Figure 4, in some embodiments, the first pad 31 and the second pad 32 are respectively disposed opposite to each other along the first direction X. That is, the positive pad and the negative pad of the first chip 21 are disposed opposite to each other in the first direction X.

[0078] In some embodiments, the third pad 33 and the fourth pad 34 are respectively disposed opposite to each other along the second direction Y, and the fifth pad 35 and the sixth pad 36 are respectively disposed opposite to each other along the second direction Y. The third pad 33 is configured to be connected to the positive electrode of the second chip 22, and the fifth pad 35 is configured to be connected to the positive electrode of the third chip 23. The third pad 33 and the fifth pad 35 are disposed adjacent to each other along the second direction Y. That is, the third pad 33 and the fourth pad 34 are respectively the positive and negative pads connected to the second chip 22, and the fifth pad 35 and the sixth pad 36 are respectively the positive and negative pads connected to the third chip 23.

[0079] In other words, the first pad 31 and the second pad 32 are on the same straight line along the first direction X, the third pad 33 and the fourth pad 34 are on the same straight line along the second direction Y, the fifth pad 35 and the sixth pad 36 are on the same straight line along the second direction Y, and the third pad 33 and the fifth pad 35 are located at one of the second ends 10b, while the fourth pad 34 and the sixth pad 36 are located at the other second end 10b.

[0080] In this application, by arranging the positive and negative pads connected to each chip opposite each other, and by placing the positive pads connected to the second chip 22 and the third chip 23 at the same end, a symmetrical electric field distribution can be formed between the pads. This avoids excessively high local field strength that could cause tip discharge, and also increases the ion migration path length between the positive and negative pads, thus extending the silver ion migration time. Furthermore, unifying the positive and negative orientation of the pads simplifies circuit wiring design and facilitates the control of automated soldering processes.

[0081] For ease of understanding, the following description will be based on the arrangement of the pads of each chip. The first pad 31 and the second pad 32 are located at the first end 10a and the second end 10b of the bracket 10, respectively. The third pad 33 and the fourth pad 34 are located at the third end 10c and the fourth end 10d of the bracket 10, respectively. The fifth pad 35 and the sixth pad 36 are located at the third end 10c and the fourth end 10d of the bracket 10, respectively. The third pad 33 and the fifth pad 35 are arranged adjacent to each other along the first direction X. The fourth pad 34 and the sixth pad 36 are arranged adjacent to each other along the first direction X. The first pad 31 is arranged adjacent to the third pad 33 and the fourth pad 34. The second pad 32 is arranged adjacent to the fifth pad 35 and the sixth pad 36.

[0082] Referring to Figures 4 and 5, in some embodiments, at least one light-emitting unit 100 further includes a seventh pad 40, which is at least partially disposed in the receiving groove 101. A first pad 31, a second pad 32, a third pad 33, a fourth pad 34, a fifth pad 35, and a sixth pad 36 are disposed around the outer periphery of the seventh pad 40. A first chip 21, a second chip 22, and a third chip 23 are disposed on the seventh pad 40.

[0083] Specifically, the seventh pad 40 may have a third surface 40a and a fourth surface 40b disposed opposite each other along a third direction Z. The third surface 40a is located in the receiving groove 101, and the first chip 21, the second chip 22, and the third chip 23 are disposed on the third surface 40a. The fourth surface 40b is exposed on the second surface 103 of the bracket 10. The heat generated by the first chip 21, the second chip 22, and the third chip 23 is transferred to the seventh pad 40, and then transferred to the external environment through the seventh pad 40.

[0084] By placing the seventh pad 40 between multiple pads, a central heat dissipation structure is formed, which allows the seventh pad 40 to centrally dissipate the heat from each chip, reducing the overall temperature of the light-emitting unit (higher temperature will accelerate silver dissociation and migration). At the same time, the seventh pad 40 can separate the positive and negative pads of each chip, thereby blocking the ion migration path and reducing the risk of electrochemical reactions.

[0085] It should be noted that the aforementioned seventh pad 40 can not only serve as a heat dissipation pad, but also as a pad for electrical connection with the substrate. Furthermore, the portion of the seventh pad 40 located in the receiving groove 101 can also serve as a reflective element, which is more conducive to the emission of light.

[0086] In some embodiments, the first pad 31 and the second pad 32 are located at the middle of the first end 10a and the second end 10b along the second direction Y, respectively. That is, the distances of the first pad 31 and the second pad 32 along the second direction Y to the edge of the bracket 10 are approximately the same, thus making the distances of the first pad 31 and the second pad 32 of the first chip 21 along the second direction Y to the edge of the bracket 10 symmetrical.

[0087] Referring to FIG6, in some embodiments, the bracket 10 has a first edge 10e and a second edge 10f disposed opposite to each other along a first direction X, and a third pad 33 and a fifth pad 35 are disposed sequentially along a direction from the first edge 10e to the second edge 10f.

[0088] In some embodiments, the bracket 10 has a dimension of T in the first direction X, the distances from the third pad 33 and the fourth pad 34 to the first edge 10e are 1 / 4T, and the distances from the fifth pad 35 and the sixth pad 36 to the second edge 10f are 1 / 4T. The third pad 33 and the fifth pad 35 are evenly arranged at the second end 10b, and the distances from the third pad 33 to the first edge 10e, the distance between the third pad 33 and the fifth pad 35, and the distance from the fifth pad 35 to the second edge 10f are approximately the same.

[0089] In other words, the bracket 10 is divided into two symmetrical parts along the first direction X, with the third pad 33 and the fourth pad 34 located in the center of the left part, and the fifth pad 35 and the sixth pad 36 located in the center of the right part.

[0090] This configuration effectively balances the electric field distribution at both ends of the support 10 in the first direction X and the second direction Y, reducing the likelihood of electrochemical reactions. Furthermore, the uniform and symmetrical arrangement of the pads balances mechanical stress, preventing poor contact caused by soldering misalignment.

[0091] In some embodiments, at least a portion of the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 are disposed on the second surface 103.

[0092] Referring to Figures 5 to 7, in some embodiments, the bracket 10 further has a side surface 104 connected to the first surface 102 and the second surface 103, and the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35 and the sixth pad 36 are at least partially located on the side surface 104.

[0093] It is understood that the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35 and the sixth pad 36 located outside the receiving groove 101 each include two interconnected parts. The first part is located on the side surface 104 and the second part is located on the second surface 103, and the connection between the two is located at the corner of the bracket 10.

[0094] It is understood that the side surface 104 refers to the outer peripheral surface that is disposed opposite to the side wall surface of the receiving groove 101 along the first direction X and the second direction Y. Taking the square bracket 10 as an example, the side surface 104 consists of four side surfaces.

[0095] Currently, to achieve more flexible color control and richer light effect variations, the number of pads on the light-emitting unit 100 typically includes four, six, eight, or even more. However, with the increase in the number of pads, spontaneous electrochemical reactions easily occur between the pads under the influence of water and oxygen. Specifically, at the anode, silver dissociates into Ag+ (silver ions) under the influence of an electric field and OH- (hydroxyl ions), and forms AgOH (silver hydroxide) with OH-. The Ag-OH chemical bond in AgOH is weak and easily decomposes into gel-like Ag2O (silver oxide) and water. At the cathode, H+ (hydrogen ions) accept electrons to form H2 (hydrogen gas). The Ag+ dissociated at the anode migrates directly from the electrolyte to the cathode under the influence of an electric field, accepts electrons, and completes electrochemical deposition to form metallic silver. This can easily lead to the failure of the light-emitting unit 100 and affect the service life of the backlight module 2.

[0096] Based on the above, referring to FIG5, in some embodiments, a barrier portion 11 is provided on the second surface 103. The barrier portion 11 is located between any two adjacent pads connected to different chips among the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35 and the sixth pad 36. The barrier portion 11 is configured to be spaced apart from any two adjacent pads connected to different chips.

[0097] By providing a barrier portion 11 between any two adjacent pads connected to different chips among the first pad 31, second pad 32, third pad 33, fourth pad 34, fifth pad 35, and sixth pad 36, the barrier portion 11 can disrupt the continuous interface of the electrochemical reaction, act as a separator between two adjacent pads, and increase the tortuosity of the silver ion migration path, inhibiting or reducing the migration and deposition of silver ions, thereby delaying or preventing electrochemical deposition, thereby improving the reliability of the display device performance, and thus helping to extend the service life of the display device 1000.

[0098] It is understood that for the pads connected to different chips, in addition to the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36 being arranged adjacently, the first pad 31 is also arranged adjacently to the third pad 33 and the fourth pad 34, and the second pad 32 is also arranged adjacently to the fifth pad 35 and the sixth pad 36. Therefore, at least two of the aforementioned adjacent pads are provided with a barrier portion 11. Preferably, a barrier portion 11 is provided between any two adjacent pads.

[0099] Optionally, referring to Figures 6 and 7, the barrier portion 11 can be a protrusion on the second surface 103, such as a bump or a strip. Alternatively, the barrier portion 11 can be a groove recessed on the second surface 103, as long as it can play a blocking role to block the electrochemical reaction path of two adjacent sets of solder pads.

[0100] In some embodiments, portions of the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 located outside the receiving groove 101 are disposed on the edge of the bracket 10, and one end of the blocking portion 11 extends to the edge of the bracket 10.

[0101] Setting the pads at the edge facilitates alignment during the soldering process, thereby improving the assembly yield of the light-emitting unit 100. At the same time, extending the barrier portion 11 to the edge of the bracket 10 ensures that the setting of the barrier portion 11 and the pads are consistent, forming a continuous physical isolation.

[0102] In some embodiments, referring to Figures 5 and 6, the dimension of the barrier portion 11 in the third direction Z (thickness direction of the bracket 10) is H, where H satisfies: H≥0.1mm.

[0103] If the dimension H of the barrier portion 11 in the thickness direction Z of the support 10 is less than 0.1 mm, then when the barrier portion 11 is a protrusion on the second surface 103, the height of the barrier portion 11 is too low. And when the barrier portion 11 is a recess on the second surface 103, the depth of the barrier portion 11 is too low. That is, regardless of whether the barrier portion 11 is a protrusion or a recess, it cannot provide effective isolation. Silver ions are easily migrated under the influence of the electric field, forming metal deposition, thus affecting the performance of the light-emitting unit 100. Therefore, by setting the dimension H of the barrier portion 11 in the thickness direction Z of the support 10 to be not less than 0.1 mm, the size of the barrier portion 11 can be made appropriate, thereby enabling the barrier portion 11 to provide effective physical isolation and prevent the formation of ion migration channels between adjacent pads.

[0104] In some embodiments, the dimension of the barrier portion 11 in the third direction Z (thickness direction Z of the bracket 10) is H, where H satisfies: H≤0.3mm.

[0105] If the dimension H of the barrier portion 11 in the thickness direction Z of the bracket 10 is greater than 0.3 mm, when the barrier portion 11 is a protrusion on the second surface 103, the height of the barrier portion 11 is too high, which will excessively occupy the space between the light-emitting unit 100 and the substrate 200, resulting in an increase in the overall thickness of the light-emitting unit 100 and hindering the welding of the bracket 10 and the substrate 200. When the barrier portion 11 is a groove recessed on the second surface 103, the depth of the barrier portion 11 is too high, which will excessively occupy the space on the bracket 10 and affect the mechanical strength of the bracket 10. Therefore, by setting the dimension H of the barrier portion 11 in the thickness direction Z of the bracket 10 to be no greater than 0.3 mm, the barrier portion 11 can be prevented from being too high, avoiding affecting the welding of the bracket 10 and the substrate 200, or excessively occupying the space on the bracket 10, reducing the impact on the structural strength of the bracket 10 itself.

[0106] In some embodiments, the dimension of the barrier portion 11 in the third direction Z is H, where H satisfies: 0.1mm ≤ H ≤ 0.3mm. Optionally, H can satisfy 0.1mm ≤ H ≤ 0.2mm, 0.2mm ≤ H ≤ 0.3mm, or 0.15mm ≤ H ≤ 0.25mm, etc. For example, H can be 0.1mm, 0.2mm, or 0.3mm, etc. When the dimension of the barrier portion 11 in the thickness direction Z of the support 10 satisfies 0.1mm ≤ H ≤ 0.3mm, H can be kept within a reasonable range, which can effectively isolate the light source while reducing the impact on the welding process, or protecting the structure of the support 10 itself. When the barrier portion 11 is a protrusion, this size range is more conducive to meeting the requirement of thinning the light-emitting unit 100, while ensuring effective blocking of ion migration.

[0107] In some embodiments, the dimension of the barrier portion 11 in the second direction Y is W, where W ≥ 0.2 mm. If the dimension W of the barrier portion 11 in the second direction Y is less than 0.2 mm, then the barrier portion 11 is too narrow in the second direction Y and cannot effectively isolate two adjacent pads.

[0108] In some embodiments, the barrier portion 11 is configured as an elongated structure, and the width of the barrier portion 11 is W, where W ≤ 0.8 mm. If the width W of the barrier portion 11 is greater than 0.8 mm, the width of the barrier portion 11 is too wide. An overly wide barrier portion 11 will make the distance between the barrier portion 11 and the pads on both sides too close. During the pad soldering process, it is easily affected by the solder, thus failing to effectively perform the isolation function of the barrier portion 11.

[0109] In some embodiments, the width of the barrier portion 11 is W, where W satisfies: 0.2mm ≤ W ≤ 0.8mm. When the width of the barrier portion 11 satisfies 0.2mm ≤ W ≤ 0.8mm, W can be kept within a reasonable range, effectively isolating the barrier portion 11 while preventing it from being too close to the pads on both sides, thus avoiding the influence of pad soldering. When the barrier portion 11 is a groove, this suitable size range can balance the isolation effect and structural strength.

[0110] It can be understood that when the blocking part 11 is a protrusion on the second surface 103, the dimension of the blocking part 11 in the thickness direction Z of the bracket 10 is the height; when the blocking part 11 is a groove on the second surface 103, the dimension of the blocking part 11 in the thickness direction Z of the bracket 10 is the depth.

[0111] In some embodiments, the barrier portion 11 located between the third pad 33 and the fifth pad 35, and between the fourth pad 34 and the sixth pad 36, is located at the middle of two adjacent pads. In other words, if the distance between the third pad 33 and the fifth pad 35 in the first direction X is L, then the barrier portion 11 is located at 1 / 2L, that is, the distance from the barrier portion 11 to the third pad 33 and the fifth pad 35 is approximately the same.

[0112] By placing the barrier portion 11 in the middle between the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36, that is, making the distance from the barrier portion 11 to the pads on both sides in the first direction approximately the same, the difference in electric field angle between adjacent pads is reduced, the driving force for silver ion migration is decreased, and electrochemical reactions are less likely to occur between adjacent pads. Furthermore, the above arrangement also makes the distance from the barrier portion 11 to the pads on both sides symmetrical, resulting in a uniform electric field distribution and avoiding the situation where local electric field concentration accelerates electrochemical reactions.

[0113] Referring to FIG8, in some embodiments, the barrier portion 11 may be configured as an elongated structure having a fifth end 11a and a sixth end 11b along its length. The fifth end 11a is located at the edge of the bracket 10, and the sixth end 11b extends to the seventh pad 40. In other words, the fifth end 11a is located on the side surface 104 of the bracket 10, and the sixth end 11b extends to connect with the seventh pad 40.

[0114] By setting the seventh pad 40, the barrier portion 11 extends to be connected to it, so that the barrier portion 11 can play an effective separation role while avoiding excessive length of the barrier portion 11, which would cause excessive occupation of the space of the bracket 10. This makes the layout between the components more reasonable and ensures that the seventh pad 40 has sufficient heat dissipation area to conduct heat in conjunction with the barrier portion 11, thereby improving heat dissipation efficiency.

[0115] It should be noted that, since the first pad 31 and the second pad 32 are respectively located at the two first ends 10a, and the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 are respectively located at the two second ends 10b, and the pads of each chip are located at different ends of the bracket 10, the barrier portion 11 can have multiple configuration methods. The configuration of the barrier portion 11 will be explained in detail below according to different cases.

[0116] In the first example, referring to Figure 8, along the first direction X, a barrier portion 11 is provided between the third pad 33 and the fifth pad 35, and between the fourth pad 34 and the sixth pad 36, to physically isolate the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36. Along the second direction Y, barrier portions 11 can also be provided between the first pad 31 and the third pad 33, between the first pad 31 and the fourth pad 34, between the second pad 32 and the fifth pad 35, and between the second pad 32 and the sixth pad 36, thereby physically separating adjacent pads of different chips.

[0117] In this example, the fifth end 11a of the barrier portion 11 located between any two pads is located at the edge of the bracket 10, and the second end 10b is connected to the seventh pad 40.

[0118] In the second example, referring to Figure 9, along the first direction X, a barrier portion 11 is provided between the third pad 33 and the fifth pad 35, and between the fourth pad 34 and the sixth pad 36, to physically isolate the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36. Along the second direction Y, a barrier portion 11 is provided between the first pad 31 and the second pad 32, and between the third pad 33 and the fifth pad 35, extending along the first direction X to a first end 10a and a second end 10b. Correspondingly, along the second direction Y, a barrier portion 11 is provided between the first pad 31 and the second pad 32, and between the fourth pad 34 and the sixth pad 36, extending along the first direction X to a first end 10a and a second end 10b.

[0119] In the third example, referring to Figure 10, along the first direction X, a barrier portion 11 is provided between the third pad 33 and the fifth pad 35, and between the fourth pad 34 and the sixth pad 36, to physically isolate the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36. Barrier portions 11 are also provided between the first pad 31 and the third pad 33, between the first pad 31 and the fourth pad 34, between the second pad 32 and the fifth pad 35, and between the second pad 32 and the sixth pad 36. The barrier portions 11 are arranged along the diagonal of the support 10, resulting in a cross-shaped structure on the second surface 103.

[0120] In this example, the fifth end 11a of the barrier portion 11 located between any two pads is located at the edge of the bracket 10, and the second end 10b is connected to the seventh pad 40.

[0121] Understandably, regardless of the above structural configuration, the barrier portion 11 extends to the edge of the bracket 10.

[0122] In some embodiments, the barrier portion 11 is configured as a groove recessed relative to the second surface 103 of the support 10. That is, the groove design is used to isolate two adjacent pads.

[0123] Since the light-emitting unit 100 is usually soldered on the substrate 200, by constructing the barrier portion 11 as a groove formed on the second surface 103, the barrier portion 11 will not protrude on the second surface 103 and occupy the space between the light-emitting unit 100 and the substrate 200 while being able to separate two adjacent solder pads. This will prevent the thickness of the light-emitting unit 100 from increasing, which is beneficial to the thinning of the backlight module 2.

[0124] In some embodiments, referring to Figures 11 and 12, the display device further includes an adhesive 50, which fills the barrier portion 11 and covers at least a portion of any two adjacent pads connected to different chips. As some possible implementations, after the light-emitting unit 100 is soldered to the substrate 200, adhesive is applied to the connection points of the corresponding pads. Utilizing the fluidity of the adhesive 50 and guided by the barrier portion 11, the adhesive 50 gradually fills the second surface 103 of the support 10, covering the pads.

[0125] Filling the barrier portion 11 with colloid 50 and covering at least a portion of the pads can prevent water and oxygen from directly contacting the pads, achieving a double barrier effect. Furthermore, covering at least a portion of the pads with colloid 50 reduces the risk of oxidation and improves the stability of the pads under long-term conditions. Moreover, by placing colloid 50 on the light-emitting unit based on the groove design of the barrier portion 11, the barrier portion 11 guides the colloid 50 to fill the gap between the pads and the support 10, increasing the contact area between the colloid 50 and the pads, forming a continuous sealing layer to prevent water and oxygen intrusion. On the other hand, the groove also provides a mechanical positioning function to ensure the consistency of colloid 50 filling. In addition, after curing, the colloid 50 can enhance the bonding force between the support 10 and the substrate, reducing solder joint cracking caused by vibration or thermal stress.

[0126] It should be noted that the colloid 50 can cover the pads located outside the receiving tank 101. Specifically, a portion of the colloid 50 can cover the pads located on the side surface 104, and another portion of the colloid 50 can cover the pads located on the second surface 103, thereby improving the overall water and oxygen isolation effect of the pads.

[0127] Optionally, the colloid 50 can be epoxy resin, polyurethane adhesive, etc., which can effectively isolate water and oxygen from the solder pads.

[0128] Referring to Figure 11, barrier portions 11 are provided between the first pad 31 and the third pad 33, the first pad 31 and the fourth pad 34, the second pad 32 and the fifth pad 35, the second pad 32 and the sixth pad 36, the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36. Since the seventh pad 40 is positioned between the aforementioned pads, and the fifth end 11a of the barrier portion 11 is located at the edge of the support 10, and the sixth end 11b is connected to the seventh pad 40, that is, barrier portions 11 can be provided on the outer periphery of the seventh pad 40. Correspondingly, each barrier portion 11 can be filled with adhesive 50. Thus, while setting barrier portions 11 between any two adjacent pads to achieve the function of separating the pads, the barrier portions 11 can also guide adhesive 50 to fill the gaps between all pads and the support 10, achieving a complete or near-complete seal for the pads on the support 10. Furthermore... By using the colloid 50 filled in the barrier portion 11, the heat distribution can be optimized, the impact of temperature rise on the colloid 50 can be reduced, and the colloid 50 can be filled in sections to avoid gaps caused by the barrier portion 11 being too long. This makes the filling effect of the colloid 50 better and effectively isolates water and oxygen.

[0129] It should be noted that during the filling of colloid 50, in order to ensure the heat dissipation effect of the seventh pad 40, the colloid 50 can be made not to cover the seventh pad 40, so that the colloid 50 is present at the position where the pad is located on the outer periphery of the seventh pad 40.

[0130] As shown in Figure 11, in some embodiments, the barrier portion 11 can be configured as an elongated structure, with the length of the colloid 50 filling the barrier portion 11 being L1 and the length of the barrier portion 11 being L2, wherein L1 ≥ 1 / 2 L2. Optionally, L1 = 1 / 2 L2, that is, the colloid 50 fills half of the barrier portion 11, or L1 = L2, that is, the colloid 50 completely fills the barrier portion 11.

[0131] By limiting the minimum filling ratio of the colloid 50 in the barrier portion 11, the colloid 50 is ensured to fill at least half of the barrier portion 11 in the first direction X, thereby ensuring that the colloid 50 covers the critical area of ​​the pad edge and preventing local water and oxygen penetration due to insufficient filling.

[0132] It is understandable that the lengths of the colloid 50 filled in the barrier portion 11 between different pads may be equal or unequal.

[0133] In some embodiments, referring to FIG12, the colloid 50 covers at least a portion of any two adjacent pads on the side surface 104 that are connected to different chips, and at least one end of the barrier portion 11 is located on the side surface 104 (i.e., at least one end of the barrier portion 11 extends to the edge of the support 10), so that the colloid 50 covers at least a portion of any two adjacent pads on the second surface 103 that are connected to different chips. Specifically, the fifth end 11a of the barrier portion 11 is located at the edge of the support 10.

[0134] It is understandable that in order to achieve the coverage of the pads on the side surface 104 by the colloid 50, since the colloid 50 may be irregular in shape, the maximum height of the colloid 50 in the thickness direction of the support 10 is greater than the height of the pads on the side surface 104.

[0135] By covering the pads on the side surface 104 with colloid 50, a full circumferential seal is achieved on the pads on the side surface 104, reducing the possibility of corrosion or oxidation of the weak point of the side pads of the bracket 10, while providing mechanical cushioning to resist lateral impacts.

[0136] As described above, referring to Figure 13, the backlight module 2 also includes a substrate 200, and at least one light-emitting unit 100 is connected to the substrate 200. Specifically, the substrate 200 is provided with an eighth pad 201 corresponding to the pads on the bracket 10. The first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 located on the second surface 103 are respectively soldered to the eighth pad 201 so that each chip can achieve electrical conduction.

[0137] In some embodiments, a groove 202 is provided on the substrate 200, and the groove 202 is disposed corresponding to the barrier portion 11 in the third direction Z. The groove 202 is filled with colloid 50.

[0138] A groove 202 corresponding to the barrier portion 11 is provided on the substrate 200, forming a nested structure with the barrier portion 11 of the support 10. After dispensing, the adhesive 50 can form a more three-dimensional sealing structure under the guidance of the upper and lower grooves, and can also prevent water and oxygen from entering from the side of the substrate 200, enhance the sealing performance, effectively block the path of electrochemical generation between two adjacent pads, and improve the performance of the light-emitting unit 100.

[0139] Referring to Figures 14 to 16, this application provides another display device. The following only describes the differences between this display device and the previous display device. The similarities are detailed in the foregoing content and will not be repeated here.

[0140] In some embodiments, at least one light-emitting unit 100 includes a support 10, a first chip 21, a second chip 22, and a third chip 23. The first chip 21, the second chip 22, and the third chip 23 are disposed in a receiving groove 101. At least two of the first chip 21, the second chip 22, and the third chip 23 emit light of different wavelengths. The light emitted by the first chip 21, the second chip 22, and the third chip 23 is reflected by the sidewall of the receiving groove 101 and exits from the opening.

[0141] In some embodiments, at least one light-emitting unit 100 includes a first pad 31, a second pad 32, a third pad 33, a fourth pad 34, a fifth pad 35, and a sixth pad 36, all of which are disposed on a second surface 103. Specifically, the first pad 31 and the second pad 32 are connected to the first chip 21, the third pad 33 and the fourth pad 34 are connected to the second chip 22, and the fifth pad 35 and the sixth pad 36 are connected to the third chip 23.

[0142] In some embodiments, the receiving groove 101 is also filled with a transparent colloid (not shown), which is used to encapsulate the chip.

[0143] Referring to Figures 15 and 16, in some embodiments, the first pad 31, the third pad 33, and the fifth pad 35 are spaced apart along the second direction Y, and the first pad 31 and the second pad 32, the third pad 33 and the fourth pad 34, the fifth pad 35 and the sixth pad 36 are respectively arranged opposite to each other along the first direction X.

[0144] It can be understood that the first pad 31 and the second pad 32 constitute a first pad group 301 for connection with the first chip 21, the third pad 33 and the fourth pad 34 constitute a second pad group 302 for connection with the second chip 22, and the fifth pad 35 and the sixth pad 36 constitute a third pad group 303 for connection with the third chip 23. The first pad group 301, the second pad group 302, and the third pad group 303 are spaced apart along the second direction Y, while the two pads in each pad group are arranged opposite each other along the first direction X.

[0145] In this design, the third direction Z represents the thickness direction of the bracket 10, and the first direction X, the second direction Y, and the third direction Z are perpendicular to each other. Taking a rectangular bracket 10 as an example, the first direction X can be the length direction of the bracket 10, and the second direction Y can be the width direction of the bracket 10. That is, the pads for connecting to the positive and negative terminals of each chip are respectively set on the long side of the bracket 10. In this way, when multiple pads are set, the spacing between adjacent pads connected to different chips is not too small, reducing the risk of short circuits.

[0146] Referring to FIG16, in some embodiments, the barrier portion 11 provided on the second surface 103 is located between the first pad 31 and the third pad 33, and the barrier portion 11 is configured to space between the first pad 31 and the third pad 33.

[0147] By providing a barrier portion 11 on the second surface 103 of the bracket 10 and placing the barrier portion 11 between the first pad 31 and the third pad 33, the barrier portion 11 physically isolates the pads of two adjacent chips, thereby preventing the formation of ion migration channels between the pads of two adjacent chips in a water-oxygen environment, inhibiting or reducing the migration and deposition of silver ions, that is, blocking the path of electrochemical reaction between two adjacent sets of first pads 31, preventing electrochemical reactions between multiple sets of first pads 31, thereby improving the reliability of the light-emitting unit 100 and helping to extend the service life of the display device 1000.

[0148] It should be noted that the first pad 31, the third pad 33, and the fifth pad 35 being spaced apart along the second direction Y can mean that the first pad 31, the third pad 33, and the fifth pad 35 are sequentially spaced apart along the second direction Y, that is, the third pad 33 is positioned between the first pad 31 and the fifth pad 35 in the second direction Y. Of course, in other embodiments, the third pad 33, the first pad 31, and the fifth pad 35 can be sequentially spaced apart along the second direction Y, or the first pad 31, the fifth pad 35, and the third pad 33 can be sequentially spaced apart. But regardless of which sequential arrangement method is used, the barrier portion 11 is always located between two adjacent pads positioned along the second direction.

[0149] In some embodiments, the portions of the first pad 31, second pad 32, third pad 33, fourth pad 34, fifth pad 35, and sixth pad 36 located outside the receiving groove 101 are disposed at the edge of the bracket 10. A blocking portion 11 extends along a first direction X, with at least one end of the blocking portion 11 extending to the edge of the bracket 10 in the first direction X. That is, both pads of each pad group are disposed at the edge of the long side of the bracket 10. Disposing the pads at the edge of the bracket 10 facilitates alignment during the soldering process, thereby improving the assembly yield of the light-emitting unit 100. Simultaneously, extending the blocking portion 11 to the edge of the bracket 10 ensures consistency between the blocking portion 11 and the pads, forming a continuous physical isolation.

[0150] Referring again to FIG16, in some embodiments, the bracket 10 further has a side surface 104, and the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 are at least partially located on the side surface 104. Specifically, the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 located outside the receiving groove 101 each include two interconnected parts, the first part being located on the side surface 104, the second part being located on the second surface 103, and the connection between the two being located at the corner of the bracket 10.

[0151] Referring to FIG17, in some embodiments, in the second direction Y, the barrier portion 11 is located in the middle between the first pad 31 and the third pad 33. If the distance between the first pad 31 and the second pad 32 in the second direction Y is L', then the barrier portion 11 is located at 1 / 2L', that is, the distance from the barrier portion 11 to the first pad 31 and the third pad 33 is approximately the same.

[0152] By placing the barrier portion 11 at the middle of the first pad 31 and the third pad 33, that is, making the distance from the barrier portion 11 to the first pad 31 and the third pad 33 in the second direction Y approximately the same, the difference in electric field angle between adjacent pads is reduced, the driving force for silver ion migration is decreased, and the first pad 31 and the third pad 33 are less prone to electrochemical reactions. Furthermore, the above arrangement also makes the distance from the barrier portion 11 to the first pad 31 and the third pad 33 symmetrical, resulting in a uniform electric field distribution and avoiding the situation where local electric field concentration accelerates electrochemical reactions.

[0153] It is understandable that when a barrier portion 11 is provided between any two adjacent pads in the three pad groups, the barrier portion 11 is located in the middle between any two adjacent pads in the three pad groups in the second direction Y. As some possible implementations, the first pad group 301, the second pad group 302, and the third pad group 303 are arranged alternately along the second direction Y, that is, the first pad 31, the third pad 33, and the fifth pad 35 are arranged alternately along the second direction Y. Since the second pad 32, the fourth pad 34, and the sixth pad 36 are respectively arranged opposite to the first pad 31, the third pad 33, and the fifth pad 35 in the first direction X, the second pad 32, the fourth pad 34, and the sixth pad 36 are also arranged alternately along the second direction Y. At this time, the first pad 31 and the third pad 33 are arranged adjacently, the third pad 33 and the fifth pad 35 are arranged adjacently, the second pad 32 and the fourth pad 34 are arranged adjacently, and the fourth pad 34 and the sixth pad 36 are arranged adjacently. Therefore, a barrier portion 11 is provided between the first pad 31 and the third pad 33, between the third pad 33 and the fifth pad 35, between the second pad 32 and the fourth pad 34, and between the fourth pad 34 and the sixth pad 36, and the barrier portion 11 is located in the middle of two adjacent pads.

[0154] Referring again to Figures 14 to 16, in some embodiments, the first chip 21, the second chip 22, and the third chip 23 can be red light chips, green light chips, and blue light chips, respectively. When powered on, these three chips can emit light of different colors. Of course, in other embodiments, the first chip 21, the second chip 22, and the third chip 23 can also be, for example, red light chips, white light chips, or blue light chips, or alternatively, they can be, for example, red light chips, blue light chips, or white light chips, etc., depending on actual needs. This embodiment does not impose specific limitations on this.

[0155] In some embodiments, the first chip 21, the second chip 22, and the third chip 23 are arranged sequentially along the second direction Y. It can be understood that, in one example, the first chip 21, the second chip 22, and the third chip 23 can be arranged in a straight line along the second direction Y. In another example, the first chip 21, the second chip 22, and the third chip 23 can be distributed in a triangular shape, but the arrangement from one end of the support 10 along the second direction Y is still in the order of red light chip, green light chip, and blue light chip. The specific arrangement can be selected according to actual needs.

[0156] In some embodiments, the positive and negative terminals of the first chip 21 are connected to the first pad 31 and the second pad 32, respectively. That is, the first pad 31 is the positive pad of the first chip 21, and the second pad 32 is the negative pad of the first chip 21. When the first chip 21 is a red light chip, this provides power to the red light chip, causing it to emit red light. In some embodiments, the positive and negative terminals of the second chip 22 are connected to the third pad 33 and the fourth pad 34, respectively. That is, the third pad 33 is the positive pad of the second chip 22, and the fourth pad 34 is the negative pad of the second chip 22. When the second chip 22 is a green light chip, this provides power to the green light chip, causing it to emit green light. In some embodiments, the positive and negative terminals of the third chip 23 are connected to the fifth pad 35 and the sixth pad 36, respectively. That is, the fifth pad 35 is the positive pad of the third chip 23, and the sixth pad 36 is the negative pad of the third chip 23. When the third chip 23 is a blue light chip, it enables the supply of power to the blue light chip, so that the blue light chip emits blue light.

[0157] Since the first pad 31, the third pad 33, and the fifth pad 35 are respectively spaced apart along the second direction Y, and the first pad 31 and the second pad 32, the third pad 33 and the fourth pad 34, the fifth pad 35 and the sixth pad 36 are respectively arranged opposite each other along the first direction X, it can be seen that the first pad 31, the third pad 33, and the fifth pad 35 are located on one side of the bracket 10 in the first direction X, and the second pad 32, the fourth pad 34, and the sixth pad 36 are located on the other side of the bracket 10 in the first direction X. Since the first pad 31, the third pad 33, and the fifth pad 35 are the positive pads of each chip, and the second pad 32, the fourth pad 34, and the sixth pad 36 are the negative pads of each chip, the positive pads of each chip are located on the same side of the bracket 10, and the negative pads are located on the other side of the bracket 10.

[0158] In some embodiments, a barrier portion 11 is provided between the second pad 32 and the fourth pad 34, the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36.

[0159] As some possible implementations, barrier portions are provided between the positive pad (first pad 31) of the first chip 21, the positive pad (third pad 33) of the second chip 22, the negative pad (second pad 32) of the first chip 21, the negative pad (fourth pad 34) of the second chip 22, the positive pad (third pad 33) of the second chip 22, the positive pad (fifth pad 35) of the third chip 23, and the negative pad (fourth pad 34) of the second chip 22 and the negative pad (sixth pad 36) of the third chip 23.

[0160] By setting the first chip 21, the second chip 22, and the third chip 23 as red, green, and blue light chips respectively, the light-emitting unit 100 can create various colors by mixing these three colors. The first pad 31, the third pad 33, and the fifth pad 35, connected to the positive terminals of these three-color chips, are positioned on the same side of the support 10, while the second pad 32, the fourth pad 34, and the sixth pad 36, connected to the negative terminals of these three-color chips, are positioned on the other side. This avoids crosstalk between different driving current signals, reduces the risk of color mixing, ensures the stability of color output, and simplifies circuit wiring design. Furthermore, a barrier portion 11 is provided between any two adjacent pads, ensuring that the pads of any two adjacent chips are separated, blocking the path of electrochemical reactions between adjacent pads, preventing electrochemical reactions between pads, and effectively improving the reliability of the light-emitting unit 100.

[0161] Optionally, referring to Figures 17 and 18, the barrier portion 11 can be a protrusion on the second surface 103, such as a bump or a strip. Alternatively, the barrier portion 11 can be a groove recessed on the second surface 103, as long as it can play a blocking role to block the electrochemical reaction path between two adjacent pads.

[0162] In some embodiments, the dimension of the barrier portion 11 in the third direction Z (thickness direction of the bracket 10) is H, where H satisfies: H≥0.1mm.

[0163] In some embodiments, the dimension of the barrier portion 11 in the third direction Z (thickness direction Z of the bracket 10) is H, where H satisfies: H≤0.3mm.

[0164] In some embodiments, the dimension of the barrier portion 11 in the thickness direction Z of the support 10 is H, where H satisfies: 0.1mm ≤ H ≤ 0.3mm. In some embodiments, the dimension of the barrier portion 11 in the second direction Y is W, where W satisfies: W ≥ 0.2mm.

[0165] In some embodiments, the size of the barrier portion 11 in the second direction Y is W, where W satisfies: W≤0.8mm.

[0166] In some embodiments, the size of the barrier portion 11 in the second direction Y is W, where W satisfies: 0.2mm≤W≤0.8mm.

[0167] Preferably, the barrier portion 11 can be configured as a groove recessed relative to the second surface 103 of the support 10, that is, the groove design is used to isolate two adjacent pads (first pad 31 and third pad 33).

[0168] Referring to Figures 15 and 16, in some embodiments, at least one light-emitting unit 100 further includes a seventh pad 40. By providing the seventh pad 40 on the support 10, the heat generated by the chip can be dissipated outward through the seventh pad 40, thereby improving the stability and lifespan of the chip and extending the service life of the light-emitting unit 100.

[0169] Referring to FIG19, in some embodiments, the blocking portion 11 has a fifth end 11a and a sixth end 11b disposed opposite to each other along the first direction X. That is, the blocking portion 11 can be elongated, and its length direction is consistent with the first direction X.

[0170] It should be noted that the seventh pad 40 is extended along the second direction Y. Since the pads of each chip are spaced apart along the second direction Y, extending the seventh pad 40 along the arrangement direction of each pad group makes the area of ​​the seventh pad 40 large enough, thereby increasing the heat dissipation area and improving the heat dissipation effect of each chip.

[0171] Optionally, the first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35, the sixth pad 36, and the seventh pad 40 are set separately, so that the electrical area and the heat dissipation area are independent of each other, so that the chip has a larger heat dissipation area and extends the service life of the light-emitting unit 100.

[0172] In some embodiments, the two ends of the seventh pad 40 in the second direction Y correspond approximately to the two pad groups located closest to the edge of the bracket 10. Referring to Figures 14 and 15, taking the first pad group 301, the second pad group 302, and the third pad group 303 arranged sequentially along the second direction Y as an example (from left to right on the paper in Figures 14 and 15), the seventh pad 40 is disposed between the three pad groups, and one end of the seventh pad 40 in the second direction Y corresponds to the first pad group 301, while the other end of the seventh pad 40 in the second direction Y corresponds to the second pad group 302.

[0173] Referring to Figures 20 and 21, in some embodiments, at least one light-emitting unit 100 further includes an adhesive 50. The adhesive 50 fills the barrier portion 11 and covers at least a portion of the first pad 31 and / or the third pad 33. By filling the barrier portion 11 with the adhesive 50 and covering at least a portion of the first pad 31 and / or the third pad 33, the adhesive can prevent water and oxygen from directly contacting the covered pads, achieving a double barrier against water and oxygen. Covering the pads can also reduce the risk of oxidation and improve the stability of the pads under long-term conditions. Furthermore, by placing the adhesive on the light-emitting unit 100 based on the groove structure design of the barrier portion 11, on the one hand, the barrier portion 11 can guide the adhesive 50 to fill the gap between the pads and the support 10, increasing the contact area between the adhesive and the pads, forming a continuous sealing layer, and preventing water and oxygen intrusion. On the other hand, the groove can also provide a mechanical positioning function to ensure the consistency of the adhesive filling. In addition, the cured colloid 50 can enhance the bonding force between the support 10 and the substrate 200 and reduce the cracking of the solder joints caused by vibration or thermal stress.

[0174] It should be noted that the colloid 50 can cover the first pad 31 and / or the third pad 33 located outside the receiving tank 101. Specifically, a portion of the colloid 50 can cover the first pad 31 and / or the third pad 33 located on the side surface 104, and another portion of the colloid 50 can cover the first pad 31 and / or the third pad 33 located on the second surface 103, thereby making the overall water and oxygen isolation effect of the first pad 31 and / or the third pad 33 better.

[0175] Understandably, in one example, referring to Figure 21, barrier portions 11 are provided between the first pad 31 and the third pad 33, the second pad 32 and the fourth pad 34, the third pad 33 and the fifth pad 35, and the fourth pad and the sixth pad 36, respectively. Since the seventh pad 40 is disposed between the aforementioned pads, and the fifth end 11a of the barrier portion 11 is located at the edge of the support 10, and the sixth end 11b is connected to the seventh pad 40, that is, barrier portions 11 can be provided on both sides of the seventh pad 40 in the first direction X. Correspondingly, each barrier portion 11 can be filled with adhesive 50. Thus, while achieving the function of separating the pads by setting barrier portions 11 between any two adjacent pads, the barrier portions 11 can also guide adhesive to fill the gaps between all pads and the support 10, achieving a complete or near-complete seal for the pads on the support 10. Furthermore... By using the colloid filled in the barrier portion 11, the heat distribution can be optimized, the impact of temperature rise on colloid 50 can be reduced, and the colloid 50 can be filled in sections to avoid gaps caused by the barrier portion 11 being too long. This makes the filling effect of colloid 50 better and effectively isolates water and oxygen.

[0176] It should be noted that during the filling of the colloid 50, in order to ensure the heat dissipation effect of the seventh pad 40, the colloid 50 can be made not to cover the seventh pad 40, so that the seventh pad 40 has two independently set parts of colloid 50 on both sides along the first direction X.

[0177] Referring to Figure 21, in some embodiments, the dimension (length) of the colloid filled in the barrier portion 11 in the first direction X is L1, and the dimension (length) of the barrier portion 11 in the first direction X is L2, wherein L1 ≥ 1 / 2L2. Optionally, L1 = 1 / 2L2, that is, the colloid 50 fills half of the barrier portion 11, or L1 = L2, that is, the colloid 50 completely fills the barrier portion 11.

[0178] It is understandable that when barrier portions 11 are provided between the first pad 31 and the third pad 33, the second pad 32 and the fourth pad 34, the third pad 33 and the fifth pad 35, and the fourth pad and the sixth pad 36, the length of the adhesive 50 filled in the barrier portion 11 between the first pad 31 and the third pad 33 can be equal to or unequal to the length of the adhesive 50 filled in the barrier portion 11 between the second pad 32 and the fourth pad 34. Correspondingly, the length of the adhesive 50 filled in the barrier portion 11 between other adjacent pads can also satisfy the above relationship.

[0179] As described above, the barrier portion 11 has a fifth end 11a and a sixth end 11b along the first direction X, as shown in FIG20. In some embodiments, at least one of the fifth end 11a and the sixth end 11b is located on the side surface 104 so that the colloid 50 covers the first pad 31 and / or the third pad 33 located on the side surface 104. It can be understood that the first pad 31 and the third pad 33 are only two of all the pads on the bracket 10. The side surface 104 is the surface surrounding the outer periphery of the bracket 10. When the bracket 10 is square, it also has a side surface 104 with a second pad 32, a fourth pad 34 and a sixth pad 36. The barrier portion 11 located between the first pad 31 and the third pad 33 is mainly used to separate the two pads. Therefore, the side surface 104 through which the barrier portion 11 penetrates is also the side surface 104 with the first pad 31 and the third pad 33.

[0180] Specifically, the fifth end 11a of the barrier portion 11 is located on the side surface 104, that is, on the edge of the bracket 10.

[0181] It is understandable that in order to achieve the coverage of the first pad 31 and the third pad 33 on the side surface 104 by the colloid, since the colloid may be irregular in shape, the maximum height of the colloid 50 in the thickness direction Z of the support 10 is greater than the height of the first pad 31 and the third pad 33 on the side surface 104.

[0182] It is understandable that when barrier portions 11 are provided between the first pad 31 and the third pad 33, the second pad 32 and the fourth pad 34, the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36, the colloid also covers the second pad 32 and the fourth pad 34, the third pad 33 and the fifth pad 35, and the fourth pad 34 and the sixth pad 36 respectively, thereby covering all the pads outside the bracket 10 and achieving the effect of isolating water and oxygen.

[0183] As described above, referring to Figure 22, the backlight module 2 also includes a substrate 200, and at least one light-emitting unit 100 is connected to the substrate 200. Specifically, the substrate 200 is provided with an eighth pad 201 corresponding to the pads on the bracket 10. The first pad 31, the second pad 32, the third pad 33, the fourth pad 34, the fifth pad 35, and the sixth pad 36 located on the second surface 103 are respectively soldered to the eighth pad 201 so that each chip can achieve electrical conduction.

[0184] In some embodiments, the substrate 200 is provided with a groove 202, which is correspondingly disposed to the barrier portion 11 in the third direction Z, and the groove 202 is filled with colloid 50. The groove 202 corresponding to the barrier portion 11 is provided on the substrate 200, forming a nested structure with the barrier portion 11 of the support 10. After dispensing, the colloid 50 can form a more three-dimensional sealing structure under the guidance of the upper and lower grooves, and can also prevent water and oxygen from entering from the side of the substrate 200, enhance the sealing performance, effectively block the electrochemical path between two adjacent pads, and improve the performance of the light-emitting unit 100.

[0185] The display device disclosed in the embodiments of this application has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the display device and its core ideas. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A display device, comprising: Display panel and backlight module; The display panel is disposed on the light-emitting side of the backlight module, and the backlight module includes: a plurality of light-emitting units, at least one of the light-emitting units including: The bracket is provided with a receiving groove, and the bracket has a first end and a second end arranged along a first direction, and a third end and a fourth end arranged along a second direction; A first chip, a second chip, and a third chip are disposed in the receiving slot. The first chip is configured as a red light chip, and at least one of the second chip and the third chip emits light of a different wavelength than the first chip. A first pad, a second pad, a third pad, a fourth pad, a fifth pad, and a sixth pad are disposed on the bracket. The first pad and the second pad are respectively connected to the first chip, the third pad and the fourth pad are respectively connected to the second chip, and the fifth pad and the sixth pad are respectively connected to the third chip. The first pad and the second pad are located at the first end and the second end, respectively; the third pad and the fourth pad are located at the third end and the fourth end, respectively; the fifth pad and the sixth pad are located at the third end and the fourth end, respectively, and the third pad and the fifth pad, as well as the fourth pad and the sixth pad, are all spaced apart along the first direction; Wherein, the first direction is perpendicular to the second direction.

2. The display device according to claim 1, wherein the size of the first pad and / or the second pad is greater than the size of any one of the third pad, the fourth pad, the fifth pad, and the sixth pad.

3. The display device according to claim 1, wherein the first pad and the second pad are respectively disposed opposite to each other along the first direction; The third and fourth pads are respectively arranged opposite each other along the second direction, and the fifth and sixth pads are respectively arranged opposite each other along the second direction. The third pad is configured to be connected to the positive electrode of the second chip, and the fifth pad is configured to be connected to the positive electrode of the third chip. The third and fifth pads are arranged adjacent to each other along the second direction.

4. The display device according to claim 3, wherein the first pad and the second pad are respectively located at the middle of the first end and the second end along the second direction; and / or, The bracket has a first edge and a second edge that are disposed opposite to each other along a first direction, and the third pad and the fifth pad are disposed sequentially along a direction from the first edge to the second edge; The bracket has a dimension of T in the first direction, the distances from the third and fourth pads to the first edge are 1 / 4T, and the distances from the fifth and sixth pads to the second edge are 1 / 4T.

5. The display device according to claim 1, wherein the bracket has a first surface and a second surface disposed opposite to each other along a third direction, the receiving groove is recessed on the first surface, and at least a portion of the first pad, the second pad, the third pad, the fourth pad, the fifth pad and the sixth pad are disposed on the second surface; The second surface is provided with a barrier portion, which is located between any two adjacent pads connected to different chips among the first pad, the second pad, the third pad, the fourth pad, the fifth pad, and the sixth pad. The barrier portion is configured to be spaced apart from any two adjacent pads connected to different chips. in, The third direction is the thickness direction of the bracket, which is perpendicular to the first direction and the second direction, respectively.

6. The display device according to claim 5, wherein the blocking portion is configured as a groove recessed relative to the second surface of the bracket.

7. The display device according to claim 6, further comprising: A colloid, which fills the barrier portion and covers at least a portion of any two adjacent pads connected to different chips.

8. The display device according to claim 7, wherein the blocking portion is configured as an elongated structure, the length of the colloid filling the blocking portion is L1, and the length of the blocking portion is L2, wherein, L1≥1 / 2L2.

9. The display device according to claim 5, wherein at least one of the light-emitting units further comprises: The seventh pad is disposed in the receiving groove. The first pad, the second pad, the third pad, the fourth pad, the fifth pad, and the sixth pad are arranged around the outer periphery of the seventh pad. The first chip, the second chip, and the third chip are all disposed on the seventh pad. The barrier portion is configured as an elongated structure, having a fifth end and a sixth end along its length, the fifth end being located at the edge of the bracket, and the sixth end extending to the seventh pad.

10. The display device according to any one of claims 1-9, wherein one of the second chip and the third chip is configured as a green light chip, and the other of the second chip and the third chip is configured as a blue light chip.

11. A display device, comprising: Display panel and backlight module; The display panel is disposed on the light-emitting side of the backlight module, and the backlight module includes: a plurality of light-emitting units, at least one of the light-emitting units including: A bracket having a first surface and a second surface disposed opposite to each other along a third direction, wherein a receiving groove is provided on the first surface; A first chip, a second chip, and a third chip are disposed in the receiving slot, and at least two of the first chip, the second chip, and the third chip emit light of different wavelengths; A first pad, a second pad, a third pad, a fourth pad, a fifth pad, and a sixth pad are disposed on the second surface. The first pad and the second pad are respectively connected to the first chip, the third pad and the fourth pad are respectively connected to the second chip, and the fifth pad and the sixth pad are respectively connected to the third chip. The first pad, the third pad, and the fifth pad are spaced apart along a second direction, and the first pad and the second pad, the third pad and the fourth pad, and the fifth pad and the sixth pad are respectively arranged opposite to each other along a first direction; The second surface is provided with a barrier portion, the barrier portion is located between the first pad and the third pad, and the barrier portion is configured to space between the first pad and the third pad; Wherein, the third direction is the thickness direction of the bracket, and the first direction, the second direction, and the third direction are perpendicular to each other.

12. The display device according to claim 11, wherein the blocking portion is configured as a groove recessed relative to the second surface of the bracket.

13. The display device according to claim 12, wherein at least one of the light-emitting units further comprises: A colloid, which fills the barrier portion and covers at least a portion of the first pad and / or the third pad.

14. The display device according to claim 13, wherein the colloid filled in the barrier portion has a dimension L1 in the first direction, and the barrier portion has a dimension L2 in the first direction, wherein, L1≥1 / 2L2.

15. The display device according to claim 13, wherein the bracket further has a side surface connected to the first surface and the second surface, and the first pad, the second pad, the third pad, the fourth pad, the fifth pad and the sixth pad are at least partially located on the side surface; The barrier portion has a fifth end and a sixth end disposed opposite to each other along the first direction, at least one of the fifth end and the sixth end being located on the side surface, so that the colloid covers the first pad and / or the third pad located on the side surface.

16. The display device according to claim 13, wherein the backlight module further comprises a substrate, at least one of the light-emitting units is connected to the substrate, the substrate is provided with a groove, the groove is disposed corresponding to the blocking portion in the third direction, and the groove is filled with the colloid.

17. The display device according to claim 11, wherein at least one of the light-emitting units further comprises: A seventh pad is at least partially disposed in the receiving groove, and the first chip, the second chip, and the third chip are disposed on the seventh pad; The barrier portion has a fifth end and a sixth end disposed opposite to each other along the first direction, the fifth end being located at the edge of the bracket, and the sixth end extending to the seventh pad.

18. The display device according to any one of claims 11-17, wherein in the second direction, the blocking portion is located in the middle between the first pad and the third pad.

19. The display device according to any one of claims 11-17, wherein the dimension of the blocking portion in the third direction is H, wherein H satisfies: H ≥ 0.1 mm, and / or, H ≤ 0.3 mm; and / or, The dimension of the barrier in the second direction is W, where W satisfies: W≥0.2mm, and / or W≤0.8mm.

20. The display device according to any one of claims 11-17, wherein the first chip, the second chip, and the third chip are arranged sequentially along the second direction, and the first chip, the second chip, and the third chip are respectively a red light chip, a green light chip, and a blue light chip; The positive and negative terminals of the first chip are connected to the first pad and the second pad, respectively; the positive and negative terminals of the second chip are connected to the third pad and the fourth pad, respectively; and the positive and negative terminals of the third chip are connected to the fifth pad and the sixth pad, respectively. The barrier portion is provided between the second pad and the fourth pad, the third pad and the fifth pad, and the fourth pad and the sixth pad.

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