Anti-interference random sequence frequency hopping and frequency synchronization method and system, and storage medium

WO2026200086A1PCT designated stage Publication Date: 2026-10-01SIYI TECHNOLOGY (SHENZHEN) CO LTD
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Patent Information

Application Number
PCT/CN2025/142906
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-03-27
Filing Date
2025-12-16
Publication Date
2026-10-01

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Abstract

The present disclosure provides an anti-interference random sequence frequency hopping and frequency synchronization method and system, and a storage medium. The method comprises: acquiring a communication frequency band between a master node and a slave node, dividing the communication frequency band into N intervals, using a pseudo-random sequence to select one frequency point in each interval, and generating a mapping table; the master node performs frequency point switching communication at a first frequency fm, and the slave node performs frequency point switching communication at a second frequency fs, until a link communication connection is established; in response to the master node establishing the link communication connection with the slave node, the master node sends a data frame of a current period to the slave node, and the slave node parses the data frame to complete time synchronization; setting a frequency hopping time interval, starting a timer for timing at each frequency hop, and starting a next frequency hop when the timing is completed; and using a pseudo-random number to index a target frequency point of a next frequency hop from the mapping table, and, on the basis of the target frequency point, achieving frequency hopping and frequency synchronization of a link. The frequency hopping method of the present disclosure can simultaneously ensure anti-interference performance and the stability of a communication bandwidth.
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Description

Anti-interference random sequence frequency hopping and frequency synchronization methods, systems and storage media

[0001] Cross-references to related applications

[0002] This disclosure claims priority to Chinese Patent Application No. 202510368965.4, filed on March 27, 2025, entitled "An anti-interference random sequence frequency hopping and frequency synchronization method, system and storage medium", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This disclosure relates to the field of wireless communication technology, specifically to an interference-resistant random sequence frequency hopping and frequency synchronization method, system, and storage medium. Background Technology

[0004] Frequency hopping communication technology refers to a communication method in which the carrier frequency of the transmitted signal between the transmitting and receiving parties is controlled by a pseudo-random code and changes discretely according to a predetermined rule. With the development of UAV technology, frequency hopping communication technology is now also used between the ground receiving end (i.e., the transmitting end) and the air end (i.e., the receiving end) of UAVs.

[0005] Currently, there are two main frequency-hopping communication methods: 1) Before communication, a fixed list of signals is traversed to check their strength, and the optimal signal is selected for communication at a fixed frequency. This method requires interrupting the communication link during channel traversal, resulting in poor real-time performance, and the fixed channel communication is at high risk of interference. 2) Thresholds are set for signal quality and strength during communication. When the signal falls below the threshold, rapid probing frequency hopping is performed on other frequencies in the pre-stored frequency list. When a better frequency is detected, frequency hopping is performed. This method has better anti-interference and real-time performance, but it still has many shortcomings, such as: the threshold definition is difficult, there are many unknown scenarios, and there is a potential risk of communication link interruption for unconsidered scenarios; the real-time performance of frequency hopping is insufficient, and the switching to a better frequency has a lag, which makes it impossible to continuously guarantee a high level and stable communication bandwidth, especially in complex radio environments, such as urban areas, where bandwidth fluctuations are large.

[0006] None of the above solutions can simultaneously guarantee interference resistance and communication bandwidth stability. Therefore, there is a need to provide an interference-resistant random sequence frequency hopping and frequency synchronization method, system, and storage medium to solve the aforementioned technical problems. Summary of the Invention

[0007] To address the aforementioned technical problems, this disclosure proposes an interference-resistant random sequence frequency hopping and frequency synchronization method, system, and storage medium.

[0008] According to the first aspect of this disclosure, an interference-resistant random sequence frequency hopping and frequency synchronization method is proposed for communication between a master node and a slave node, comprising:

[0009] Obtain the communication frequency band between the master node and the slave node, divide it into N intervals, select a frequency point in each interval using a pseudo-random sequence, and generate a mapping table containing N frequency points, where N is an integer greater than 2;

[0010] The master node randomly selects a frequency point from the mapping table and uses a first frequency f. m To perform frequency switching communication, the slave node randomly selects a frequency from the mapping table and uses a second frequency f. s Frequency switching communication continues until the master node and the slave node establish a link communication connection, where f s =N×f m ;

[0011] In response to the establishment of a link communication connection between the master node and the slave node, the master node sends the data frame of the current period to the slave node, and the slave node parses the data frame to complete time synchronization;

[0012] Set a frequency hopping time interval, start a timer to count down each time a frequency hop occurs, and start the next frequency hopping when the timer finishes counting down;

[0013] The target frequency point for the next frequency hopping is indexed from the mapping table using pseudo-random numbers, and frequency hopping and frequency synchronization of the link are achieved based on the target frequency point.

[0014] Optionally, the master node includes a microcontroller, and the process of generating the pseudo-random sequence includes:

[0015] A random number seed is generated by fusing the microcontroller's unique identifier (UID) with a high-precision timestamp.

[0016] Based on the random number seed, the pseudo-random sequence is generated using a random number generator;

[0017] The high-precision timestamp has a precision at the microsecond level.

[0018] Optionally, the timer includes a master timer and a slave timer, and the setting of the frequency hopping interval, starting the timer to count down each time a frequency hop occurs, and starting the next frequency hopping when the timer finishes counting down, includes:

[0019] Set a frequency hopping interval, and use the main timer and the auxiliary timer to simultaneously count the frequency hopping interval during each frequency hopping;

[0020] When the main timer reaches its counting interval in the current cycle, the count value of the auxiliary timer in the current cycle is moduloed by its counting interval in one cycle.

[0021] If the remainder result is not 0, the counting interval of the main timer in the current cycle or the next cycle is compensated and corrected according to the remainder result.

[0022] The next frequency hopping begins when the main timer finishes counting down;

[0023] The accuracy of the master timer is higher than that of the auxiliary timer.

[0024] Optionally, the pseudo-random number generation process includes:

[0025] The pseudo-random number is obtained by performing a modulo operation between the timestamp of the auxiliary timer and the preset random seed, wherein the preset random seed is a positive integer between [2, N].

[0026] Optionally, when the number of frequency points N contained in the mapping table is a multiple of ten, the preset random seed is N-1.

[0027] Optionally, the master node sends the data frame for the current period to the slave node, and the slave node parses the data frame to complete time synchronization, including:

[0028] The master node inserts its timestamp into the first K bytes of the data frame, where K is a positive integer ≥ 3;

[0029] Record the transmission time of the data frame between the master node and the slave node;

[0030] The slave node receives the data frame and parses the master node's timestamp, and synchronizes its local timestamp based on the master node's timestamp and the data frame's transmission time.

[0031] According to a second aspect of this disclosure, an interference-resistant random sequence frequency hopping and frequency synchronization system is proposed, comprising a master node and a slave node, wherein the master node and the slave node are configured to perform the interference-resistant random sequence frequency hopping and frequency synchronization method provided in any embodiment of the first aspect above, and form a wireless communication link.

[0032] Optionally, the master node is a drone remote controller, and the slave node is a drone air terminal.

[0033] According to a third aspect of this disclosure, an electronic device is provided, comprising: one or more processors; and a memory configured to store one or more programs, which, when executed by the one or more processors, cause the electronic device to implement the interference-resistant random sequence frequency hopping and frequency synchronization method provided in any embodiment of the first aspect above.

[0034] According to a fourth aspect of this disclosure, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the interference-resistant random sequence frequency hopping and frequency synchronization method provided in any embodiment of the first aspect above.

[0035] This disclosure proposes an anti-interference random sequence frequency hopping and frequency synchronization method, system, and storage medium. By employing highly random and unique pseudo-random sequences and pseudo-random numbers, dynamic adjustment of frequency hopping time intervals, and timestamp synchronization mechanisms, it eliminates the need to define a frequency hopping threshold, uniformly selects frequency points, and disperses signal energy through frequency hopping. This not only improves the stability of communication bandwidth but also reduces interference to other devices, while enhancing anti-interference capabilities and reducing the difficulty of signal interception and cracking. It has good applicability in almost any wireless communication scenario. Attached Figure Description

[0036] The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments and, together with the description, serve to explain the principles of this disclosure. Other embodiments and many anticipated advantages of these embodiments will be readily recognized as they become better understood through reference to the following detailed description. Elements in the drawings are not necessarily to scale. The same reference numerals refer to corresponding similar parts.

[0037] Figure 1 is a flowchart of an anti-interference random sequence frequency hopping and frequency synchronization method according to an embodiment of the present disclosure;

[0038] Figure 2 is a flowchart of the dynamic adjustment of the master timer frequency hopping time interval according to an embodiment of the present disclosure;

[0039] Figure 3 is a block diagram of an anti-interference random sequence frequency hopping and frequency synchronization system according to a specific embodiment of the present disclosure;

[0040] Figure 4 is a block diagram of an anti-interference random sequence frequency hopping and frequency synchronization system according to another specific embodiment of the present disclosure;

[0041] Figure 5 is a block diagram of an anti-interference random sequence frequency hopping and frequency synchronization system according to yet another specific embodiment of the present disclosure;

[0042] Figure 6 is a schematic diagram of an electronic device according to an embodiment of the present disclosure. Embodiments of the present invention

[0043] The features and exemplary embodiments of various aspects of this disclosure will now be described in detail. To make the objectives, technical solutions, and advantages of this disclosure clearer, the following detailed description, in conjunction with the accompanying drawings and embodiments, will further illustrate this disclosure. It should be understood that the specific embodiments described herein are configured only to explain this disclosure and are not configured to limit this disclosure. Those skilled in the art will recognize that this disclosure can be implemented without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of this disclosure by illustrating examples.

[0044] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes the element.

[0045] This disclosure proposes an interference-resistant random sequence frequency hopping and frequency synchronization method for communication between a master node and a slave node. Figure 1 shows a flowchart of the interference-resistant random sequence frequency hopping and frequency synchronization method according to an embodiment of this disclosure. As shown in Figure 1, the method includes the following steps:

[0046] Step S10: Obtain the communication frequency band between the master node and the slave node, and divide it into N intervals. Use a pseudo-random sequence to select a frequency point in each interval to generate a mapping table containing N frequency points, where N is an integer greater than 2.

[0047] Optionally, the communication frequency band is divided into N intervals to ensure that the frequency point in each interval can be selected. By uniformly selecting the frequency point, frequency hopping disperses the signal energy. Then, a pseudo-random sequence is used to select a frequency point in each interval to obtain a frequency point mapping table with high randomness.

[0048] It should be noted that N can be a multiple of ten, ensuring that the calculated frequency hopping interval is an integer, which facilitates timing by the subsequent timer. In this embodiment, N is set to 20. Of course, the value of N can be adjusted according to actual needs; no restrictions are imposed here.

[0049] In an optional embodiment, the master node includes a microcontroller (MCU), and the pseudo-random sequence is generated by a random number generator. The generation process is as follows: the unique identifier (UID) of the microcontroller of the master node is fused with a high-precision timestamp to generate a random number seed, and a pseudo-random sequence is generated by the random number generator based on the random number seed.

[0050] In this way, the generated pseudo-random number seed has high randomness and uniqueness, thus ensuring the high randomness of the generated pseudo-random sequence, making the signal difficult to interfere with or block, while increasing the difficulty of intercepting and cracking the signal.

[0051] In this embodiment, the high-precision timestamp has a precision of microseconds. However, the precision of the high-precision timestamp can be adjusted according to actual needs, and there is no limitation here.

[0052] Step S20: The master node randomly selects a frequency point from the mapping table and sets it to the first frequency f. m To perform frequency switching communication, the node randomly selects a frequency from the mapping table and uses the second frequency f. s Frequency switching communication continues until the master node and slave node establish a link communication connection, where f s =N×f m .

[0053] Optionally, before establishing a wireless link communication connection between the master node and the slave node, the master node uses slow hopping logic, and the slave node uses fast hopping logic. In one optional embodiment, the master node hops its frequency once per second, i.e., the master node switches its frequency at a frequency of 1 Hz, and the slave node hops its frequency 20 times per second, i.e., the slave node switches its frequency at a frequency of 20 Hz. Since there are only 20 frequency points in the mapping table, it is guaranteed that the slave node can establish a link communication connection with the master node within 1 second.

[0054] It should be noted that, in this embodiment, the first frequency f m The value is 1Hz, and the second frequency is f. s The value is 20Hz. Of course, this is conditional on satisfying f. s =N×f m Under the condition that the first frequency f m Second frequency f s The value of can be adjusted according to actual needs, and there are no restrictions here.

[0055] Step S30: In response to the establishment of a link communication connection between the master node and the slave node, the master node sends the data frame of the current period to the slave node, and the slave node parses the data frame to complete time synchronization.

[0056] In an optional embodiment, step S30 specifically includes:

[0057] Step S31: The master node inserts its timestamp into the first K bytes of the data frame sent in this cycle, where K is a positive integer ≥ 3.

[0058] Step S32: Record the transmission time of the data frame between the master node and the slave node.

[0059] Step S33: Receive data frames from the slave node and parse the master node's timestamp, and synchronize the local timestamp according to the master node's timestamp and the data frame's transmission time.

[0060] In this embodiment, K is set to 4.

[0061] It should be noted that, in this embodiment, taking a timestamp with a precision of 100 microseconds as an example, a 4-byte field can continuously record timestamps for approximately 300 days. Therefore, it is understandable that the value of K can be adjusted according to actual operating conditions. K can be a positive integer of 3 or 4 or higher, and even when the timestamp precision is low, K can be a positive integer below 3.

[0062] Step S40: Set the frequency hopping time interval, start the timer to count down each time the frequency hopping occurs, and start the next frequency hopping when the timer finishes counting down.

[0063] In an optional embodiment, the timer is the timer module of the microcontroller of the master node. The timer includes a master timer and an auxiliary timer, wherein the accuracy of the master timer is higher than that of the auxiliary timer. Figure 2 shows a flowchart of the dynamic adjustment of the master timer frequency hopping time interval according to an embodiment of the present disclosure. As shown in Figure 2, step S40 specifically includes:

[0064] Step S41: Set the frequency hopping interval and use the main timer and auxiliary timer to simultaneously count the frequency hopping interval during each frequency hopping.

[0065] Step S42: When the counting interval of the main timer in the current cycle is reached, perform a modulo operation on the count value of the auxiliary timer in the current cycle and its counting interval in one cycle.

[0066] Step S43: Determine if the remainder result is 0. If not, proceed to step S44; if yes, proceed to step S45.

[0067] Step S44: Based on the remainder result, compensate and correct the counting interval of the master timer in the current cycle or the next cycle.

[0068] Step S45: Start the next frequency hopping when the master timer finishes counting.

[0069] In this embodiment, before the master node and the slave node establish a link communication connection, the slave node attempts to establish a link communication connection with the master node by using 20Hz frequency hopping. Therefore, after the master node and the slave node establish a link communication connection, the 20Hz frequency is continued for frequency hopping, that is, the frequency hopping time interval is 50ms, which facilitates the timing of the master timer and the slave timer.

[0070] In this embodiment, the main timer has a precision in the microsecond range, and the auxiliary timer has a precision in the hundreds of microseconds range. Provided that the precision of the main timer is higher than that of the auxiliary timer, different precision main and auxiliary timers can be selected according to actual needs; this is not a limitation here.

[0071] Optionally, the frequency hopping time interval is 50ms. For the microsecond-level main timer, the timing interval of each cycle is 50000×1μs, which corresponds to a theoretical counting interval of 50000 times in one cycle. For the hundred-microsecond-level auxiliary timer, the timing interval of each cycle is 500×100μs, which corresponds to a theoretical counting interval of 500 times in one cycle.

[0072] However, while the master timer boasts high precision, specifically for microcontroller timers, higher precision requires a higher clock frequency to support its accurate timing. High-frequency microcontrollers are more susceptible to external interference during operation, leading to increased timing errors. Conversely, the secondary timer, with its lower precision, is less prone to external interference.

[0073] Therefore, in this embodiment, by adding a lower-precision auxiliary timer to dynamically adjust and compensate the counting interval of the main timer, the accuracy of the frequency hopping time interval is ensured, thereby maintaining the stability of the communication bandwidth. The following example will explain the process of the auxiliary timer dynamically adjusting and compensating the counting interval of the main timer.

[0074] When the main timer reaches 50,000 counts in the current cycle, assuming the actual timing interval is only 49,900 μs, it means the main timer jumped too fast and an error occurred. At this time, the auxiliary timer displays a count value of 499 in the current cycle. The remainder of 499 and 500 is calculated (499%500), and the remainder is 1. Therefore, the main timer is compensated with 1×100 μs timing in the current cycle, that is, the main timer's counting interval in the current cycle is increased by 100 counts, to 50,100 counts.

[0075] When the main timer reaches 50,000 counts in the current cycle, assuming the actual timing interval has exceeded 50,100 μs, it indicates that the main timer is running slow and has an error. At this time, the auxiliary timer displays a count value of 501 in the current cycle. The remainder of 501 and 500 is calculated (501%500), and the remainder is 1. Therefore, the main timer is corrected by 1 × 100 μs in the next cycle, meaning the main timer's counting interval in the next cycle is reduced by 100 counts to 49,900 counts.

[0076] Step S50: Use pseudo-random numbers to index the target frequency point for the next frequency hopping from the mapping table, and realize the frequency hopping and frequency synchronization of the link according to the target frequency point.

[0077] Optionally, a target frequency point with high randomness can be obtained by indexing from the mapping table using pseudo-random numbers, and the master node and slave node can realize frequency hopping and frequency synchronization of the wireless communication link based on the target frequency point.

[0078] In an optional embodiment, the pseudo-random number generation process includes: performing a modulo operation between the timestamp of the auxiliary timer and a preset random seed to obtain a pseudo-random number, wherein the preset random seed is a positive integer between [2, N], and N is the number of frequency points contained in the mapping table.

[0079] Optionally, the timestamp of the auxiliary timer is the accumulated count value of the auxiliary timer. Since the timestamp of the auxiliary timer changes in each cycle, performing a modulo operation between the timestamp of the auxiliary timer and the preset random seed can yield a highly random modulo result. This results in a highly random target frequency for the next frequency hopping in the mapping table, making the signal difficult to interfere with or block, and further increasing the difficulty of intercepting and cracking the signal.

[0080] In an optional embodiment, when the number of frequency points N contained in the mapping table is a multiple of ten, the preset random seed value is N-1. The advantages of this embodiment will be explained below with an example.

[0081] When the preset random seed value is between [2, N], the remainder of the auxiliary timer's timestamp and the preset random seed will be a positive integer less than N. When N is a multiple of ten, taking N=20 as an example: If the preset random seed is also 20, without considering large errors in the auxiliary timer over a long period, the accumulated count value of the auxiliary timer after each cycle is relatively stable. Therefore, the remainder of the auxiliary timer's timestamp and 20 will usually only fluctuate between a few values, with low randomness. If the preset random seed is a small number such as 2, 3, 4, etc., the remainder of the auxiliary timer's timestamp and the preset random seed will also only fluctuate between 0, 1, 2, 3, etc. Ultimately, the target frequency indexed in the mapping table will only switch between the 1st, 2nd, 3rd, 4th, etc. frequency points, failing to cover the entire mapping table, and also with low randomness.

[0082] Therefore, in this embodiment, when N is a multiple of ten, for example, N=20, the preset random seed is N-1, i.e., the preset random seed is 19. Thus, the modulo operation between the auxiliary timer's timestamp and the preset random seed will result in a remainder that varies between 0, 1, 2, 3...18. Ultimately, the target frequency point indexed in the mapping table will switch between the 1st, 2nd, 3rd, 4th...19th frequency points, exhibiting high randomness and essentially covering all frequency points in the mapping table (except for the 20th frequency point, which will not be randomly selected). This method further improves the anti-interference capability of the communication link, ensuring the reliability and stability of communication.

[0083] It should be noted that the above embodiments are merely optional examples of preset random seed values, and are not intended to limit the preset random seed values. When N is not a multiple of ten, the preset random seed can also be N-1.

[0084] In summary, the proposed anti-interference random sequence frequency hopping and frequency synchronization method utilizes highly random and unique pseudo-random sequences to uniformly select frequency points, dispersing signal energy through frequency hopping. This improves both the stability of the communication bandwidth and the anti-interference capability. The master node employs slow hopping logic, while the slave nodes use fast hopping logic, synchronizing timestamps after link connection establishment to achieve fast and highly stable frequency hopping communication. A microsecond-level master timer is used to time the frequency hopping interval, supplemented by a hundred-microsecond-level auxiliary timer, to dynamically correct the interval, addressing potential cumulative time errors and fluctuations under complex operating conditions. This ensures the reliability of the hopping frequency and interval, further maintaining the stability of the communication bandwidth. Then, based on the auxiliary timer's timestamp and a preset random seed, highly random numbers are generated, and the target frequency for the next frequency hopping is obtained from a mapping table, further improving the anti-interference capability of the communication link and ensuring communication reliability and stability.

[0085] Based on the aforementioned anti-interference random sequence frequency hopping and frequency synchronization method, and using the same concept, this disclosure also proposes an anti-interference random sequence frequency hopping and frequency synchronization system. Figure 3 shows a block diagram of an anti-interference random sequence frequency hopping and frequency synchronization system according to a specific embodiment of this disclosure. As shown in Figure 3, the system includes a master node 100 and a slave node 200. The master node 100 and the slave node 200 are configured to execute the anti-interference random sequence frequency hopping and frequency synchronization method provided in any of the above embodiments, forming a wireless communication link.

[0086] In an optional embodiment, the master node 100 is a drone remote controller, and the slave node 200 is a drone air terminal, thus forming a drone digital image transmission system with one drone per controller.

[0087] In an optional embodiment, both the remote controller and the air terminal are equipped with a communication module, which includes an RF chip and a microcontroller (MCU). The remote controller and the air terminal communicate wirelessly through the communication module.

[0088] Figure 4 shows a block diagram of an anti-interference random sequence frequency hopping and frequency synchronization system according to another specific embodiment of the present disclosure. As shown in Figure 4, in another optional embodiment, multiple master nodes 100 can be set up to form a multi-controllable UAV digital image transmission system.

[0089] Figure 5 shows a block diagram of an anti-interference random sequence frequency hopping and frequency synchronization system according to another specific embodiment of the present disclosure. As shown in Figure 5, in another optional embodiment, multiple slave nodes 200 can be set up to form a UAV digital image transmission system that controls multiple drones.

[0090] Based on the aforementioned anti-interference random sequence frequency hopping and frequency synchronization method, and using the same concept, this disclosure also proposes an electronic device. Figure 6 shows a schematic diagram of an electronic device according to an embodiment of this disclosure. As shown in Figure 6, the electronic device includes one or more processors 301, a memory 302, a bus 303, and a communication interface 304. The one or more processors 301, the memory 302, and the communication interface 304 are connected via the bus 303. The memory 302 is configured to store one or more programs, which, when executed by one or more processors 301, cause the electronic device to implement the anti-interference random sequence frequency hopping and frequency synchronization method provided in any of the above embodiments.

[0091] Based on the above-described anti-interference random sequence frequency hopping and frequency synchronization method, and with the same concept, this disclosure also proposes a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the anti-interference random sequence frequency hopping and frequency synchronization method provided in any of the above embodiments.

[0092] In the embodiments disclosed herein, it should be understood that the disclosed technical content can be implemented in other ways. The apparatus / system / method embodiments described above are merely illustrative. For example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For instance, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling or direct coupling or communication connection may be through some interfaces; the indirect coupling or communication connection between units or modules may be electrical or other forms.

[0093] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0094] Furthermore, the functional units in the various embodiments of this disclosure can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0095] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this disclosure, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this disclosure. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard drive, magnetic disk, or optical disk.

[0096] It is evident that those skilled in the art can make various modifications and alterations to the embodiments of this disclosure without departing from the spirit and scope of this disclosure. In this manner, this disclosure is also intended to cover such modifications and alterations if they fall within the scope of the claims of this disclosure and their equivalents. The word "comprising" does not exclude the presence of other elements or steps not listed in the claims. The simple fact that certain measures are described in mutually different dependent claims does not indicate that a combination of these measures cannot be used for profit. Any reference numerals in the claims should not be considered as limiting the scope. Industrial applicability

[0097] The anti-interference random sequence frequency hopping and frequency synchronization method, system, and storage medium provided in this disclosure utilize highly random and unique pseudo-random sequences to uniformly select frequency points, dispersing signal energy through frequency hopping. This improves both the stability of communication bandwidth and anti-interference capability. The master node employs slow hopping logic, while the slave nodes employ fast hopping logic. Timestamps are synchronized after link connection is established, achieving fast and highly stable frequency hopping communication. A microsecond-level master timer is used to time the frequency hopping interval, supplemented by a hundred-microsecond-level auxiliary timer, to dynamically correct the frequency hopping interval. This addresses the cumulative time error and fluctuation issues that may occur under complex operating conditions, ensuring the reliability of the frequency hopping frequency and interval, thereby further maintaining the stability of communication bandwidth. Then, highly random numbers are generated based on the auxiliary timer's timestamp and a preset random seed. The target frequency point for the next frequency hopping is obtained from a mapping table, further improving the anti-interference capability of the communication link and ensuring communication reliability and stability.

Claims

1. An anti-interference random sequence frequency hopping and frequency synchronization method, applied to communication between a master node and a slave node, characterized in that, include: Obtain the communication frequency band between the master node and the slave node, divide it into N intervals, select a frequency point in each interval using a pseudo-random sequence, and generate a mapping table containing N frequency points, where N is an integer greater than 2; The master node randomly selects a frequency point from the mapping table and uses a first frequency f. m To perform frequency switching communication, the slave node randomly selects a frequency from the mapping table and uses a second frequency f. s Frequency switching communication continues until the master node and the slave node establish a link communication connection, where f s =N×f m ; In response to the establishment of a link communication connection between the master node and the slave node, the master node sends the data frame of the current period to the slave node, and the slave node parses the data frame to complete time synchronization; Set a frequency hopping time interval, start a timer to count down each time a frequency hop occurs, and start the next frequency hopping when the timer finishes counting down; The target frequency point for the next frequency hopping is indexed from the mapping table using pseudo-random numbers, and the frequency hopping and frequency synchronization of the link are realized according to the target frequency point.

2. The method according to claim 1, characterized in that, The master node includes a microcontroller, and the process of generating the pseudo-random sequence includes: A random number seed is generated by fusing the microcontroller's unique identifier (UID) with a high-precision timestamp. Based on the random number seed, the pseudo-random sequence is generated using a random number generator; The high-precision timestamp has a precision at the microsecond level.

3. The method according to claim 1, characterized in that, The timer includes a main timer and a secondary timer. The setting of the frequency hopping interval, starting the timer at each frequency hopping, and initiating the next frequency hopping when the timer finishes counting, includes: Set a frequency hopping interval, and use the main timer and the auxiliary timer to simultaneously count the frequency hopping interval during each frequency hopping; When the main timer reaches its counting interval in the current cycle, the count value of the auxiliary timer in the current cycle is moduloed by its counting interval in one cycle. If the remainder result is not 0, the counting interval of the main timer in the current cycle or the next cycle is compensated and corrected according to the remainder result. The next frequency hopping begins when the main timer finishes counting down; The accuracy of the master timer is higher than that of the auxiliary timer.

4. The method according to claim 3, characterized in that, The process of generating the pseudo-random number includes: The pseudo-random number is obtained by performing a modulo operation between the timestamp of the auxiliary timer and the preset random seed, wherein the preset random seed is a positive integer between [2, N].

5. The method according to claim 4, characterized in that, When the number of frequency points N contained in the mapping table is a multiple of ten, the preset random seed is N-1.

6. The method according to claim 1, characterized in that, The master node sends the data frame for the current period to the slave node, and the slave node parses the data frame to complete time synchronization, including: The master node inserts its timestamp into the first K bytes of the data frame, where K is a positive integer ≥ 3; Record the transmission time of the data frame between the master node and the slave node; The slave node receives the data frame and parses the master node's timestamp, and synchronizes its local timestamp based on the master node's timestamp and the data frame's transmission time.

7. An anti-interference random sequence frequency hopping and frequency synchronization system, characterized in that, It includes a master node and a slave node, the master node and the slave node being configured to perform the method as described in any one of claims 1 to 6, forming a wireless communication link.

8. The system according to claim 7, characterized in that, The master node is a drone remote controller, and the slave node is the drone's aerial terminal.

9. An electronic device, characterized in that, include: One or more processors; A memory configured to store one or more programs that, when executed by one or more processors, cause the electronic device to perform the method as described in any one of claims 1 to 6.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the method as described in any one of claims 1 to 6.