Storage control method, storage device, storage controller, and solid-state drive

WO2026200233A1PCT designated stage Publication Date: 2026-10-01HUAWEI TECH CO LTD
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Patent Information

Application Number
PCT/CN2026/073616
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-03-25
Filing Date
2026-01-20
Publication Date
2026-10-01

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Abstract

Embodiments of the present application provide a storage control method, a storage device, a storage controller, and a solid-state drive, which can effectively reduce the latency of accessing a persistent storage medium. The method comprises: first, a storage device swaps a first correspondence comprising a first logical address and a first physical address into a cache from a persistent storage medium; second, the storage device locks the first correspondence in the cache, and the locked first correspondence remains stored in the cache during a target time period or when a locking condition is satisfied; third, the storage device receives an access request from a processing device, wherein the access request is used for requesting access to the first physical address corresponding to the first logical address; and then, the storage device acquires, on the basis of the access request, the first correspondence stored in the cache, and accesses, on the basis of the first correspondence, a storage space corresponding to the first physical address in the persistent storage medium.
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Description

A storage control method, a storage device, a storage controller, and a solid-state drive.

[0001] This application claims priority to Chinese Patent Application No. CN202510370927.2, filed on March 25, 2025, entitled "A Storage Control Method, Storage Device, Storage Controller and Solid State Drive", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of data storage, and more particularly to a storage control method, a storage device, a storage controller, and a solid-state drive. Background Technology

[0003] The flash translation layer (FTL) runs on the storage device. The storage device calls the FTL to map the logical addresses used by the host to the physical addresses of the storage medium. The existence of the FTL enables the host to interact with the storage medium.

[0004] The FTL cache stores FTL entries. To enable a host to access the storage medium, the host sends an access request to the storage device, carrying the target logical address. Since the FTL cache has limited storage space, if none of the FTL entries stored in the FTL cache include the target logical address, the storage device needs to retrieve the target FTL entry from the storage medium. This target FTL entry includes the target logical address. The storage device then swaps this target FTL entry into the FTL cache. Based on the target FTL entry, the storage device retrieves the target physical address corresponding to the target logical address. Finally, the storage device accesses the storage space corresponding to the target physical address in the storage medium according to the access request.

[0005] If the target FTL entry requested by the host is not in the FTL cache, the storage device needs to perform a swap-in operation of the target FTL entry, which increases the latency of the host requesting access to the storage medium. Summary of the Invention

[0006] This application provides a storage control method, a storage device, a storage controller, and a solid-state drive, which can effectively reduce the latency of accessing persistent storage media.

[0007] In a first aspect, this application provides a storage control method, the method comprising: first, a storage device swapping a first correspondence, including a first logical address and a first physical address, from a persistent storage medium into a cache. Second, the storage device locking the first correspondence in the cache, wherein the locked first correspondence remains stored in the cache for a target time period or when a locking condition is met. Third, the storage device receiving an access request from a processing device, the access request requesting access to the first physical address corresponding to the first logical address. Fourth, the storage device obtaining the first correspondence stored in the cache according to the access request, and accessing the storage space corresponding to the first physical address in the persistent storage medium according to the first correspondence.

[0008] As described in this aspect, the storage device pre-locks the first correspondence in a cache when the first correspondence meets the locking condition within the target time period or before receiving an access request from the processing device. The first correspondence locked in the cache cannot be swapped out. When the processing device needs to access the first logical address, the access request sent to the storage device carries the first logical address. Since the first correspondence including the first logical address remains stored in the cache and will not be swapped out, the storage device can directly and successfully obtain the first correspondence based on the first logical address carried in the access request, without needing to perform the process of swapping the first correspondence from the persistent storage medium into the cache. The storage device directly accesses the target storage space corresponding to the first physical address in the persistent storage medium based on the first physical address included in the first correspondence, improving the reliability of the processing device's access to the target storage space in the persistent storage medium. Moreover, because the first correspondence remains locked in the cache, the storage device does not need to perform the process of swapping the first correspondence from the persistent storage medium into the cache based on the access request, reducing the latency of accessing the target storage space.

[0009] Based on the first aspect, in an optional implementation, before the storage device locks the first correspondence in the cache, the method further includes: the storage device receiving a locking request from the processing device, the locking request being used to request that the first correspondence be locked in the cache.

[0010] In this implementation, before sending an access request to the storage device, the processing device sends a locking request to the storage device in advance, requesting the storage device to lock the first correspondence in the cache in advance. This ensures that the storage device can successfully swap the first correspondence from the persistent storage medium into the cache. The first correspondence locked in the cache cannot be swapped out of the cache. When the processing device needs to access the first logical address, the access request sent to the storage device carries the first logical address. The first correspondence including the first logical address remains stored in the cache and will not be swapped out. This improves the reliability of the processing device's access to the persistent storage medium and reduces the access latency.

[0011] Based on the first aspect, in an optional implementation, after the storage device locks the first correspondence in the cache, the method further includes: the storage device sending a locking response to the processing device, the locking response indicating that the first correspondence is locked in the cache.

[0012] In this implementation, once the storage device successfully locks the first correspondence in the cache to ensure that the first correspondence will not be cached from the cache, it sends a lock response to the processing device. The processing device determines that the first correspondence remains locked in the cache based on the lock response, and the processing device can then send an access request to the storage device as needed to ensure the reliability of the access and reduce the access latency.

[0013] Based on the first aspect, in one optional implementation, the locking condition includes at least one of the following:

[0014] The target application for accessing the first logical address is launched, the target task for accessing the first logical address is scheduled, and the target data is accessed; wherein, the target data is stored in the storage space corresponding to the first physical address in the persistent storage medium.

[0015] By adopting this implementation method, the first correspondence that meets the locking condition is always kept in the cache, so as to improve the reliability of the storage device to realize the processing device's access to the persistent storage medium based on the first correspondence, and effectively reduce the access latency.

[0016] Based on the first aspect, in an optional implementation, the storage device locking the first correspondence in the cache includes: the storage device setting a locking flag in the cache, the locking flag being used to indicate that the first correspondence is locked in the cache.

[0017] By adopting this implementation method, only the first locked correspondence in the cache remains in the cache, while the unlocked correspondence in the cache can be swapped out by the storage device at any time as needed, which reduces the storage burden of the cache and improves the storage utilization of the cache.

[0018] Based on the first aspect, in an optional implementation, the storage device setting a locking flag in the cache includes: the storage device setting a locking flag in the first correspondence, wherein the locking flag is a field included in the first correspondence, and the first correspondence includes the correspondence between the first logical address, the first physical address, and the locking flag.

[0019] By adopting this implementation method, the storage device sets a locking flag by setting a field in the first correspondence, so as to ensure that the first correspondence remains stored in the cache during the target time period or when the locking condition is met, thereby ensuring the reliability of the processing device access and reducing the access latency.

[0020] Based on the first aspect, in an optional implementation, the first correspondence includes a first field and a second field. The first field includes a first domain segment, the value of which is the first logical address. The value of the second field is the first physical address. The storage device setting a locking flag in the cache includes: the storage device setting a locking flag in the first field, the locking flag being the second domain segment included in the first field. The first correspondence includes the correspondence between the first logical address, the locking flag, and the first physical address.

[0021] By adopting this implementation method, the storage device sets a locking identifier by setting a domain segment in the first correspondence, so as to ensure that the first correspondence remains stored in the cache during the target time period or when the locking condition is met, thereby ensuring the reliability of the processing device access and reducing the access latency.

[0022] Based on the first aspect, in an optional implementation, the cache includes a lock list, the lock list includes L lock tokens, where L is any integer greater than or equal to 1, each lock token in the lock list is used to map a correspondence, the correspondence mapped by the lock token is locked in the cache, and the storage device sets the lock token in the cache by: the storage device sets the lock token mapped by the first correspondence in the lock list, wherein the lock token mapped by the first correspondence includes at least one of the first logical address, the first physical address, and the index number of the first correspondence.

[0023] In this implementation, the storage device marks the first correspondence as locked by setting a locking flag for the first correspondence mapping in the lock list. This ensures that the first correspondence remains stored in the cache during the target time period or when the locking condition is met, thereby guaranteeing the reliability of access by the processing device and reducing access latency.

[0024] Based on the first aspect, in an optional implementation, the cache includes a locked cache space for storing correspondences, the storage device records a locking flag for the locked cache space, the locking flag is used to indicate that each correspondence stored in the locked cache space is locked in the cache, and the storage device setting the locking flag in the cache includes: the storage device storing the first correspondence in the locked cache space.

[0025] In this implementation, the storage device marks the first correspondence as locked by storing it in the locked cache space, thereby ensuring that the first correspondence remains stored in the cache during the target time period or when the locking conditions are met, thus ensuring the reliability of access by the processing device and reducing access latency.

[0026] Based on the first aspect, in an optional implementation, the storage device swapping a first correspondence including a first logical address and a first physical address from the persistent storage medium into the cache includes: the storage device swapping an unlocked second correspondence from the target cache space in the cache, the second correspondence including a correspondence between a second logical address and a second physical address; and the storage device swapping the first correspondence from the persistent storage medium into the target cache space.

[0027] In this implementation, when the storage device determines that the first correspondence needs to be swapped into the cache, the storage device will swap out the second correspondence that is not locked in the cache, so as to ensure that the storage device can successfully swap the first correspondence from the persistent storage medium into the cache.

[0028] Based on the first aspect, in one optional implementation, if the target time period is exceeded or the de-locking condition is met, the lock flag of the first correspondence is removed from the cache.

[0029] In this implementation, if the storage device detects that the target time period has been exceeded or the unlocking condition has been met, it removes the lock flag of the first correspondence in the cache so that the first correspondence is unlocked. Then, the storage device can swap the first correspondence out of the cache at any time as needed, reducing the storage burden of the cache and improving the utilization rate of the cache.

[0030] Based on the first aspect, in an optional implementation, after the storage device locks the first correspondence in the cache, the method further includes: the storage device receiving a delocking request from the processing device, the delocking request being used to request the removal of the lock on the first correspondence; the storage device removing the lock flag of the first correspondence in the cache according to the delocking request; and the storage device sending a delocking response to the processing device, the delocking response being used to indicate that the lock flag of the first correspondence has been removed from the cache.

[0031] In this implementation, when the processing device detects that the first logical address will not be accessed or will not be accessed much in the future, it sends a delocking request to the storage device. The storage device removes the locking flag of the first correspondence in the cache according to the first logical address carried in the delocking request, so that the first correspondence is in an unlocked state in the cache. Then, the storage device can swap the first correspondence out of the cache at any time as needed, reducing the storage burden of the cache and improving the utilization rate of the cache.

[0032] Secondly, this application provides a storage device including a module for performing any of the claims in the first aspect. For an explanation of the beneficial effects, please refer to the first aspect, which will not be repeated here.

[0033] Thirdly, this application provides a storage controller, including a communication interface and a controller, wherein the communication interface and the controller perform the method described in any of the first aspects above. For an explanation of the beneficial effects, please refer to the first aspect, which will not be repeated here.

[0034] Fourthly, this application provides a solid-state drive, including a flash memory chip and a storage controller as described in the second aspect. For example, the flash memory chip is a persistent storage medium.

[0035] Fifthly, this application provides a storage system including a processing device and a storage device, the storage device being configured to perform the method described in any of the first aspects above. Attached Figure Description

[0036] Figure 1 is a structural example diagram of an embodiment of the storage system provided in this application;

[0037] Figure 2 is a flowchart of the steps of a first embodiment of the storage control method provided in this application;

[0038] Figure 3 is a flowchart of the steps of a second embodiment of the storage control method provided in this application;

[0039] Figure 4 is a flowchart of the steps of a third embodiment of the storage control method provided in this application;

[0040] Figure 5 is a structural example diagram of an embodiment of the storage device provided in this application;

[0041] Figure 6 is a structural example diagram of an embodiment of the storage controller provided in this application. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0043] To facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0044] Figure 1 is a structural example diagram of an embodiment of the storage system provided in this application. The storage system includes a computing device 100 and a storage device 110. In the application scenario shown in Figure 1, users access data through applications, and the computer running these applications can be referred to as a "computing device." The computing device 100 can be a physical machine or a virtual machine. Physical computing devices include, but are not limited to, desktop computers, servers, laptops, mobile devices, wearable devices, etc. The computing device includes at least a processor 101, memory 102, a memory interface 103, and a bus 104. The processor 101 is a central processing unit (CPU) used to process access requests from applications. For example, when the processor 101 receives a write data request from an application, it sends the data in these write data requests to the storage device 110 for persistent storage. In addition, the processor 101 is also used for data computation or processing, such as metadata management, deduplication, data compression, virtualization of storage space, and address translation, etc., without specific limitations. Figure 1 shows only one CPU as an example. In practical applications, there are often multiple CPUs, and each CPU may have one or more CPU cores. This example does not limit the number of CPUs or the number of CPU cores. It should be clarified that the description of the processor 101 type in this example is optional and not limited. For example, processor 101 can also be a neural processing unit (NPU), field-programmable gate array (FPGA), application-specific integrated circuit (ASIC), system-on-chip (SoC), network processor (NP), microcontroller unit (MCU), programmable logic device (PLD), data processing unit (DPU), graphics processing unit (GPU), etc., which will not be elaborated further. Memory 102 refers to the internal memory that directly exchanges data with processor 101. It can read and write data at any time and at a very high speed, serving as temporary data storage for the operating system or other running programs. For example, memory 102 can be random access memory or read-only memory (ROM).For example, random access memory (RAM) can be dynamic random access memory (DRAM) or storage class memory (SCM). DRAM is a semiconductor memory, and like most random access memory (RAM), it is a type of volatile memory device. SCM is a composite storage technology that combines the characteristics of traditional storage devices and RAM. However, DRAM and SCM are only illustrative examples in this embodiment, and memory 102 may also include other random access memories, such as static random access memory (SRAM). For read-only memory (ROM), for example, it could be programmable read-only memory (PROM) or erasable programmable read-only memory (EPROM). Additionally, memory 102 may also be a dual in-line memory module (DIMM), i.e., a module composed of dynamic random access memory (DRAM), or a solid-state disk (SSD). This embodiment does not limit the number or type of memory 102. Furthermore, the memory 102 can be configured to have a power-saving function. The power-saving function means that when the system experiences a power outage and is then powered on again, the data stored in the memory 102 will not be lost. The memory 102 with the power-saving function is called non-volatile memory.

[0045] Processor 101 and memory 102 are connected via bus 104. Processor 101 can access memory 102 via bus 104; for example, processor 101 can read and write data or execute code in memory 102 via the bus. Bus 104 can be, for example, a quick path interconnect (QPI) or an ultra path interconnect (UPI). Bus 104 is divided into address bus, data bus, control bus, etc. The main function of processor 101 is to interpret the instructions (or code) of computer programs and process data in computer software. The instructions of the computer program and the data in the computer software can be stored in memory 102.

[0046] The computing device 100 is connected to the memory interface 111 of the storage device 110 via the memory interface 103. Taking the memory interface 103 as an example, its type can be Universal Serial Bus (USB), Serial Advanced Technology Attachment (SATA), Peripheral Component Interconnect Express (PCIe), etc. This embodiment does not limit the connection method between the computing device 100 and the storage device 110. For example, both the computing device 100 and the storage device 110 may include a network card, and the network cards of the computing device 100 and storage device 110 may be connected. Alternatively, the storage system may also include network devices, such as switches. The network devices are used to connect the computing device 100 and the storage device 110. This example uses the physical separation of the computing device 100 and the storage device 110 as an example. In other examples, the computing device 100 and the storage device 110 may be encapsulated within the same physical host, in which case the storage controller 112 and the processor 101 can be connected via a bus.

[0047] Storage device 110 includes a storage controller 112, a cache 113, a persistent storage medium 114, and a memory interface 111. The storage controller 112 and the cache 113 are connected via a bus. For a description of the bus, please refer to the above description; details will not be repeated here. Optionally, the cache 113 may also be integrated inside the storage controller 112. Storage device 110 may include one or more storage controllers 112. The number of storage controllers 112 is not limited. For example, a storage controller 112 may include one or more CPUs. For a description of the type of storage controller 112, please refer to the description of the processor 101 type; details will not be repeated here. The cache 113 refers to internal memory that directly exchanges data with the storage controller 112. It can read and write data at any time and at a high speed, serving as temporary data storage for the operating system or other running programs. The cache 113 may be volatile memory or non-volatile memory. For a description of non-volatile memory and volatile memory types, please refer to the above description; details will not be repeated here. The storage controller 112 includes a storage media interface 120, which is connected to the persistent storage medium 114. This embodiment does not limit the type of the storage media interface 120; for example, the storage media interface 120 can be SATA, small computer system interface (SCSI), non-volatile memory express (NVMe), etc. The persistent storage medium 114 can be NAND flash memory, a solid-state disk (SSD), an embedded multimedia card (eMMC), universal flash storage (UFS), a serial attached SCSI solid-state drive (SAS SSD), a serial ATA solid-state drive (SATA SSD), a non-volatile memory express solid-state drive (NVMe SSD), NOR flash memory (NorFlash), or a hard disk drive (HDD). This example uses persistent storage medium 114 as part of storage device 110. In other examples, all or part of persistent storage medium 114 is a peripheral to storage device 110.

[0048] Figure 2 is a flowchart illustrating the steps of a first embodiment of the storage control method provided in this application. The storage control method provided in this application can effectively reduce access latency. For a description of the storage system used in the method shown in this embodiment, please refer to the description corresponding to Figure 1; specific details will not be repeated here. The storage device executing the method shown in this embodiment can be the storage controller in the storage device shown in Figure 1, or it can be a logic module or software running on the storage controller. The processing device executing the method shown in this embodiment can be the processor in the computing device shown in Figure 1, or it can be a logic module or software running on the processor.

[0049] Step 201: The storage device swaps the first correspondence from the persistent storage medium into the cache.

[0050] The first correspondence shown in this embodiment includes the correspondence between a first logical address and a first physical address. The first correspondence shown in this embodiment can be an FTL entry, and is not specifically limited, as long as it includes the correspondence between the first logical address and the first physical address. The address type of the first logical address can be a logical block address (LBA), and the address type of the first physical address can be a physical page number (PPN). It should be noted that the descriptions of the types of the first logical address and the first physical address included in the first correspondence in this embodiment are optional examples and are not limited. For example, the type of the first logical address can also be a file offset, an object ID, etc. The type of the first physical address can be a physical block address (PBA), a physical sector address (PSA), a physical byte address (PByteA), etc. In order to achieve the purpose of swapping the first correspondence from the persistent storage medium into the cache, the storage device first reads the first correspondence from the persistent storage medium, and then writes the first correspondence into the cache.

[0051] Step 202: The storage device locks the first correspondence in the cache.

[0052] If the storage device locks the first mapping in the cache, then the first mapping will remain stored in the cache for the target time period; or, as long as the first mapping continues to satisfy the locking condition, the first mapping satisfying the locking condition will remain stored in the cache. The following explains the possible reasons why the storage device locks the first mapping in the cache:

[0053] Reason 1

[0054] When the storage device swaps the first correspondence into the cache, the first correspondence can be locked in the cache, and the first correspondence remains locked in the cache for the target time period. This embodiment does not limit the duration of the target time period.

[0055] Reason 2

[0056] If the storage device detects that the first correspondence meets the locking condition, it locks the first correspondence in the cache. The locking condition is that the target application accessing the first logical address is launched, and the first correspondence includes the first logical address. Specifically, when the storage device detects that the target application has been launched, it obtains the first logical address that the target application wants to access, and the storage device determines that the first correspondence including the first logical address meets the locking condition. This embodiment does not limit the method by which the storage device detects that the target application has been launched. For example, if the target application runs on the operating system of a computing device, when the user launches the target application, the operating system loads the application's code and data into memory, and schedules processor resources to read and execute the application's instructions from memory. The processing device detects that the target application has been launched by reading the application's code and data from memory. The processing device sends the first logical address that the target application needs to access to the storage device. The storage device obtains the first correspondence (which includes the first logical address requested by the target application) according to the various correspondences stored in the cache, and then the storage device determines that the first correspondence meets the locking condition. For example, if the method shown in this embodiment is applied to the field of artificial intelligence (AI), after the AI ​​model is trained, the weight parameters are stored in the target storage space corresponding to the first physical address in the persistent storage medium. The processing device has created a correspondence between the target application for performing AI inference and the first logical address. When the processing device detects that the target application has been launched, it sends the first logical address to the storage device based on the correspondence between the target application and the first logical address. The processing device retrieves the first correspondence including the first logical address from the cache, and the storage device can then determine that the first correspondence satisfies the locking condition.

[0057] This embodiment uses the example of a storage device detecting that a target application accessing a first logical address has been launched to determine that the first correspondence satisfies the locking condition. This is not limited to this example. For instance, if the storage device detects that a target application accessing the first logical address is launched during a target time period, it determines that the first correspondence satisfies the locking condition. This target time period is a future time period that has not yet arrived. Alternatively, if the storage device detects that a target application frequently accesses the first logical address, it determines that the first correspondence satisfies the locking condition. Specifically, for example, the processing device can predict based on the target application's access patterns over historical time periods. If the target application frequently accesses the first logical address in historical time periods, then the probability of the target application frequently accessing the first logical address in the current or future time periods is also high. In this case, the processing device sends the first logical address to the storage device, and the storage device determines that the first correspondence satisfies the locking condition based on the first logical address. For example, the processing device uses an AI model to predict, based on historical data of the target application (such as access frequency, access time interval, access time period, access data size, etc.), whether the target application will frequently access the first logical address, access a large amount of data, run for a long time, or be sensitive to latency. In this case, the processing device sends the first logical address to the storage device, and the storage device determines that the first correspondence satisfies the locking condition based on the first logical address. Alternatively, the processing device analyzes user behavior; for example, if a user frequently launches the target application to access the first logical address within a specific time period, the processing device sends the first logical address to the storage device, and the storage device determines that the first correspondence satisfies the locking condition based on the first logical address. This example uses the processing device detecting the target application and sending the first logical address to the storage device. In other examples, the storage device can also directly detect the target application; if it detects that the target application has been launched, it directly determines that the first correspondence satisfies the locking condition.

[0058] Reason 3

[0059] If the storage device detects that the first correspondence meets the locking condition, it locks the first correspondence in the cache. The locking condition refers to the scheduling of the target task used to access the first logical address. Specifically, the operating system of the computing device can schedule the target task based on factors such as priority and resource requirements. The target task can access the first logical address independently of the target application. In this embodiment, the target task can be a process, thread, or kernel task of the computing device's operating system. If the processing device detects that the target task has been scheduled, it sends the first logical address to the storage device. The storage device determines that the first correspondence meets the locking condition based on the first logical address. This embodiment uses the example of the storage device detecting that the target task used to access the first logical address has been scheduled to determine that the first correspondence meets the locking condition, but this is not limited. For example, if the storage device detects that the target task used to access the first logical address is scheduled during a target time period, it determines that the first correspondence meets the locking condition. This target time period is a future time period that has not yet arrived. Alternatively, if the storage device detects that the target task will frequently access the first logical address, the storage device determines that the first correspondence meets the locking condition. For example, if a processing device uses an AI model to predict that a target task will be scheduled based on historical data (such as scheduling frequency, scheduling time intervals, and scheduling time periods), the processing device sends the first logical address to the storage device. The storage device then determines that the first correspondence satisfies the locking condition based on the first logical address. This example uses the processing device detecting the target task and sending the first logical address to the storage device. In other examples, the storage device can also directly detect the target task, and if it detects that the target task has been scheduled, it can directly determine that the first correspondence satisfies the locking condition.

[0060] Reason 4

[0061] If the storage device detects that the first correspondence meets the locking condition, it locks the first correspondence in the cache. The locking condition refers to the access of the target data, where the target data is stored in the target storage space corresponding to the first physical address in the persistent storage medium. For example, in the AI ​​field, the target data could be the weight parameters of a trained AI model. This embodiment does not limit the type of target data; for example, the target data could be a specific file (e.g., video, document, image, etc.) that a computing device needs to load. As another example, this embodiment takes the gaming field as an example: when a user launches a game application, the processing device detects that the game application has launched and queries the first logical address corresponding to the game's executable file and related data files. The processing device sends the first logical address that the target data needs to access to the storage device, and the storage device determines that the first correspondence meets the locking condition based on the first logical address. This example does not limit the type of target data.

[0062] In this embodiment, the storage device keeps the first correspondence locked in the cache when it detects that the first correspondence meets the locking condition. Alternatively, the storage device keeps the first correspondence locked in the cache for the duration of the target time period when it detects that the first correspondence meets the locking condition. This embodiment does not limit the duration of the target time period. For example, the storage device can determine the duration of the target time period based on the historical runtime of the target application, the priority of the target application, the size of the target data, or the priority of the target task or the historical scheduling duration of the target task, etc.

[0063] To lock the first mapping in the cache, the storage device sets a locking flag in the cache, which indicates that the first mapping is locked in the cache. Several possible examples of the locking flag are described below:

[0064] Method 1

[0065] The storage device changes the first correspondence in the cache to the changed first correspondence shown in Table 1.

[0066] Table 1

[0067] Specifically, when the storage device determines that the first correspondence needs to be locked in the cache, the storage device sets a locking flag in the first correspondence. The locking flag is a field included in the first correspondence. The locking flag is used to indicate that the first correspondence is locked. Then, the modified first correspondence includes the correspondence between the first logical address LBA1, the first physical address PPN1, and the locking flag. In this embodiment, the value of the locking flag is not limited.

[0068] Method 2

[0069] The storage device changes the first correspondence in the cache to the changed first correspondence shown in Table 2.

[0070] Table 2

[0071] Specifically, the first correspondence before the change includes a first field and a second field. The first field specifically includes a first domain segment, the value of which is the first logical address LBA1, and the second field is the first physical address PPN1. If the storage device determines that the first correspondence needs to be locked in the cache, the storage device sets a locking flag in the first field. This locking flag is the second domain segment included in the first field. The locking flag indicates that the first correspondence is locked. Therefore, the first correspondence after the change includes the correspondence between the first logical address LBA1, the locking flag, and the first physical address PPN1.

[0072] Method 3

[0073] The cache shown in this example includes a list of locks, which can be found in Table 3:

[0074] Table 3

[0075] The locking list includes L locking tokens, where L is any integer greater than or equal to 1. Each locking token in the locking list is used to map a correspondence, and the correspondence mapped by the locking token is locked in the cache. When the storage device determines that it needs to lock the first correspondence in the cache, the storage device sets the locking token mapped to the first correspondence (e.g., the locking token L shown in Table 3) in the locking list, wherein the locking token L mapped to the first correspondence may include at least one of the first logical address LBA1, the first physical address PPN1, and the index number of the first correspondence.

[0076] Method 4

[0077] The cache shown in this example has a separate locked cache space for storing correspondences. The storage device records a locking flag for the locked cache space, which indicates that each correspondence stored in the locked cache space is locked in the cache. Therefore, when the storage device determines that a first correspondence needs to be locked in the cache, it stores the first correspondence in the locked cache space.

[0078] Step 203: The processing device sends an access request to the storage device.

[0079] Taking a target application as an example, to enable the target application to access the first logical address, the processing device sends an access request to the storage device. This access request may be an input / output (I / O) access request, specifically referring to the data transfer process between the processing device and the persistent storage medium. Specifically, the access request requests access to the first physical address PPN1 corresponding to the first logical address LBA1. For example, if the target application needs to perform AI inference upon startup, the computing device's memory has already created the correspondence between the weight parameters required for AI model inference and the first logical address LBA1. The weight parameters required for AI inference are stored in the target storage space of the persistent storage medium. To obtain these weight parameters, the processing device sends an access request to the storage device based on the correspondence between the weight parameters and the first logical address LBA1. This access request carries the first logical address LBA1.

[0080] Step 204: The storage device obtains the first correspondence stored in the cache according to the access request, and accesses the target storage space corresponding to the first physical address in the persistent storage medium according to the first correspondence.

[0081] The storage device obtains a first mapping relationship locked in the cache based on the first logical address LBA1 carried in the access request. This first mapping relationship includes the mapping relationship between the first logical address LBA1 and the first physical address PPN1. The storage device then obtains the first physical address PPN1 based on the first mapping relationship and accesses the target storage space corresponding to the first physical address PPN1 in the persistent storage medium. For example, if a processing device requests to read model parameters through this access request, the storage device reads the weight parameters from the target storage space and sends the weight parameters to the processing device. This embodiment uses the example of a processing device reading data from the target storage space of the persistent storage medium based on an access request. In other examples, the processing device can also write data to the target storage space of the persistent storage medium based on an access request. In this case, the access request carries the first logical address LBA1 and the data to be written to the target storage space. The storage device obtains a first mapping relationship locked in the cache based on the first logical address LBA1. This first mapping relationship includes the mapping relationship between the first logical address LBA1 and the first physical address PPN1. The storage device obtains the first physical address PPN1 according to the first correspondence, and writes the data carried by the access request to the target storage space corresponding to the first physical address PPN1 in the persistent storage medium.

[0082] Using the method shown in this embodiment, the storage device pre-locks the first correspondence in the cache when the first correspondence meets the locking condition within the target time period or before receiving an access request from the processing device. The first correspondence locked in the cache cannot be swapped out. When the processing device needs to access the first logical address, the access request sent to the storage device carries the first logical address. Since the first correspondence including the first logical address remains stored in the cache and will not be swapped out, the storage device can directly and successfully obtain the first correspondence based on the first logical address carried in the access request, without needing to perform the process of swapping the first correspondence from the persistent storage medium into the cache. The storage device directly accesses the target storage space corresponding to the first physical address in the persistent storage medium based on the first physical address included in the first correspondence, improving the reliability of the processing device accessing the target storage space in the persistent storage medium. Moreover, because the first correspondence remains locked in the cache, the storage device does not need to perform the process of swapping the first correspondence from the persistent storage medium into the cache based on the access request, reducing the latency of accessing the target storage space.

[0083] Moreover, the cache shown in this embodiment does not need to store the full correspondence in the persistent storage medium. Each correspondence includes the correspondence between logical address and physical address. Instead, the first correspondence that meets the locking condition is kept locked in the cache during the target time period. Unlocked correspondences in the cache can be swapped out from the cache at any time as needed, which reduces the storage burden of the cache and improves the storage utilization of the cache.

[0084] Figure 3 is a flowchart of the steps of a second embodiment of the storage control method provided in this application.

[0085] Step 301: The processing device sends a lock request to the storage device.

[0086] When the processing device detects a need to access a first logical address, it sends a lock request to the storage device. This lock request requests the storage device to lock the first correspondence in its cache. Optionally, if the processing device detects that a target application meets the locking conditions, it sends a lock request to the storage device, carrying the first logical address corresponding to the target application. Meeting the locking conditions means that the target application used to access the first logical address is launched. For an explanation of how the processing device detects that the target application is launched, please refer to the description of the embodiment corresponding to Figure 2; details will not be repeated here. This embodiment uses the example of determining that the target application meets the locking conditions when the processing device detects that the target application is launched, without limitation. For example, if the processing device detects that the target application is launched and detects that the target application frequently accesses the first logical address during a target time period, then the processing device determines that the target application meets the locking conditions. For an explanation of how the processing device detects that the target application frequently accesses the first logical address during a target time period, please refer to the description of the embodiment corresponding to Figure 2; details will not be repeated here.

[0087] Optionally, if the processing device detects that a target task for accessing the first logical address has been scheduled, it determines that the locking condition is met. For an explanation of the scheduling of the target task for accessing the first logical address, please refer to the description of the embodiment corresponding to Figure 2, which will not be repeated here. When the processing device detects that a target task for accessing the first logical address has been scheduled, it sends the locking request to the storage device. Optionally, if the processing device detects that target data has been accessed, it determines that the locking condition is met. For an explanation of the access of target data, please refer to the description of the embodiment corresponding to Figure 2, which will not be repeated here. When the processing device detects that target data has been accessed, it sends the locking request to the storage device.

[0088] This embodiment uses the example of a lock request carrying a first logical address, but it is not limited to this example. In other examples, the lock request may also carry file attribute information, such as the identifier of the file to be accessed by the processing device, the file type, etc. The storage device obtains the first logical address corresponding to the file attribute information based on the file attribute information. Then, the storage device can determine that the file attribute information carried in the lock request is used to request a lock on a first correspondence including the first logical address.

[0089] Step 302: The storage device determines whether the lock request hits the cache. If not, proceed to step 303; if yes, proceed to step 305.

[0090] The cache stores N mappings (e.g., each mapping is an FTL list), where N is any integer greater than or equal to 1. Each of the N mappings includes a mapping between logical addresses and physical addresses. When the storage device receives a lock request, it can determine whether the cache has been hit based on the first logical address carried in the lock request. A cache hit based on the first logical address carried in the lock request means that among the N mappings stored in the cache, one mapping includes the first logical address LBA1, in which case the storage device determines that the lock request has hit the cache. A cache miss based on the first logical address carried in the lock request means that among the N mappings stored in the cache, any mapping includes a logical address that is different from the first logical address LBA1, in which case the storage device determines that the lock request has missed the cache.

[0091] Step 303: The storage device swaps out the unlocked second mapping from the target cache space of the cache.

[0092] If the storage device determines that the lock request has not hit the cache, it means that the cache does not store the first mapping relationship including the first logical address and the first physical address. To ensure that the processing device can successfully access the target storage space corresponding to the first physical address in the persistent storage medium, the storage device needs to swap the first mapping relationship from the persistent storage medium into the cache. However, the storage device needs to ensure that the cache includes the target cache space that is in an idle state before swapping the first mapping relationship into the cache. Therefore, the storage device swaps out the second mapping relationship already stored in the cache. This second mapping relationship includes the mapping relationship between the second logical address and the second physical address. The second logical address is different from the first logical address, and the second physical address is different from the first physical address. The second mapping relationship is stored in the target cache space and is not locked in the cache. This means that the unlocked second mapping relationship can be swapped out from the target cache space at any time as needed. For example, the storage device can swap the second mapping relationship from the target cache space into the persistent storage medium, or the storage device can delete the second mapping relationship in the target cache space. It is understandable that when the storage device swaps out the second correspondence from the target cache space, the target cache space is in a space state.

[0093] This embodiment takes the example that the target cache space has stored the second correspondence and needs to swap out the unlocked second correspondence from the target cache space to make the target cache space free. In other examples, the target cache space in the cache can be a cache space that does not need to be swapped out and is always in an idle state.

[0094] Step 304: The storage device swaps the first correspondence from the persistent storage medium to the target cache location in the cache.

[0095] If the storage device determines that the lock request has not hit the cache, and the storage device has already swapped the second mapping from the target cache location, then the storage device will swap the first mapping from the persistent storage medium into the target cache location. First, the storage device reads the first mapping from the persistent storage medium; second, the storage device writes the first mapping to the target cache location.

[0096] Step 305: The storage device locks the first correspondence in the cache.

[0097] For an explanation of the execution process of step 305 shown in this embodiment, please refer to step 202 in Figure 2, which will not be elaborated further.

[0098] Step 306: The storage device sends a lock response to the processing device.

[0099] While keeping the first correspondence locked in the target cache space of the cache, the storage device sends a lock response to the processing device, the lock response indicating that the first correspondence is locked in the cache.

[0100] Step 307: The processing device sends an access request to the storage device.

[0101] Step 308: The storage device obtains the first correspondence stored in the cache according to the access request, and accesses the target storage space corresponding to the first physical address in the persistent storage medium according to the first correspondence.

[0102] For an explanation of the execution process of steps 306 to 308 shown in this embodiment, please refer to steps 203 to 204 in Figure 2, which will not be described in detail here.

[0103] Using the method shown in this embodiment, before sending an access request to the storage device, the processing device sends a locking request to the storage device in advance, requesting the storage device to lock the first mapping relationship in the cache. If the first logical address carried in the locking request does not hit the cache, the storage device swaps out the unlocked second mapping relationship from the cache, ensuring that the storage device can successfully swap the first mapping relationship from the persistent storage medium into the cache, and the first mapping relationship locked in the cache cannot be swapped out. When the processing device needs to access the first logical address, the access request sent to the storage device carries the first logical address, and the first mapping relationship including the first logical address remains stored in the cache and will not be swapped out. Therefore, the storage device can directly and successfully obtain the first mapping relationship based on the first logical address carried in the access request, without having to perform the process of swapping the first mapping relationship from the persistent storage medium into the cache, thus improving the reliability of the processing device's access to the persistent storage medium and reducing access latency.

[0104] Figure 4 is a flowchart of the steps of a third embodiment of the storage control method provided in this application.

[0105] Step 401: The storage device swaps the first correspondence from the persistent storage medium into the cache.

[0106] Step 402: The storage device locks the first correspondence in the cache.

[0107] Step 403: The processing device sends an access request to the storage device.

[0108] Step 404: The storage device obtains the first correspondence stored in the cache according to the access request, and accesses the target storage space corresponding to the first physical address in the persistent storage medium according to the first correspondence.

[0109] For an explanation of the execution process of steps 401 to 404 shown in this embodiment, please refer to steps 201 to 204 in Figure 2, which will not be described in detail here.

[0110] Step 405: The processing device sends a lock release request to the storage device.

[0111] The unlock request carries a first logical address and is used to request the removal of the lock associated with the first correspondence including the first logical address. This embodiment does not limit the triggering reason for the processing device to send the unlock request to the storage device; it only needs to send the unlock request to the storage device when it detects that it does not need to access the target storage space corresponding to the first physical address in the persistent storage medium. For example, the processing device detects that the target application has been closed, or that the frequency of the target application accessing the first logical address has decreased, or that the target task has been stopped from scheduling, or that the processing device detects that the target data has been successfully loaded into the memory of the computing device, etc.

[0112] Step 406: The storage device removes the lock flag of the first correspondence from the cache according to the lock removal request.

[0113] For example, if the locking marker is a field included in the modified first correspondence as shown in Table 1, then removing the locking marker of the first correspondence by the storage device means that the storage device deletes the locking marker in the modified first correspondence as shown in Table 1, or changes the value of the locking marker. Specifically, for example, the value of the locking marker is changed from a first value to a second value. The locking marker with the first value is used to indicate that the first correspondence is locked, while the locking marker with the second value is used to indicate that the first correspondence is not locked.

[0114] For example, if the locking flag is the second field segment included in the modified first correspondence as shown in Table 2, then removing the locking flag of the first correspondence by the storage device means that the storage device deletes the second field segment in the modified first correspondence as shown in Table 2, or changes the value of the locking flag. For example, the value of the locking flag is changed from a first value to a second value. The locking flag with the first value is used to indicate that the first correspondence is locked, while the locking flag with the second value is used to indicate that the first correspondence is not locked.

[0115] For example, if the locking tag corresponding to the first correspondence is stored in the locking list shown in Table 3, then removing the locking tag of the first correspondence from the storage device means deleting the locking tag corresponding to the first correspondence from the locking list shown in Table 3.

[0116] For example, if the first correspondence is stored in the locked cache space of the cache, then removing the lock mark of the first correspondence by the storage device means that the storage device removes the first correspondence from the locked cache space. Specifically, for example, the storage device swaps the first correspondence from the locked cache space to the persistent storage medium, or the storage medium moves the first correspondence from the locked cache space to the unlocked cache space included in the cache. In this example, the cache includes independent locked cache spaces and unlocked cache spaces, and each correspondence stored in the unlocked cache space is in an unlocked state.

[0117] Step 407: The storage device sends a delock response to the processing device.

[0118] When the storage device removes the lock tag of the first correspondence, the storage device sends a delocking response to the processing device, which indicates that the lock tag of the first correspondence has been removed from the cache.

[0119] This embodiment uses the example of a processing device sending a de-locking request to a storage device, specifically requesting the storage device to remove the lock marker of the first correspondence. This is not limited to any particular case; for example, the storage device can remove the lock marker of the first correspondence in its cache if it detects that a target time period has been exceeded. Specifically, the storage device starts timing when the first correspondence is locked. If the time elapsed exceeds the target time period, the storage device directly removes the lock marker of the first correspondence in its cache. For an explanation of the target time period, please refer to the description of the embodiment corresponding to Figure 2; details will not be repeated here. Alternatively, the storage device can remove the lock marker of the first correspondence in its cache if it detects that the de-locking condition is met. This embodiment does not limit the de-locking condition; as long as the de-locking condition is met, it indicates that the processing device will not or will not access the target storage space corresponding to the first physical address in the persistent storage medium subsequently. For example, the storage device detects that the target application has been closed, or that the target task has been stopped from scheduling, or that the target data has been loaded into the computing device.

[0120] Using the method shown in this embodiment, when the processing device detects that the first logical address will not be accessed or will not be accessed much in the future, it sends a de-locking request to the storage device. The storage device removes the locking flag of the first correspondence in the cache according to the first logical address carried in the de-locking request, so that the first correspondence is in an unlocked state in the cache. Then, the storage device can swap the first correspondence out of the cache at any time as needed, reducing the storage burden of the cache and improving the utilization rate of the cache.

[0121] Regarding the above method embodiments, it should be noted that:

[0122] (1) The step numbers of the flowcharts described in the embodiments are only examples of the execution flow and do not constitute a restriction on the order of execution of the steps. There is no strict execution order between steps that have no temporal dependency relationship with each other in the embodiments of this application. In addition, not all steps shown in the flowcharts are mandatory steps. Some steps can be added or deleted based on the actual needs of each flowchart.

[0123] (2) In the various embodiments of this application, unless otherwise specified or logically conflicting, the terms and / or descriptions of different embodiments are consistent and can be referenced by each other. The technical features of different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0124] The methods provided by the embodiments of this application have been described in detail above. The storage controller, storage device, and solid-state drive provided by the embodiments of this application will be described in detail below. It should be understood that the descriptions of the device embodiments correspond to the descriptions of the method embodiments; therefore, any content not described in detail can be referred to the method embodiments above, and for the sake of brevity, will not be repeated here.

[0125] Figure 5 is a structural example diagram of an embodiment of the storage device provided in this application. Specifically, the storage device 500 includes a processing module 501 and a transceiver module 502. The transceiver module 502 may also be referred to as a transceiver, transceiver unit, transceiver device, communication unit, communication interface, etc. The processing module 501 is used to implement corresponding processing functions. For example, in the embodiment corresponding to Figure 2, the processing module 501 is used to execute steps 201, 202, and 204; the transceiver module 502 is used to execute step 203 to receive an access request. As another example, in the embodiment corresponding to Figure 3, the transceiver module 502 is used to execute step 301 to receive a lock request, and steps 306 and 307 to receive an access request; the processing module 501 is used to execute steps 302, 303, 304, 305, and 308. For example, in the embodiment corresponding to Figure 4, the processing module 501 is used to execute steps 401, 402, 404, and 406; the transceiver module 502 is used to execute step 403 to receive the access request, step 405 to receive the unlock request, and step 407.

[0126] It should be understood that the specific process of each module performing the above-mentioned steps has been described in detail in the above method embodiments, and will not be repeated here for the sake of brevity.

[0127] Figure 6 is a structural example diagram of an embodiment of the storage controller provided in this application. The storage controller 600 includes a controller 610 and a communication interface 620. For a description of the type of controller 610, please refer to the description of the corresponding processor type in Figure 1; details will not be repeated here. The controller 610 is used to implement the methods and functions of the various embodiments of this application; details will not be repeated here. The communication interface 620 can be an input / output circuit in the storage controller 600. Specifically, the communication interface 620 includes a storage medium interface to realize communication between the storage controller 600 and the persistent storage medium. For a description of the storage medium interface, please refer to the description corresponding to Figure 1; details will not be repeated here. The communication interface 620 also includes a target interface to realize communication with a computing device, and can also realize communication with a cache, etc. Optionally, the storage controller 600 may also include a cache connected to the controller 610. The storage controller 600 performs the operations shown in the above method embodiments on the corresponding relationships in the cache; details will not be repeated here.

[0128] This application also provides a solid-state drive, including a flash memory chip and a storage controller. For a description of the storage controller, please refer to the description corresponding to Figure 6, which will not be repeated here. For a description of the flash memory chip, please refer to the description of the persistent storage medium corresponding to Figure 1, which will not be repeated here.

[0129] This application also provides a storage device. For a description of the storage device, please refer to the description corresponding to Figure 1. Detailed explanation will not be repeated here.

[0130] This application also provides a storage system, which includes a computing device and a storage device. For a description of the storage system, please refer to the description corresponding to Figure 1, which will not be repeated here.

[0131] The explanations and beneficial effects of the relevant contents in any of the devices provided above can be found in the corresponding method embodiments provided above, and will not be repeated here.

[0132] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of apparatus or units may be electrical, mechanical, or other forms.

[0133] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A storage control method, characterized in that, The method includes: The storage device swaps a first correspondence, including a first logical address and a first physical address, from the persistent storage medium into the cache; The storage device locks the first correspondence in the cache, and the locked first correspondence remains stored in the cache within the target time period or when the locking condition is met. The storage device receives an access request from the processing device, the access request being used to request access to the first physical address corresponding to the first logical address; The storage device obtains the first correspondence stored in the cache according to the access request, and accesses the storage space corresponding to the first physical address in the persistent storage medium according to the first correspondence.

2. The method according to claim 1, characterized in that, Before the storage device locks the first correspondence in the cache, the method further includes: The storage device receives a lock request from the processing device, the lock request being used to request that the first correspondence be locked in the cache.

3. The method according to claim 2, characterized in that, After the storage device locks the first correspondence in the cache, the method further includes: The storage device sends a lock response to the processing device, the lock response indicating that the first correspondence is locked in the cache.

4. The method according to any one of claims 1 to 3, characterized in that, The locking conditions include at least one of the following: The target application for accessing the first logical address is launched, the target task for accessing the first logical address is scheduled, and the target data is accessed; wherein, the target data is stored in the storage space corresponding to the first physical address in the persistent storage medium.

5. The method according to any one of claims 1 to 4, characterized in that, The storage device locks the first correspondence in the cache, including: The storage device sets a locking flag in the cache, the locking flag being used to indicate that the first correspondence is locked in the cache.

6. The method according to any one of claims 1 to 5, characterized in that, The storage device swaps a first correspondence, including a first logical address and a first physical address, from the persistent storage medium into the cache, including: The storage device swaps out the unlocked second correspondence from the target cache space in the cache, the second correspondence including the correspondence between the second logical address and the second physical address; The storage device swaps the first correspondence from the persistent storage medium into the target cache space.

7. The method according to any one of claims 1 to 6, characterized in that, If the target time period is exceeded or the de-locking condition is met, the lock flag of the first correspondence is removed from the cache.

8. The method according to any one of claims 1 to 6, characterized in that, After the storage device locks the first correspondence in the cache, the method further includes: The storage device receives a delocking request from the processing device, the delocking request being used to request the removal of the lock on the first correspondence; The storage device removes the locking flag of the first correspondence from the cache according to the unlocking request; The storage device sends a delocking response to the processing device, the delocking response indicating that the lock flag of the first correspondence has been removed from the cache.

9. A storage device, characterized in that, Includes a module for performing the method according to any one of claims 1 to 8.

10. A storage controller, characterized in that, Includes communication interfaces and controllers; The communication interface and the controller perform the method as described in any one of claims 1 to 8.

11. A solid-state drive, characterized in that, Includes flash memory chips and the storage controller as described in claim 10.