Electronic device

WO2026200287A1PCT designated stage Publication Date: 2026-10-01HUAWEI TECH CO LTD
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Patent Information

Application Number
PCT/CN2026/076957
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-03-24
Filing Date
2026-02-04
Publication Date
2026-10-01

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  • Figure CN2026076957_01102026_PF_FP_ABST
    Figure CN2026076957_01102026_PF_FP_ABST
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Abstract

The present application provides an electronic device. The electronic device comprises a printed circuit board and an adapter board. By detecting level signals of solder joint pairs and traces between the printed circuit board and the adapter board, whether warpage or cold solder joints have occurred between the printed circuit board and the adapter board can be accurately determined without damaging the adapter board.
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Description

electronic devices

[0001] This application claims priority to Chinese Patent Application No. 202510348187.2, filed with the State Intellectual Property Office of China on March 24, 2025, entitled "Electronic Device", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of electronic device hardware, and more specifically, to an electronic device. Background Technology

[0003] The industry typically uses adapter boards between memory chips and printed circuit boards (PCBs) to diversify storage solutions. During mass production and long-term user use, there is a certain probability that adapter board warping and cold solder joints will occur, causing power-on / off malfunctions or storage-related function failures in mobile phones. These faults are often difficult to locate, and production line rework and customer service repairs incur significant material and manpower costs. Traditional methods for detecting cold solder joints and warping involve cross-sectioning the PCB to confirm the presence of cold solder joints or warping on the adapter board, causing irreversible damage and resulting in huge maintenance costs. Summary of the Invention

[0004] This application provides an electronic device, which includes a printed circuit board and an adapter board. By using the solder joints and traces between the printed circuit board and the adapter board, it is possible to accurately determine whether warping or poor soldering has occurred between the printed circuit board and the adapter board without damaging the adapter board.

[0005] In a first aspect, an electronic device is provided, comprising: a printed circuit board; an adapter board and a processing chip disposed on the surface of the printed circuit board; the surface of the printed circuit board facing the adapter board includes a first solder joint and a third solder joint, the first solder joint being electrically connected to a power supply of the electronic device, and a first pull-up resistor being electrically connected between the first solder joint and the power supply of the electronic device, the third solder joint being electrically connected to a ground terminal of the printed circuit board; the surface of the adapter board facing the printed circuit board includes a second solder joint and a fourth solder joint; the first solder joint and the second solder joint are positioned correspondingly and electrically connected, the third solder joint and the fourth solder joint are positioned correspondingly and electrically connected; the first solder joint and the second solder joint form a first solder joint pair, the third solder joint and the fourth solder joint form a second solder joint pair, the first solder joint pair and the second solder joint pair are electrically connected by a trace, the trace being at least partially disposed in the adapter board; the processing chip is used to detect the level signal of the first solder joint.

[0006] Based on the above technical solution, a signal trace connecting the printed circuit board and the adapter board is set up between the solder joints and the traces to connect with the processing chip. By detecting the level of the signal trace, the processing chip can accurately determine whether a cold solder joint has occurred between the printed circuit board and the adapter board.

[0007] In conjunction with the first aspect, in some implementations of the first aspect, along a first direction, the first solder joint pair and the second solder joint pair are respectively located at the edge of the overlapping area of ​​the printed circuit board and the adapter board, and the first direction is a direction perpendicular to the plane of the printed circuit board.

[0008] Based on the above technical solution, the first solder joint pair and the second solder joint pair are located at the edge of the overlapping area, so that when the adapter board warps, the solder joint pairs will detach, which can more effectively detect the poor solder joints between the printed circuit board and the adapter board.

[0009] In conjunction with the first aspect, in some implementations of the first aspect, the surface of the printed circuit board facing the adapter board further includes a fifth solder joint; the surface of the adapter board facing the printed circuit board further includes a sixth solder joint; the fifth solder joint and the sixth solder joint are positioned correspondingly and electrically connected, forming a third solder joint pair; the first solder joint pair, the third solder joint pair, and the second solder joint pair are sequentially electrically connected through the traces; at least a portion of the traces between the first solder joint pair and the third solder joint pair and between the third solder joint pair and the second solder joint pair are disposed in the adapter board.

[0010] Based on the above technical solution, a third solder joint pair is provided between the first solder joint pair and the second solder joint pair, which increases the number of points between the printed circuit board and the adapter board that can be used to detect whether there is a cold solder joint, thereby improving the accuracy of detecting cold solder joints between the printed circuit board and the adapter board.

[0011] In conjunction with the first aspect, in some implementations of the first aspect, the first solder joint pair, the third solder joint pair, and the second solder joint pair are respectively located at the edge of the overlapping area of ​​the printed circuit board and the adapter board.

[0012] Based on the above technical solution, the first solder joint pair, the second solder joint pair, and the third solder joint pair are respectively located at the edge of the overlapping area, so that when the adapter board warps, the solder joint pairs will detach, which can more effectively detect the poor solder joints between the printed circuit board and the adapter board.

[0013] In conjunction with the first aspect, in some implementations of the first aspect, there are multiple third solder joint pairs, and the multiple third solder joint pairs are electrically connected to each other through the traces, and the traces between the multiple third solder joint pairs are respectively arranged in the printed circuit board or the adapter board.

[0014] Based on the above technical solution, by setting multiple third solder joint pairs, the number of points between the printed circuit board and the adapter board that can be used to detect whether there is a cold solder joint increases, thereby improving the accuracy of detecting cold solder joints between the printed circuit board and the adapter board.

[0015] In conjunction with the first aspect, in some implementations of the first aspect, the number of the adapter boards is multiple.

[0016] Based on the above technical solution, when multiple adapter boards are set in the printed circuit board of an electronic device, it is possible to accurately determine whether a cold solder joint has occurred between the printed circuit board and each adapter board.

[0017] In conjunction with the first aspect, in some implementations of the first aspect, the surface of the printed circuit board facing the adapter board further includes a seventh solder joint and a ninth solder joint. The power supply of the electronic device is electrically connected to the seventh solder joint, and a second pull-up resistor is also electrically connected between the seventh solder joint and the power supply of the electronic device. The ninth solder joint is electrically connected to the ground terminal of the printed circuit board. The surface of the adapter board facing the printed circuit board further includes an eighth solder joint and a tenth solder joint. The seventh solder joint and the eighth solder joint are positioned correspondingly and electrically connected, and the ninth solder joint and the tenth solder joint are positioned correspondingly... Correspondingly configured and electrically connected; the seventh solder point and the eighth solder point form a fourth solder point pair, the ninth solder point and the tenth solder point form a fifth solder point pair, the fourth solder point pair and the fifth solder point pair are electrically connected by traces, the traces being at least partially disposed in the adapter board; the processing chip is also used to detect the level signal of the seventh solder point; wherein, the first solder point and the third solder point are located on the first side of the overlapping area, the seventh solder point and the ninth solder point are located on the second side of the overlapping area, the first side and the second side are opposite sides on the plane where the printed circuit board is located.

[0018] Based on the above technical solution, by detecting the level signal of the traces between multiple pairs of first solder joints and second solder joints, the location of the cold solder joint or warping between the adapter board and the printed circuit board can be further determined.

[0019] In conjunction with the first aspect, in some implementations of the first aspect, the traces between the first solder joint pair and the second solder joint pair are arranged in the adapter board.

[0020] Based on the above technical solution, the traces used to detect warpage or poor soldering are all set in the adapter board, avoiding the need to set traces in the printed circuit board and reducing the design complexity of the printed circuit board.

[0021] In conjunction with the first aspect, in some implementations of the first aspect, the number of adapter boards is multiple, the number of first solder points corresponds to the number of adapter boards, the GPIO interface is electrically connected to the multiple first solder points through different traces set in the printed circuit board, and the processing chip is also used to detect the level signals of the multiple first solder points.

[0022] Based on the above technical solution, when multiple adapter boards are set on the printed circuit board of an electronic device, the electronic device can simultaneously detect whether warping or poor soldering occurs between multiple adapter boards and the printed circuit board, thereby improving the detection efficiency.

[0023] In conjunction with the first aspect, in some implementations of the first aspect, a plurality of functional chips are disposed on the surface of the adapter board away from the printed circuit board.

[0024] In conjunction with the first aspect, in some implementations of the first aspect, the plurality of functional chips include a plurality of first functional chips or a plurality of second functional chips, wherein the first functional chip includes a memory chip, and the types of the first functional chip and the second functional chip are different.

[0025] Based on the above technical solution, electronic devices can detect whether there is a cold solder joint or warping between the adapter board containing memory chips and other functional chips and the printed circuit board, thereby further improving the accuracy of detecting cold solder joints or warping. Attached Figure Description

[0026] Figure 1 is an internal schematic diagram of an electronic device provided in an embodiment of this application.

[0027] Figure 2 is a schematic diagram of a printed circuit board and an adapter board provided in an embodiment of this application.

[0028] Figure 3 is a schematic diagram of another printed circuit board and adapter board provided in an embodiment of this application.

[0029] Figure 4 is a schematic diagram of another printed circuit board and adapter board provided in an embodiment of this application.

[0030] Figure 5 is a schematic diagram of another printed circuit board and adapter board provided in an embodiment of this application.

[0031] Figure 6 is a schematic diagram of another printed circuit board and adapter board provided in an embodiment of this application. Detailed Implementation

[0032] The technical solutions in this application will now be described with reference to the accompanying drawings.

[0033] It should be noted that in the embodiments of this application, the terms "upper," "lower," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the embodiments of this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application. The terms "comprising," "including," "having," and their variations all mean "including but not limited to," unless otherwise specifically emphasized. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The sequence numbers of the processes below do not imply the order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0034] In the description of the embodiments of this application, it should be noted that, unless otherwise stated, "a plurality of" means two or more; the terms "upper," "lower," "left," "right," "inner," "outer," etc., indicating orientation or positional relationships are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the embodiments of this application. Furthermore, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. "Vertical" is not strictly vertical, but within the allowable error range. "Parallel" is not strictly parallel, but within the allowable error range.

[0035] In this embodiment, references to "one embodiment" or "some embodiments" mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. In this application, words such as "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner. The terms "comprising," "including," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized. In the embodiments of this application, descriptions such as "when," "in the case of," "if," and "if" all refer to the device taking corresponding actions under certain objective circumstances, not to limiting the time, nor to requiring the device to perform a judgment action during implementation, nor implying any other limitations.

[0036] The term "and / or" in the embodiments of this application is merely a description of the association relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A exists, A and B exist simultaneously, and B exists. Additionally, the character " / " in the embodiments of this application generally indicates that the preceding and following related objects have an "or" relationship.

[0037] Furthermore, it should be noted that, in the description of the embodiments of this application, unless otherwise explicitly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of this application according to the specific circumstances.

[0038] The current diversified supply situation in the storage industry is severe, and the industry typically uses adapter boards between memory chips and printed circuit boards to achieve diversified storage solutions. During mass production of adapter boards and long-term use of electronic devices, there is a certain probability of adapter board warping and cold solder joints, causing malfunctions during power-on / off or storage-related functional failures. For electronic devices, these faults are often difficult to locate, and repairs require significant material and labor costs. Traditional methods for detecting cold solder joints and warping involve PCB cross-sections to confirm the presence of cold solder joints or warping on individual boards, causing irreversible damage to the boards and resulting in huge maintenance costs.

[0039] The electronic devices provided in this application can be mobile phones, tablets, laptops, smartwatches, e-readers, wearable devices, cameras, in-vehicle computers, smart screens, and other electronic devices with storage functions. This application does not limit the specific form of the electronic device; for ease of explanation and understanding, a mobile phone will be used as an example below.

[0040] Figure 1 is a schematic diagram of the internal structure of an electronic device 10.

[0041] As shown in Figure 1, the electronic device 10 is provided with a printed circuit board 100, which can be the motherboard of the electronic device 10. A processing chip 130 is provided on the printed circuit board 100. The processing chip 130 can be a system on chip (SOC). The processing chip 130 is the control center of the mobile phone and connects various parts of the mobile phone through various interfaces and lines.

[0042] An adapter board 110 is stacked on the printed circuit board 100. The surface of the adapter board 110 closest to the printed circuit board 100 is soldered to the printed circuit board 100. A functional chip 120 is also disposed on the surface of the adapter board 110 furthest from the printed circuit board 100. The functional chip 120 is used to implement various functions of the electronic device 10, such as a storage chip for storing and reading / writing data, or a processing chip 130 for processing data. The adapter board 110 and the functional chip 120 can be connected by soldering, or by providing a slot on the surface of the adapter board 110 furthest from the printed circuit board 100, so that the functional chip 120 can be plugged into and disposed on the surface of the adapter board 110 furthest from the printed circuit board 100.

[0043] However, during mass production and user use of the electronic device 10, there is a certain probability that the adapter board 110 will warp and have poor solder joints, causing malfunctions when the electronic device 10 is turned on or off, or related functional failures. Especially during the production and use of the electronic device 10, due to the large area of ​​the adapter board 110, warping is possible. As shown in Figure 1, warping occurs around the edges of the adapter board 110, further causing the original solder connection between the adapter board 110 and the printed circuit board 100 to break, resulting in poor solder joints and causing functional failures in the electronic device 10. Poor solder joints refer to a common defect in the soldering connections of circuit boards or electronic components. The solder joints appear to be properly formed, but in reality, there is poor contact or a weak connection, causing the two solder joints that should be electrically connected to lose conductivity.

[0044] It should be noted that while warping at the edge of the adapter board 110 may not directly cause malfunction of the electronic device 10, it does increase the probability of malfunction during use. Therefore, it is crucial to promptly eliminate warped adapter boards 110 during the manufacturing process of the electronic device 10.

[0045] Currently, cold solder joints or warping between the adapter board 110 and the printed circuit board 100 can be detected using computed tomography (CT). However, CT technology often cannot accurately determine whether cold solder joints or warping have occurred between the adapter board 110 and the printed circuit board 100. In such cases, it is necessary to cross-section the adapter board 110 to confirm whether cold solder joints or warping have occurred. This detection method can cause irreversible damage to the adapter board 110, resulting in high maintenance costs.

[0046] To address the aforementioned issues, embodiments of this application provide an electronic device 10 that can determine whether a cold solder joint has occurred between the circuit board and the adapter board 110 in the electronic device 10 without damaging the circuit board of the electronic device 10.

[0047] Figure 2 is a schematic diagram of a printed circuit board 100 and an adapter board 110 provided in an embodiment of this application.

[0048] A converter board 110 and a processing chip 130 are disposed on the surface of a printed circuit board 100, and the printed circuit board 100 is soldered to the converter board 110 and the processing chip 130 respectively.

[0049] The processing chip 130 is equipped with a general-purpose input / output (GPIO) interface 131. The GPIO interface 131 of the processing chip 130 can interact with external devices through digital signals and can be configured in either input or output mode through programmable configuration.

[0050] The electronic device 10 includes a first solder joint pair and a second solder joint pair.

[0051] The first solder joint pair includes a first solder joint 101 disposed on the surface of the printed circuit board 100 facing the adapter plate 110 and a second solder joint 111 disposed on the surface of the adapter plate 110 facing the printed circuit board 100. The positions of the first solder joint 101 and the second solder joint 111 are correspondingly arranged, and the first solder joint 101 and the second solder joint 111 are electrically connected. For example, the first solder joint 101 and the second solder joint 111 can be connected by soldering.

[0052] The first solder joint 101 is also electrically connected to the GPIO interface 131 through a trace provided in the printed circuit board 100. The first solder joint 101 is also electrically connected to the power supply 140 of the electronic device 10, and a first pull-up resistor 141 is also electrically connected between the first solder joint 101 and the power supply 140 of the electronic device 10.

[0053] The second solder joint pair includes a third solder joint 102 disposed on the surface of the printed circuit board 100 facing the adapter plate 110 and a fourth solder joint 112 disposed on the surface of the adapter plate 110 facing the printed circuit board 100. The third solder joint 102 and the fourth solder joint 112 are positioned correspondingly and are electrically connected. The third solder joint 102 is electrically connected to the ground terminal 142 of the printed circuit board 100. For example, the third solder joint 102 and the fourth solder joint 112 can be connected by soldering.

[0054] As shown in Figure 2, the traces between the first solder joint pair and the second solder joint pair are at least partially disposed in the adapter board 110. For example, the traces are connected on the adapter board 110 between the second solder joint 111 and the fourth solder joint 112.

[0055] In some possible implementations, the first solder joint pair and the second solder joint pair are located at the edge of the overlapping area of ​​the printed circuit board 100 and the adapter board 110, respectively, and the first direction is a direction perpendicular to the plane of the printed circuit board 100.

[0056] Based on the above technical solution, the first solder joint pair and the second solder joint pair are located at the edge of the overlapping area, so that when the adapter board 110 warps, the solder joint pairs will detach, which can more effectively detect the poor solder joints between the printed circuit board 100 and the adapter board 110. In the figure, the dashed box represents the overlapping area after the adapter board 110 and the printed circuit board 100 are connected.

[0057] The processing chip 130 can be electrically connected to the first solder joint 101 through a first trace on the printed circuit board 100. For example, the first trace can be a pin of the GPIO interface 131 of the processing chip 130, that is, one end of the first trace is electrically connected to the pin of the GPIO interface 131 of the processing chip 130, and the other end of the first trace is electrically connected to the first solder joint 101. At this time, the GPIO interface 131 of the processing chip 130 is configured as an input mode, which can be used to detect signal changes in the trace.

[0058] The processing chip 130 is used to detect the level signal at the first solder joint 101.

[0059] As shown in Figure 2, when the adapter board 110 is soldered to the printed circuit board 100, the first solder joint pair and the second solder joint pair are electrically connected through the traces on the adapter board 110. When the processing chip 130 detects that the signal trace is at a low level through the GPIO interface 131, it indicates that the trace is grounded and the level is 0, that is, all solder joints are in a conductive state at this time. When the processing chip 130 detects that the signal line is at a high level, it indicates that the trace is directly connected to the power supply 140 and the level is 1, that is, a cold solder joint has occurred between the solder joints at this time, indicating that the adapter board 110 may have warped.

[0060] It should be noted that the solder joints and traces on the adapter board 110 shown in Figure 2 are schematic diagrams facing the printed circuit board 100. After the adapter board 110 is connected to the printed circuit board 100, the electrical connection relationship between the solder joints is explained by the direction of current flow. Since the power supply 140 is connected to the first solder joint 101, the current will flow from the first solder joint pair along the trace to the second solder joint pair after passing through the first pull-up resistor 141, and finally flow into the ground terminal 142 of the third solder joint 102.

[0061] When current flows into the first solder joint pair, the current also has another direction, which will flow along the first trace of the printed circuit board 100 from the first solder joint pair to the GPIO interface 131 of the processing chip 130, so that the processing chip 130 can detect the high and low level changes in this trace, thereby determining whether the adapter board 110 has warped or has a cold solder joint.

[0062] It is understandable that if there is a cold solder joint between the first solder joint 101 and the second solder joint 111, between the third solder joint 102 and the fourth solder joint 112, or between multiple solder joints at the same time, it means that the adapter board 110 is warped or cold soldered on the printed circuit board 100. The level of the trace will change from low level to high level. If the solder joint is cold soldered, the signal state detected by the processing chip 130 through the GPIO interface 131 will change from 0 to 1.

[0063] Based on the above technical solution, a signal trace connected to the processing chip 130 is set between the printed circuit board 100 and the adapter board 110 through solder joints and traces. The processing chip 130 can accurately determine whether a cold solder joint has occurred between the printed circuit board 100 and the adapter board 110 by detecting the level state of the signal trace.

[0064] Based on the above technical solution, the printed circuit board 100 equipped with the adapter board 110 can detect whether the adapter board 110 is warped or has poor soldering on the production line, thereby improving the production efficiency of the electronic device 10. On the other hand, after detecting warped or poorly soldered printed circuit boards 100 on the production line, faulty printed circuit boards 100 can be prevented from entering the next stage of the electronic device 10's production, improving the accuracy of fault detection for the printed circuit boards 100. This results in an increased yield rate of electronic products that can be shipped.

[0065] It should be noted that warping of the adapter board 110 on the printed circuit board 100 may not directly cause problems with the electronic product. However, as the electronic product is used for longer periods, the probability of such warping leading to malfunctions increases. Therefore, timely detection of warped printed circuit boards 100 during the production of electronic devices 10 can prevent defective products from leaving the factory.

[0066] Figure 3 is a schematic diagram of another printed circuit board 100 and adapter board 110 provided in an embodiment of this application.

[0067] As shown in Figure 3, the difference between the printed circuit board 100 and the adapter board 110 shown in Figure 2 is that a third solder joint pair is provided between the first solder joint pair and the second solder joint pair. The third solder joint pair includes a fifth solder joint 103 provided on the surface of the printed circuit board 100 facing the adapter board 110 and a sixth solder joint 113 provided on the surface of the adapter board 110 facing the printed circuit board 100. The positions of the fifth solder joint 103 and the sixth solder joint 113 are correspondingly provided, and the fifth solder joint 103 and the sixth solder joint 113 are electrically connected.

[0068] The first solder joint pair, the third solder joint pair, and the second solder joint pair are electrically connected sequentially via traces. At least one trace between the first solder joint pair and the third solder joint pair, and between the third solder joint pair and the second solder joint pair, is provided on the adapter board 110. For example, in Figure 3, the trace between the first solder joint pair and the third solder joint pair is provided on the printed circuit board 100 via the first solder joint 101 and the fifth solder joint 103, and the trace between the third solder joint pair and the second solder joint pair is provided on the adapter board 110 via the sixth solder joint 113 and the third solder joint 102.

[0069] As shown in Figure 3, when the adapter board 110 is soldered to the printed circuit board 100, the first solder joint pair and the third solder joint pair, and the third solder joint pair and the second solder joint pair are electrically connected through traces. When the processing chip 130 detects that the signal trace is at a low level through the GPIO interface 131, it indicates that the trace is grounded and the level is 0, that is, all solder joints are in a conductive state at this time. When the processing chip 130 detects that the signal line is at a high level, it indicates that the trace is directly connected to the power supply 140 and the level is 1, that is, a cold solder joint has occurred between the solder joints at this time, indicating that the adapter board 110 may have warped.

[0070] It should be noted that the solder joints and traces on the adapter board 110 shown in Figure 3 are a schematic diagram facing the printed circuit board 100. After the adapter board 110 is connected to the printed circuit board 100, the electrical connection relationship between the solder joints is explained by the direction of current flow. Since the power supply 140 is connected to the first solder joint 101, the current will flow from the first solder joint pair along the trace to the third solder joint pair after passing through the first pull-up resistor 141, then from the third solder joint pair to the second solder joint pair, and finally into the ground terminal 142 of the third solder joint 102.

[0071] When current flows into the first solder joint pair, the current also has another direction, which will flow along the first trace of the printed circuit board 100 from the first solder joint pair to the GPIO interface 131 of the processing chip 130, so that the processing chip 130 can detect the high and low level changes in this trace, thereby determining whether the adapter board 110 has warped or has a cold solder joint.

[0072] It is understandable that if there is a cold solder joint between the first solder joint 101 and the second solder joint 111, between the third solder joint 102 and the fourth solder joint 112, between the fifth solder joint 103 and the sixth solder joint 113, or between multiple solder joints, it indicates that the adapter board 110 is warped or cold soldered on the printed circuit board 100. The level of the trace will change from low level to high level. If the solder joint is cold soldered, the signal state detected by the processing chip 130 through the GPIO interface 131 will change from 0 to 1.

[0073] Based on the above technical solution, a third solder joint pair is provided between the first solder joint pair and the second solder joint pair, which increases the number of points between the printed circuit board 100 and the adapter board 110 that can be used to detect whether there is a cold solder joint, thereby improving the accuracy of detecting cold solder joints between the printed circuit board 100 and the adapter board 110.

[0074] Based on the above technical solution, after the printed circuit board 100 with the adapter board 110 is produced from the production line, whether there is a cold solder joint between the printed circuit board 100 and the adapter board 110 can be detected by solder joint pair and wiring. This prevents the faulty printed circuit board 100 from entering the next stage of production or packaging of the electronic device 10, thereby improving the yield rate of the electronic device 10.

[0075] Figure 4 is a schematic diagram of another printed circuit board 100 and adapter board 110 provided in an embodiment of this application.

[0076] As shown in Figure 4, the difference between the printed circuit board 100 and the adapter board 110 shown in Figure 3 is that the number of third solder pairs set between the first solder pair and the second solder pair is multiple.

[0077] The printed circuit board 100 and the adapter board 110 shown in Figure 4 include two third solder joint pairs. The traces between the two third solder joint pairs are set on the printed circuit board 100 or the adapter board 110. As shown in Figure 4, the traces between the first solder joint pair and the first third solder joint pair are set on the adapter board 110 through the second solder joint 111 and the first sixth solder joint 113a. The traces between the first third solder joint pair and the second third solder joint pair are set on the printed circuit board 100 through the first fifth solder joint 103a and the second fifth solder joint 103b. The traces between the second third solder joint pair and the second solder joint pair are set on the adapter board 110 through the second sixth solder joint 113b and the fourth solder joint 112.

[0078] As shown in Figure 4, when the adapter board 110 is soldered to the printed circuit board 100, the first solder joint pair and the first third solder joint pair, the first third solder joint pair and the second third solder joint pair, and the second third solder joint pair and the second solder joint pair are electrically connected through traces. When the processing chip 130 detects that the signal trace is at a low level through the GPIO interface 131, it indicates that the trace is grounded and the level is 0, that is, at this time, all solder joints are in a conductive state. When the processing chip 130 detects that the signal line is at a high level, it indicates that the trace is directly connected to the power supply 140 and the level is 1, that is, at this time, a cold solder joint has occurred between the solder joints, indicating that the adapter board 110 may have warped.

[0079] As shown in Figure 4, when the adapter board 110 is soldered to the printed circuit board 100, the first solder joint pair and the first third solder joint pair, the first third solder joint pair and the second third solder joint pair, and the second third solder joint pair and the second solder joint pair are electrically connected through traces. When the processing chip 130 detects that the signal trace is at a low level through the GPIO interface 131, it indicates that the trace is grounded and the level is 0, that is, at this time, all solder joints are in a conductive state. When the processing chip 130 detects that the signal line is at a high level, it indicates that the trace is directly connected to the power supply 140 and the level is 1, that is, at this time, a cold solder joint has occurred between the solder joints, indicating that the adapter board 110 may have warped.

[0080] It should be noted that the solder joints and traces on the adapter board 110 shown in Figure 4 are a schematic diagram facing the printed circuit board 100. After the adapter board 110 is connected to the printed circuit board 100, the electrical connection relationship between the solder joints is explained by the direction of current flow. Since the power supply 140 is connected to the first solder joint 101, the current will flow from the first solder joint pair along the trace to the first third solder joint pair after passing through the first pull-up resistor 141, then from the first third solder joint pair to the second third solder joint pair, then from the second third solder joint pair to the second solder joint pair, and finally flow into the ground terminal 142 of the third solder joint 102.

[0081] When current flows into the first solder joint pair, the current also has another direction, which will flow along the first trace of the printed circuit board 100 from the first solder joint pair to the GPIO interface 131 of the processing chip 130, so that the processing chip 130 can detect the high and low level changes in this trace, thereby determining whether the adapter board 110 has warped or has a cold solder joint.

[0082] It is understandable that if there is a cold solder joint between the first solder joint 101 and the second solder joint 111, between the third solder joint 102 and the fourth solder joint 112, between the fifth solder joint 103 and the sixth solder joint 113, or between multiple solder joints, it indicates that the adapter board 110 is warped or cold soldered on the printed circuit board 100. The level of the trace will change from low level to high level. If the solder joint is cold soldered, the signal state detected by the processing chip 130 through the GPIO interface 131 will change from 0 to 1.

[0083] In some possible implementations, the shape of the adapter board 110 is usually rectangular. Therefore, along the first direction, the first solder pair, the second solder pair, and the third solder pair are located at the edge of the overlapping area of ​​the printed circuit board 100 and the adapter board 110, respectively. As shown in Figure 4, the first solder pair is located at the upper left corner of the rectangular overlapping area, the second solder pair is located at the upper right corner of the rectangular overlapping area, the first third solder pair is located at the lower left corner of the rectangular overlapping area, and the second third solder pair is located at the lower right corner of the rectangular overlapping area.

[0084] It is understandable that after the adapter board 110 is soldered to the printed circuit board 100, the edge of the adapter board 110 is the most likely place to warp. Therefore, setting the solder joints at the edge of the overlapping area can more effectively detect whether the adapter board 110 is warped and improve the accuracy of warping detection.

[0085] Based on the above technical solution, by setting multiple third solder joint pairs, the number of points between the printed circuit board 100 and the adapter board 110 that can be used to detect whether there is a cold solder joint increases, thereby improving the accuracy of detecting cold solder joints between the printed circuit board 100 and the adapter board 110.

[0086] Figure 5 is a schematic diagram of another printed circuit board 100 and adapter board 110 provided in an embodiment of this application.

[0087] As shown in Figure 5, compared with the printed circuit board 100 and adapter board 110 shown in Figure 4, the printed circuit board 100 is provided with multiple adapter boards 110, for example, there can be two.

[0088] As shown in Figure 5, the electronic device 10 includes an adapter board 110a and an adapter board 110b. Adapter board 110a and adapter board 110b both fall in the overlapping area of ​​the printed circuit board 100 along the first direction. Each adapter board 110a and adapter board 110b are respectively provided with a first solder joint pair, a second solder joint pair, and a third solder joint pair. A first solder joint 101a and a third solder joint 102a are provided on the surface of the printed circuit board 100 facing the adapter board 110a. The first solder joint 101a is connected to the power supply 140 through a first pull-up resistor 141, and the third solder joint 102a is electrically connected to the ground terminal 142. A fifth solder joint 103a and a fifth solder joint 103b are also provided. On the surface of the adapter board 110a facing the printed circuit board 100, there are also provided a second solder point 111a corresponding to the first solder point 101a, a sixth solder point 113a corresponding to the fifth solder point 103a, a sixth solder point 113b corresponding to the fifth solder point 103b, and a fourth solder point 112a corresponding to the third solder point 102a. On the surface of the printed circuit board 100 facing the adapter board 110b, there are a first solder point 101b and a third solder point 102b. The first solder point 101b is connected to the power supply 140 through a second pull-up resistor 143, and the third solder point 102b is electrically connected to the ground terminal 142. There are also fifth solder points 103c and 103d. On the surface of the adapter board 110b facing the printed circuit board 100, there are also a second solder point 111b corresponding to the first solder point 101b, a sixth solder point 113c corresponding to the fifth solder point 103c, a sixth solder point 113d corresponding to the fifth solder point 103d, and a fourth solder point 112b corresponding to the third solder point 102b. The first solder points 101a and 101b are electrically connected to the GPIO interface 131 through different traces provided in the printed circuit board 100.

[0089] The number of first solder points 101 corresponds to the number of adapter boards 110. The GPIO interface 131 is electrically connected to the multiple first solder points 101 through different traces set in the printed circuit board 100. The processing chip 130 is used to detect the level signals of the multiple first solder points.

[0090] The solder joint configuration and wiring connection method between each adapter board 110 and the printed circuit board 100 can be referred to the description in the other embodiments above, and will not be repeated here for the sake of brevity.

[0091] The first solder joints 101 of the processing chip 130 and the two adapter boards 110 are electrically connected through two different pins of the GPIO interface 131 of the processing chip 130, thereby enabling the processing chip 130 to detect signal changes in the traces connected to the two adapter boards 110.

[0092] Based on the above technical solution, when multiple adapter boards 110 are provided in the printed circuit board 100 of the electronic device 10, it is possible to accurately determine whether a cold solder joint has occurred between the printed circuit board 100 and each adapter board 110, thereby improving the efficiency of detecting cold solder joints.

[0093] Figure 6 is a schematic diagram of another printed circuit board 100 and adapter board 110 provided in an embodiment of this application.

[0094] As shown in Figure 6, compared with the printed circuit board 100 and the adapter board 110 shown in Figure 2, the surface of the printed circuit board 100 facing the adapter board 110 also includes a seventh solder joint 103 and a ninth solder joint 105. The power supply 140 of the electronic device 10 is electrically connected to the seventh solder joint 104. A second pull-up resistor 143 is also electrically connected between the seventh solder joint 104 and the power supply 140 of the electronic device 10. The ninth solder joint 105 is electrically connected to the ground terminal 142 of the printed circuit board 100.

[0095] The surface of the adapter board 110 facing the printed circuit board 100 also includes an eighth solder point 114 and a tenth solder point 115;

[0096] The seventh solder point 104 and the eighth solder point 114 are positioned correspondingly and electrically connected, and the ninth solder point 105 and the tenth solder point 115 are positioned correspondingly and electrically connected.

[0097] The seventh solder point 104 and the eighth solder point 114 form the fourth solder point pair, and the ninth solder point 105 and the tenth solder point 115 form the fifth solder point pair. The fourth solder point pair and the fifth solder point pair are electrically connected by a wiring, and the wiring is at least partially set in the adapter board 110.

[0098] The processing chip 130 is also used to detect the level signal of the seventh solder joint 104;

[0099] Among them, the first solder point 101 and the third solder point 102 are located on the first side of the overlapping area, and the seventh solder point 104 and the ninth solder point 105 are located on the second side of the overlapping area. The first side and the second side are opposite sides on the plane where the printed circuit board 100 is located.

[0100] The processing chip 130 can detect the level signals of the traces between the first solder joint pair and the first and second solder joint pairs, as well as the level signals of the traces between the fourth solder joint pair and the fifth solder joint pair. This allows for further determination of the location of any cold solder joints or warping between the adapter board 110 and the printed circuit board 100, thereby improving the accuracy of detecting cold solder joints or warping.

[0101] In some possible implementations, the traces between the first solder joint pair and the second solder joint pair can both be located in the adapter board 110.

[0102] Based on the above technical solution, the traces used to detect warpage or poor soldering are all set in the adapter board, avoiding the need to set traces in the printed circuit board and reducing the design complexity of the printed circuit board.

[0103] In some possible implementations, the surface of the adapter board 110 away from the printed circuit board 100 is also provided with a plurality of functional chips 120.

[0104] In some possible implementations, the multiple functional chips 120 include multiple first functional chips 121 or multiple second functional chips 122. The first functional chips 121 and the second functional chips 122 may be connected to the surface of the adapter board 110 away from the printed circuit board 100 by soldering, respectively. The surface of the adapter board 110 close to the printed circuit board 100 is connected to the printed circuit board 100 by soldering.

[0105] In some possible implementations, the first functional chip 121 may be a memory chip used to implement the memory function of the electronic device 10. The second functional chip 122 may be a processing chip or a chip other than the one used to implement the memory function of the electronic device 10.

[0106] In some possible implementations, different types of memory chips may include ultra-multi-chip package (uMCP), embedded multi-media card (eMMC), double data rate (DDR) synchronous dynamic random access memory, universal flash storage (UFS), and other types of memory chips. The first memory chip can be any of the above-mentioned memory chips, and the embodiments of this application do not limit this.

[0107] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An electronic device, comprising: The electronic device includes: Printed circuit board (100); The adapter board (110) and the processing chip (130) are disposed on the surface of the printed circuit board (100); The printed circuit board (100) has a first solder joint (101) and a third solder joint (102) on the surface facing the adapter board (110). The first solder joint (101) is electrically connected to the power supply (140) of the electronic device. A first pull-up resistor (141) is also electrically connected between the first solder joint (101) and the power supply (140) of the electronic device. The third solder joint (102) is electrically connected to the ground terminal (142) of the printed circuit board (100). The adapter plate (110) includes a second solder joint (111) and a fourth solder joint (112) on the surface facing the printed circuit board (100); The first solder joint (101) is positioned corresponding to and electrically connected to the second solder joint (111), and the third solder joint (102) is positioned corresponding to and electrically connected to the fourth solder joint (112). The first solder joint (101) and the second solder joint (111) form a first solder joint pair, and the third solder joint (102) and the fourth solder joint (112) form a second solder joint pair. The first solder joint pair and the second solder joint pair are electrically connected by a trace, and the trace is at least partially disposed in the adapter plate (110). The processing chip (130) includes a general purpose input / output (GPIO) interface (131), which is electrically connected to the first solder joint (101) via traces disposed in the printed circuit board (100). The processing chip (130) is used to detect the level signal of the first solder joint (101).

2. The electronic device according to claim 1, characterized in that, Along a first direction, the first solder joint pair and the second solder joint pair are respectively located at the edge of the overlapping area of ​​the printed circuit board (100) and the adapter board (110), and the first direction is a direction perpendicular to the plane where the printed circuit board (100) is located.

3. The electronic device according to claim 1 or 2, characterized in that, The surface of the printed circuit board (100) facing the adapter plate (110) also includes a fifth solder joint (103); The adapter plate (110) also includes a sixth solder joint (113) on the surface facing the printed circuit board (100); The fifth solder point (103) is positioned corresponding to and electrically connected to the sixth solder point (113), and the fifth solder point (103) and the sixth solder point (113) form a third solder point pair; The first solder joint pair, the third solder joint pair, and the second solder joint pair are sequentially electrically connected through the wiring; At least a portion of the traces between the first solder joint pair and the third solder joint pair, and between the third solder joint pair and the second solder joint pair, are located in the adapter board (110).

4. The electronic device according to claim 3, characterized in that, The first solder joint pair, the third solder joint pair, and the second solder joint pair are respectively located at the edge of the overlapping area of ​​the printed circuit board (100) and the adapter board (110).

5. The electronic device according to claim 3 or 4, characterized in that, The number of the third solder joint pairs is multiple, and the multiple third solder joint pairs are electrically connected in sequence through the traces. The traces between the multiple third solder joint pairs are respectively arranged in the printed circuit board (100) or the adapter board (110).

6. The electronic device according to any one of claims 2-5, characterized in that, The surface of the printed circuit board (100) facing the adapter board (110) also includes a seventh solder joint (104) and a ninth solder joint (105). The power supply (140) of the electronic device is electrically connected to the seventh solder joint (104). A second pull-up resistor (143) is also electrically connected between the seventh solder joint (104) and the power supply (140) of the electronic device. The ninth solder joint (105) is electrically connected to the ground terminal of the printed circuit board (100). The surface of the adapter plate (110) facing the printed circuit board (100) also includes an eighth solder point (114) and a tenth solder point (115); The seventh solder point (104) is positioned corresponding to and electrically connected to the eighth solder point (114), and the ninth solder point (105) is positioned corresponding to and electrically connected to the tenth solder point (115). The seventh solder point (104) and the eighth solder point (114) form a fourth solder point pair, and the ninth solder point (105) and the tenth solder point (115) form a fifth solder point pair. The fourth solder point pair and the fifth solder point pair are electrically connected by a wiring, and the wiring is at least partially disposed in the adapter plate (110). The processing chip (130) is also used to detect the level signal of the seventh solder joint (104); The first solder joint (101) and the third solder joint (102) are located on the first side of the overlapping area, and the seventh solder joint (104) and the ninth solder joint (105) are located on the second side of the overlapping area. The first side and the second side are opposite sides on the plane where the printed circuit board (100) is located.

7. The electronic device according to any one of claims 1-6, characterized in that, The wiring between the first solder joint pair and the second solder joint pair is arranged in the adapter plate (110).

8. The electronic device according to any one of claims 1-7, characterized in that, The number of adapter boards (110) is multiple, and the number of first solder joints (101) is set in a manner corresponding to the number of adapter boards (110). The GPIO interface (131) and the multiple first solder joints (101) are electrically connected to each other through different traces set in the printed circuit board (100). The processing chip (130) is also used to detect the level signals of the multiple first solder joints (101).

9. The electronic device according to any one of claims 1-8, characterized in that, The adapter board (110) has a plurality of functional chips (120) disposed on the surface of the side away from the printed circuit board (100).

10. The electronic device according to claim 9, characterized in that, The plurality of functional chips (120) includes a plurality of first functional chips (121) or a plurality of second functional chips (122). The first functional chip (121) includes a memory chip. The types of the first functional chip (121) and the second functional chips (122) are different.