Display substrate and manufacturing method therefor, and display device
Patent Information
- Application Number
- PCT/CN2026/078018
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-03-27
- Filing Date
- 2026-02-09
- Publication Date
- 2026-10-01
Smart Images

Figure CN2026078018_01102026_PF_FP_ABST
Abstract
Description
A display substrate, a method for manufacturing the same, and a display device.
[0001] Cross-references to related applications
[0002] This application claims priority to Chinese Patent Application No. 202510375029.6, filed on March 27, 2025, with the invention entitled "A display substrate, its manufacturing method and display device", the entire contents of which are incorporated herein by reference. Technical Field
[0003] This disclosure relates to the field of display technology, and in particular to a display substrate, its manufacturing method, and a display device. Background Technology
[0004] With the continuous development of display technology, people have increasingly higher requirements for the pixel density (Pixels Per Inch, PPI) of display screens, especially in the field of Augmented Reality (AR) / Virtual Reality (VR), where the demand for high PPI is extremely urgent. However, one of the important factors currently limiting PPI improvement is the space available for anode (AND) arrangement. How to arrange more anodes within a limited space has become a problem that urgently needs to be solved. Summary of the Invention
[0005] This disclosure provides a display substrate, a method for manufacturing the same, and a display device for arranging more anodes within a limited space.
[0006] In a first aspect, embodiments of this disclosure provide a display substrate, comprising:
[0007] A substrate, and a plurality of light-emitting units arranged in an array on the substrate; each light-emitting unit includes an anode, a light-emitting functional layer and a cathode disposed sequentially away from the substrate;
[0008] The anode comprises a metal layer, a reflective layer, and a transparent conductive layer disposed sequentially away from the substrate; under wet etching, the etching rates of the metal layer and the reflective layer are both in the range of 9 nm / s to 11 nm / s.
[0009] In one possible implementation, the reflective layer and the metal layer are flush-mounted, and the orthogonal projection of the transparent conductive layer onto the substrate falls entirely within the region of the orthogonal projection of the metal layer onto the substrate.
[0010] In one possible implementation, the transparent conductive layer is 0.1 μm to 0.2 μm smaller than the reflective layer.
[0011] In one possible implementation, the etching deviation of the anode is in the range of -0.7 μm to -0.5 μm.
[0012] In one possible implementation, the material of the metal layer is at least one of Mo, Cu, and Al.
[0013] In one possible implementation, the thickness of the metal layer ranges from 30 angstroms to 200 angstroms along a direction perpendicular to the plane of the substrate.
[0014] Secondly, embodiments of this disclosure also provide a display substrate, comprising:
[0015] A substrate, and a plurality of light-emitting units arranged in an array on the substrate; each light-emitting unit includes an anode, a light-emitting functional layer and a cathode disposed sequentially away from the substrate;
[0016] The anode comprises a metal layer, a reflective layer, and a transparent conductive layer disposed sequentially away from the substrate; under wet etching, the etching rate of the metal layer is 0.
[0017] In one possible implementation, the orthogonal projections of the transparent conductive layer and the reflective layer onto the substrate both fall completely within the region of the orthogonal projection of the metal layer onto the substrate.
[0018] In one possible implementation, the reflective layer is 0–0.7 μm smaller than the metal layer.
[0019] In one possible implementation, the transparent conductive layer is 0.05 μm to 0.1 μm smaller than the reflective layer.
[0020] In one possible implementation, the thickness of the metal layer ranges from 30 angstroms to 100 angstroms along a direction perpendicular to the plane of the substrate.
[0021] In one possible implementation, the material of the metal layer is Ti.
[0022] In one possible implementation, the spacing between two adjacent anodes ranges from 1.8 μm to 4.4 μm.
[0023] In one possible implementation, the spacing between the two metal layers corresponding to two adjacent anodes ranges from 1.8 μm to 2.2 μm.
[0024] Thirdly, embodiments of this disclosure also provide a display device, including:
[0025] Display substrates as described in any of the above.
[0026] Fourthly, embodiments of this disclosure also provide a method for manufacturing a display substrate, comprising:
[0027] On the substrate, a first film layer, a second film layer, and a third film layer are sequentially formed.
[0028] A full layer of photoresist is formed on the side of the third film layer facing away from the substrate;
[0029] The photoresist is patterned using a photolithography process to form the desired pattern.
[0030] Based on the photoresist with the desired pattern, and using a wet etching process, the first film layer, the second film layer, and the third film layer are processed to obtain the anode with the desired pattern; the anode includes a metal layer, a reflective layer, and a transparent conductive layer disposed sequentially away from the substrate;
[0031] The photoresist for the desired pattern is removed, and a light-emitting functional layer and a cathode are sequentially formed on the side of the anode facing away from the substrate to obtain multiple light-emitting units arranged in an array; wherein each light-emitting unit includes the anode, the light-emitting functional layer and the cathode; under wet etching process, the etching rate of the transparent conductive layer and the reflective layer is in the range of 9nm / s to 11nm / s.
[0032] Fifthly, embodiments of this disclosure also provide a method for manufacturing a display substrate, comprising:
[0033] On the substrate, a first film layer, a second film layer, and a third film layer are sequentially formed.
[0034] A full layer of photoresist is formed on the side of the third film layer facing away from the substrate;
[0035] The photoresist is patterned using a photolithography process to form the desired pattern.
[0036] Based on the photoresist with the desired pattern, and using a wet etching process, the second and third film layers are processed to obtain the reflective layer and transparent conductive layer with the desired pattern, respectively; wherein, the etching rate of the first film layer is 0;
[0037] The first film layer is processed using a dry etching process to obtain a metal layer with the desired pattern.
[0038] An anode comprising the metal layer, the reflective layer, and the transparent conductive layer is obtained;
[0039] The photoresist for the desired pattern is removed, and a light-emitting functional layer and a cathode are sequentially formed on the side of the anode facing away from the substrate to obtain multiple light-emitting units arranged in an array; wherein each light-emitting unit includes the anode, the light-emitting functional layer and the cathode. Attached Figure Description
[0040] Figure 1 shows a SEM diagram of one of the existing AND triple-layer structures;
[0041] Figure 2 is a top view of one of the display substrate structures provided in the embodiments of this disclosure;
[0042] Figure 3 is a schematic diagram of one type of cross-sectional structure along the direction shown by MM in Figure 2;
[0043] Figure 4 is an enlarged schematic diagram of one of the anode structures in Figure 3;
[0044] Figure 5 is a top view of one of the display substrate structures provided in the embodiments of this disclosure;
[0045] Figure 6 is a schematic diagram of one type of cross-sectional structure along the NN direction shown in Figure 5;
[0046] Figure 7 is a schematic diagram of one type of anode structure in Figure 6;
[0047] Figure 8 is a SEM schematic diagram of one type of display substrate before anodic etching provided in this disclosure;
[0048] Figure 9 is a SEM diagram of one type of display substrate after anodic etching provided in this disclosure;
[0049] Figure 10 is a flowchart of a method for manufacturing a display substrate according to an embodiment of the present disclosure;
[0050] Figure 11 is a flowchart of one of the processes used to prepare the display substrate shown in Figure 3;
[0051] Figure 12 is a flowchart of a method for manufacturing a display substrate according to an embodiment of the present disclosure;
[0052] Figure 13 is a flowchart of one of the processes used to prepare the display substrate shown in Figure 6. Detailed Implementation
[0053] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. Furthermore, the embodiments and features in the embodiments of this disclosure can be combined with each other without conflict. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.
[0054] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as “inner,” “outer,” “upper,” and “lower” are used only to indicate relative positional relationships; when the absolute position of the described objects changes, the relative positional relationship may also change accordingly.
[0055] It should be noted that the dimensions and shapes of the figures in the accompanying drawings do not reflect actual scale and are intended only to illustrate the content of this disclosure. Furthermore, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.
[0056] In related technologies, existing AND triple-layer structures (ITO-Ag-ITO) are prone to significant etching bias during the etching process, limiting the AND array density. For example, for an AND triple-layer ITO-Ag-ITO structure with a thickness of 70 Å / 1000 Å / 70 Å, the etching bias is -1 μm, which is relatively large. Figure 1 shows a schematic diagram of one type of scanning electron microscope (SEM) corresponding to this AND triple-layer structure. Therefore, a technical solution that can effectively reduce AND etching bias is needed to meet the requirements of high PPI display devices.
[0057] In view of this, the present disclosure provides a display substrate, a method for manufacturing the same, and a display device for arranging more anodes in a limited space.
[0058] Referring to Figures 2 to 4, Figure 2 is a top view of one of the display substrates provided in the embodiments of this disclosure, Figure 3 is a cross-sectional view along the direction shown in MM in Figure 2, and Figure 4 is an enlarged view of one of the anode 21 structures in Figure 3.
[0059] Specifically, the display substrate provided in this embodiment includes:
[0060] A substrate 10, and a plurality of light-emitting units 20 arranged in an array on the substrate 10; each light-emitting unit 20 includes an anode 21, a light-emitting functional layer 22 and a cathode 23 disposed sequentially away from the substrate 10;
[0061] The anode 21 includes a metal layer 211, a reflective layer 212, and a transparent conductive layer 213 disposed sequentially away from the substrate 10; under wet etching process, the etching rate of the metal layer 211 and the reflective layer 212 is in the range of 9nm / s to 11nm / s.
[0062] In a specific implementation, the display substrate includes a substrate 10 and a plurality of light-emitting units 20 arranged in an array on the substrate 10. For example, the substrate 10 can be a flexible substrate or a rigid substrate, without limitation. For example, the plurality of light-emitting units 20 can be two, three, or more, without limitation. For example, the plurality of light-emitting units 20 includes red light-emitting units, green light-emitting units, and blue light-emitting units, thereby ensuring the color display of the display substrate. Of course, the specific color of each light-emitting unit 20 can be set according to the actual application needs, without limitation. Each light-emitting unit 20 includes an anode 21, a light-emitting functional layer 22, and a cathode 23 disposed sequentially away from the substrate 10. For example, the light-emitting functional layer 22 includes a hole injection layer, a hole transport layer, a light-emitting material layer, an electron transport layer, and an electron injection layer sequentially stacked along the direction away from the substrate 10. For example, the light-emitting unit 20 may be at least one of organic light-emitting diode (OLED), quantum dot light-emitting diode (QLED), micro LED, and mini LED.
[0063] Furthermore, in this embodiment, the anode 21 includes a metal layer 211, a reflective layer 212, and a transparent conductive layer 213 disposed sequentially away from the substrate 10. During wet etching, the etching rates of both the metal layer 211 and the reflective layer 212 range from 9 nm / s to 11 nm / s. Thus, under the same wet etching process, the etching rates of the metal layer 211 and the reflective layer 212 are equal. This reduces the total etching time to a certain extent during the wet etching process for fabricating the anode 21 pattern, effectively reducing the etching deviation of the anode 21. This ensures that a larger number of anodes 21 can be arranged within a limited space, which is beneficial for meeting the high pixel density design requirements of the display substrate. It should be noted that "equal" here can mean approximately equal or nearly equal, and is not limited here.
[0064] Referring again to the exemplary embodiment shown in FIG4, the reflective layer 212 and the metal layer 211 are disposed flush with each other, and the orthogonal projection of the transparent conductive layer 213 on the substrate 10 falls completely within the area of the orthogonal projection of the metal layer 211 on the substrate 10.
[0065] In the actual fabrication process, since the etching rates of the metal layer 211 and the reflective layer 212 are approximately equal, the reflective layer 212 and the metal layer 211 are flush-mounted in the final anode 21 structure. Furthermore, the orthogonal projection of the transparent conductive layer 213 onto the substrate 10 completely falls within the region of the orthogonal projection of the metal layer 211 onto the substrate 10.
[0066] In this embodiment of the disclosure, the transparent conductive layer 213 is 0.1 μm to 0.2 μm smaller than the reflective layer 212.
[0067] Referring again to the exemplary embodiment shown in FIG4, the transparent conductive layer 213 is shrunk by 0.1 μm compared to the reflective layer 212 and the metal layer 211. Of course, the specific size of the shrinkage of the transparent conductive layer 213 compared to the reflective layer 212 and the metal layer 211 can be controlled according to the actual application needs, and is not limited here.
[0068] In this embodiment of the disclosure, the etching deviation of the anode 21 ranges from -0.7 μm to -0.5 μm.
[0069] In the specific implementation process, the etching deviation of the anode 21 can be controlled within the range of -0.7μm to -0.5μm, which makes it possible to arrange more anodes 21 in a limited space and ensures the design requirements of high pixel density of the display substrate.
[0070] In this embodiment of the disclosure, the material of the metal layer 211 is at least one of Mo, Cu, and Al.
[0071] For example, the material of the metal layer 211 is Mo, and the material of the reflective layer 212 is Ag. This ensures that the etching rates of the metal layer 211 and the reflective layer 212 are approximately equal. Of course, the material with an etching rate approximately equal to that of the reflective layer 212 can be selected to prepare the metal layer 211 according to the actual application requirements, and this is not limited here.
[0072] In this embodiment of the disclosure, the thickness of the metal layer 211 ranges from 30 angstroms to 200 angstroms along a direction perpendicular to the plane of the substrate 10.
[0073] For example, the thickness of the metal layer 211 prepared using Mo is 30 angstroms along the direction perpendicular to the plane of the substrate 10.
[0074] It should be noted that, in addition to the structures mentioned above, the display substrate provided in this embodiment may also include other film layer structures according to actual application needs. Specific settings can be implemented with reference to related technologies, and will not be described in detail here.
[0075] Based on the same disclosed concept, and referring to Figures 5 to 7, wherein Figure 5 is a top view of one embodiment of the display substrate provided by the present disclosure; Figure 6 is a cross-sectional view along the direction NN shown in Figure 5; and Figure 7 is a structural diagram of one anode 21 in Figure 6. Specifically, the display substrate includes:
[0076] A substrate 10, and a plurality of light-emitting units 20 arranged in an array on the substrate 10; each light-emitting unit 20 includes an anode 21, a light-emitting functional layer 22 and a cathode 23 disposed sequentially away from the substrate 10;
[0077] The anode 21 includes a metal layer 211, a reflective layer 212, and a transparent conductive layer 213 disposed sequentially away from the substrate 10; under wet etching process, the etching rate of the metal layer 211 is 0.
[0078] In a specific implementation, the display substrate includes a substrate 10 and a plurality of light-emitting units 20 arranged in an array on the substrate 10. For example, the substrate 10 can be a flexible substrate or a rigid substrate, without limitation. For example, the plurality of light-emitting units 20 can be two, three, or more, without limitation. For example, the plurality of light-emitting units 20 includes red light-emitting units, green light-emitting units, and blue light-emitting units, thereby ensuring the color display of the display substrate. Of course, the specific color of each light-emitting unit 20 can be set according to the actual application needs, without limitation. Each light-emitting unit 20 includes an anode 21, a light-emitting functional layer 22, and a cathode 23 disposed sequentially away from the substrate 10. For example, the light-emitting functional layer 22 includes a hole injection layer, a hole transport layer, a light-emitting material layer, an electron transport layer, and an electron injection layer sequentially stacked along the direction away from the substrate 10. For example, the light-emitting unit 20 may be at least one of organic light-emitting diode (OLED), quantum dot light-emitting diode (QLED), micro LED, and mini LED.
[0079] Furthermore, in this embodiment, the anode 21 includes a metal layer 211, a reflective layer 212, and a transparent conductive layer 213 disposed sequentially away from the substrate 10; under wet etching, the etching rate of the metal layer 211 is 0. Thus, during the fabrication of the anode 21 pattern using wet etching, the metal layer 211 cannot be etched at all. This reduces the total etching time to a certain extent, effectively reducing the etching deviation of the anode 21, thereby ensuring the arrangement of a larger number of anodes 21 within a limited space, which is beneficial for meeting the high pixel density design requirements of the display substrate.
[0080] In this embodiment of the disclosure, still referring to the exemplary embodiment shown in FIG7, the orthogonal projections of the transparent conductive layer 213 and the reflective layer 212 on the substrate 10 both fall completely within the area of the orthogonal projection of the metal layer 211 on the substrate 10.
[0081] In this embodiment of the present disclosure, the reflective layer 212 is 0 to 0.7 μm smaller than the metal layer 211.
[0082] For example, the reflective layer 212 is 0.5 μm smaller than the metal layer 211. Of course, the specific value of the smaller size of the reflective layer 212 compared to the metal layer 211 can be set according to the actual application needs, and is not limited here.
[0083] In this embodiment of the disclosure, the transparent conductive layer 213 is 0.05 μm to 0.1 μm smaller than the reflective layer 212.
[0084] For example, the transparent conductive layer 213 is 0.1 μm smaller than the reflective layer 212. Of course, the specific value of the smaller transparent conductive layer 213 compared to the reflective layer 212 can be set according to the actual application needs, and is not limited here.
[0085] In this embodiment of the disclosure, the thickness of the metal layer 211 is in the range of 30 angstroms to 100 angstroms along a direction perpendicular to the plane of the substrate 10.
[0086] For example, the thickness of the metal layer 211 is 100 angstroms along the direction perpendicular to the plane of the substrate 10. Of course, the specific value of the thickness of the metal layer 211 can be set according to the actual application needs, and is not limited here.
[0087] In this embodiment of the disclosure, the material of the metal layer 211 is Ti.
[0088] In this embodiment of the disclosure, the etching deviation of the anode 21 ranges from -0.7 μm to -0.5 μm.
[0089] For example, if the metal layer 211 in the stacked structure corresponding to the anode 21 is a Ti film with a thickness of 100 angstroms, the reflective layer 212 is an Ag film with a thickness of 1000 angstroms, and the transparent conductive layer 213 is an ITO film with a thickness of 70 angstroms, the SEM images of the anode 21 before and after etching are shown in Figures 8 and 9, respectively. Referring again to Figures 8 and 9, the pattern size DI CD before etching is 5.58 μm, and the pattern size FI CD after etching is 5.5 μm. Correspondingly, the etching deviation of the anode 21 is -0.08 μm; compared to the -1 μm etching deviation in the corresponding scheme in Figure 1, the etching deviation has been significantly reduced. In this way, the etching deviation of the anode 21 can be reduced to near zero, thereby ensuring that a larger number of anodes 21 can be arranged in a limited space, which is beneficial to meeting the design requirements of high pixel density of the display substrate.
[0090] In this embodiment of the disclosure, the interval between two adjacent anodes ranges from 1.8 μm to 4.4 μm.
[0091] For example, the spacing between two adjacent anodes 21 is 2 μm. This allows more light-emitting units 20 to be accommodated within the same display area, thereby improving the display resolution of the display substrate. Furthermore, a smaller spacing between two adjacent anodes 21 allows for smaller sizes of the light-emitting units 20 (especially sub-light-emitting units) while maintaining sufficient spacing to prevent optical crosstalk. Moreover, smaller light-emitting units 20 enable the display substrate to achieve a higher PPI within the same size, thus improving the display effect.
[0092] In this embodiment of the present disclosure, the interval between the two metal layers 211 corresponding to two adjacent anodes 21 is in the range of 1.8 μm to 2.2 μm.
[0093] For example, the spacing between the two metal layers 211 corresponding to two adjacent anodes 21 is 2 μm, and the spacing between the two transparent conductive layers 213 corresponding to the two adjacent anodes 21 is 4 μm. This smaller spacing between the two metal layers 211 ensures a more compact layout of the anodes 21, allowing more light-emitting units 20 to be accommodated within the same display area. This not only improves the display resolution but also provides a spatial advantage for highly integrated display substrates, supporting more complex display functions. Furthermore, the smaller spacing between the two metal layers 211 effectively ensures closer physical contact between the anodes 21 and adjacent electrodes such as source and drain electrodes, thereby increasing the overlap area; consequently, it reduces contact resistance, decreases power loss, improves the stability of current transmission, and ensures optimal display performance.
[0094] It should be noted that, in addition to the structures mentioned above, the display substrate provided in this embodiment may also include other film layer structures according to actual application needs. Specific settings can be implemented with reference to related technologies, and will not be described in detail here.
[0095] Based on the same disclosed concept, this disclosure also provides a display device. The principle of the display device in solving the problem is similar to that of the aforementioned display substrate. Therefore, the implementation of the display device can refer to the implementation of the aforementioned display substrate, and the repeated parts will not be described again.
[0096] In specific implementations, the display device provided in the embodiments of this disclosure can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, navigator, AR device, VR device, etc. Other essential components of this display device are those that should be understood by those skilled in the art, and will not be described in detail here, nor should they be construed as limiting this disclosure.
[0097] Based on the same disclosed concept, as shown in FIG10, this disclosure also provides a method for manufacturing a display substrate, the method comprising:
[0098] S101: On the substrate, a first film layer, a second film layer and a third film layer are formed sequentially.
[0099] S102: A full layer of photoresist is formed on the side of the third film layer opposite to the substrate;
[0100] S103: The photoresist is patterned using a photolithography process to form the desired pattern of the photoresist.
[0101] S104: Based on the photoresist with the desired pattern, and using a wet etching process, the first film layer, the second film layer, and the third film layer are processed to obtain the anode with the desired pattern; the anode includes a metal layer, a reflective layer, and a transparent conductive layer disposed sequentially away from the substrate;
[0102] S105: Remove the photoresist of the desired pattern, and sequentially form a light-emitting functional layer and a cathode on the side of the anode facing away from the substrate to obtain multiple light-emitting units arranged in an array; wherein each light-emitting unit includes the anode, the light-emitting functional layer and the cathode; under wet etching process, the etching rate of the transparent conductive layer and the reflective layer is in the range of 9nm / s to 11nm / s.
[0103] Taking the fabrication of the display substrate shown in Figure 3 as an example, the specific implementation process of steps S101 to S105 is explained below with reference to the process flow diagram shown in Figure 11:
[0104] First, a first film layer 30, a second film layer 40, and a third film layer 50 are sequentially formed on the substrate 10. For example, the material of the first film layer 30 is Mo, the material of the second film layer 40 is Ag, and the material of the third film layer 50 is ITO. Then, a full layer of photoresist 60 is formed on the side of the third film layer 50 facing away from the substrate 10. Then, based on the required anode 21 size, the photoresist 60 is patterned using a photolithography process to form the desired pattern of the photoresist 60. Then, based on the photoresist 60 with the desired pattern, the first film layer 30, the second film layer 40, and the third film layer 50 are processed using a wet etching process to obtain the anode 21 with the desired pattern. The anode 21 includes a metal layer 211, a reflective layer 212, and a transparent conductive layer 213 disposed sequentially away from the substrate 10. Since the etching rates of the transparent conductive layer 213 and the reflective layer 212 are both in the range of 9 nm / s to 11 nm / s under the wet etching process, and correspondingly, the etching rates of the transparent conductive layer 213 and the reflective layer 212 are approximately equal, this can reduce the overall etching time to a certain extent, thereby providing the possibility of reducing the etching deviation of the anode 21. In this way, it is guaranteed that a larger number of anodes 21 can be arranged in a limited space, which is beneficial to meeting the design requirements of high pixel density of the display substrate. The specific structure of the metal layer 211, the reflective layer 212, and the transparent conductive layer 213 can be referred to Figure 4 above. Then, the photoresist 60 with the desired pattern is removed, and a light-emitting functional layer 22 and a cathode 23 are sequentially formed on the side of the anode 21 facing away from the substrate 10, resulting in a plurality of light-emitting units 20 arranged in an array; wherein each light-emitting unit 20 includes an anode 21, a light-emitting functional layer 22, and a cathode 23. It should be noted that the specific fabrication process of the light-emitting functional layer 22 and the cathode 23 can be referred to the specific implementation of related technologies, and will not be described in detail here.
[0105] Based on the same disclosed concept, as shown in FIG12, this disclosure also provides a method for manufacturing a display substrate, the method comprising:
[0106] S201: On a substrate, a first film layer, a second film layer and a third film layer are formed sequentially.
[0107] S202: A full layer of photoresist is formed on the side of the third film layer facing away from the substrate;
[0108] S203: The photoresist is patterned using a photolithography process to form the desired pattern of the photoresist.
[0109] S204: Based on the photoresist with the desired pattern, and using a wet etching process, the second film layer and the third film layer are processed to obtain the reflective layer and the transparent conductive layer with the desired pattern, respectively; wherein, the etching rate of the first film layer is 0;
[0110] S205: The first film layer is processed using a dry etching process to obtain a metal layer with the desired pattern;
[0111] S206: Obtain an anode comprising the metal layer, the reflective layer, and the transparent conductive layer;
[0112] S207: Remove the photoresist of the desired pattern, and sequentially form a light-emitting functional layer and a cathode on the side of the anode facing away from the substrate to obtain multiple light-emitting units arranged in an array; wherein each light-emitting unit includes the anode, the light-emitting functional layer and the cathode.
[0113] Taking the fabrication of the display substrate shown in Figure 6 as an example, the specific implementation process of steps S201 to S207 will be explained in detail below with reference to the process flow diagram shown in Figure 13.
[0114] First, a first film layer 30, a second film layer 40, and a third film layer 50 are sequentially formed on a substrate 10. For example, the material of the first film layer 30 is Mo, the material of the second film layer 40 is Ag, and the material of the third film layer 50 is ITO. Then, a full layer of photoresist 60 is formed on the side of the third film layer 50 facing away from the substrate 10. Next, based on the desired anode 21 size, the photoresist 60 is patterned using a photolithography process to form the desired patterned photoresist 60. Then, based on the desired patterned photoresist 60, the second film layer 40 and the third film layer 50 are processed using a wet etching process. Since the etching rate of the first film layer 30 is 0 during the wet etching process, the first film layer 30 is not etched away during the entire process. In this way, by using a wet etching process, during the etching of the relevant film layers based on the photoresist 60 of the desired pattern, the side portions of the second film layer 40 and the third film layer 50 will be etched away, thereby obtaining the reflective layer 212 and the transparent conductive layer 213 of the desired pattern, respectively. Since the etching rate of the first film layer 30 is 0 under the wet etching process, only the second film layer 40 and the third film layer 50 need to be etched, thereby reducing the overall etching time and making it possible to reduce the etching deviation of the anode 21. In this way, it is possible to arrange a larger number of anodes 21 in a limited space, which is beneficial to meeting the design requirements of high pixel density of display substrates.
[0115] Furthermore, a dry etching process is used to process the first film layer 30 to obtain a metal layer 211 with the desired pattern. In this way, the pattern of the metal layer 211 can be approximately the same as the pattern of the photoresist 60 with the desired pattern. This effectively reduces the etching deviation before and after etching the anode 21, thereby ensuring that more anodes 21 can be arranged in a limited space, which is beneficial to meeting the design requirements of high pixel density of the display substrate.
[0116] Then, an anode 21 comprising a metal layer 211, a reflective layer 212, and a transparent conductive layer 213 can be obtained. Next, the photoresist 60 with the desired pattern is removed, and a light-emitting functional layer 22 and a cathode 23 are sequentially formed on the side of the anode 21 facing away from the substrate 10, resulting in a plurality of light-emitting units 20 arranged in an array, wherein each light-emitting unit 20 includes an anode 21, a light-emitting functional layer 22, and a cathode 23. It should be noted that the specific fabrication process of the light-emitting functional layer 22 and the cathode 23 can be referred to in the specific implementation of related technologies, and will not be detailed here.
[0117] Although preferred embodiments of this disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.
[0118] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.
Claims
1. A display substrate, wherein, include: A substrate, and multiple light-emitting units arranged in an array on the substrate; Each of the light-emitting units includes an anode, a light-emitting functional layer, and a cathode disposed sequentially away from the substrate; The anode comprises a metal layer, a reflective layer, and a transparent conductive layer disposed sequentially away from the substrate; under wet etching, the etching rates of the metal layer and the reflective layer are both in the range of 9 nm / s to 11 nm / s.
2. The display substrate as claimed in claim 1, wherein, The reflective layer and the metal layer are flush, and the orthogonal projection of the transparent conductive layer on the substrate falls entirely within the area of the orthogonal projection of the metal layer on the substrate.
3. The display substrate as described in claim 1 or 2, wherein, The transparent conductive layer is 0.1 μm to 0.2 μm smaller than the reflective layer.
4. The display substrate as described in claim 1 or 2, wherein, The etching deviation of the anode is in the range of -0.7μm to -0.5μm.
5. The display substrate as described in claim 1 or 2, wherein, The material of the metal layer is at least one of Mo, Cu, and Al.
6. The display substrate as described in claim 1 or 2, wherein, The thickness of the metal layer ranges from 30 angstroms to 200 angstroms along a direction perpendicular to the plane of the substrate.
7. A display substrate, wherein, include: A substrate, and multiple light-emitting units arranged in an array on the substrate; Each of the light-emitting units includes an anode, a light-emitting functional layer, and a cathode disposed sequentially away from the substrate; The anode comprises a metal layer, a reflective layer, and a transparent conductive layer disposed sequentially away from the substrate; under wet etching, the etching rate of the metal layer is 0.
8. The display substrate as claimed in claim 7, wherein, The orthogonal projections of the transparent conductive layer and the reflective layer onto the substrate both fall completely within the area of the orthogonal projection of the metal layer onto the substrate.
9. The display substrate as claimed in claim 7 or 8, wherein, The reflective layer is 0 to 0.7 μm smaller than the metal layer.
10. The display substrate as claimed in claim 7 or 8, wherein, The transparent conductive layer is 0.05 μm to 0.1 μm smaller than the reflective layer.
11. The display substrate as claimed in claim 7 or 8, wherein, The thickness of the metal layer ranges from 30 angstroms to 100 angstroms along a direction perpendicular to the plane of the substrate.
12. The display substrate as claimed in claim 7 or 8, wherein, The material of the metal layer is Ti.
13. The display substrate as claimed in claim 7 or 8, wherein, The spacing between two adjacent anodes ranges from 1.8 μm to 4.4 μm.
14. The display substrate as claimed in claim 13, wherein, The spacing between the two metal layers corresponding to two adjacent anodes ranges from 1.8 μm to 2.2 μm.
15. A display device, wherein, include: The display substrate as described in any one of claims 1-14.
16. A method for manufacturing a display substrate, wherein, include: On the substrate, a first film layer, a second film layer, and a third film layer are sequentially formed. A full layer of photoresist is formed on the side of the third film layer facing away from the substrate; The photoresist is patterned using a photolithography process to form the desired pattern. Based on the photoresist with the desired pattern, and using a wet etching process, the first film layer, the second film layer, and the third film layer are processed to obtain the anode with the desired pattern; the anode includes a metal layer, a reflective layer, and a transparent conductive layer disposed sequentially away from the substrate; The photoresist for the desired pattern is removed, and a light-emitting functional layer and a cathode are sequentially formed on the side of the anode facing away from the substrate to obtain multiple light-emitting units arranged in an array; wherein each light-emitting unit includes the anode, the light-emitting functional layer and the cathode; under wet etching process, the etching rate of the transparent conductive layer and the reflective layer is in the range of 9nm / s to 11nm / s.
17. A method for manufacturing a display substrate, wherein, include: On the substrate, a first film layer, a second film layer, and a third film layer are sequentially formed. A full layer of photoresist is formed on the side of the third film layer facing away from the substrate; The photoresist is patterned using a photolithography process to form the desired pattern. Based on the photoresist with the desired pattern, and using a wet etching process, the second and third film layers are processed to obtain the reflective layer and transparent conductive layer with the desired pattern, respectively; wherein, the etching rate of the first film layer is 0; The first film layer is processed using a dry etching process to obtain a metal layer with the desired pattern. An anode comprising the metal layer, the reflective layer, and the transparent conductive layer is obtained; The photoresist for the desired pattern is removed, and a light-emitting functional layer and a cathode are sequentially formed on the side of the anode facing away from the substrate to obtain multiple light-emitting units arranged in an array; wherein each light-emitting unit includes the anode, the light-emitting functional layer and the cathode.