Communication method, communication apparatus, storage medium, and program product

Abstract

A communication method, a communication apparatus, a storage medium, and a program product. The method is applied to a first node, and comprises: receiving first signaling sent by a second node, the first signaling being used for determining uplink transmission resource information of a passive Internet of things; and sending a first signal to the second node on the basis of the uplink transmission resource information.

Description

A communication method, communication device, storage medium, and program product.

[0001] This disclosure claims priority to Chinese patent application No. 202510382176.6, filed on March 27, 2025, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to the field of communication technology, and in particular to a communication method, communication device, storage medium, and program product. Background Technology

[0003] In passive internet of things (A-IoT) communication, the device-to-reader (D2R) link uses frequency division multiple access based on small frequency shift to support uplink access for multiple devices. Summary of the Invention

[0004] On the one hand, a communication method is provided, which is applied to a first node, including: receiving a first signaling sent by a second node, the first signaling being used to determine uplink transmission resource information of a passive Internet of Things; and sending a first signal to the second node based on the uplink transmission resource information.

[0005] On the other hand, a communication method is provided, which is applied to a second node, comprising: sending a first signaling, the first signaling being used to determine uplink transmission resource information of a passive Internet of Things; and receiving a first signal sent by one or more first nodes based on the uplink transmission resource information.

[0006] On the other hand, a communication device is provided for use in a first node, the device comprising: a receiving module and a transmitting module.

[0007] The receiving module is used to receive the first signaling sent by the second node, which is used to determine the uplink transmission resource information of the passive Internet of Things; the sending module is used to send the first signal to the second node based on the uplink transmission resource information.

[0008] On the other hand, a communication device is provided for use in a second node, the device comprising: a transmitting module and a receiving module.

[0009] The transmitting module is used to transmit the first signaling, which is used to determine the uplink transmission resource information of the passive Internet of Things; the receiving module is used to receive the first signal transmitted by one or more first nodes based on the uplink transmission resource information.

[0010] In another aspect, a communication device is provided, comprising: a memory and a processor. The memory and the processor are coupled. The memory is used to store a computer program. When the processor executes the computer program, it implements the aforementioned communication method.

[0011] In another aspect, a computer-readable storage medium is provided, on which computer program instructions are stored, which, when executed by a processor, implement the above-described communication method.

[0012] On the other hand, a computer program product is provided, which includes computer program instructions that, when executed, implement the above-described communication method. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in this disclosure, the accompanying drawings used in some embodiments of this disclosure will be briefly described below. Obviously, the drawings described below are merely drawings of some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings.

[0014] Figure 1 is an example diagram of an SFS waveform according to some embodiments.

[0015] Figure 2 is an architecture diagram of a communication system according to some embodiments.

[0016] Figure 3 is a flowchart of a communication method according to some embodiments.

[0017] Figure 4 is a flowchart of another communication method according to some embodiments.

[0018] Figure 5 is a flowchart of another communication method according to some embodiments.

[0019] Figure 6 is a block diagram of a communication device according to some embodiments.

[0020] Figure 7 is a block diagram of another communication device according to some embodiments.

[0021] Figure 8 is a block diagram of another communication device according to some embodiments. Detailed Implementation

[0022] The technical solutions of this disclosure will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0023] It should be noted that, in this disclosure, the words "exemplarily" or "for example" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "exemplarily" or "for example" in this disclosure should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of the words "exemplarily" or "for example" is intended to present the relevant concepts in a specific manner.

[0024] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.

[0025] In the description of this disclosure, unless otherwise stated, " / " means "or," for example, A / B can mean A or B. "And / or" in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. Furthermore, "at least one" means one or more, and "more than one" means two or more.

[0026] In A-IoT communication, the D2R link uses frequency division multiple access based on small frequency shift to support uplink access for multiple devices, and the multiple access transmission of the A-IoT uplink is pre-configured as frequency division multiple access.

[0027] Some IoT devices (referred to as Type 2 devices, device2, etc.) have energy storage units such as power supplies, possess strong processing capabilities, and can actively transmit frequency-shifted signals. Other IoT devices, limited by low power consumption, low complexity, and limited hardware performance (referred to as Type 1 devices, device1, etc.), transmit their signals uplink by backscattering the signal to be transmitted onto a carrier signal, employing a small frequency shift (SFS) frequency division multiple access scheme.

[0028] Among them, small frequency shift refers to the frequency offset relative to the carrier signal, which is different from the traditional frequency division multiple access that actively generates frequency shift signals (the traditional frequency shift is the frequency offset relative to the baseband signal).

[0029] For example, for uplink / D2R links, the reader needs to pre-configure parameters such as bit time duration, chip duration or chip length, and frequency shift factor R to configure the transmission bandwidth and frequency shift of the device's uplink access in order to separate the received multi-device aliased data.

[0030] In existing related technologies, the small frequency shift signal of the device is generated in the following way:

[0031] For small frequency shifts In D2R transmission, under on-off keying (OOK) modulation, bit 1 and bit 0 are mapped to 2R chips [0 1 0 1 …] and [1 0 1 0 …], respectively; under binary phase shift keying (BPSK) modulation, bit 1 and bit 0 are mapped to 2R chips [-1 +1 -1 +1 …] and [+1 -1 +1 -1 …], respectively.

[0032] Among them, T b This represents the duration corresponding to one bit, i.e., bit duration (if error correction coding is used, then the bit refers to the error-corrected bit); T c The D2R chip duration is given; the frequency shift factor R can be calculated by combining the chip duration and the bit duration, as shown in Formula 1 below:

[0033] Alternatively, when R=1, it is equivalent to using Manchester encoding on the bits, that is, mapping bit 1 to [0 1] or [-1 +1], and mapping bit 0 to [1 0] or [+1 -1].

[0034] For example, taking Manchester code as the waveform encoding pattern, Figure 1 shows an example diagram of an SFS waveform. By repeating each Manchester codeword (the codeword corresponding to bit 1 or bit 0) in a sequence R times within the same duration (i.e., bit duration Tb) with a small frequency offset, SFS waveforms with repetition patterns of 1, 2, 4, 8, and 16 can be obtained.

[0035] Furthermore, D2R transmission modes can include various bit durations, chip durations, and frequency shift factors. For example, available bit durations range from 1.67 microseconds (µs) to 266.67 µs, available chip durations range from 0.78 µs to 133.33 µs, and available frequency shift factors include positive integer values ​​such as 2, 4, and 8. Different combinations of bit durations, or chip durations, and frequency shift factors correspond to different double-sideband (DSB) transmission bandwidths. Different chip durations, or combinations of bit durations, and frequency shift factors correspond to different frequency shift amounts. The frequency shift amount and transmission bandwidth together determine the frequency domain resources for the device's uplink transmission.

[0036] In summary, the uplink transmission resources (such as uplink access bandwidth or frequency shift) of each device in the above-mentioned multi-device setup are pre-configured. With changes in the communication environment, the signal transmission of the D2R link may be affected by interference such as distortion and fading, and there may also be a risk of frequency domain resource collision between multiple devices.

[0037] Therefore, how to manage the uplink transmission resources of one or more devices to improve transmission efficiency and reduce collisions has become a technical problem that urgently needs to be solved.

[0038] Based on this, to solve the aforementioned technical problems, this disclosure provides a communication method applied to the uplink scenario of passive IoT D2R. In the uplink scenario of passive IoT D2R, the reader dynamically instructs one or more devices on parameters such as uplink transmission resources, configuring the uplink access transmission bandwidth and frequency shift for each device. This enables the anti-interference capability of signal transmission in the D2R link to synchronize with changes in the network environment, ensuring that the reader can accurately receive the signals sent by each device, improving transmission efficiency, and reducing collisions.

[0039] In this embodiment of the invention, the network architecture of the mobile communication network (including but not limited to second-generation mobile communication technology (2G), third-generation mobile communication technology (3G), fourth-generation mobile communication technology (4G), fifth-generation mobile communication technology (5G), and future mobile communication networks (such as the evolution of the fifth-generation mobile communication technology (5G-A), sixth-generation mobile communication technology (6G)), and seventh-generation mobile communication technology (7G)) may include at least a first communication node and a second communication node, which may be referred to as the first node and the second node, respectively.

[0040] For example, as shown in FIG2, an architecture diagram of a communication system provided in an embodiment of the present disclosure is provided. The communication system may include at least one first node (such as first node 201 and first node 202) and a second node 203. The first node 201, first node 202, and second node 203 are nodes in a passive Internet of Things (IoT), and the first node 201 and first node 202 are both uplink transmitting nodes in the passive IoT, while the second node 203 is an uplink receiving node in the passive IoT.

[0041] The second node 203 can send information indicating uplink transmission resources to the first node 201 and the first node 202 through signaling, manage the uplink transmission resources of the first node 201 and the first node 202, so that the first node 201 and the first node 202 can determine their respective transmission resources in the uplink transmission resources indicated by the second node 203, and interact with the second node 203 through frequency division multiple access uplink transmission.

[0042] In other words, when the downlink signaling sent by the second node 203 indicates multiple frequency domain resources, the uplink transmission of each first node (i.e., the first node 201 and the first node 202) is frequency division multiple access transmission, and one of the multiple frequency domain resources indicated by the downlink signaling sent by the second node 203 is selected for uplink transmission.

[0043] It should be noted that the first node 201 and the first node 202 can be user equipment nodes, such as passive IoT devices, tags, or terminals. The second node 203 can be a network device node, such as a base station, auxiliary node, intermediate node, or reader.

[0044] In this context, a base station (BS) can be a base station in LTE, Long Term Evolution Advanced (LTEA) or an evolved Node B (eNB or eNodeB), a base station device (gNB) in a 5G network, or a base station in a future communication system. Base stations can include various macro base stations, micro base stations, femtocell base stations, wireless remote extensions, reconfigurable intelligent surfaces (RISS), routers, relay stations, transmission and reception points (TRPs), receivers, access points (APs), wireless fidelity (Wi-Fi) devices, and other network-side equipment. A base station can sometimes also be referred to as a reader or reader used for communication with terminals.

[0045] A terminal can be a device with wireless transceiver capabilities. Terminals can be mobile phones, tablets, computers with wireless transceiver capabilities, virtual reality (VR) terminals, augmented reality (AR) terminals, wireless terminals in industrial control, wireless terminals in self-driving vehicles, wireless terminals in remote medical care, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, and so on. The embodiments of this disclosure do not limit the application scenarios. A terminal may also be referred to as a user, user equipment (UE), A-IoT device, access terminal, UE unit, UE station, mobile station, mobile station, remote station, transmitter, remote terminal, mobile device, UE terminal, wireless communication device, UE agent, or UE device, etc., and the embodiments of this disclosure do not limit this to these terms.

[0046] It should be noted that Figure 2 is only an exemplary framework diagram. The number of devices included in Figure 2 and the names of each device are not limited. In addition to the devices shown in Figure 2, the communication system may also include other devices, such as core network devices.

[0047] The application scenarios of the embodiments disclosed herein are not limited. The system architecture and business scenarios described in the embodiments of this disclosure are for the purpose of more clearly illustrating the technical solutions of the embodiments of this disclosure, and do not constitute a limitation on the technical solutions provided by the embodiments of this disclosure. As those skilled in the art will know, with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided by the embodiments of this disclosure are also applicable to similar technical problems.

[0048] Figure 3 shows a flowchart of a communication method. As shown in Figure 3, the communication method is applied to the first node and includes: S301-S302.

[0049] In S301, the first signaling sent by the second node is received.

[0050] The first signaling is used to determine the uplink transmission resource information for passive IoT.

[0051] It should be noted that the embodiments disclosed herein do not limit the first signaling. For example, the first signaling may be radio resource control (RRC) signaling. Another example is downlink control information (DCI). Yet another example is a medium access control element (MAC CE).

[0052] In some embodiments, the first signaling can be any one of the following 1.1-1.4:

[0053] 1.1 Frequency domain resource signaling for random access message 1 (message1, Msg1);

[0054] 1.2 Frequency domain resource signaling for random access message 3 (message3, Msg3);

[0055] 1.3 Frequency domain resource signaling for uplink service data;

[0056] 1.4 Frequency domain resource signaling corresponding to D2R messages.

[0057] In other words, the frequency domain resource signaling shown in 1.1 above is used to determine the uplink transmission resource information of Msg1.

[0058] Similarly, the frequency domain resource signaling shown in 1.2 above is used to determine the uplink transmission resource information of Msg3. The frequency domain resource signaling shown in 1.3 above is used to determine the uplink transmission resource information of uplink service data. The frequency domain resource signaling shown in 1.4 above is used to determine the uplink transmission resource information of D2R messages.

[0059] In some embodiments, the frequency domain resource signaling for Msg1 shown in 1.1 above can satisfy at least one of the following 2.1-2.4:

[0060] 2.1 The frequency domain resource signaling of Msg1 is transmitted in the paging message;

[0061] 2.2 The frequency domain resource signaling of Msg1 is transmitted in the paging message and the trigger message;

[0062] 2.3 The frequency domain resource signaling of Msg1 is transmitted in the paging message and / or trigger message, and if the frequency domain resource signaling of Msg1 is not present in the trigger message, the frequency domain resource of Msg1 is indicated by the paging message.

[0063] 2.4 The frequency domain resource signaling of Msg1 is transmitted in the paging message and / or trigger message, and if the frequency domain resource signaling of Msg1 exists in the trigger message, the frequency domain resource of Msg1 is indicated by the trigger message.

[0064] In the transmission method shown in 2.1 above, the frequency domain resource signaling of Msg1 can be transmitted only in the paging message.

[0065] For the transmission method shown in 2.2 above, the frequency domain resource signaling of Msg1 can be transmitted in the paging message or in the trigger message. Furthermore, if both the paging message and the trigger message transmit the frequency domain resource signaling of Msg1, then the frequency domain resources of Msg1 are indicated by the frequency domain resource signaling of Msg1 transmitted in the trigger message.

[0066] For the transmission method shown in 2.3 above, the frequency domain resource signaling of Msg1 can be transmitted in the paging message and can optionally be transmitted in the trigger message. Furthermore, if the trigger message does not transmit the frequency domain resource signaling of Msg1, then the frequency domain resources of Msg1 are indicated by the frequency domain resource signaling of Msg1 transmitted in the paging message.

[0067] Similarly, for the transmission method shown in 2.4 above, the frequency domain resource signaling of Msg1 can be transmitted in the paging message and can optionally be transmitted in the trigger message. Furthermore, if the frequency domain resource signaling of Msg1 is transmitted in the trigger message, then the frequency domain resources of Msg1 are indicated by the frequency domain resource signaling of Msg1 transmitted in the trigger message.

[0068] In other embodiments, the frequency domain resource signaling other than Msg1 (i.e., non-Msg1 frequency domain resource signaling) shown in 1.2-1.4 above is transmitted by a reader-to-device (R2D) message, and this R2D message is the last R2D message before the D2R message indicated by the other frequency domain resource signaling.

[0069] It should be noted that the D2R message indicated by other frequency domain resource signaling can be Msg3 in section 1.2 above. Alternatively, the D2R message indicated by other frequency domain resource signaling can be uplink service data in section 1.3 above. Or, the D2R message indicated by other frequency domain resource signaling can be the D2R message in section 1.4 above.

[0070] In some embodiments, the D2R message indicated by the frequency domain resource signaling of Msg3 shown in 1.2 above can be a random access message 2 (message, Msg2), that is, the frequency domain resource signaling of Msg3 is transmitted in Msg2.

[0071] It should be noted that the above Msg2 may include at least one of the following 3.1 and 3.2:

[0072] 3.1 A common chip duration indication and one or more non-common frequency shift factor indications;

[0073] 3.2 One or more non-public chip duration indications and one or more non-public frequency shift factor indications.

[0074] In this embodiment of the disclosure, uplink transmission resource information is used to determine the frequency shift and double-sideband transmission bandwidth of the first node transmitting the first signal to the second node.

[0075] Wherein, the frequency shift Δf is the frequency offset relative to the carrier frequency, determined by the chip duration T. c Determined, or determined by bit duration T b The frequency shift factor R is determined. The frequency shift Δf can be expressed as shown in Formula 2 below:

[0076] Furthermore, the double-sideband transmission bandwidth (DSB) can be determined by the chip duration T. c The frequency shift factor R is determined, or the bit duration T is determined. b It is determined that the double-sideband transmission bandwidth (DSB) can be expressed as shown in Formula 3 below:

[0077] Therefore, the uplink transmission resource configuration on which the first node sends the first signal to the second node is determined by at least two of the chip duration, bit duration, and frequency shift factor.

[0078] Therefore, the uplink transmission resource information determined by the first signaling may include at least one of the following 4.1-4.7:

[0079] 4.1 Chip duration;

[0080] 4.2 Frequency shift factor;

[0081] 4.3 The number of frequency shift factors selected;

[0082] 4.4 Selection interval of frequency shift factor;

[0083] 4.5 The maximum value of the frequency shift factor;

[0084] 4.6 Starting point for selecting the frequency shift factor;

[0085] 4.7 Bit Duration.

[0086] Specifically, for the content shown in 4.2 above, the uplink transmission resource information can directly indicate one or more frequency shift factors. For the content shown in 4.3-4.6 above, the uplink transmission resource information indicates one or more frequency shift factors from a set of frequency shift factors.

[0087] In other words, uplink transmission resource information can be used to determine a chip duration or bit duration and one or more frequency shift factors.

[0088] For example, in a single D2R transmission, if multiple first nodes send D2R messages / first signals, then the multiple first signals have the same bit duration T. b .

[0089] Alternatively, if the bit durations of all first signals are the same, the first signal with the larger frequency shift factor occupies the uplink transmission resources with a larger frequency.

[0090] In some embodiments, the maximum frequency shift factor in the aforementioned set of frequency shift factors is less than or equal to 256, and / or any frequency shift factor R in the aforementioned set of frequency shift factors. i and greater than R i Arbitrary frequency shift factor R j It meets at least one of the following conditions 5.1-5.6:

[0091] 5.1, R j >R i +2, so that R j The main lobe of the determined signal and R i The main lobe of a confirmed signal does not exhibit aliasing.

[0092] 5.2 This allows R to be used in the presence of sampling frequency offset (SFO). j The main lobe of the determined signal and R i The main lobe of the confirmed signal does not exhibit aliasing;

[0093] 5.3, R j >3·R i +2, or R i +2 <R j <3·R i -2, so that R j The main lobe of the determined signal and R i The main lobe and third harmonic of the confirmed signal do not exhibit aliasing.

[0094] 5.4 or This allows R to be in the presence of SFO. jThe main lobe of the determined signal and R i The main lobe and third harmonic of the confirmed signal do not exhibit aliasing.

[0095] 5.5, R j >5·R i +2, or R i +2 <R j <3·R i -2, or 3·R i +2 <R j <5·R i -2, so that R j The main lobe of the determined signal and R i The main lobe, third harmonic, and fifth harmonic of the determined signal do not exhibit aliasing;

[0096] 5.6 or or Make R j The main lobe of the determined signal and R i The main lobe, third harmonic, and fifth harmonic of the determined signal do not exhibit aliasing;

[0097] Here, 'a' is a numerical value used to indicate the size of the SFO, 0 ≤ a < 1, and a = 0 indicates that the SFO does not exist.

[0098] It should be noted that the difference between adjacent frequency shift factors can be larger to counteract the effect of SFO and to increase the guard interval of adjacent first signals in the spectrum.

[0099] Based on the above embodiments, Tables 1-3 below provide different T values. b The following R and T c The corresponding frequency shift, main lobe position (considering SFO), third harmonic (considering SFO), fifth harmonic (considering SFO), and three configurations of other R values ​​that are compatible with this R (i.e., configuration 1 shown in Table 1, configuration 2 shown in Table 2, and configuration 3 shown in Table 3).

[0100] The units for frequency shift Δf, main lobe position, third harmonic, and fifth harmonic are all kilohertz (kHz), and SFO is 1E5 parts per million (ppm), i.e., SFO = 1 × 10⁻⁵. 5 ppm, and the above a = SFO / 1E6 = 0.1; the compatibility of multiple Rs is considered in three cases, namely:

[0101] (1) The main lobe of a signal of R does not have spectral aliasing with the main lobes of other signals of R;

[0102] (2) The main lobe of a signal of one R does not have spectral aliasing with the main lobe and third harmonic of other signals of the same R;

[0103] (3) The main lobe of a signal of one R does not have spectral aliasing with the main lobe, third harmonic and fifth harmonic of other signals of the same R.

[0104] Understandably, due to T b T c R and R may have the conversion relationship shown in Formula 2 above (i.e. Therefore, given T b In this case, it can be based on T c The conversion relationship between R and T is used to derive a mutually compatible T from a mutually compatible R. c .

[0105] For example, for configuration 1 shown in Table 1 and configuration 2 shown in Table 2, when T b When the value is less than 8.33 μs, in order to ensure that the main lobe position (considering SFO), the third harmonic (considering SFO), and the fifth harmonic (considering SFO) do not overlap, there is no mutually compatible R. Therefore, the minimum T in Tables 1 and 2 is not specified. b Only up to 8.33us.

[0106] For configuration 3 shown in Table 3, when T b When the value is less than 4.17 μs, in order to ensure that the main lobe position (considering SFO), the third harmonic (considering SFO), and the fifth harmonic (considering SFO) do not overlap, there is no mutually compatible R. Therefore, the minimum T in Table 3 is... b Only up to 4.17us.

[0107] Alternatively, the three configurations mentioned above (i.e., configuration 1, configuration 2, and configuration 3) can be implemented by configuring only certain columns and rows. Or, the three configurations can also be implemented in other forms such as sets or data.

[0108] For example, when the sampling frequency of the first node is 1.92 MHz, the configuration 1 shown in Table 1 can be used.

[0109] Alternatively, if the sampling frequency of the first node is 2.4MHz, configuration 2 shown in Table 2 can be used.

[0110] Alternatively, if the sampling frequency of the first node is 3.84MHz, configuration 3 shown in Table 3 can be used.

[0111] Table 1 Configuration 1

[0112] Table 2 Configuration 2

[0113] Table 3 Configuration 3

[0114] In some embodiments, uplink transmission resource information is determined by first signaling and predefined information.

[0115] The predefined information may include at least one of the following 6.1-6.3:

[0116] 6.1 Subcarrier spacing;

[0117] 6.2 Bandwidth;

[0118] 6.3 Message Types.

[0119] It should be noted that the message types shown in 6.3 above may include at least one of the following: Msg1, Msg3, and non-access data messages.

[0120] Furthermore, the first signaling used to determine uplink transmission resource information may include at least one of the following 7.1-7.5:

[0121] 7.1 Chip duration indication information;

[0122] 7.2 Frequency shift factor indication information;

[0123] 7.3 Joint indication information of chip duration and frequency shift factor;

[0124] 7.4 Bit duration indication information;

[0125] 7.5 Joint indication information of bit duration and frequency shift factor.

[0126] In some embodiments, the chip duration indication information shown in 7.1 above is used to determine the chip duration, and the chip duration is associated with a predefined frequency shift factor. The predefined frequency shift factor is at least one of the following 8.1-8.6:

[0127] 8.1 The predefined frequency shift factor is 1;

[0128] 8.2 The predefined frequency shift factor is 2;

[0129] 8.3 The predefined frequency shift factor is the smallest frequency shift factor among multiple frequency shift factors;

[0130] 8.4 The predefined frequency shift factor is the largest frequency shift factor among multiple frequency shift factors;

[0131] 8.5 The predefined frequency shift factor is the first frequency shift factor among multiple frequency shift factors;

[0132] 8.6 The predefined frequency shift factor is the last of multiple frequency shift factors;

[0133] Among them, multiple frequency shift factors are determined or pre-configured by the first signaling.

[0134] In some embodiments, the chip duration indication information is used to indicate a chip duration in a pre-configured chip duration set. This pre-configured chip duration set can be a subset of the set {133.33,66.67,33.33,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04,0.69,0.52}, and the unit of each element in the chip duration set is µs; or, the pre-configured chip duration set can also be a subset of the set {2 / 15,1 / 15,1 / 30,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960,1 / 1440,1 / 1920}, and the unit of each element in the chip duration set is milliseconds (ms). For example, the pre-configured chip duration set can be {133.33,66.67,33.33,16.67,8.33,4.17,2.08,1.04} or {2 / 15,1 / 15,1 / 30,1 / 60,1 / 120,1 / 240,1 / 480,1 / 960}, or {133.33,66.67,33.33,11.11,5.56,2.78,1}. .39,0.69} or {2 / 15,1 / 15,1 / 30,1 / 90,1 / 180,1 / 360,1 / 720,1 / 1440}, or {66.67,33.33,16.67,11.11,5.56,2.78,1.39,1.04} or {1 / 15,1 / 30,1 / 60,1 / 90,1 / 180,1 / 360,1 / 720,1 / 960}.

[0135] Alternatively, the chip duration indication information is used to indicate a first scaling factor in a pre-configured first scaling factor set. This first scaling factor is used to determine the chip duration of D2R in conjunction with the chip duration of R2D, and the pre-configured first scaling factor set is a subset of the set {2,1,1 / 2,1 / 4,1 / 6,1 / 8,1 / 12,1 / 16,1 / 24,1 / 32,1 / 48,1 / 64,1 / 96,1 / 128}.

[0136] The chip duration of R2D can satisfy at least one of the following conditions: 9.1 and 9.2:

[0137] 9.1 The chip duration of R2D is the number of OFDM symbols indicated by the second node through signaling in the pre-configured set of OFDM symbols in the R2D chip. The pre-configured set of OFDM symbols in the R2D chip is a subset of the set {1,2,4,6,8,12,16,24,32}.

[0138] 9.2 The chip duration of R2D is the chip duration in the R2D message, and the R2D message is the last R2D message before the corresponding D2R message.

[0139] In some embodiments, the frequency shift factor indication information shown in 7.2 above is used to determine one or more frequency shift factors from a pre-configured set of frequency shift factors; and the frequency shift factor indication information may satisfy at least one of the following 10.1-10.8:

[0140] 10.1 The frequency shift factor indication information includes an index of one or more frequency shift factors;

[0141] 10.2 The frequency shift factor indication information includes a bit sequence, where each bit in the bit sequence corresponds to a frequency shift factor in a pre-configured set of frequency shift factors, and the value of the bit is used to indicate whether the corresponding frequency shift factor is selected;

[0142] 10.3 The frequency shift factor indication information includes the number of frequency shift factors selected;

[0143] 10.4 The frequency shift factor indication information includes the selection interval and the number of frequency shift factors selected;

[0144] 10.5 The frequency shift factor indication information includes the maximum value and the number of selected frequency shift factors;

[0145] 10.6 The frequency shift factor indication information includes the maximum value of the frequency shift factor and the selection interval;

[0146] 10.7 The frequency shift factor indication information includes the selection start point and selection interval of the frequency shift factor;

[0147] 10.8 The frequency shift factor indication information includes the selection start point, selection interval, and selection quantity of the frequency shift factor.

[0148] The pre-configured set of frequency shift factors can be a subset of any of the sets 11.1-11.10 below, and the order of the elements in any of the sets 11.1-11.10 can be arbitrary:

[0149] 11.1, {1,4,8,16,32,64,128,256};

[0150] 11.2, {2,8,16,32,64,128,256};

[0151] 11.3, {1,4,8,16,24,32,40,64,80,128,160,256};

[0152] 11.4、{1,4,8,16,32,48,64,96,128,192,256}

[0153] 11.5, {2,8,16,24,32,40,64,80,128,160,256};

[0154] 11.6, {2,8,16,24,32,48,64,96,128,196,256};

[0155] 11.7, {1,8,16,32,64,128,256};

[0156] 11.8, {2,16,32,64,128,256};

[0157] 11.9, {2,10,16,32,64,80,128,160,256};

[0158] 11.10, {1,2,8,16,32,64,128,256}.

[0159] For example, the pre-configured set of frequency shift factors can be {1,4,8,16,32,64,128,256}, or {2,8,16,32,64,128,256}, or {1,4,8,16,32,64,80,128}, or {1,4,8,16,32,64,96,128}, or {1,4,8,16,32,64,128,160}, or {1,8,16,32,64,128,160}, or {2,8,16,32,64,80,128,160}, or {2,10,16,32,64,80,128,160}.

[0160] Alternatively, the frequency shift factor indication information is used to determine one or more frequency shift factors from a pre-configured set of frequency shift factors corresponding to different chip durations or bit durations, or the frequency shift factor indication information is used to determine one or more frequency shift factors from a subset of the pre-configured set of frequency shift factors, and the frequency shift factor indication information can satisfy at least one of the following 12.1 and 12.2:

[0161] 12.1 The frequency shift factor indication information includes the selection interval of the frequency shift factor;

[0162] 12.2 The frequency shift factor indication information includes the number of frequency shift factors selected.

[0163] The set of frequency shift factors corresponding to different pre-configured chip durations or bit durations can be at least one of the following 13.1-13.14:

[0164] 13.1 The set of frequency shift factors corresponding to a bit duration of 266.67us or 4 / 15ms, or a chip duration of 133.33us or 2 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 66.67us or 1 / 15ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64,96,128,160} or a subset of the set {2,8,16,32,40,64,80,128,160}.

[0165] 13.2 The set of frequency shift factors corresponding to a bit duration of 133.33us or 2 / 15ms, or a chip duration of 66.67us or 1 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 33.33us or 1 / 30ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64,128} or a subset of the set {2,8,16,32,40,64,80,128}.

[0166] 13.3 The set of frequency shift factors corresponding to a bit duration of 66.67us or 1 / 15ms, or a chip duration of 33.33us or 1 / 30ms associated with a predefined frequency shift factor of 1, or a chip duration of 16.67us or 1 / 60ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64} or a subset of the set {2,8,16,32,40,64}.

[0167] 13.4 The set of frequency shift factors corresponding to a bit duration of 33.33us or 1 / 30ms, or a chip duration of 16.67us or 1 / 60ms associated with a predefined frequency shift factor of 1, or a chip duration of 8.33us or 1 / 120ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32} or a subset of the set {2,8,16,32}.

[0168] 13.5 The set of frequency shift factors corresponding to a bit duration of 22.22us or 1 / 45ms, or a chip duration of 11.11us or 1 / 90ms associated with a predefined frequency shift factor of 1, or a chip duration of 5.56us or 1 / 180ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16} or a subset of the set {2,8,16};

[0169] 13.6 The set of frequency shift factors corresponding to a bit duration of 16.67µs or 1 / 60ms, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 1, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16} or a subset of the set {2,8,16};

[0170] 13.7 The set of frequency shift factors corresponding to a bit duration of 11.11us or 1 / 90ms, or a chip duration of 5.56us or 1 / 180ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.78us or 1 / 360ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8} or a subset of the set {2,4,8};

[0171] 13.8 The set of frequency shift factors corresponding to a bit duration of 8.33us or 1 / 120ms, or a chip duration of 4.17us or 1 / 240ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.08us or 1 / 480ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8} or a subset of the set {2,4,8}.

[0172] 13.9 The set of frequency shift factors corresponding to a bit duration of 5.56µs or 1 / 180ms, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.39µs or 1 / 720ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4} or a subset of the set {2,4};

[0173] 13.10 The set of frequency shift factors corresponding to a bit duration of 4.17 μs or 1 / 240 ms, or a chip duration of 2.08 μs or 1 / 480 ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.04 μs or 1 / 960 ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4} or a subset of the set {2,4};

[0174] 13.11 The set of frequency shift factors corresponding to a bit duration of 2.78 μs or 1 / 360 ms, or a chip duration of 1.39 μs or 1 / 720 ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.69 μs or 1 / 1440 ms associated with a predefined frequency shift factor of 2, is set {1} or set {2}.

[0175] 13.12 The set of frequency shift factors corresponding to a bit duration of 2.08 μs or 1 / 480 ms, or a chip duration of 1.04 μs or 1 / 960 ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.52 μs or 1 / 1920 ms associated with a predefined frequency shift factor of 2, is set {1} or set {2}.

[0176] 13.13 The set of frequency shift factors corresponding to a bit duration of 1.39us or 1 / 720ms, or a chip duration of 0.69us or 1 / 1440ms associated with a predefined frequency shift factor of 1, is set {1};

[0177] The set of frequency shift factors corresponding to a 13.14-bit duration of 1.04µs or 1 / 960ms, or a chip duration of 0.52µs or 1 / 1920ms associated with a predefined frequency shift factor of 1, is set {1}.

[0178] A subset of the pre-configured frequency shift factor set is determined by the pre-configured frequency shift factor set shown in 11.1-11.10 above and the pre-configured maximum frequency shift factor corresponding to different code lengths or bit durations. That is, the subset of the pre-configured frequency shift factor set includes frequency shift factors in the pre-configured frequency shift factor set that do not exceed the maximum frequency shift factor corresponding to the first node chip duration or bit duration. The pre-configured maximum frequency shift factor corresponding to different chip durations or bit durations can be at least one of the following 14.1-14.14:

[0179] 14.1 The maximum frequency shift factor corresponding to a bit duration of 266.67µs or 4 / 15ms, or a chip duration of 133.33µs or 2 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 66.67µs or 1 / 15ms associated with a predefined frequency shift factor of 2, is 128, 192, or 256.

[0180] 14.2 The maximum frequency shift factor corresponding to a bit duration of 133.33us or 2 / 15ms, or a chip duration of 66.67us or 1 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 33.33us or 1 / 30ms associated with a predefined frequency shift factor of 2, is 64, 96, or 128.

[0181] 14.3 The maximum frequency shift factor corresponding to a bit duration of 66.67µs or 1 / 15ms, or a chip duration of 33.33µs or 1 / 30ms associated with a predefined frequency shift factor of 1, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 2, is 32, 48, or 64.

[0182] 14.4 The maximum frequency shift factor corresponding to a bit duration of 33.33us or 1 / 30ms, or a chip duration of 16.67us or 1 / 60ms associated with a predefined frequency shift factor of 1, or a chip duration of 8.33us or 1 / 120ms associated with a predefined frequency shift factor of 2, is 16, 24, or 32.

[0183] 14.5 The maximum frequency shift factor corresponding to a bit duration of 22.22µs or 1 / 45ms, or a chip duration of 11.11µs or 1 / 90ms associated with a predefined frequency shift factor of 1, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 2, is 10, 16, or 20.

[0184] 14.6 The maximum frequency shift factor corresponding to a bit duration of 16.67µs or 1 / 60ms, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 1, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 2, is 8, 12, or 16.

[0185] 14.7 The maximum frequency shift factor corresponding to a bit duration of 11.11 μs or 1 / 90 ms, or a chip duration of 5.56 μs or 1 / 180 ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.78 μs or 1 / 360 ms associated with a predefined frequency shift factor of 2, is 4, 8, or 10;

[0186] 14.8 The maximum frequency shift factor corresponding to a bit duration of 8.33us or 1 / 120ms, or a chip duration of 4.17us or 1 / 240ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.08us or 1 / 480ms associated with a predefined frequency shift factor of 2, is 4, 6, or 8;

[0187] 14.9 The maximum frequency shift factor corresponding to a bit duration of 5.56µs or 1 / 180ms, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.39µs or 1 / 720ms associated with a predefined frequency shift factor of 2, is 2 or 4;

[0188] 14.10 The maximum frequency shift factor corresponding to a bit duration of 4.17µs or 1 / 240ms, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.04µs or 1 / 960ms associated with a predefined frequency shift factor of 2, is 2 or 4;

[0189] 14.11. The maximum frequency shift factor corresponding to a bit duration of 2.78 μs or 1 / 360 ms, or a chip duration of 1.39 μs or 1 / 720 ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.69 μs or 1 / 1440 ms associated with a predefined frequency shift factor of 2, is 1 or 2.

[0190] 14.12. The maximum frequency shift factor corresponding to a bit duration of 2.08 μs or 1 / 480 ms, or a chip duration of 1.04 μs or 1 / 960 ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.52 μs or 1 / 1920 ms associated with a predefined frequency shift factor of 2, is 1 or 2.

[0191] 14.13. The maximum frequency shift factor corresponding to a bit duration of 1.39µs or 1 / 720ms, or a chip duration of 0.69µs or 1 / 1440ms associated with a predefined frequency shift factor of 1, is 1.

[0192] 14.14. The maximum frequency shift factor corresponding to a bit duration of 1.04µs or 1 / 960ms, or a chip duration of 0.52µs or 1 / 1920ms associated with a predefined frequency shift factor of 1, is 1.

[0193] In some embodiments, the joint indication information of chip duration and frequency shift factor shown in 7.3 above is used to indicate a combination of chip duration and frequency shift factor among a pre-configured combination of multiple chip durations and multiple frequency shift factors.

[0194] In some embodiments, the bit duration indication information shown in 7.4 above is used to indicate a bit duration in a pre-configured bit duration set. The pre-configured bit duration set can be a subset of the set {266.67,133.33,66.67,33.33,22.22,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04}, and the unit of each element in the bit duration set is us; or a subset of the set {4 / 15,2 / 15,1 / 15,1 / 30,1 / 45,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960}, and the unit of each element in the bit duration set is milliseconds (ms). For example, the pre-configured set of bit durations can be {266.67,133.33,66.67,33.33,16.67,8.33,4.17,2.08} or {4 / 15,2 / 15,1 / 15,1 / 30,1 / 60,1 / 120,1 / 240,1 / 480}, or {266.67,133.33,66.67,33.33,11.11,5.56,2.78,1.39} or {4 / 15,2 / 15,1 / 15,1 / 30,1 / 90,1 / 180,1 / 360,1 / 720}.

[0195] Alternatively, the bit duration indication information is used to indicate a second scaling factor in a pre-configured set of second scaling factors. The second scaling factor is used to determine the bit duration of D2R in conjunction with the chip duration of R2D. The pre-configured set of second scaling factors is a subset of the set {4,2,1,1 / 2,1 / 3,1 / 4,1 / 6,1 / 8,1 / 12,1 / 16,1 / 24,1 / 32,1 / 48,1 / 64,1 / 96,1 / 128}.

[0196] In some embodiments, the combined indication information of bit duration and frequency shift factor shown in 7.5 above is used to indicate a combination of bit duration and frequency shift factor among a pre-configured combination of multiple bit durations and multiple frequency shift factors.

[0197] The following describes, with reference to specific embodiments, how the first node determines the uplink transmission resource information in conjunction with the various indication information shown in 7.1-7.5 above.

[0198] Method 1: Determined by the frequency shift factor indication information shown in 7.2 above.

[0199] In some embodiments, the bit duration or chip duration of the first node can be the same as the bit duration or chip duration in the previous D2R message, such as the bit duration or chip duration of Msg3 being the same as the bit duration or chip duration of Msg1, while the frequency shift factor is determined by the frequency shift factor indication information.

[0200] The chip duration can be the chip duration when R=1, the chip duration when R=2, the chip duration corresponding to the smallest or largest R in {R} determined by the frequency shift factor indication information, the chip duration corresponding to the first or last R in {R} determined by the frequency shift factor indication information, or one of the chip durations corresponding to the smallest / largest / first / last R in a pre-configured set of {R}.

[0201] For example, chip duration T c,a It is R a The corresponding chip duration, then other R x Corresponding chip duration T c,x It can be calculated according to the following formula four.

[0202] In some embodiments, the frequency shift factor indication information is used to determine one or more frequency shift factors R, including one of the following 15.1-15.10:

[0203] 15.1. Pre-configure optional sets in R, indicated by indexes;

[0204] 15.2. Pre-configure the optional set of R, indicated by bit mapping;

[0205] 15.3. Pre-configure the selectable set of R, with the frequency shift factor indicating the number of selections;

[0206] 15.4. Pre-configure the selectable set of R, and the frequency shift factor indicator information indicates the selection interval and selection quantity;

[0207] 15.5. Pre-configure the selectable set of R, and the frequency shift factor indicator information indicates the maximum value of R and the number of selections;

[0208] 15.6. Pre-configure the selectable set of R, and the frequency shift factor indicator information indicates the maximum value of R and the selection interval;

[0209] 15.7. Pre-configure the selectable set of R, and the frequency shift factor indicator information indicates the selection start point and selection interval;

[0210] 15.8. Pre-configure the selectable set of R, and the frequency shift factor indicator information indicates the selection start point, selection interval, and selection quantity;

[0211] 15.9. Pre-configure a set of R values ​​corresponding to different chip durations or bit durations, or pre-configure a set of selectable R values ​​and the maximum frequency shift factor corresponding to different chip durations or bit durations, with the frequency shift factor indication information indicating the selection interval;

[0212] 15.10. Pre-configure a set of R values ​​corresponding to different chip durations or bit durations, or pre-configure a set of selectable R values ​​and the maximum frequency shift factor corresponding to different chip durations or bit durations. The frequency shift factor indicator information indicates the number of selections.

[0213] Among them, R in the pre-configured optional set can belong to the set {R=2} n |n=0,1,2,…} and its subsets can also belong to the set {R=1,R=2n|n=1,2,3,…} and its subsets.

[0214] In some embodiments, consider R to belong to the set {R = 2} n |n=0,1,2,…} and its subsets, and consider that adjacent values ​​of R arranged in ascending order satisfy R(i+1)>R(i)+2, so that the main lobe of the signal determined by R(i+1) does not overlap with the main lobe of the signal determined by R(i). The pre-configured optional set of R can be {1,4,8,16,32,64,128,256} and its subsets, or {2,8,16,32,64,128,256} and its subsets.

[0215] Furthermore, considering that R belongs to the set {R = 1, R = 2n | n = 1, 2, 3, ...} and its subsets, and considering that adjacent values ​​of R arranged in ascending order satisfy R(i+1) > R(i) + 2, so that the main lobe of the signal determined by R(i+1) does not overlap with the main lobe of the signal determined by R(i), the pre-configured optional set of R can also be {1, 4, 8, 16, 24, 32, 40, 64, 8}. {0,128,160,256} and its subsets, or {1,4,8,16,32,48,64,96,128,192,256} and its subsets, or {2,8,16,24,32,40,64,80,128,160,256} and its subsets, or {2,8,16,24,32,48,64,96,128,192,256}. For example, the pre-configured optional set of R can be {1,4,8,16,32,64,80,128}, or {1,4,8,16,32,64,96,128}, or {1,4,8,16,32,64,128,160}, or {2,8,16,32,64,80,128,160}.

[0216] In other embodiments, consider R to belong to the set {R = 2}. n|n=0,1,2,…} and subsets thereof, and it is considered that adjacent values of R arranged in ascending order satisfy R(i+1)>3*R(i)+2 or R(i)+2<R(i+1)<3*R(i)-2, so that there is no aliasing between the main lobe of the signal determined by R(i+1) and the main lobe and third harmonic of the signal determined by R(i). The pre-configured alternative set of R can be {1,8,16,32,64,128,256} and subsets thereof, or {2,16,32,64,128,256} and subsets thereof.

[0217] Further, it is considered that R belongs to the set {R=1,R=2n|n=1,2,3,…} and subsets thereof, and it is considered that adjacent values of R arranged in ascending order satisfy R(i+1)>3*R(i)+2 or R(i)+2<R(i+1)<3*R(i)-2, so that there is no aliasing between the main lobe of the signal determined by R(i+1) and the main lobe and third harmonic of the signal determined by R(i). The pre-configured alternative set of R can also be the set {2,10,16,32,64,80,128,160,256} and subsets thereof, for example, {2,10,16,32,64,80,128,160}.

[0218] In some embodiments, for the above 15.1, based on the pre-configured alternative set of R, the frequency shift factor indication information can indicate the frequency shift factor by an index.

[0219] In some embodiments, when the pre-configured alternative set of R is {R1,R2,R3,R4,…,Rn}, a corresponding index {Idx1,Idx2,…,Idxn} can be configured for each R in the set, which corresponds to each R in the pre-configured alternative set of R in order, that is, the index Idx1 is used to indicate R1, the index Idx2 is used to indicate R2, and so on.

[0220] wherein each index occupies bits. Then the frequency shift factor indication information can indicate one or more indexes, which is used to indicate one or more frequency shift factors.

[0221] Illustratively, when the pre-configured alternative set of R is {1,4,8,16,32,64,80,128}, and the corresponding indexes are {0,1,2,3,4,5,6,7}, the frequency shift factor indication information is 3 bits, which is used to indicate a frequency shift factor through an index, and is used for uplink transmission resource configuration of the Msg3 message. For example, when the frequency shift factor indication information is 000, the frequency shift factor indicated thereby is 1; when the frequency shift factor indication information is 001, the frequency shift factor indicated thereby is 4; when the frequency shift factor indication information is 010, the frequency shift factor indicated thereby is 8, and so on.

[0222] In some embodiments, for the foregoing 15.2, based on the pre-configured R candidate set, the frequency shift factor indication information may indicate the frequency shift factor through bit mapping.

[0223] In some embodiments, when the pre-configured R candidate set is {R1,R2,R3,R4,…,Rn}, the frequency shift factor indication information is n bits: b1b2b3…bn, which correspond to each R in the pre-configured R candidate set in order, that is, bit b1 is used to indicate R1, bit b2 is used to indicate R2, and so on. For 1≤i≤n, when bit bi is 1, it indicates that Ri is available, and when bit bi is 0, it indicates that Ri is unavailable; or, when bit bi is 0, it indicates that Ri is available, and when bit bi is 1, it indicates that Ri is unavailable.

[0224] For example, when the pre-configured R candidate set is {2,8,16,32,64,80,128,160}, the frequency shift factor indication information is 8 bits, which correspond to each R in the pre-configured R candidate set in order. When the bit is 1, it indicates that the corresponding R is available, and when the bit is 0, it indicates that the corresponding R is unavailable. For example, when the 8 bits are 10010101, it indicates that the four frequency shift factors are 2, 32, 80 and 160. Alternatively, when the bit is 0, it indicates that the corresponding R is available, and when the bit is 1, it indicates that the corresponding R is unavailable. For example, when the 8 bits are 10010101, it indicates that the four frequency shift factors are 8, 16, 64 and 128.

[0225] In some embodiments, for the foregoing 15.3, based on the pre-configured R candidate set, the frequency shift factor indication information indicates a selected number.

[0226] In some embodiments, when the pre-configured R candidate set is {R(1),R(2),R(3),R(4),…,R(n)}, the frequency shift factor indication information indicates a selected number h, and it is default to select the first h elements in the pre-configured R candidate set, then the frequency shift factors determined by the selected number h indicated by the frequency shift factor indication information are R(1), R(2), R(3), …, R(h).

[0227] Wherein, the selected number may be indicated by bits, and h<n, or, the selected number h may be indicated as one from the pre-configured selected number set {h}, and is indicated by bits, |{h}| represents the number of elements in the pre-configured selection interval set {h}.

[0228] For example, when the pre-configured selectable set of R is {256,2,64,160,40,128,32,80,16,8}, and the pre-configured selection quantity set {h} is {1,2,3,4,5,6,8,10}, the frequency shift factor indication information uses 3 bits to indicate the selection quantity. For instance, when the frequency shift factor indication information uses 3 bits to indicate a selection quantity of 4, the determined multiple frequency shift factors are 256, 2, 64, and 160.

[0229] In other embodiments, when the pre-configured optional set of R is {R(1),R(2),R(3),R(4),...,R(n)}, the frequency shift factor indication information indicates the selection quantity h, and by default, selection starts from the first element of the pre-configured optional set of R (i.e., R(1)). Then, the frequency shift factor determined by the selection quantity h indicated by the frequency shift factor indication information is the h elements R(1), R(1+g'), R(1+2g'), ...R(1+(h-1)g') selected from the first element of the optional set of R at equal intervals g'. When h=1, the determined frequency shift factor is R(1).

[0230] Among them, equal intervals The selection quantity h can be used The number of bits indicates that h ≤ n, or the number of selections h can be indicated from a pre-configured set of selections {h}, and is indicated by... Each bit indicates the number of elements in the pre-configured selection set {h}.

[0231] For example, when the pre-configured selectable set of R is {2,8,16,32,40,64,80,128,160,256}, and the pre-configured selection quantity set {h} is {1,2,3,4,5,6,8,10}, the frequency shift factor indication information uses 3 bits to indicate the selection quantity. For instance, when the frequency shift factor indication information uses 3 bits to indicate a selection quantity of 4, it is known that the selection interval g' = 3, and the determined multiple frequency shift factors are 2, 32, 80, and 256.

[0232] In some embodiments, for 15.4 above, the frequency shift factor indication information indicates the selection interval and selection quantity based on a pre-configured set of optional R.

[0233] In some embodiments, when the optional set of R pre-configured is {R(1), R(2), R(3), R(4), …, R(n)}, the frequency shift factor indication information indicates a selection interval g and a selection number h, and it is default to start selection from the first element of the pre-configured optional set of R (i.e., R(1)), then the frequency shift factors determined by the selection interval g and the selection number h indicated by the frequency shift factor indication information are R(1), R(1+g), R(1+2g), …, R(1+(h-1)*g).

[0234] wherein, the selection interval can be indicated by bits, and g ≤ n; or, the selection interval g can indicate one from a pre-configured selection interval set {g}, and is indicated by bits, where |{g}| represents the number of elements in the pre-configured selection interval set {g}; the selection number can be indicated by bits, and h < n; or, the selection number h can indicate one from a pre-configured selection number set {h}, and is indicated by bits, where |{h}| represents the number of elements in the pre-configured selection number set {h}.

[0235] For example, when the pre-configured optional set of R is {2, 8, 16, 32, 64, 128, 256}, the pre-configured selection interval set {g} is {1, 2, 3, 4}, and the pre-configured selection number set {h} is {2, 4, 5, 7}, then the frequency shift factor indication information uses 2 bits to indicate the selection interval and another 2 bits to indicate the selection number. For example, when the frequency shift factor indication information uses 2 bits to indicate that the selection interval is 2 and another 2 bits to indicate that the selection number is 4, the plurality of frequency shift factors determined thereby are 2, 16, 64, 256.

[0236] In some other embodiments, when the optional set of R pre-configured is {R(1), R(2), R(3), R(4), …, R(n)}, the frequency shift factor indication information indicates a selection interval g and a selection number h, wherein the selection interval g is used to select a first subset R(1), R(1+g), R(1+2g), … from the pre-configured optional set of R, and the selection number h is used to select the last h elements from the first subset as the indicated frequency shift factors.

[0237] wherein, the selection interval can be indicated by bits, and g ≤ n; or, the selection interval g can indicate one from a pre-configured selection interval set {g}, and is indicated by bits, where |{g}| represents the number of elements in the pre-configured selection interval set {g}; the selection number can be indicated by indicated by bits, and h<n, or, the selection number h can be indicated from a pre-configured selection number set {h}, and is indicated by bits, where |{h}| represents the number of elements in the pre-configured selection number set {h}.

[0238] For example, when the pre-configured R optional set is {2,8,16,32,64,128,256}, the pre-configured selection interval set {g} is {1,2,3,4}, the selection number is indicated by 3 bits, then the frequency shift factor indication information indicates the selection interval with 2 bits, and indicates the selection number with the other 3 bits. For example, when the frequency shift factor indication information indicates that the selection interval is 2 with 2 bits and the selection number is 2 with the other 3 bits, the determined multiple frequency shift factors are 64 and 256.

[0239] In some embodiments, for the above 15.5, based on the pre-configured R optional set, the frequency shift factor indication information indicates the maximum R value and the selection number.

[0240] In some embodiments, when the pre-configured R optional set is {R(1),R(2),R(3),R(4),…,R(n)}, the frequency shift factor indication information indicates the maximum R value and the selection number h, wherein the maximum R value is indicated by an index m (m≤n), and the maximum R value is used to select a first subset Rsub={Rsub(1), Rsub(2), Rsub(3), … Rsub(m)} from the pre-configured R optional set, wherein any element in the first subset Rsub does not exceed the indicated maximum R value R(m). Then the frequency shift factors determined by the maximum R value and the selection number h indicated by the frequency shift factor indication information are h elements Rsub(1), Rsub(1+g'), Rsub(1+2g'), … Rsub(1+(h-1)g') selected starting from the first element in the first subset at equal intervals g', satisfying 1+(h-1)g'≤m; or the first h elements Rsub(1), Rsub(2), … Rsub(h) in the first subset.

[0241] Wherein, the maximum R value can be indicated by bits; the equal interval the selection number h can be indicated by bits, and h≤m, or, the selection number h can be indicated from a pre-configured selection number set {h}, and is indicated by bits, where |{h}| represents the number of elements in the pre-configured selection number set {h}.

[0242] For example, when the pre-configured selectable set of R is {2, 8, 16, 32, 64, 128, 256}, the frequency shift factor indication information uses 3 bits to indicate the maximum value of R and 2 bits to indicate that the selection quantity is one of the pre-configured selection quantity sets {2, 3, 4, 6}, and elements are selected from the first subset determined by the maximum value of R at equal intervals. Therefore, when it indicates that the maximum value of R is 128 and the selection quantity is 3, the determined frequency shift factors are 2, 16, and 64.

[0243] In some embodiments, for 15.6 above, the frequency shift factor indication information indicates the maximum value of R and the selection interval based on a pre-configured set of optional R.

[0244] In some embodiments, when the pre-configured optional set of R is {R(1),R(2),R(3),R(4),…,R(n)}, the frequency shift factor indication information indicates the maximum value of R and the selection interval g, wherein the maximum value of R is indicated by index m (m≤n), and the maximum value of R is used to select the first subset Rsub={Rsub(1), Rsub(2), Rsub(3),…Rsub(m)} from the pre-configured optional set of R, wherein any element in the first subset Rsub does not exceed the indicated maximum value of R R(m). Then the frequency shift factor determined by the maximum value of R indicated by the frequency shift factor indication information and the selection interval g is the h elements Rsub(1), Rsub(1+g), Rsub(1+2g),…Rsub(1+(h-1)g) selected from the first element in the first subset according to the selection interval g, where 1+(h-1)g≤m.

[0245] Wherein, the maximum value of R can be used Each bit indicates the interval; the selection interval can be used... A bit indicator, and g ≤ m, or, the selection interval g can be indicated from a pre-configured selection interval set {g}, and used with Each bit indicates the number of elements in the pre-configured selection interval set {g}.

[0246] For example, when the pre-configured selectable set of R is {128,80,64,32,16,8,4,1}, the frequency shift factor indication information uses 3 bits to indicate the maximum value of R and 2 bits to indicate the selection quantity, which is one of the pre-configured selection interval sets {1,2,3,4}. Therefore, when it indicates that the maximum value of R is 80 and the selection interval is 4, the first subset is {80,64,32,16,8,4,1}, and the determined multiple frequency shift factors are 80 and 8.

[0247] In some embodiments, for 15.7 above, the frequency shift factor indication information indicates the selection start point and selection interval based on a pre-configured set of optional R.

[0248] In some embodiments, when the pre-configured optional R set is {R(1), R(2), R(3), R(4), …, R(n)}, the frequency shift factor indication information indicates the selected starting point a and the selected interval g, then the frequency shift factors determined by the selected starting point a and the selected interval g indicated by the frequency shift factor indication information are R(a), R(a+g), R(a+2*g), ….

[0249] Wherein, the selected starting point can be indicated by bits, and a < n; the indication mode of the selected interval is the same as the above 15.4 mode.

[0250] For example, when the pre-configured optional R set is {1, 4, 8, 16, 32, 40, 64, 80, 128, 160, 256}, and the selected starting point a is indicated by 1 bit; the pre-configured selected interval set {g} is {1, 2, 3, 4}, then the selected interval is indicated by 2 bits from the pre-configured selected interval set. For example, when the frequency shift factor indication information uses 1 bit to indicate that the selected starting point is 2, and uses another 2 bits to indicate that the selected interval is 3, the multiple determined frequency shift factors are 4, 32, 80, 256.

[0251] In some embodiments, for the above 15.8, based on the pre-configured optional R set, the frequency shift factor indication information indicates the selected starting point, the selected interval and the selected quantity.

[0252] In some embodiments, when the pre-configured optional R set is {R(1), R(2), R(3), R(4), …, R(n)}, the frequency shift factor indication information indicates the selected starting point a, the selected interval g and the selected quantity h, then the frequency shift factors determined by the selected starting point a, the selected interval g and the selected quantity h indicated by the frequency shift factor indication information are R(a), R(a+g), R(a+2g), …, R(a+(h-1)*g), and a+(h-1)*g ≤ n.

[0253] Wherein, the selected starting point can be indicated by bits, and a < n; the indication modes of the selected interval and the selected quantity are the same as the 2.4 mode.

[0254] In some other embodiments, when the pre-configured optional R set is {R(1), R(2), R(3), R(4), …, R(n)}, the frequency shift factor indication information indicates the selected starting point a, the selected interval g and the selected quantity h, wherein the selected starting point a and the selected interval g are used to select the first subset R(a), R(a+g), R(a+2g), … from the pre-configured optional R set, and the selected quantity h is used to select the last h elements from the first subset as the indicated frequency shift factors.

[0255] wherein, the selection of the starting point may be indicated by bits, and a < n; the selection interval may be indicated by bits, and g ≤ n, or the selection interval g may indicate one from a pre-configured set of selection intervals {g}, and is indicated by bits, where |{g}| represents the number of elements in the pre-configured set of selection intervals {g}; the selection number may be indicated by bits, and h < n, or the selection number h may indicate one from a pre-configured set of selection numbers {h}, and is indicated by bits, where |{h}| represents the number of elements in the pre-configured set of selection numbers {h}.

[0256] In some embodiments, for the pre-configured R value sets corresponding to different chip durations or bit durations in the foregoing 15.9 and 15.10, the configuration may be as shown in Table 4 below.

[0257] wherein, the order of elements in each set in the {R} column of the following table may be any order.

[0258] Further, in the implementation process, the pre-configured R value sets corresponding to different chip durations or bit durations may be some rows and / or some columns in Table 4.

[0259] Furthermore, the configuration in Table 4 may also be represented in the form of sets, mappings or other forms.

[0260] Table 4 Pre-configuration of R value sets corresponding to different chip durations or bit durations

[0261] In some embodiments, for the maximum frequency shift factors corresponding to different pre-configured chip durations or bit durations in the foregoing 15.9 and 15.10, the configuration may be as shown in Table 5 below.

[0262] Further, in the implementation process, the maximum R values corresponding to different pre-configured chip durations or bit durations may be some rows and / or some columns in Table 5.

[0263] Furthermore, the configuration in Table 5 may also be represented in the form of sets, mappings or other forms.

[0264] Table 5 Pre-configuration of maximum R corresponding to different chip durations or bit durations

[0265] In some embodiments, for 15.9 above, the frequency shift factor indication information indicates the selection interval based on a pre-configured set of R values ​​corresponding to different chip durations or bit durations, or based on a pre-configured set of selectable R values ​​and the maximum frequency shift factor corresponding to different chip durations or bit durations.

[0266] In this method, the bit duration or chip duration of the first node follows the bit duration or chip duration of the previous D2R message. For example, the bit duration or chip duration of Msg3 follows the bit duration or chip duration of Msg1, while the frequency shift factor is determined by the frequency shift factor indication information. The chip duration can be one of the following: the chip duration when R=1, the chip duration when R=2 (the chip duration corresponding to the smallest or largest R in {R} determined by the frequency shift factor indication information), or the chip duration corresponding to the first or last R in {R} determined by the frequency shift factor indication information.

[0267] In some embodiments, the R optional set corresponding to the bit duration or chip duration used by the first node is {R(1),R(2),R(3),R(4),…,R(n)}, or the R optional set is pre-configured as {R(1),R(2),R(3),R(4),…,R(p)}, and the maximum frequency shift factor corresponding to the chip duration or bit duration of the first node is pre-configured as Rx. Then, the subset of the R optional set determined based on the pre-configured R optional set and the maximum frequency shift factor corresponding to different chip durations or bit durations is {R(1),R(2),R(3),R(4),…,R(n)}, where for 1≤i≤n, R(i)≤Rx.

[0268] Furthermore, the frequency shift factor indication information indicates the selection interval g, and by default, the selection starts from the first element of the pre-configured selectable set R (i.e., R(1)). Then, the frequency shift factors determined by the selection interval g indicated by the frequency shift factor indication information are R(1), R(1+g), R(1+2g), ...

[0269] Among them, the selection interval can be used The selection interval g can be indicated by a bit, and g ≤ n, or the selection interval g can be indicated from a pre-configured selection interval set {g}, and is indicated by... Each bit indicates the number of elements in the pre-configured selection interval set {g}.

[0270] For example, if the first node uses the chip duration from the previous D2R message, where the chip duration is 8.33 (±1%) μs when R=2, then its pre-configured set of {R} can be {32, 16, 8, 2}. Furthermore, the frequency shift factor indication information indicates that when the selection interval is 2, the determined multiple frequency shift factors are 32 and 8.

[0271] For example, the first node uses the chip duration from the previous D2R message, where the chip duration is 66.67 (±1%) μs when R=2. Therefore, its pre-configured {R} set can be {2, 8, 16, 32, 64, 128, 256}. Furthermore, the pre-configured selection interval set {g} is {1, 2, 3, 6}, so the frequency shift factor indication information is 2 bits. When it indicates a selection interval of 3, the determined frequency shift factors are 2, 32, and 256.

[0272] In another example, the first node uses the chip duration from the previous D2R message, where the chip duration is 66.67 (±1%) μs when R=1. The pre-configured optional set of {R} is {1,4,8,16,32,40,64,80,128,160,256}, and the pre-configured maximum R corresponding to this chip duration is 96. Therefore, the subset of the determined optional set of {R} is {1,4,8,16,32,40,64,80}. Furthermore, the pre-configured selection interval set {g} is {1,2,3,6}, and the frequency shift factor indication information is 2 bits. When the indicated selection interval is 3, the determined multiple frequency shift factors are 1, 16, and 64.

[0273] In some embodiments, for 15.10 above, the frequency shift factor indication information indicates the number of selections based on a pre-configured set of R values ​​corresponding to different chip durations or bit durations, or based on a pre-configured set of selectable R values ​​and the maximum frequency shift factor corresponding to different chip durations or bit durations.

[0274] In this method, the bit duration or chip duration of the first node follows the bit duration or chip duration of the previous D2R message. For example, the bit duration or chip duration of Msg3 follows the bit duration or chip duration of Msg1, while the frequency shift factor is indicated by the frequency shift factor indication information. The chip duration can be one of the following: the chip duration when R=1, the chip duration when R=2, the chip duration corresponding to the smallest or largest R in {R} determined by the frequency shift factor indication information, or the chip duration corresponding to the first or last R in {R} determined by the frequency shift factor indication information.

[0275] In some embodiments, the R optional set corresponding to the bit duration or chip duration used by the first node is {R(1),R(2),R(3),R(4),…,R(n)}, or the R optional set is pre-configured as {R(1),R(2),R(3),R(4),…,R(p)}, and the maximum frequency shift factor corresponding to the chip duration or bit duration of the first node is pre-configured as Rx. Then, the subset of the R optional set determined based on the pre-configured R optional set and the maximum frequency shift factor corresponding to different chip durations or bit durations is {R(1),R(2),R(3),R(4),…,R(n)}, where for 1≤i≤n, R(i)≤Rx.

[0276] Furthermore, the frequency shift factor indication information indicates the selection quantity h, and by default, the selection starts from the first element of the pre-configured R optional set (i.e., R(1)). The frequency shift factor determined by the selection quantity h indicated by the frequency shift factor indication information is the first h elements R(1), R(2), ... R(h) in the R optional set.

[0277] Among them, the number h can be selected using The number of bits indicates that h ≤ n, or the number of selections h can be indicated from a pre-configured set of selections {h}, and is indicated by... Each bit indicates the number of elements in the pre-configured selection set {h}.

[0278] For example, the first node uses the chip duration from the previous D2R message, where the chip duration is the same as when R=1, which is 66.67 (±1%) μs. The pre-configured optional set of {R} is {1,4,8,16,32,40,64,80,128,160,256}, and the pre-configured maximum R corresponding to this chip duration is 96. Therefore, the subset of the determined optional set of {R} is {1,4,8,16,32,40,64,80}. Furthermore, the frequency shift factor indication information uses 3 bits to indicate the selection quantity. When the indicated selection quantity is 2, the determined multiple frequency shift factors are 1 and 4.

[0279] In other embodiments, when the R optional set corresponding to the bit duration or chip duration used by the first node is {R(1),R(2),R(3),R(4),...,R(n)}, the frequency shift factor indication information indicates the selection quantity h, and by default, the selection starts from the first element of the pre-configured R optional set (i.e., R(1)). Then, the frequency shift factor determined by the selection quantity h indicated by the frequency shift factor indication information is the h elements R(1), R(1+g'), R(1+2g'), ...R(1+(h-1)g') selected in the R optional set according to equal interval g'.

[0280] Among them, equal intervals The selection quantity h can be used The number of bits indicates that h ≤ n, or the number of selections h can be indicated from a pre-configured set of selections {h}, and is indicated by... Each bit indicates the number of elements in the pre-configured selection set {h}.

[0281] For example, the first node uses the chip duration from the previous D2R message, where the chip duration is 16.67 (±1%) μs when R=2. Therefore, its pre-configured {R} set can be {64, 32, 16, 8, 4, 2}. Furthermore, the pre-configured selection quantity set {h} is {1, 2, 3, 5}. When the frequency shift factor indication information is 2 bits, when it indicates a selection quantity of 1, the determined frequency shift factor is 64; when it indicates a selection quantity of 2, the determined frequency shift factors are 64 and 2; when it indicates a selection quantity of 3, the selection interval g'=2, so the determined frequency shift factors are 64, 16, and 4; when it indicates a selection quantity of 5, the selection interval g'=1, so the determined frequency shift factors are 64, 32, 16, 8, and 4.

[0282] Method 2: Determined by the chip duration indication information shown in 7.1 above.

[0283] In some embodiments, the first signaling determines the uplink transmission resource information by using chip duration indication information, that is, by pre-configuring a set of R values ​​corresponding to different chip durations and using chip duration indication information to indicate one of the chip durations.

[0284] The chip duration indicated by the chip duration indication information can be one of the following: chip duration when R=1, chip duration when R=2, chip duration corresponding to the smallest or largest R in the pre-configured R set, or chip duration corresponding to the first or last R in the pre-configured R set.

[0285] Furthermore, the chip duration and its pre-configured set of R values ​​constitute the uplink transmission resource information determined by the first signaling.

[0286] A set of R values ​​corresponding to different chip durations is pre-configured, as shown in Table 4. The order of elements in each set in the {R} column of Table 4 can be arbitrary.

[0287] Furthermore, in the implementation process, the set of R values ​​corresponding to different chip durations pre-configured can be certain rows and / or certain columns in Table 4.

[0288] Furthermore, the configuration in the table can also be implemented in the form of a set, a mapping, or other forms.

[0289] In some embodiments, the chip duration indication information indicates the chip duration in the following way: a pre-configured set of optional chip durations is configured, and the chip duration indication information indicates the duration of one chip in the set. The pre-configured set of optional chip durations can be the set {133.33,66.67,33.33,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04,0.69,0.52} (µs, ±1%) and its subsets, or the set {2 / 15,1 / 15,1 / 30,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960,1 / 1440,1 / 1920} (ms) and its subsets, and the elements in the set can be ordered in any order.

[0290] In other embodiments, chip duration indication information is used to determine chip duration, and the chip duration is proportional to the R2D chip duration: Tc = N1 * Tc R2D The scaling factor N1 can be pre-configured as {2,1,1 / 2,1 / 4,1 / 6,1 / 8,1 / 12,1 / 16,1 / 24,1 / 32,1 / 48,1 / 64,1 / 96,1 / 128} or a subset thereof, and the elements in the set can be ordered arbitrarily. Furthermore, the chip duration indication information can indicate one of the pre-configured scaling factors and be jointly determined with the R2D chip duration to determine the chip duration.

[0291] For example, chip duration T c,a It is R a The corresponding chip duration, then other R x Corresponding chip duration T c,x It can be calculated using Formula 4 above.

[0292] Method 3: Determined by combining the chip duration indication information shown in 7.1 and the frequency shift factor indication information shown in 7.2.

[0293] In some embodiments, the first signaling determines the uplink transmission resource information by means of chip duration indication information and frequency shift factor indication information. The chip duration indication information indicates one of the pre-configured optional chip duration sets, and the frequency shift factor indication information determines the frequency shift factor in the same way as in methods 15.1-15.9 of method one, which will not be described again.

[0294] The pre-configured optional chip duration set can be the set {133.33,66.67,33.33,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04,0.69,0.52}us (±1%) and its subsets, or the set {2 / 15,1 / 15,1 / 30,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960,1 / 1440,1 / 1920} (ms) and its subsets, and the order of the elements in the set can be arbitrary. The chip duration indicated by the chip duration indication information can be the chip duration when R=1, the chip duration when R=2, the chip duration corresponding to the smallest or largest R in the pre-configured R set, the chip duration corresponding to the first or last R in the pre-configured R set, or one of the chip durations corresponding to the smallest / largest / first / last R among multiple Rs determined by the frequency shift factor indication information.

[0295] For example, chip duration T c,a It is R a The corresponding chip duration, then other R x Corresponding chip duration T c,x It can be calculated using Formula 4 above.

[0296] Method 4: Determined by the combined indication information of chip duration and frequency shift factor shown in 7.3 above.

[0297] In some embodiments, the first signaling determines the uplink transmission resource information by means of joint indication information of chip duration and frequency shift factor, that is, a set of multiple combinations of chip duration and frequency shift factor is pre-configured, and one or more combinations in the set are indicated by the joint indication information of chip duration and frequency shift factor. Then, one or more combinations of chip duration and frequency shift factor are the uplink transmission resource information determined by the first signaling.

[0298] The set of pre-configured combinations (Tc,R) of multiple chip durations and frequency shift factors can be one of the following sets (Tc,R) 1-15:

[0299] (Tc,R) Set 1: {(133.33us,1),(66.67us,2),(33.33us,4),(16.67us,8),(8.33us,16),(4.17us,32),(2.08us,64),(1.04us,128),(0.52us,256)} and its subsets;

[0300] (Tc,R) set 2: {(66.67us,1),(33.33us,2),(16.67us,4),(8.33us,8),(4.17us,16),(2.08us,32),(1.04us,64),(0.52us,128)} and its subsets;

[0301] (Tc,R) set 3: {(33.33us,1),(16.67us,2),(8.33us,4),(4.17us,8),(2.08us,16),(1.04us,32),(0.52us,64)} and its subsets;

[0302] (Tc,R) set 4: {(16.67us,1),(8.33us,2),(4.17us,4),(2.08us,8),(1.04us,16),(0.52us,32)} and its subsets;

[0303] Set 5 of (Tc,R): {(11.11us,1),(5.56us,2),(2.78us,4),(1.39us,8),(0.69us,16)} and its subsets;

[0304] Set 6 (Tc,R): {(8.33us,1),(4.17us,2),(2.08us,4),(1.04us,8),(0.52us,16)} and its subsets;

[0305] Set 7 of (Tc,R): {(5.56us,1),(2.78us,2),(1.39us,4),(0.69us,8)} and its subsets;

[0306] The set 8 (Tc,R) consists of {(4.17us,1),(2.08us,2),(1.04us,4),(0.52us,8)} and its subsets;

[0307] Set 9 (Tc,R): {(2.78us,1),(1.39us,2),(0.69us,4)} and its subsets;

[0308] Set 10 (Tc,R): {(2.08us,1),(1.04us,2),(0.52us,4)} and its subsets;

[0309] Set 11 of (Tc,R): {(1.39us,1),(0.69us,2)} and its subsets;

[0310] Set 12 (Tc,R): {(1.04us,1),(0.52us,2)} and its subsets;

[0311] Set 13 (Tc,R): {(0.69us,1)};

[0312] Set 14 (Tc,R): {(0.52us,1)};

[0313] (Tc,R) set 15: The union of (Tc,R) sets 1 to 14 and its subsets.

[0314] Considering the accuracy of the first node, the Tc value in the (Tc,R) combinations in the above (Tc,R) sets 1 to x can be ±1%. Furthermore, the order of elements in the above 15 sets can be arbitrary.

[0315] Furthermore, a set of pre-configured combinations (Tc,R) of multiple chip durations and frequency shift factors can also be implemented in other forms such as tables and mappings.

[0316] Method 5: Determined by the bit duration indication information shown in 7.4 above.

[0317] In some embodiments, the uplink transmission resource information is determined by the bit duration indication information, that is, a set of R values ​​corresponding to different bit durations is pre-configured, and the bit duration indication information indicates one of the bit durations. Then the bit duration and its pre-configured set of R values ​​are the uplink transmission resource information determined by the first signaling.

[0318] A pre-configured set of R values ​​corresponding to different bit durations is shown in Table 4. The order of elements in each set within the {R} column of Table 4 can be arbitrary. Furthermore, in implementation, the pre-configured set of R values ​​corresponding to different bit durations can be certain rows and / or columns of Table 4. Even further, the configuration in the table can be implemented as sets, mappings, or other forms.

[0319] In some embodiments, the bit duration indication information indicates the bit duration by: pre-configuring an optional bit duration set, and the bit duration indication information indicating a bit duration in this set. The pre-configured optional bit duration set can be the set {266.67,133.33,66.67,33.33,22.22,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04}us(±1%) and its subsets, or the set {4 / 15,2 / 15,1 / 15,1 / 30,1 / 45,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960}ms and its subsets, and the order of the elements in the set can be arbitrary.

[0320] In other embodiments, bit duration indication information is used to determine bit duration, and the bit duration is proportional to the R2D chip duration: Tb = N² * Tc R2D The scaling factor N2 can be pre-configured as {4,2,1,1 / 2,1 / 3,1 / 4,1 / 6,1 / 8,1 / 12,1 / 16,1 / 24,1 / 32,1 / 48,1 / 64,1 / 96,1 / 128} or a subset thereof. The bit duration indication information can be indicated by an index from one of the pre-configured scaling factors and jointly determined with the R2D chip duration to determine the bit duration.

[0321] Furthermore, if the indicated bit duration is Tb, then the chip duration Tc corresponding to each R can be calculated according to the conversion relationship shown in Formula 2 (i.e. ).

[0322] Method 6: Determine by combining the bit duration indication information shown in 7.4 above and the frequency shift factor indication information shown in 7.2 above.

[0323] In some embodiments, the first signaling determines the uplink transmission resource information by means of bit duration indication information and frequency shift factor indication information. The bit duration indication information indicates one of the pre-configured optional bit duration sets, and the frequency shift factor indication information determines the frequency shift factor in the same way as in methods 15.1-15.9 of method one, which will not be described again.

[0324] The pre-configured optional bit duration set can be the set {266.67,133.33,66.67,33.33,22.22,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04} (us, ±1%) and its subsets, or the set {4 / 15,2 / 15,1 / 15,1 / 30,1 / 45,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960} ms and its subsets, and the order of the elements in the set can be arbitrary.

[0325] Furthermore, if the indicated bit duration is Tb, then the chip duration Tc corresponding to each R can be calculated according to the conversion relationship shown in Formula 2 (i.e. ).

[0326] Method 7: Determined by the combined indication information of bit duration and frequency shift factor shown in 7.5 above.

[0327] In some embodiments, the first signaling determines the uplink transmission resource information by means of a joint indication information of bit duration and frequency shift factor, that is, a set of multiple combinations of bit duration and frequency shift factor is pre-configured, and one or more combinations in the set are indicated by the joint indication information of bit duration and frequency shift factor. Then, one or more combinations of bit duration and frequency shift factor are the uplink transmission resource information determined by the first signaling.

[0328] The set of pre-configured combinations (Tb,R) of multiple bit durations and frequency shift factors can be one of the following sets (Tb,R) 1-15:

[0329] (Tb,R) Set 1: {(266.67us,1),(266.67us,2),(266.67us,4),(266.67us,8),(266.67us,16),(266.67us,32),(266.67us,64),(266.67us,128),(266.67us,256)} and its subsets;

[0330] Set 2 (Tb,R): {(133.33us,1),(133.33us,2),(133.33us,4),(133.33us,8),(133.33us,16),(133.33us,32),(133.33us,64),(133.33us,128)} and its subsets;

[0331] (Tb,R) set 3: {(66.67us,1),(66.67us,2),(66.67us,4),(66.67us,8),(66.67us,16),(66.67us,32),(66.67us,64)} and its subsets;

[0332] Set 4 of (Tb,R): {(33.33us,1),(33.33us,2),(33.33us,4),(33.33us,8),(33.33us,16),(33.33us,32)} and its subsets;

[0333] Set 5 of (Tb,R): {(22.22us,1),(22.22us,2),(22.22us,4),(22.22us,8),(22.22us,16)} and its subsets;

[0334] Set 6 of (Tb,R): {(16.67us,1),(16.67us,2),(16.67us,4),(16.67us,8),(16.67us,16)} and its subsets;

[0335] Set 7 (Tb,R): {11.11us,1),(11.11us,2),(11.11us,4),(11.11us,8)} and its subsets;

[0336] Set 8 (Tb,R): {(8.33us,1),(8.33us,2),8.33us,4),(0.52us,8)} and its subsets;

[0337] Set 9 (Tb,R): {(5.56us,1),(5.56us,2),(5.56us,4)} and its subsets;

[0338] The set 10 (Tb,R) consists of {4.17us,1), (4.17us,2), (4.17us,4)} and its subsets;

[0339] Set 11 of (Tb,R): {(2.78us,1),(2.78us,2)} and its subsets;

[0340] Set 12 (Tb,R): {(2.08us,1),(2.08us,2)} and its subsets;

[0341] Set 13 (Tb,R): {(1.39us,1)};

[0342] Set 14 (Tb,R): {(1.04us,1)};

[0343] (Tb,R) set 15: The union of (Tb,R) sets 1 to 14 and its subsets.

[0344] Considering the accuracy of the first node, the value of Tb in the (Tb,R) combinations in the above (Tb,R) sets 1 to x can be ±1%. Furthermore, the order of elements in the above 15 sets can be arbitrary.

[0345] Furthermore, a set of pre-configured combinations (Tb,R) of multiple chip durations and frequency shift factors can also be implemented in other forms such as tables and mappings.

[0346] Furthermore, based on (Tb,R), the first node can be determined by combining the conversion relationship shown in Formula 2 above (i.e. The chip duration Tc is calculated.

[0347] In S302, a first signal is sent to the second node based on the uplink transmission resource information.

[0348] In some embodiments, the first node may determine uplink transmission resource information based on the first signaling, generate a first signal, and send the first signal to the second node.

[0349] Understandably, in the uplink scenario of passive IoT D2R, the reader dynamically instructs one or more devices on parameters such as uplink transmission resources, and configures the uplink access transmission bandwidth and frequency shift for each device. This enables the anti-interference capability of signal transmission in the D2R link to be synchronized with changes in the network environment, ensuring that the reader can accurately receive the signals sent by each device, improving transmission efficiency and reducing collisions.

[0350] In some embodiments, the method by which uplink transmission resources are determined by frequency domain resource signaling of Msg1 differs from the method by which uplink transmission resources are determined by other frequency domain resource signaling besides Msg1.

[0351] In other words, the way Msg1 frequency domain resource signaling determines uplink transmission resource information can be different from the way non-Msg1 frequency domain resource signaling determines uplink transmission resource information.

[0352] For example, the frequency domain resource signaling of Msg1 can determine the first uplink transmission resource information by determining multiple frequency shift factors using frequency shift factor indication information (i.e., the methods corresponding to 15.2 to 15.9 in Method 1 above), or it can determine multiple uplink transmission resource configurations using Method 2 to Method 7; while the frequency domain resource signaling of Msg3 or other uplink data can determine the first uplink transmission resource information by indicating the index of R in Method 15.1 in Method 1 above, or it can be a combined indication method of Method 4 or Method 7.

[0353] For example, the frequency domain resource signaling of Msg3 can be transmitted by Msg2 message. The way Msg2 message determines the first uplink transmission resource information can be to indicate the frequency shift factor and chip duration / bit duration to each first node respectively, that is, there is frequency shift factor and chip duration / bit duration indication information after each RN16. Alternatively, it can indicate a common chip duration / bit duration to each first node and indicate each frequency shift factor respectively, that is, the common chip duration / bit duration indication information indicates a common chip duration / bit duration, and there is frequency shift factor indication information after each RN16.

[0354] In some embodiments, passive IoT can perform downlink transmission based on the OOK waveform of Discrete Fourier Transform (DFT) spread Orthogonal Frequency Division Multiplexing (DFT-s-OFDM), wherein the waveform generation step includes at least one of the following:

[0355] Step 1: Concatenate M time-domain OOK symbols together, where the M time-domain OOK symbols occupy the duration of one OFDM symbol, and the value of M is at least one of the following: {1, 2, 4, 6, 8, 12, 16, 24}.

[0356] Step 2: Divide the N' sampling points into M parts, each part corresponding to a time-domain OOK symbol, and one OOK symbol occupies L consecutive sampling points;

[0357] Step 3: Perform an N'-point DFT operation on the N'-length time-domain OOK signal to obtain the frequency-domain signal;

[0358] Step 4: Map the frequency domain signal obtained after the N'-point DFT operation onto X subcarriers, where X is the number of resource elements (REs) in the downlink transmission bandwidth, X = 12 * N. PRB , where N PRB This represents the number of physical resource blocks (PRBs) used for downlink signal transmission.

[0359] Step 5: Perform an N-point inverse discrete fourier transform (IDFT) to obtain the time-domain signal, where N is 2 to the power of n (i.e., 2^n), where n is an integer, or N is the number of inverse fast fourier transform (IFFT) points corresponding to the SCS or order of magnitude u configuration in the 5G new radio (NR).

[0360] It should be noted that during the downlink time-domain signal generation process, the number of sampling points N' of the DFT operation determines the number of sampling points occupied by each of the M chips and is related to the chip duration, as well as the method of mapping the frequency domain signal to the RE.

[0361] For example, if N' is not divisible by M, then the number of samples occupied by each time-domain OOK symbol needs to be defined.

[0362] For example, if N' equals X, the obtained frequency domain signal can be directly mapped to X REs; if N' is greater than X, then the obtained frequency domain signal needs to be spectrum shifted, and then the frequency domain signal at X positions around the center frequency needs to be mapped to X REs.

[0363] Therefore, a specific N' value needs to be defined based on the relationship between N' and M values ​​and the RE mapping operation to ensure that the reader and the device side have a consistent understanding of the downlink time domain signal.

[0364] In some embodiments, N' is not less than X and not greater than Y, where Y is the smallest integer value that is not less than N and is divisible by M, or Y is the largest integer value that is not greater than N and is divisible by M, or Y equals N.

[0365] In some embodiments, N' is an integer multiple of 12, or an integer multiple of X, or the smallest integer value not less than X and divisible by M, or the smallest integer value not greater than X and divisible by M, or the least common multiple of X and M, or the smallest integer value not less than N and divisible by X and M, or the largest integer value not greater than N and divisible by X and M.

[0366] In some embodiments, N' is N PRB Integer multiples of N, or N PRB And an integer multiple of M, or N PRB and an integer multiple of max(M,12).

[0367] In some embodiments, N' = M*N PRB , or N' = func(M, N PRB ), or N' = func(N,M), or N' = func(N,12,M), or N' = func(12,M,N PRB ), or N' = func(N, M, N PRB ), or N' = func(N, 12, N PRB ), or N' = func(N, 12, M, N PRB ), where func() means taking the least common multiple or least common divisor of the values ​​within the parentheses.

[0368] In some embodiments, Among them, P i Let I be a prime number not greater than the maximum number of downlink schedulable PRBs, where I is the number of all prime numbers between 1 and the maximum number of downlink schedulable PRBs, and a i It is an integer not less than 0.

[0369] For example, Where a0, a1, a2, a3, and a4 are integers not less than 0.

[0370] In some embodiments, when N' is not less than X, a spectrum shift is performed on the frequency domain signal obtained after DFT transformation, mapping the X-long frequency domain signal including the center frequency onto X RE resources; or, when N' is equal to X, the frequency domain signal obtained after DFT transformation is directly mapped onto X RE resources.

[0371] This disclosure also provides a communication method applied to a second node, as shown in FIG4. The communication method may include: S401-S402.

[0372] In S401, the first signaling is sent.

[0373] In some embodiments, the second node may broadcast the first signaling to multiple first nodes. Alternatively, the second node may send the first signaling to only one first node.

[0374] The first signaling is used to determine the uplink transmission resource information for passive IoT.

[0375] It should be noted that the description of the first signaling and uplink transmission resource information can be found in the above embodiments, and will not be repeated here.

[0376] In S402, based on uplink transmission resource information, a first signal sent by one or more first nodes is received.

[0377] The following describes the communication method provided in the above embodiment, taking the interaction between the first node and the second node as an example, as shown in Figure 5, including: S501-S504.

[0378] In S501, the second node sends the first signaling to the first node.

[0379] In S502, the first node receives the first signaling sent by the second node.

[0380] In S503, the first node sends a first signal to the second node based on the uplink transmission resource information.

[0381] In S504, the second node receives the first signal sent by the first node based on the uplink transmission resource information.

[0382] It is understood that, in order to achieve the above-mentioned functions, the communication device includes hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily recognize that, based on the algorithmic steps of the examples described in conjunction with the embodiments of this disclosure, this disclosure can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this disclosure.

[0383] This disclosure embodiment can divide the communication device into functional modules according to the above method embodiment. For example, each function can be divided into a separate functional module, or two or more functions can be integrated into one functional module. The integrated module can be implemented in hardware or software. It should be noted that the module division in this disclosure embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods. The following description uses the example of dividing each functional module according to each function.

[0384] Figure 6 is a block diagram of a communication device according to some embodiments. The communication device can be applied to a first node and execute the communication method shown in Figure 3 above, as well as the embodiment on the first node side in Figure 5. As shown in Figure 6, the communication device 600 includes a receiving module 601 and a transmitting module 602.

[0385] The receiving module 601 is used to receive the first signaling sent by the second node, the first signaling being used to determine the uplink transmission resource information of the passive Internet of Things; the sending module 602 is used to send the first signal to the second node based on the uplink transmission resource information.

[0386] In some embodiments, the first signaling is any one of the following:

[0387] Frequency domain resource signaling for random access message Msg1;

[0388] Frequency domain resource signaling for random access message Msg3;

[0389] Frequency domain resource signaling for uplink business data;

[0390] Frequency domain resource signaling corresponding to the device-to-reader (D2R) message.

[0391] In some embodiments, the frequency domain resource signaling of Msg1 satisfies at least one of the following:

[0392] The frequency domain resource signaling of Msg1 is transmitted in the paging message;

[0393] The frequency domain resource signaling of Msg1 is transmitted in the paging message and the trigger message, and the frequency domain resources of Msg1 are indicated by the trigger message;

[0394] The frequency domain resource signaling of Msg1 is transmitted in the paging message and / or trigger message, and if the frequency domain resource signaling of Msg1 is not present in the trigger message, the frequency domain resource of Msg1 is indicated by the paging message.

[0395] The frequency domain resource signaling of Msg1 is transmitted in the paging message and / or trigger message, and if the frequency domain resource signaling of Msg1 is present in the trigger message, the frequency domain resource of Msg1 is indicated by the trigger message.

[0396] In some embodiments, frequency domain resource signaling other than Msg1 is transmitted via reader-to-device R2D messages, and the R2D message is the last R2D message before the D2R message indicated by other frequency domain resource signaling.

[0397] In some embodiments, the frequency domain resource signaling of Msg3 is transmitted in random access message Msg2, which includes at least one of the following:

[0398] A public chip duration indication and one or more non-public frequency shift factor indications;

[0399] One or more non-public chip duration indications and one or more non-public frequency shift factor indications.

[0400] In some embodiments, the method by which uplink transmission resources are determined by frequency domain resource signaling of Msg1 differs from the method by which uplink transmission resources are determined by other frequency domain resource signaling besides Msg1.

[0401] In some embodiments, uplink transmission resource information includes at least one of the following:

[0402] Chip duration;

[0403] Frequency shift factor;

[0404] The number of frequency shift factors selected;

[0405] The selection interval of the frequency shift factor;

[0406] The maximum value of the frequency shift factor;

[0407] The starting point for selecting the frequency shift factor;

[0408] Bit duration.

[0409] In some embodiments, the uplink transmission resource information is determined by a first signaling and predefined information; the predefined information includes at least one of the following:

[0410] Subcarrier spacing;

[0411] bandwidth;

[0412] Message type, which includes at least one of the following: Msg1, Msg3, and non-access data message.

[0413] In some embodiments, the first signaling includes at least one of the following:

[0414] Frequency shift factor indication information;

[0415] Chip duration indication information;

[0416] Joint indication information of chip duration and frequency shift factor;

[0417] Bit duration indication information;

[0418] The combined indication information of bit duration and frequency shift factor.

[0419] In some embodiments, chip duration indication information is used to determine chip duration, which is associated with a predefined frequency shift factor, which is at least one of the following:

[0420] The predefined frequency shift factor is 1;

[0421] The predefined frequency shift factor is 2;

[0422] The predefined frequency shift factor is the smallest frequency shift factor among multiple frequency shift factors;

[0423] The predefined frequency shift factor is the largest frequency shift factor among multiple frequency shift factors;

[0424] The predefined frequency shift factor is the first frequency shift factor among multiple frequency shift factors;

[0425] The predefined frequency shift factor is the last of a plurality of frequency shift factors;

[0426] Among them, multiple frequency shift factors are determined or pre-configured by the first signaling.

[0427] In some embodiments, the chip duration indication information is used to indicate a chip duration in a pre-configured chip duration set. The pre-configured chip duration set is a subset of the set {133.33,66.67,33.33,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04,0.69,0.52}, and the unit of each element in the chip duration set is microseconds (µs); or a subset of the set {2 / 15,1 / 15,1 / 30,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960,1 / 1440,1 / 1920}, and the unit of each element in the chip duration set is milliseconds (ms).

[0428] In some embodiments, chip duration indication information is used to indicate a first scaling factor in a pre-configured first scaling factor set. The first scaling factor is used to determine the chip duration of D2R in conjunction with the chip duration of R2D. The pre-configured first scaling factor set is a subset of the set {2,1,1 / 2,1 / 4,1 / 6,1 / 8,1 / 12,1 / 16,1 / 24,1 / 32,1 / 48,1 / 64,1 / 96,1 / 128}.

[0429] In some embodiments, the chip duration of R2D satisfies at least one of the following:

[0430] The chip duration of R2D is indicated by the second node through signaling in the pre-configured set of OFDM symbols in the R2D chip, which is a subset of the set {1,2,4,6,8,12,16,24,32}.

[0431] The chip duration of R2D is the chip duration in the R2D message, and the R2D message is the last R2D message before the corresponding D2R message.

[0432] In some embodiments, the frequency shift factor indication information is used to determine one or more frequency shift factors from a pre-configured set of frequency shift factors; the frequency shift factor indication information satisfies at least one of the following:

[0433] The frequency shift factor indication information includes an index of one or more frequency shift factors;

[0434] The frequency shift factor indication information includes a bit sequence, where each bit in the bit sequence corresponds to a frequency shift factor in a pre-configured set of frequency shift factors, and the value of the bit is used to indicate whether the corresponding frequency shift factor is selected;

[0435] The frequency shift factor indication information includes the number of frequency shift factors selected;

[0436] The frequency shift factor indication information includes the selection interval and the number of frequency shift factors selected;

[0437] The frequency shift factor indication information includes the maximum value and the number of selected frequency shift factors;

[0438] The frequency shift factor indication information includes the maximum value of the frequency shift factor and the selection interval;

[0439] The frequency shift factor indication information includes the selection start point and selection interval of the frequency shift factor;

[0440] The frequency shift factor indication information includes the selection start point, selection interval, and selection quantity of the frequency shift factor.

[0441] In some embodiments, the frequency shift factor indication information is used to determine one or more frequency shift factors from a pre-configured set of frequency shift factors corresponding to different chip durations or bit durations, or the frequency shift factor indication information is used to determine one or more frequency shift factors from a subset of the pre-configured set of frequency shift factors; the frequency shift factor indication information satisfies at least one of the following:

[0442] The frequency shift factor indication information includes the selection interval of the frequency shift factor;

[0443] The frequency shift factor indication information includes the number of frequency shift factors selected.

[0444] In some embodiments, the pre-configured set of frequency shift factors is a subset of any of the following sets:

[0445] {1,4,8,16,32,64,128,256};

[0446] {2,8,16,32,64,128,256};

[0447] {1,4,8,16,24,32,40,64,80,128,160,256};

[0448] {1,4,8,16,32,48,64,96,128,192,256};

[0449] {2,8,16,24,32,40,64,80,128,160,256};

[0450] {2,8,16,24,32,48,64,96,128,192,256};

[0451] {1,8,16,32,64,128,256};

[0452] {2,16,32,64,128,256};

[0453] {2,10,16,32,64,80,128,160,256};

[0454] {1,2,8,16,32,64,128,256};

[0455] The order of elements in each set is arbitrary.

[0456] In some embodiments, the set of frequency shift factors corresponding to different pre-configured chip durations or bit durations includes at least one of the following:

[0457] The set of frequency shift factors corresponding to a bit duration of 266.67µs or 4 / 15ms, or a chip duration of 133.33µs or 2 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 66.67µs or 1 / 15ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64,96,128,160} or a subset of the set {2,8,16,32,40,64,80,128,160}.

[0458] The set of frequency shift factors corresponding to a bit duration of 133.33us or 2 / 15ms, or a chip duration of 66.67us or 1 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 33.33us or 1 / 30ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64,128} or a subset of the set {2,8,16,32,40,64,80,128}.

[0459] The set of frequency shift factors corresponding to a bit duration of 66.67µs or 1 / 15ms, or a chip duration of 33.33µs or 1 / 30ms associated with a predefined frequency shift factor of 1, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64} or a subset of the set {2,8,16,32,40,64}.

[0460] The set of frequency shift factors corresponding to a bit duration of 33.33µs or 1 / 30ms, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 1, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32} or a subset of the set {2,8,16,32}.

[0461] The set of frequency shift factors corresponding to a bit duration of 22.22µs or 1 / 45ms, or a chip duration of 11.11µs or 1 / 90ms associated with a predefined frequency shift factor of 1, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16} or a subset of the set {2,8,16}.

[0462] The set of frequency shift factors corresponding to a bit duration of 16.67µs or 1 / 60ms, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 1, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16} or a subset of the set {2,8,16}.

[0463] The set of frequency shift factors corresponding to a bit duration of 11.11µs or 1 / 90ms, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8} or a subset of the set {2,4,8}.

[0464] The set of frequency shift factors corresponding to a bit duration of 8.33µs or 1 / 120ms, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8} or a subset of the set {2,4,8}.

[0465] The set of frequency shift factors corresponding to a bit duration of 5.56µs or 1 / 180ms, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.39µs or 1 / 720ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4} or a subset of the set {2,4}.

[0466] The set of frequency shift factors corresponding to a bit duration of 4.17µs or 1 / 240ms, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.04µs or 1 / 960ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4} or a subset of the set {2,4}.

[0467] The set of frequency shift factors corresponding to a bit duration of 2.78 μs or 1 / 360 ms, or a chip duration of 1.39 μs or 1 / 720 ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.69 μs or 1 / 1440 ms associated with a predefined frequency shift factor of 2, is set {1} or set {2}.

[0468] The set of frequency shift factors corresponding to a bit duration of 2.08 μs or 1 / 480 ms, or a chip duration of 1.04 μs or 1 / 960 ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.52 μs or 1 / 1920 ms associated with a predefined frequency shift factor of 2, is set {1} or set {2}.

[0469] The set of frequency shift factors corresponding to a bit duration of 1.39µs or 1 / 720ms, or a chip duration of 0.69µs or 1 / 1440ms associated with a predefined frequency shift factor of 1, is set {1}.

[0470] The set of frequency shift factors corresponding to a bit duration of 1.04 μs or 1 / 960 ms, or a chip duration of 0.52 μs or 1 / 1920 ms associated with a predefined frequency shift factor of 1, is set {1}.

[0471] In some embodiments, a subset of the pre-configured frequency shift factor set is determined by the pre-configured frequency shift factor set and the pre-configured maximum frequency shift factor corresponding to different chip durations or bit durations, wherein the pre-configured maximum frequency shift factor corresponding to different code lengths or bit durations is at least one of the following:

[0472] The maximum frequency shift factor corresponding to a bit duration of 266.67µs or 4 / 15ms, or a chip duration of 133.33µs or 2 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 66.67µs or 1 / 15ms associated with a predefined frequency shift factor of 2, is 128, 192, or 256.

[0473] The maximum frequency shift factor corresponding to a bit duration of 133.33µs or 2 / 15ms, or a chip duration of 66.67µs or 1 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 33.33µs or 1 / 30ms associated with a predefined frequency shift factor of 2, is 64, 96, or 128.

[0474] The maximum frequency shift factor corresponding to a bit duration of 66.67µs or 1 / 15ms, or a chip duration of 33.33µs or 1 / 30ms associated with a predefined frequency shift factor of 1, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 2, is 32, 48, or 64.

[0475] The maximum frequency shift factor corresponding to a bit duration of 33.33µs or 1 / 30ms, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 1, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 2, is 16, 24, or 32.

[0476] The maximum frequency shift factor corresponding to a bit duration of 22.22µs or 1 / 45ms, or a chip duration of 11.11µs or 1 / 90ms associated with a predefined frequency shift factor of 1, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 2, is 10, 16, or 20.

[0477] The maximum frequency shift factor corresponding to a bit duration of 16.67µs or 1 / 60ms, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 1, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 2, is 8, 12, or 16.

[0478] The maximum frequency shift factor corresponding to a bit duration of 11.11µs or 1 / 90ms, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 2, is 4, 8, or 10.

[0479] The maximum frequency shift factor corresponding to a bit duration of 8.33µs or 1 / 120ms, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 2, is 4, 6, or 8.

[0480] The maximum frequency shift factor corresponding to a bit duration of 5.56µs or 1 / 180ms, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.39µs or 1 / 720ms associated with a predefined frequency shift factor of 2, is 2 or 4;

[0481] The maximum frequency shift factor corresponding to a bit duration of 4.17µs or 1 / 240ms, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.04µs or 1 / 960ms associated with a predefined frequency shift factor of 2, is 2 or 4.

[0482] The maximum frequency shift factor corresponding to a bit duration of 2.78µs or 1 / 360ms, or a chip duration of 1.39µs or 1 / 720ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.69µs or 1 / 1440ms associated with a predefined frequency shift factor of 2, is 1 or 2;

[0483] The maximum frequency shift factor corresponding to a bit duration of 2.08µs or 1 / 480ms, or a chip duration of 1.04µs or 1 / 960ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.52µs or 1 / 1920ms associated with a predefined frequency shift factor of 2, is 1 or 2;

[0484] The maximum frequency shift factor is 1, which corresponds to a bit duration of 1.39µs or 1 / 720ms, or a chip duration of 0.69µs or 1 / 1440ms associated with a predefined frequency shift factor of 1.

[0485] The maximum frequency shift factor is 1, which corresponds to a bit duration of 1.04 μs or 1 / 960 ms, or a chip duration of 0.52 μs or 1 / 1920 ms associated with a predefined frequency shift factor of 1.

[0486] In some embodiments, the maximum frequency shift factor in the frequency shift factor set is less than or equal to 256, and / or any frequency shift factor R in the frequency shift factor set. i and greater than R i Arbitrary frequency shift factor R j Meet at least one of the following:

[0487] R j >R i +2, so that R j The main lobe of the determined signal and R i The main lobe of the confirmed signal does not exhibit aliasing;

[0488] This allows R to be used in the case of sampling frequency deviation SFO. j The main lobe of the determined signal and R i The main lobe of the confirmed signal does not exhibit aliasing;

[0489] R j >3·R i +2, or R i +2 <R j <3·R i -2, so that R j The main lobe of the determined signal and R i The main lobe and third harmonic of the confirmed signal do not exhibit aliasing.

[0490] or This allows R to be in the presence of SFO. j The main lobe of the determined signal and R i The main lobe and third harmonic of the confirmed signal do not exhibit aliasing.

[0491] R j >5·R i +2, or R i +2 <R j <3·R i -2, or 3·R i +2 <R j <5·R i -2, so that R j The main lobe of the determined signal and R i The main lobe, third harmonic, and fifth harmonic of the determined signal do not exhibit aliasing;

[0492] or or Make R j The main lobe of the determined signal and R i The main lobe, third harmonic, and fifth harmonic of the determined signal do not exhibit aliasing;

[0493] Here, 'a' is a numerical value used to indicate the size of the SFO, 0 ≤ a < 1, and a = 0 indicates that the SFO does not exist.

[0494] In some embodiments, the joint indication information of chip duration and frequency shift factor is used to indicate a combination of chip duration and frequency shift factor among a plurality of pre-configured combinations of chip duration and multiple frequency shift factors.

[0495] In some embodiments, the bit duration indication information is used to indicate a bit duration in a pre-configured set of bit durations. The pre-configured set of bit durations is a subset of the set {266.67,133.33,66.67,33.33,22.22,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04}, and the unit of each element in the set of bit durations is μs; or a subset of the set {4 / 15,2 / 15,1 / 15,1 / 30,1 / 45,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960}, and the unit of each element in the set of bit durations is milliseconds (ms).

[0496] In some embodiments, bit duration indication information is used to indicate a second scaling factor in a pre-configured set of second scaling factors. The second scaling factor is used to determine the bit duration of D2R in conjunction with the chip duration of R2D. The pre-configured set of second scaling factors is a subset of the set {4,2,1,1 / 2,1 / 3,1 / 4,1 / 6,1 / 8,1 / 12,1 / 16,1 / 24,1 / 32,1 / 48,1 / 64,1 / 96,1 / 128}.

[0497] In some embodiments, the joint indication information of bit duration and frequency shift factor is used to indicate a combination of bit duration and frequency shift factor among a pre-configured combination of multiple bit durations and multiple frequency shift factors.

[0498] Figure 7 is a block diagram of another communication device according to some embodiments. The communication device can be applied to a second node and execute the communication method shown in Figure 4 above, as well as the embodiment on the second node side in Figure 5. As shown in Figure 7, the communication device 700 includes a transmitting module 701 and a receiving module 702.

[0499] The transmitting module 701 is used to transmit a first signaling message, which is used to determine the uplink transmission resource information of the passive Internet of Things; the receiving module 702 is used to receive a first signal transmitted by one or more first nodes based on the uplink transmission resource information.

[0500] In some embodiments, the first signaling is any one of the following:

[0501] Frequency domain resource signaling for random access message Msg1;

[0502] Frequency domain resource signaling for random access message Msg3;

[0503] Frequency domain resource signaling for uplink business data;

[0504] Frequency domain resource signaling corresponding to the device-to-reader (D2R) message.

[0505] In some embodiments, the frequency domain resource signaling of Msg1 satisfies at least one of the following:

[0506] The frequency domain resource signaling of Msg1 is transmitted in the paging message;

[0507] The frequency domain resource signaling of Msg1 is transmitted in the paging message and the trigger message, and the frequency domain resources of Msg1 are indicated by the trigger message;

[0508] The frequency domain resource signaling of Msg1 is transmitted in the paging message and / or trigger message, and if the frequency domain resource signaling of Msg1 is not present in the trigger message, the frequency domain resource of Msg1 is indicated by the paging message.

[0509] The frequency domain resource signaling of Msg1 is transmitted in the paging message and / or trigger message, and if the frequency domain resource signaling of Msg1 is present in the trigger message, the frequency domain resource of Msg1 is indicated by the trigger message.

[0510] In some embodiments, frequency domain resource signaling other than Msg1 is transmitted via reader-to-device R2D messages, and the R2D message is the last R2D message before the D2R message indicated by other frequency domain resource signaling.

[0511] In some embodiments, the frequency domain resource signaling of Msg3 is transmitted in random access message Msg2, which includes at least one of the following:

[0512] A public chip duration indication and one or more non-public frequency shift factor indications;

[0513] One or more non-public chip duration indications and one or more non-public frequency shift factor indications.

[0514] In some embodiments, the method by which uplink transmission resources are determined by frequency domain resource signaling of Msg1 differs from the method by which uplink transmission resources are determined by other frequency domain resource signaling besides Msg1.

[0515] In some embodiments, uplink transmission resource information includes at least one of the following:

[0516] Chip duration;

[0517] Frequency shift factor;

[0518] The number of frequency shift factors selected;

[0519] The selection interval of the frequency shift factor;

[0520] The maximum value of the frequency shift factor;

[0521] The starting point for selecting the frequency shift factor;

[0522] Bit duration.

[0523] In some embodiments, the uplink transmission resource information is determined by a first signaling and predefined information; the predefined information includes at least one of the following:

[0524] Subcarrier spacing;

[0525] bandwidth;

[0526] Message type, which includes at least one of the following: Msg1, Msg3, and non-access data message.

[0527] In some embodiments, the first signaling includes at least one of the following:

[0528] Frequency shift factor indication information;

[0529] Chip duration indication information;

[0530] Joint indication information of chip duration and frequency shift factor;

[0531] Bit duration indication information;

[0532] The combined indication information of bit duration and frequency shift factor.

[0533] In some embodiments, chip duration indication information is used to determine chip duration, which is associated with a predefined frequency shift factor, which is at least one of the following:

[0534] The predefined frequency shift factor is 1;

[0535] The predefined frequency shift factor is 2;

[0536] The predefined frequency shift factor is the smallest frequency shift factor among multiple frequency shift factors;

[0537] The predefined frequency shift factor is the largest frequency shift factor among multiple frequency shift factors;

[0538] The predefined frequency shift factor is the first frequency shift factor among multiple frequency shift factors;

[0539] The predefined frequency shift factor is the last of a plurality of frequency shift factors;

[0540] Among them, multiple frequency shift factors are determined or pre-configured by the first signaling.

[0541] In some embodiments, the chip duration indication information is used to indicate a chip duration in a pre-configured chip duration set. The pre-configured chip duration set is a subset of the set {133.33,66.67,33.33,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04,0.69,0.52}, and the unit of each element in the chip duration set is microseconds (µs); or a subset of the set {2 / 15,1 / 15,1 / 30,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960,1 / 1440,1 / 1920}, and the unit of each element in the chip duration set is milliseconds (ms).

[0542] In some embodiments, chip duration indication information is used to indicate a first scaling factor in a pre-configured first scaling factor set. The first scaling factor is used to determine the chip duration of D2R in conjunction with the chip duration of R2D. The pre-configured first scaling factor set is a subset of the set {2,1,1 / 2,1 / 4,1 / 6,1 / 8,1 / 12,1 / 16,1 / 24,1 / 32,1 / 48,1 / 64,1 / 96,1 / 128}.

[0543] In some embodiments, the chip duration of R2D satisfies at least one of the following:

[0544] The chip duration of R2D is indicated by the second node through signaling in the pre-configured set of OFDM symbols in the R2D chip, which is a subset of the set {1,2,4,6,8,12,16,24,32}.

[0545] The chip duration of R2D is the chip duration in the R2D message, and the R2D message is the last R2D message before the corresponding D2R message.

[0546] In some embodiments, the frequency shift factor indication information is used to determine one or more frequency shift factors from a pre-configured set of frequency shift factors; the frequency shift factor indication information satisfies at least one of the following:

[0547] The frequency shift factor indication information includes an index of one or more frequency shift factors;

[0548] The frequency shift factor indication information includes a bit sequence, where each bit in the bit sequence corresponds to a frequency shift factor in a pre-configured set of frequency shift factors, and the value of the bit is used to indicate whether the corresponding frequency shift factor is selected;

[0549] The frequency shift factor indication information includes the number of frequency shift factors selected;

[0550] The frequency shift factor indication information includes the selection interval and the number of frequency shift factors selected;

[0551] The frequency shift factor indication information includes the maximum value and the number of selected frequency shift factors;

[0552] The frequency shift factor indication information includes the maximum value of the frequency shift factor and the selection interval;

[0553] The frequency shift factor indication information includes the selection start point and selection interval of the frequency shift factor;

[0554] The frequency shift factor indication information includes the selection start point, selection interval, and selection quantity of the frequency shift factor.

[0555] In some embodiments, the frequency shift factor indication information is used to determine one or more frequency shift factors from a pre-configured set of frequency shift factors corresponding to different chip durations or bit durations, or the frequency shift factor indication information is used to determine one or more frequency shift factors from a subset of the pre-configured set of frequency shift factors; the frequency shift factor indication information satisfies at least one of the following:

[0556] The frequency shift factor indication information includes the selection interval of the frequency shift factor;

[0557] The frequency shift factor indication information includes the number of frequency shift factors selected.

[0558] In some embodiments, the pre-configured set of frequency shift factors is a subset of any of the following sets:

[0559] {1,4,8,16,32,64,128,256};

[0560] {2,8,16,32,64,128,256};

[0561] {1,4,8,16,24,32,40,64,80,128,160,256};

[0562] {1,4,8,16,32,48,64,96,128,192,256};

[0563] {2,8,16,24,32,40,64,80,128,160,256};

[0564] {2,8,16,24,32,48,64,96,128,192,256};

[0565] {1,8,16,32,64,128,256};

[0566] {2,16,32,64,128,256};

[0567] {2,10,16,32,64,80,128,160,256};

[0568] {1,2,8,16,32,64,128,256};

[0569] The order of elements in each set is arbitrary.

[0570] In some embodiments, the set of frequency shift factors corresponding to different pre-configured chip durations or bit durations includes at least one of the following:

[0571] The set of frequency shift factors corresponding to a bit duration of 266.67µs or 4 / 15ms, or a chip duration of 133.33µs or 2 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 66.67µs or 1 / 15ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64,96,128,160} or a subset of the set {2,8,16,32,40,64,80,128,160}.

[0572] The set of frequency shift factors corresponding to a bit duration of 133.33us or 2 / 15ms, or a chip duration of 66.67us or 1 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 33.33us or 1 / 30ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64,128} or a subset of the set {2,8,16,32,40,64,80,128}.

[0573] The set of frequency shift factors corresponding to a bit duration of 66.67µs or 1 / 15ms, or a chip duration of 33.33µs or 1 / 30ms associated with a predefined frequency shift factor of 1, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64} or a subset of the set {2,8,16,32,40,64}.

[0574] The set of frequency shift factors corresponding to a bit duration of 33.33µs or 1 / 30ms, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 1, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32} or a subset of the set {2,8,16,32}.

[0575] The set of frequency shift factors corresponding to a bit duration of 22.22µs or 1 / 45ms, or a chip duration of 11.11µs or 1 / 90ms associated with a predefined frequency shift factor of 1, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16} or a subset of the set {2,8,16}.

[0576] The set of frequency shift factors corresponding to a bit duration of 16.67µs or 1 / 60ms, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 1, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16} or a subset of the set {2,8,16}.

[0577] The set of frequency shift factors corresponding to a bit duration of 11.11µs or 1 / 90ms, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8} or a subset of the set {2,4,8}.

[0578] The set of frequency shift factors corresponding to a bit duration of 8.33µs or 1 / 120ms, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8} or a subset of the set {2,4,8}.

[0579] The set of frequency shift factors corresponding to a bit duration of 5.56µs or 1 / 180ms, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.39µs or 1 / 720ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4} or a subset of the set {2,4}.

[0580] The set of frequency shift factors corresponding to a bit duration of 4.17µs or 1 / 240ms, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.04µs or 1 / 960ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4} or a subset of the set {2,4}.

[0581] The set of frequency shift factors corresponding to a bit duration of 2.78 μs or 1 / 360 ms, or a chip duration of 1.39 μs or 1 / 720 ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.69 μs or 1 / 1440 ms associated with a predefined frequency shift factor of 2, is set {1} or set {2}.

[0582] The set of frequency shift factors corresponding to a bit duration of 2.08 μs or 1 / 480 ms, or a chip duration of 1.04 μs or 1 / 960 ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.52 μs or 1 / 1920 ms associated with a predefined frequency shift factor of 2, is set {1} or set {2}.

[0583] The set of frequency shift factors corresponding to a bit duration of 1.39µs or 1 / 720ms, or a chip duration of 0.69µs or 1 / 1440ms associated with a predefined frequency shift factor of 1, is set {1}.

[0584] The set of frequency shift factors corresponding to a bit duration of 1.04 μs or 1 / 960 ms, or a chip duration of 0.52 μs or 1 / 1920 ms associated with a predefined frequency shift factor of 1, is set {1}.

[0585] In some embodiments, a subset of the pre-configured frequency shift factor set is determined by the pre-configured frequency shift factor set and the pre-configured maximum frequency shift factor corresponding to different chip durations or bit durations, wherein the pre-configured maximum frequency shift factor corresponding to different code lengths or bit durations is at least one of the following:

[0586] The maximum frequency shift factor corresponding to a bit duration of 266.67µs or 4 / 15ms, or a chip duration of 133.33µs or 2 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 66.67µs or 1 / 15ms associated with a predefined frequency shift factor of 2, is 128, 192, or 256.

[0587] The maximum frequency shift factor corresponding to a bit duration of 133.33µs or 2 / 15ms, or a chip duration of 66.67µs or 1 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 33.33µs or 1 / 30ms associated with a predefined frequency shift factor of 2, is 64, 96, or 128.

[0588] The maximum frequency shift factor corresponding to a bit duration of 66.67µs or 1 / 15ms, or a chip duration of 33.33µs or 1 / 30ms associated with a predefined frequency shift factor of 1, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 2, is 32, 48, or 64.

[0589] The maximum frequency shift factor corresponding to a bit duration of 33.33µs or 1 / 30ms, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 1, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 2, is 16, 24, or 32.

[0590] The maximum frequency shift factor corresponding to a bit duration of 22.22µs or 1 / 45ms, or a chip duration of 11.11µs or 1 / 90ms associated with a predefined frequency shift factor of 1, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 2, is 10, 16, or 20.

[0591] The maximum frequency shift factor corresponding to a bit duration of 16.67µs or 1 / 60ms, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 1, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 2, is 8, 12, or 16.

[0592] The maximum frequency shift factor corresponding to a bit duration of 11.11µs or 1 / 90ms, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 2, is 4, 8, or 10.

[0593] The maximum frequency shift factor corresponding to a bit duration of 8.33µs or 1 / 120ms, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 2, is 4, 6, or 8.

[0594] The maximum frequency shift factor corresponding to a bit duration of 5.56µs or 1 / 180ms, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.39µs or 1 / 720ms associated with a predefined frequency shift factor of 2, is 2 or 4;

[0595] The maximum frequency shift factor corresponding to a bit duration of 4.17µs or 1 / 240ms, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.04µs or 1 / 960ms associated with a predefined frequency shift factor of 2, is 2 or 4.

[0596] The maximum frequency shift factor corresponding to a bit duration of 2.78µs or 1 / 360ms, or a chip duration of 1.39µs or 1 / 720ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.69µs or 1 / 1440ms associated with a predefined frequency shift factor of 2, is 1 or 2;

[0597] The maximum frequency shift factor corresponding to a bit duration of 2.08µs or 1 / 480ms, or a chip duration of 1.04µs or 1 / 960ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.52µs or 1 / 1920ms associated with a predefined frequency shift factor of 2, is 1 or 2;

[0598] The maximum frequency shift factor is 1, which corresponds to a bit duration of 1.39µs or 1 / 720ms, or a chip duration of 0.69µs or 1 / 1440ms associated with a predefined frequency shift factor of 1.

[0599] The maximum frequency shift factor is 1, which corresponds to a bit duration of 1.04 μs or 1 / 960 ms, or a chip duration of 0.52 μs or 1 / 1920 ms associated with a predefined frequency shift factor of 1.

[0600] In some embodiments, the maximum frequency shift factor in the frequency shift factor set is less than or equal to 256, and / or any frequency shift factor R in the frequency shift factor set. i and greater than R i Arbitrary frequency shift factor R j Meet at least one of the following:

[0601] R j >R i +2, so that R j The main lobe of the determined signal and R i The main lobe of the confirmed signal does not exhibit aliasing;

[0602] This allows R to be used in the case of sampling frequency deviation SFO. jThe main lobe of the determined signal and R i The main lobe of the confirmed signal does not exhibit aliasing;

[0603] R j >3·R i +2, or R i +2 <R j <3·R i -2, so that R j The main lobe of the determined signal and R i The main lobe and third harmonic of the confirmed signal do not exhibit aliasing.

[0604] or This allows R to be in the presence of SFO. j The main lobe of the determined signal and R i The main lobe and third harmonic of the confirmed signal do not exhibit aliasing.

[0605] R j >5·R i +2, or R i +2 <R j <3·R i -2, or 3·R i +2 <R j <5·R i -2, so that R j The main lobe of the determined signal and R i The main lobe, third harmonic, and fifth harmonic of the determined signal do not exhibit aliasing;

[0606] or or Make R j The main lobe of the determined signal and R i The main lobe, third harmonic, and fifth harmonic of the determined signal do not exhibit aliasing;

[0607] Here, 'a' is a numerical value used to indicate the size of the SFO, 0 ≤ a < 1, and a = 0 indicates that the SFO does not exist.

[0608] In some embodiments, the joint indication information of chip duration and frequency shift factor is used to indicate a combination of chip duration and frequency shift factor among a plurality of pre-configured combinations of chip duration and multiple frequency shift factors.

[0609] In some embodiments, the bit duration indication information is used to indicate a bit duration in a pre-configured set of bit durations. The pre-configured set of bit durations is a subset of the set {266.67,133.33,66.67,33.33,22.22,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04}, and the unit of each element in the set of bit durations is μs; or a subset of the set {4 / 15,2 / 15,1 / 15,1 / 30,1 / 45,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960}, and the unit of each element in the set of bit durations is milliseconds (ms).

[0610] In some embodiments, bit duration indication information is used to indicate a second scaling factor in a pre-configured set of second scaling factors. The second scaling factor is used to determine the bit duration of D2R in conjunction with the chip duration of R2D. The pre-configured set of second scaling factors is a subset of the set {4,2,1,1 / 2,1 / 3,1 / 4,1 / 6,1 / 8,1 / 12,1 / 16,1 / 24,1 / 32,1 / 48,1 / 64,1 / 96,1 / 128}.

[0611] In some embodiments, the joint indication information of bit duration and frequency shift factor is used to indicate a combination of bit duration and frequency shift factor among a pre-configured combination of multiple bit durations and multiple frequency shift factors.

[0612] In implementing the functions of the integrated modules described above in hardware, this disclosure provides another structure for the communication device involved in the above embodiments. As shown in FIG8, the communication device 800 includes a processor 802 and a bus 804. In some embodiments, the communication device may further include a memory 801. In some embodiments, the communication device may further include a communication interface 803.

[0613] Processor 802 may implement or execute various exemplary logic blocks, modules, and circuits described in conjunction with embodiments of this disclosure. Processor 802 may be a central processing unit, a general-purpose processor, a digital signal processor, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It may implement or execute various exemplary logic blocks, modules, and circuits described in conjunction with embodiments of this disclosure. Processor 802 may also be a combination that implements computational functions, such as a combination of one or more microprocessors, a digital signal processor (DSP), and a microprocessor, etc.

[0614] The communication interface 803 is used to connect with other devices via a communication network. This communication network can be Ethernet, wireless access network, wireless local area network (WLAN), etc.

[0615] The memory 801 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), magnetic disk storage medium or other magnetic storage device, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but is not limited thereto.

[0616] In some embodiments, the memory 801 may exist independently of the processor 802. The memory 801 may be connected to the processor 802 via a bus 804 and is used to store instructions or program code. When the processor 802 calls and executes the instructions or program code stored in the memory 801, it can implement the communication method provided in the embodiments of this disclosure.

[0617] In other embodiments, memory 801 may also be integrated with processor 802.

[0618] The 804 bus can be an extended industry standard architecture (EISA) bus, etc. The 804 bus can be divided into address bus, data bus, control bus, etc. For ease of representation, only one thick line is used in Figure 8, but this does not mean that there is only one bus or one type of bus.

[0619] Some embodiments of this disclosure provide a computer-readable storage medium (e.g., a non-transitory computer-readable storage medium) storing computer program instructions that, when executed on a computer, cause the computer to perform the communication method as described in any of the above embodiments.

[0620] Exemplary examples show that the aforementioned computer-readable storage media may include, but are not limited to: magnetic storage devices (e.g., hard disks, floppy disks, or magnetic tapes), optical discs (e.g., compact disks (CDs), digital versatile disks (DVDs), etc.), smart cards, and flash memory devices (e.g., erasable programmable read-only memory (EPROMs), cards, sticks, or key drives, etc.). The various computer-readable storage media described in this disclosure may represent one or more devices and / or other machine-readable storage media for storing information. The term "machine-readable storage medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing, and / or carrying instructions and / or data.

[0621] This disclosure provides a computer program product containing instructions that, when run on a computer, cause the computer to perform the communication method shown in any of the embodiments described above.

[0622] The above descriptions are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions within the technical scope disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A communication method, wherein, Applied to the first node, the method includes: Receive the first signaling sent by the second node, the first signaling being used to determine the uplink transmission resource information of the passive Internet of Things; Based on the uplink transmission resource information, a first signal is sent to the second node.

2. The method according to claim 1, wherein, The first signaling is any one of the following: Frequency domain resource signaling for random access message Msg1; Frequency domain resource signaling for random access message Msg3; Frequency domain resource signaling for uplink business data; Frequency domain resource signaling corresponding to the device-to-reader (D2R) message.

3. The method according to claim 2, wherein, The frequency domain resource signaling of Msg1 satisfies at least one of the following: The frequency domain resource signaling of Msg1 is transmitted in the paging message; The frequency domain resource signaling of Msg1 is transmitted in the paging message and the trigger message, and the frequency domain resources of Msg1 are indicated by the trigger message; The frequency domain resource signaling of Msg1 is transmitted in the paging message and / or trigger message, and if the frequency domain resource signaling of Msg1 is not present in the trigger message, the frequency domain resource of Msg1 is indicated by the paging message. The frequency domain resource signaling of Msg1 is transmitted in paging messages and / or trigger messages, and if the frequency domain resource signaling of Msg1 exists in the trigger message, the frequency domain resource of Msg1 is indicated by the trigger message.

4. The method according to claim 2, wherein, Other frequency domain resource signaling, except for Msg1, is transmitted via reader-to-device R2D messages. The R2D message is the last R2D message before the D2R message indicated by the other frequency domain resource signaling.

5. The method according to claim 4, wherein, The frequency domain resource signaling of Msg3 is transmitted in random access message Msg2, wherein Msg2 includes at least one of the following: A public chip duration indication and one or more non-public frequency shift factor indications; One or more non-public chip duration indications and one or more non-public frequency shift factor indications.

6. The method according to claim 2, wherein, The method of determining the uplink transmission resources by the frequency domain resource signaling of Msg1 is different from the method of determining the uplink transmission resources by other frequency domain resource signaling besides Msg1.

7. The method according to claim 1, wherein, The uplink transmission resource information includes at least one of the following: Chip duration; Frequency shift factor; The number of frequency shift factors selected; The selection interval of the frequency shift factor; The maximum value of the frequency shift factor; The starting point for selecting the frequency shift factor; Bit duration.

8. The method according to claim 1, wherein, The uplink transmission resource information is determined by the first signaling and predefined information; the predefined information includes at least one of the following: Subcarrier spacing; bandwidth; The message type includes at least one of the following: Msg1, Msg3, and non-access data message.

9. The method according to claim 1, wherein, The first signaling includes at least one of the following: Frequency shift factor indication information; Chip duration indication information; Joint indication information of chip duration and frequency shift factor; Bit duration indication information; The combined indication information of bit duration and frequency shift factor.

10. The method according to claim 9, wherein, The chip duration indication information is used to determine the chip duration, which is associated with a predefined frequency shift factor, and the predefined frequency shift factor is at least one of the following: The predefined frequency shift factor is 1; The predefined frequency shift factor is 2; The predefined frequency shift factor is the smallest frequency shift factor among multiple frequency shift factors; The predefined frequency shift factor is the largest frequency shift factor among multiple frequency shift factors; The predefined frequency shift factor is the first frequency shift factor among a plurality of frequency shift factors; The predefined frequency shift factor is the last frequency shift factor among multiple frequency shift factors; The plurality of frequency shift factors are determined or pre-configured by the first signaling.

11. The method according to claim 10, wherein, The chip duration indication information is used to indicate a chip duration in a pre-configured chip duration set. The pre-configured chip duration set is a subset of the set {133.33,66.67,33.33,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04,0.69,0.52}, where the unit of each element in the chip duration set is microseconds (µs); or a subset of the set {2 / 15,1 / 15,1 / 30,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960,1 / 1440,1 / 1920}, where the unit of each element in the chip duration set is milliseconds (ms).

12. The method according to claim 10, wherein, The chip duration indication information is used to indicate a first scaling factor in a pre-configured first scaling factor set. The first scaling factor is used to determine the chip duration of D2R in combination with the chip duration of R2D. The pre-configured first scaling factor set is a subset of the set {2,1,1 / 2,1 / 4,1 / 6,1 / 8,1 / 12,1 / 16,1 / 24,1 / 32,1 / 48,1 / 64,1 / 96,1 / 128}.

13. The method according to claim 12, wherein, The chip duration of the R2D chip satisfies at least one of the following: The chip duration of the R2D is indicated by the second node through signaling in a pre-configured set of OFDM symbols in the R2D chip, which is a subset of the set {1,2,4,6,8,12,16,24,32}. The chip duration of the R2D is the chip duration in the R2D message, and the R2D message is the last R2D message before the corresponding D2R message.

14. The method according to claim 9, wherein, The frequency shift factor indication information is used to determine one or more frequency shift factors from a pre-configured set of frequency shift factors; the frequency shift factor indication information satisfies at least one of the following: The frequency shift factor indication information includes an index of one or more frequency shift factors; The frequency shift factor indication information includes a bit sequence, where one bit in the bit sequence corresponds to one frequency shift factor in the pre-configured frequency shift factor set, and the value of the bit is used to indicate whether the corresponding frequency shift factor is selected; The frequency shift factor indication information includes the number of frequency shift factors selected; The frequency shift factor indication information includes the selection interval and the number of frequency shift factors selected; The frequency shift factor indication information includes the maximum value and the number of selected frequency shift factors; The frequency shift factor indication information includes the maximum value of the frequency shift factor and the selection interval; The frequency shift factor indication information includes the selection start point and selection interval of the frequency shift factor; The frequency shift factor indication information includes the selection start point, selection interval, and selection quantity of the frequency shift factor.

15. The method according to claim 9, wherein, The frequency shift factor indication information is used to determine one or more frequency shift factors from a pre-configured set of frequency shift factors corresponding to different chip durations or bit durations, or the frequency shift factor indication information is used to determine one or more frequency shift factors from a subset of the pre-configured set of frequency shift factors; the frequency shift factor indication information satisfies at least one of the following: The frequency shift factor indication information includes the selection interval of the frequency shift factor; The frequency shift factor indication information includes the number of frequency shift factors selected.

16. The method of claim 14, wherein, The pre-configured set of frequency shift factors is a subset of any of the following sets: {1,4,8,16,32,64,128,256}； {2,8,16,32,64,128,256}； {1,4,8,16,24,32,40,64,80,128,160,256}； {1,4,8,16,32,48,64,96,128,192,256}； {2,8,16,24,32,40,64,80,128,160,256}； {2,8,16,24,32,48,64,96,128,192,256}； {1,8,16,32,64,128,256}； {2,16,32,64,128,256}； {2,10,16,32,64,80,128,160,256}； {1,2,8,16,32,64,128,256}； The order of the elements in each set is arbitrary.

17. The method according to claim 15, wherein, The set of frequency shift factors corresponding to different pre-configured chip durations or bit durations includes at least one of the following: The set of frequency shift factors corresponding to a bit duration of 266.67µs or 4 / 15ms, or a chip duration of 133.33µs or 2 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 66.67µs or 1 / 15ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64,96,128,160} or a subset of the set {2,8,16,32,40,64,80,128,160}. The set of frequency shift factors corresponding to a bit duration of 133.33us or 2 / 15ms, or a chip duration of 66.67us or 1 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 33.33us or 1 / 30ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64,128} or a subset of the set {2,8,16,32,40,64,80,128}. The set of frequency shift factors corresponding to a bit duration of 66.67µs or 1 / 15ms, or a chip duration of 33.33µs or 1 / 30ms associated with a predefined frequency shift factor of 1, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32,40,64} or a subset of the set {2,8,16,32,40,64}. The set of frequency shift factors corresponding to a bit duration of 33.33µs or 1 / 30ms, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 1, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16,32} or a subset of the set {2,8,16,32}. The set of frequency shift factors corresponding to a bit duration of 22.22µs or 1 / 45ms, or a chip duration of 11.11µs or 1 / 90ms associated with a predefined frequency shift factor of 1, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16} or a subset of the set {2,8,16}. The set of frequency shift factors corresponding to a bit duration of 16.67µs or 1 / 60ms, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 1, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8,16} or a subset of the set {2,8,16}. The set of frequency shift factors corresponding to a bit duration of 11.11µs or 1 / 90ms, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8} or a subset of the set {2,4,8}. The set of frequency shift factors corresponding to a bit duration of 8.33µs or 1 / 120ms, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4,8} or a subset of the set {2,4,8}. The set of frequency shift factors corresponding to a bit duration of 5.56µs or 1 / 180ms, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.39µs or 1 / 720ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4} or a subset of the set {2,4}. The set of frequency shift factors corresponding to a bit duration of 4.17µs or 1 / 240ms, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.04µs or 1 / 960ms associated with a predefined frequency shift factor of 2, is a subset of the set {1,4} or a subset of the set {2,4}. The set of frequency shift factors corresponding to a bit duration of 2.78 μs or 1 / 360 ms, or a chip duration of 1.39 μs or 1 / 720 ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.69 μs or 1 / 1440 ms associated with a predefined frequency shift factor of 2, is set {1} or set {2}. The set of frequency shift factors corresponding to a bit duration of 2.08 μs or 1 / 480 ms, or a chip duration of 1.04 μs or 1 / 960 ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.52 μs or 1 / 1920 ms associated with a predefined frequency shift factor of 2, is set {1} or set {2}. The set of frequency shift factors corresponding to a bit duration of 1.39µs or 1 / 720ms, or a chip duration of 0.69µs or 1 / 1440ms associated with a predefined frequency shift factor of 1, is set {1}. The set of frequency shift factors corresponding to a bit duration of 1.04 μs or 1 / 960 ms, or a chip duration of 0.52 μs or 1 / 1920 ms associated with a predefined frequency shift factor of 1, is set {1}.

18. The method according to claim 15, wherein, A subset of the pre-configured frequency shift factor set is determined by the pre-configured frequency shift factor set and the maximum frequency shift factor corresponding to different pre-configured chip durations or bit durations, wherein the maximum frequency shift factor corresponding to different pre-configured chip durations or bit durations is at least one of the following: The maximum frequency shift factor corresponding to a bit duration of 266.67µs or 4 / 15ms, or a chip duration of 133.33µs or 2 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 66.67µs or 1 / 15ms associated with a predefined frequency shift factor of 2, is 128, 192, or 256. The maximum frequency shift factor corresponding to a bit duration of 133.33µs or 2 / 15ms, or a chip duration of 66.67µs or 1 / 15ms associated with a predefined frequency shift factor of 1, or a chip duration of 33.33µs or 1 / 30ms associated with a predefined frequency shift factor of 2, is 64, 96, or 128. The maximum frequency shift factor corresponding to a bit duration of 66.67µs or 1 / 15ms, or a chip duration of 33.33µs or 1 / 30ms associated with a predefined frequency shift factor of 1, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 2, is 32, 48, or 64. The maximum frequency shift factor corresponding to a bit duration of 33.33µs or 1 / 30ms, or a chip duration of 16.67µs or 1 / 60ms associated with a predefined frequency shift factor of 1, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 2, is 16, 24, or 32. The maximum frequency shift factor corresponding to a bit duration of 22.22µs or 1 / 45ms, or a chip duration of 11.11µs or 1 / 90ms associated with a predefined frequency shift factor of 1, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 2, is 10, 16, or 20. The maximum frequency shift factor corresponding to a bit duration of 16.67µs or 1 / 60ms, or a chip duration of 8.33µs or 1 / 120ms associated with a predefined frequency shift factor of 1, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 2, is 8, 12, or 16. The maximum frequency shift factor corresponding to a bit duration of 11.11µs or 1 / 90ms, or a chip duration of 5.56µs or 1 / 180ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 2, is 4, 8, or 10. The maximum frequency shift factor corresponding to a bit duration of 8.33µs or 1 / 120ms, or a chip duration of 4.17µs or 1 / 240ms associated with a predefined frequency shift factor of 1, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 2, is 4, 6, or 8. The maximum frequency shift factor corresponding to a bit duration of 5.56µs or 1 / 180ms, or a chip duration of 2.78µs or 1 / 360ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.39µs or 1 / 720ms associated with a predefined frequency shift factor of 2, is 2 or 4; The maximum frequency shift factor corresponding to a bit duration of 4.17µs or 1 / 240ms, or a chip duration of 2.08µs or 1 / 480ms associated with a predefined frequency shift factor of 1, or a chip duration of 1.04µs or 1 / 960ms associated with a predefined frequency shift factor of 2, is 2 or 4. The maximum frequency shift factor corresponding to a bit duration of 2.78µs or 1 / 360ms, or a chip duration of 1.39µs or 1 / 720ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.69µs or 1 / 1440ms associated with a predefined frequency shift factor of 2, is 1 or 2; The maximum frequency shift factor corresponding to a bit duration of 2.08µs or 1 / 480ms, or a chip duration of 1.04µs or 1 / 960ms associated with a predefined frequency shift factor of 1, or a chip duration of 0.52µs or 1 / 1920ms associated with a predefined frequency shift factor of 2, is 1 or 2; The maximum frequency shift factor is 1, which corresponds to a bit duration of 1.39µs or 1 / 720ms, or a chip duration of 0.69µs or 1 / 1440ms associated with a predefined frequency shift factor of 1. The maximum frequency shift factor is 1, which corresponds to a bit duration of 1.04 μs or 1 / 960 ms, or a chip duration of 0.52 μs or 1 / 1920 ms associated with a predefined frequency shift factor of 1.

19. The method according to claim 14 or 15, wherein, The maximum frequency shift factor in the set of frequency shift factors is less than or equal to 256, and / or any frequency shift factor R in the set of frequency shift factors. i and greater than R i Arbitrary frequency shift factor R j Meet at least one of the following: R j >R i +2, so that R j The main lobe of the determined signal and R i The main lobe of the confirmed signal does not exhibit aliasing; This allows R to be used in the case of sampling frequency deviation SFO. j The main lobe of the determined signal and R i The main lobe of the confirmed signal does not exhibit aliasing; R j >3·R i +2, or R i +2 <R j <3·R i -2, so that R j The main lobe of the determined signal and R i The main lobe and third harmonic of the confirmed signal do not exhibit aliasing. or This allows R to be in the presence of SFO. j The main lobe of the determined signal and R i The main lobe and third harmonic of the confirmed signal do not exhibit aliasing. R j >5·R i +2, or R i +2 <R j <3·R i -2, or 3·R i +2 <R j <5·R i -2, so that R j The main lobe of the determined signal and R i The main lobe, third harmonic, and fifth harmonic of the determined signal do not exhibit aliasing; or or Make R j The main lobe of the determined signal and R i The main lobe, third harmonic, and fifth harmonic of the determined signal do not exhibit aliasing; Here, 'a' is a numerical value used to indicate the size of the SFO, 0 ≤ a < 1, and a = 0 indicates that the SFO does not exist.

20. The method according to claim 9, wherein, The joint indication information of chip duration and frequency shift factor is used to indicate a combination of chip duration and frequency shift factor among a pre-configured combination of multiple chip durations and multiple frequency shift factors.

21. The method according to claim 9, wherein, The bit duration indication information is used to indicate a bit duration in a pre-configured bit duration set. The pre-configured bit duration set is a subset of the set {266.67,133.33,66.67,33.33,22.22,16.67,11.11,8.33,5.56,4.17,2.78,2.08,1.39,1.04}, where the unit of each element in the bit duration set is us (µs); or a subset of the set {4 / 15,2 / 15,1 / 15,1 / 30,1 / 45,1 / 60,1 / 90,1 / 120,1 / 180,1 / 240,1 / 360,1 / 480,1 / 720,1 / 960}, where the unit of each element in the bit duration set is milliseconds (ms).

22. The method according to claim 9, wherein, The bit duration indication information is used to indicate a second scaling factor in a pre-configured second scaling factor set. The second scaling factor is used to determine the bit duration of D2R in conjunction with the chip duration of R2D. The pre-configured second scaling factor set is a subset of the set {4,2,1,1 / 2,1 / 3,1 / 4,1 / 6,1 / 8,1 / 12,1 / 16,1 / 24,1 / 32,1 / 48,1 / 64,1 / 96,1 / 128}.

23. The method according to claim 9, wherein, The combined indication information of bit duration and frequency shift factor is used to indicate a combination of bit duration and frequency shift factor among a pre-configured combination of multiple bit durations and multiple frequency shift factors.

24. A communication method, wherein, Applied to the second node, the method includes: Send a first signaling message, which is used to determine the uplink transmission resource information of the passive Internet of Things; Based on the uplink transmission resource information, receive a first signal sent by one or more first nodes.

25. The method according to claim 24, wherein, The first signaling is any one of the following: Frequency domain resource signaling for random access message Msg1; Frequency domain resource signaling for random access message Msg3; Frequency domain resource signaling for uplink business data; Frequency domain resource signaling corresponding to the device-to-reader (D2R) message.

26. The method according to claim 24, wherein, The uplink transmission resource information includes at least one of the following: Chip duration; Frequency shift factor; The number of frequency shift factors selected; The selection interval of the frequency shift factor; The maximum value of the frequency shift factor; The starting point for selecting the frequency shift factor; Bit duration.

27. The method according to claim 24, wherein, The uplink transmission resource information is determined by the first signaling and predefined information; the predefined information includes at least one of the following: Subcarrier spacing; bandwidth; The message type includes at least one of the following: Msg1, Msg3, and non-access data message.

28. The method according to claim 24, wherein, The first signaling includes at least one of the following: Frequency shift factor indication information; Chip duration indication information; Joint indication information of chip duration and frequency shift factor; Bit duration indication information; The combined indication information of bit duration and frequency shift factor.

29. A communication device, wherein, include: Memory and processor; The memory and the processor are coupled; The memory is used to store instructions that can be executed by the processor; When the processor executes the instructions, it performs the method as described in any one of claims 1-28.

30. A computer-readable storage medium, wherein, The computer-readable storage medium stores computer instructions that, when executed on a computer, cause the computer to perform the method as described in any one of claims 1-28.

31. A computer program product, wherein, The computer program product includes computer program instructions that, when executed, implement the method as described in any one of claims 1-28.

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