Selective laser-induced etching method for display mother substrate, display substrate, and display device
Patent Information
- Application Number
- PCT/CN2026/079853
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-03-28
- Filing Date
- 2026-02-25
- Publication Date
- 2026-10-01
Smart Images
Figure CN2026079853_01102026_PF_FP_ABST
Abstract
Description
Selective laser etching method for display motherboard, display substrate and display device
[0001] This application claims priority to Chinese Patent Application No. 202510387320.5, filed on March 28, 2025, entitled “Selective Laser Etching Method for Display Motherboard, Display Substrate and Display Device”, the contents of which shall be construed as incorporated herein by reference. Technical Field
[0002] This article relates to, but is not limited to, display technology, and in particular to a selective laser etching method for a display motherboard, a display substrate, and a display device. Background Technology
[0003] Organic light-emitting diodes (OLEDs) are active-matrix display devices with advantages such as self-illumination, wide viewing angle, high contrast, low power consumption, and extremely fast response speed. With the continuous development of display technology, display devices using OLEDs as light-emitting elements and controlled by thin-film transistors (TFTs) have become the mainstream products in the display field. Summary of the Invention
[0004] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of the claims.
[0005] This disclosure provides a selective laser etching method for a display motherboard, a display substrate, and a display device.
[0006] In a first aspect, embodiments of this disclosure provide a selective laser etching method for a display motherboard, the display motherboard including a plurality of display substrates and a first modification region surrounding the display substrates, the first modification region including a first alignment portion surrounding the display substrates; the reflectivity of the first alignment portion is greater than the reflectivity of the remaining film layers within the first modification region; the method includes: emitting a light signal from a side of the substrate without film layers toward the first modification region; determining a depth-of-focus position of the first alignment portion near the surface of the substrate based on the reflected signal from the first alignment portion; determining a first laser modification lower limit based on the depth-of-focus position of the first alignment portion near the surface of the substrate, the first laser modification lower limit being located within the substrate; modifying the substrate at the first laser modification lower limit using a laser to form a first modification channel within the substrate; the first modification channel surrounding the display substrates and located on the side of the first alignment portion near the display substrates; etching the substrate from the side of the substrate without film layers to form a first opening along the first modification channel; and removing the display substrate from the display motherboard along the first opening.
[0007] In one exemplary embodiment, the first alignment portion includes a plurality of first sub-alignment portions, which are isolated from each other; the step of determining the depth-of-focus position of the first alignment portion near the substrate surface based on the reflected signal from the first alignment portion includes: determining the depth-of-focus position of the first sub-alignment portion near the substrate surface based on the reflected signal from the first sub-alignment portion.
[0008] In one exemplary embodiment, in a plane perpendicular to the substrate, the first modification path includes a plurality of first modification points spaced apart; the modification of the substrate at the first laser modification lower limit using a laser to form the first modification path in the substrate includes: using the laser to form the plurality of first modification points at the first laser modification lower limit on the substrate and at a plurality of preset points located at the first laser modification lower limit away from the first alignment portion.
[0009] In one exemplary embodiment, during the process of forming the plurality of first modification points using the laser, the plurality of first modification points are formed into an arc shape that bends away from the display substrate in a plane perpendicular to the substrate.
[0010] In one exemplary embodiment, in a direction perpendicular to the substrate, the first modified region includes the substrate, the first alignment portion, and the first etching barrier portion arranged sequentially, wherein the orthogonal projection of the first etching barrier portion on the substrate at least covers the orthogonal projection of the first modified path on the substrate.
[0011] In one exemplary embodiment, in a direction perpendicular to the substrate, the first modified region further includes a first sacrificial portion, the first sacrificial portion being located on the side of the first etching barrier portion near the substrate; the orthographic projection of the first sacrificial portion on the substrate at least covers the orthographic projection of the first modified trace on the substrate; the absorption rate of the laser by the first sacrificial portion is greater than the absorption rate of the laser by the remaining film layers in the first modified region.
[0012] In one exemplary embodiment, the display substrate includes a display area, a peripheral area surrounding the display area, and a second modified area, the display area at least partially surrounding the second modified area; a second alignment portion is disposed within the second modified area, the reflectivity of the second alignment portion being greater than the reflectivity of the remaining film layers within the second modified area; before etching the substrate, the method further includes: emitting a light signal from the side of the substrate without film layers toward the second modified area; determining the depth-of-focus position of the second alignment portion near the surface of the substrate based on the reflected signal from the second alignment portion; determining a second laser modification lower limit based on the depth-of-focus position of the second alignment portion near the surface of the substrate, the second laser modification lower limit being located within the substrate; modifying the substrate at the second laser modification lower limit using a laser to form a second modification channel within the substrate; the second modification channel having a closed shape surrounding the second alignment portion.
[0013] In one exemplary embodiment, etching the substrate from the side of the substrate without a film layer further includes: forming a second opening along the second modification path on the substrate; and removing the film layer of the display substrate located within the range of the second opening to form a first aperture.
[0014] In one exemplary embodiment, the second alignment portion is located at the geometric center of the second modification channel within the plane of the substrate.
[0015] In one exemplary embodiment, the second alignment portion includes at least two second sub-alignment portions, and the at least two second sub-alignment portions are isolated from each other.
[0016] In one exemplary embodiment, the size of the second sub-alignment portion is larger than the size of the second modification region in a direction away from the geometric center of the second modification path.
[0017] In one exemplary embodiment, in a direction perpendicular to the substrate, the second modified region includes the substrate, the second alignment portion, the second etching barrier portion, the light-emitting structure layer, and the upper protective film arranged sequentially, wherein the orthogonal projection of the second etching barrier portion on the substrate at least covers the orthogonal projection of the second modified path on the substrate.
[0018] In one exemplary embodiment, in a direction perpendicular to the substrate, the second modified region further includes a second sacrificial portion, the second sacrificial portion being located on the side of the second etching barrier portion near the substrate; the orthographic projection of the second sacrificial portion on the substrate at least covers the orthographic projection of the second modified trace on the substrate; the absorption rate of the laser by the second sacrificial portion is greater than the absorption rate of the laser by the remaining film layers in the second modified region.
[0019] Secondly, embodiments of this disclosure provide a display substrate, which is obtained by selective laser etching of a display motherboard as described in any of the preceding claims.
[0020] Thirdly, embodiments of this disclosure provide a display device, including a display substrate as described above.
[0021] After reading and understanding the accompanying diagrams and detailed descriptions, the other aspects can be understood.
[0022] Overview of the attached figures
[0023] The accompanying drawings are used to provide an understanding of the technical solutions of this disclosure and form part of the specification. They are used together with the embodiments of this disclosure to explain the technical solutions of this disclosure and do not constitute a limitation on the technical solutions of this disclosure.
[0024] Figure 1 is a schematic diagram of a display motherboard structure;
[0025] Figure 2 is a schematic diagram of the planar structure of the dashed area A in Figure 1 in an exemplary embodiment;
[0026] Figure 3 is a schematic cross-sectional view of the display substrate in the display area in an exemplary embodiment;
[0027] Figure 4 is a cross-sectional view of Figure 2 along the BB direction in an exemplary embodiment;
[0028] Figure 5 is a schematic diagram illustrating the principle of laser focusing on the first modified region in Figure 4 in an exemplary embodiment;
[0029] Figure 6 is a schematic diagram of the planar structure of the display substrate in another exemplary embodiment;
[0030] Figure 7 is a schematic diagram of the shape of the first alignment portion in an exemplary embodiment;
[0031] Figure 8 is a schematic diagram illustrating the principle of laser focusing on the first modified region using the first alignment part in an exemplary embodiment;
[0032] Figure 9 is a cross-sectional view along the EE direction in Figure 7 in an exemplary embodiment;
[0033] Figure 10 is a top view of the dashed region C in Figure 6 in an exemplary embodiment;
[0034] Figure 11 is a top view of the dashed region C in Figure 6 in yet another exemplary embodiment;
[0035] Figure 12 is a cross-sectional view of Figure 10 along the EE direction in an exemplary embodiment;
[0036] Figure 13 is a cross-sectional view of the substrate of Figure 12 after etching in an exemplary embodiment;
[0037] Figure 14 is a cross-sectional view of the substrate in Figure 12 after the first opening is formed in an exemplary embodiment;
[0038] Figure 15 is a cross-sectional view of Figure 10 along the EE direction in another exemplary embodiment.
[0039] Detailed Explanation
[0040] This disclosure describes several embodiments, but these descriptions are exemplary and not limiting, and it will be apparent to those skilled in the art that many more embodiments and implementations are possible within the scope of the embodiments described herein. Although many possible combinations of features are shown in the drawings and discussed in the detailed description, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with, or may replace, any feature or element of any other embodiment.
[0041] This disclosure includes and contemplates combinations of features and elements known to those skilled in the art. The embodiments, features, and elements disclosed in this disclosure may also be combined with any conventional features or elements to form a unique inventive scheme as defined by the claims. Any feature or element of any embodiment may also be combined with features or elements from other inventive schemes to form another unique inventive scheme as defined by the claims. Therefore, it should be understood that any feature shown and / or discussed in this disclosure may be implemented individually or in any suitable combination. Therefore, the embodiments are not limited except by the limitations imposed by the appended claims and their equivalents. Furthermore, various modifications and changes may be made within the scope of the appended claims.
[0042] Furthermore, in describing representative embodiments, the specification may have presented methods and / or processes as a specific sequence of steps. However, the method or process should not be limited to the specific order of steps described herein, to the extent that the method or process does not depend on the specific order of steps described herein. As will be understood by those skilled in the art, other sequences of steps are also possible. Therefore, the specific order of steps set forth in the specification should not be construed as a limitation of the claims. Moreover, the claims relating to the method and / or process should not be limited to the steps performed in the order written, and those skilled in the art will readily understand that these orders can be varied and still remain within the spirit and scope of the embodiments disclosed herein.
[0043] In the accompanying drawings, the size of one or more constituent elements, the thickness of layers, or areas are sometimes exaggerated for clarity. Therefore, this disclosure is not necessarily limited to these dimensions, and the shape and size of one or more parts in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate ideal examples, and this disclosure is not limited to the shapes or values shown in the drawings.
[0044] The ordinal numbers such as "first," "second," and "third" used in this specification are used to avoid confusion among the constituent elements, not to limit the quantity. The term "multiple" in this disclosure refers to two or more quantities.
[0045] In this specification, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification, and does not imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this disclosure. The positional relationships of the constituent elements may be appropriately varied depending on the orientation of the constituent elements being described. Therefore, the use of terms not limited to those described in the specification may be appropriately replaced as needed.
[0046] In this specification, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joining" should be interpreted broadly. For example, they may refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection or an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art will understand the meaning of these terms in this disclosure as appropriate.
[0047] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.
[0048] In this specification, "parallel" refers to the state where the angle formed by two straight lines is greater than or equal to -10° and less than 10°, and therefore also includes the state where the angle is greater than or equal to -5° and less than 5°. Similarly, "perpendicular" refers to the state where the angle formed by two straight lines is greater than or equal to 80° and less than 100°, and therefore also includes the state where the angle is greater than or equal to 85° and less than 95°.
[0049] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.
[0050] Hybrid OLED technology is an emerging display technology in recent years. It uses the glass substrate of traditional rigid OLED and the thin film encapsulation (TFE) technology of flexible OLED, which can combine the advantages of rigid OLED and flexible OLED, reduce the thickness of the display substrate and improve the display quality.
[0051] Figure 1 is a schematic diagram of a display motherboard. As shown in Figure 1, the display motherboard M1 may include multiple display substrates J1. Figure 1 illustrates an example of eight display substrates J1 arranged on a single display motherboard M1, but this disclosure does not limit the number of display substrates included on the display motherboard. After the display motherboard M1 is fabricated, individual display substrates J1 need to be removed from the display motherboard M1 to facilitate subsequent processing of the individual display substrates J1. In traditional scissor-cutting processes, each display substrate J1 needs to be cut along its contour, and then the cut surfaces of the display substrates J1 need to be ground. This process is time-consuming and easily damages the display substrates. For hybrid OLEDs, the glass substrate has low strength near the cut after scissor-cutting, making it prone to breakage during subsequent processes and use, affecting the user experience.
[0052] The inventors of this application have proposed a novel cutting approach: Selective Laser-Induced Etching (SLE) technology. First, the glass substrate of the hybrid OLED is laser-modified, followed by chemical etching. Because the etching rate is faster in the modified area, the etched thickness differs between the modified and unmodified areas, facilitating fracture at the modified area and making it easier to remove the display substrate from the motherboard. Compared to rotary cutting, SLE technology is faster, and the morphology of the glass substrate at the fracture point is controllable, helping to ensure the edge strength of the display substrate. However, the inventors have found in practice that accurate laser focusing is difficult during the SLE modification process.
[0053] Figure 2 is a schematic diagram of the planar structure of the dashed area A in Figure 1 in an exemplary embodiment. As shown in Figure 2, the display substrate may include a display area AA and a peripheral area PA surrounding the display area AA. The display motherboard includes a first modified area Bx1 surrounding the peripheral area PA. After laser modification and chemical etching are performed on the substrate of the display substrate in the first modified area Bx1, the display substrate can be removed from the display motherboard. The display area AA includes at least a plurality of regularly arranged pixel units. The peripheral area PA includes a bonding area 200 located on one side of the display area AA and a border area 300 located on the other side of the display area AA. The bonding area 200 and the border area 300 are interconnected and surround the display area AA. The first modified area Bx1 may surround the bonding area 200 and the border area 300. The bonding area 200 includes at least a bonding circuit that connects the signal lines of the plurality of display units to an external driving device. The border area 300 may include a gate driving circuit. As shown in Figure 2, the first direction X and the second direction Y may be located in the plane where the display area AA is located. The first direction X and the second direction Y may intersect, for example, the first direction X and the second direction Y may be perpendicular to each other. The bonding area 200 can be located on one side of the second direction Y of the display area AA. A first modification channel (not shown) is provided in the first modification area Bx1. Subsequently, the glass substrate can be modified along the first modification channel. After etching and other processes, a display substrate including the display area AA and the peripheral area PA is obtained. The first modification channel is similar in shape to the edge of the display substrate.
[0054] Figure 3 is a schematic cross-sectional view of the display substrate in the display area according to an exemplary embodiment, illustrating the structure of three sub-pixels on the display substrate. As shown in Figure 3, on a plane perpendicular to the display substrate, the display substrate in the display area may include a driving circuit layer 102 disposed on a substrate 101, a light-emitting structure layer 103 disposed on the side of the driving circuit layer 102 away from the substrate 101, and an encapsulation layer 104 disposed on the side of the light-emitting structure layer 103 away from the substrate 101. In some possible implementations, the display substrate may include other film layers, such as spacers, etc., which are not limited in this disclosure.
[0055] In an exemplary embodiment, the substrate 101 may be made of glass. The driving circuit layer 102 for each sub-pixel may include a plurality of transistors and a storage capacitor constituting a pixel driving circuit. Along a direction perpendicular to the substrate 101, the driving circuit layer 102 includes a bottom shielding metal layer (BSM), a first semiconductor layer, a first gate metal layer, a second gate metal layer, and a source / drain metal layer sequentially disposed therefrom, wherein the bottom shielding metal layer, the first gate metal layer, the second gate metal layer, and the source / drain metal layer are all metal layers. The bottom shielding metal layer may include a plurality of light-shielding portions 11 configured to at least partially cover the active layer of the transistors in the pixel circuit to prevent external light from affecting the performance of the transistors, and the plurality of light-shielding portions 11 are interconnected. The first semiconductor layer may include active layers 13 of transistors for multiple pixel circuits. The first gate metal layer may include gate electrodes 15 of transistors for multiple pixel circuits and first plates 16 of multiple storage capacitors. The second gate metal layer may include second plates 18 of multiple storage capacitors. The corresponding second plates 18 and first plates 16 at least partially overlap in a direction perpendicular to the substrate 101. The source and drain metal layers may include source electrodes 20 and drain electrodes 21 of transistors for multiple pixel circuits. The source electrodes 20 and drain electrodes 21 are respectively connected to the active layer 13 through vias. A buffer layer 12 may be provided between the bottom light-shielding metal layer and the first semiconductor layer. The buffer layer 12 can prevent harmful substances in the substrate 101 from penetrating into the interior of the display substrate and can also increase the adhesion of the film layers in the display substrate to the substrate 101. A first gate insulating (GI) layer 14 may be disposed between the first semiconductor layer and the first gate metal layer; a second gate insulating layer 17 may be disposed between the first gate metal layer and the second gate metal layer; an interlayer insulating (ILD) layer 19 may be disposed between the second gate metal layer and the source / drain metal layer; a passivation (PVX) layer 22 and a planarization (PLN) layer 23 may be sequentially disposed on the side of the source / drain metal layer away from the substrate 101; and a light-emitting structure layer 103 may be disposed on the side of the planarization layer 23 away from the substrate 101. The buffer layer 12, the first gate insulating layer 14, the second gate insulating layer 17, and the passivation layer 22 may be inorganic insulating layers, and the planarization layer 23 may be an organic insulating layer. In other embodiments, a third gate metal layer may be disposed between the second gate metal layer and the source / drain metal layer, or a greater number of gate metal layers may be disposed. The gate electrode 15 and the first electrode 16 may be disposed on different gate metal layers, and the storage capacitor may also include a greater number of electrodes. Different electrodes may be disposed on different metal layers; this disclosure does not limit this.In other embodiments, the source / drain metal layer may include a first source / drain metal layer and a second source / drain metal layer disposed sequentially along a direction away from the substrate 101. The source electrode 20 and the drain electrode 21 may be located in the first source / drain metal layer. A transition electrode may be disposed in the second source / drain metal layer. The transistor may be connected to the corresponding light-emitting element through the transition electrode. The source / drain metal layer may also include a greater number of metal layers. The transistor may be connected to the corresponding light-emitting element through multiple transition electrodes located in different metal layers. A passivation layer and a planarization layer may be disposed between the multiple source / drain metal layers. Alternatively, only a planarization layer may be disposed between the multiple source / drain metal layers. A passivation layer and a planarization layer may be disposed between the light-emitting structure layer 103 and the nearest source / drain metal layer. This disclosure does not limit this.
[0056] In an exemplary embodiment, the light-emitting structure layer 103 may include an anode 301, a pixel definition layer 304, an organic light-emitting layer 302, and a cathode 303. The anode 301 is connected to the drain electrode 21 of the driving transistor via a via. The organic light-emitting layer 302 is connected to the anode 301, and the cathode 303 is connected to the organic light-emitting layer 302. The organic light-emitting layer 302 emits light of a corresponding color under the drive of the anode 301 and the cathode 303. The pixel definition layer 304 may be disposed on the side of the planarization layer 23 away from the substrate 101. The pixel definition layer 304 may have multiple pixel openings, each pixel opening exposing at least a portion of the surface of a corresponding anode 301. The anodes 301 of multiple sub-pixels are isolated from each other, and at least a portion of the organic light-emitting layer 302 may be disposed within a pixel opening. The cathode 303 may cover the entire surface of the substrate 101, meaning that the cathodes 303 of multiple sub-pixels may be interconnected. In an exemplary embodiment, isolation pillars (PS) 305 may be provided on the side of the pixel definition layer 304 away from the substrate 101, and this disclosure does not limit this.
[0057] In an exemplary embodiment, the organic light-emitting layer 302 may include an emitting layer (EML) and one or more of the following layers: a hole injection layer (HIL), a hole transport layer (HTL), an electron block layer (EBL), a hole block layer (HBL), an electron transport layer (ETL), and an electron injection layer (EIL). For example, the organic light-emitting layer 302 may include a hole injection layer, a hole transport layer, an electron block layer, an emitting layer, a hole block layer, an electron transport layer, and an electron injection layer sequentially stacked along a direction away from the substrate 101. In an exemplary embodiment, the hole injection layer of all sub-pixels can be a common layer connected together, the electron injection layer of all sub-pixels can be a common layer connected together, the hole transport layer of all sub-pixels can be a common layer connected together, the electron transport layer of all sub-pixels can be a common layer connected together, the hole blocking layer of all sub-pixels can be a common layer connected together, the light emission layer of adjacent sub-pixels can have a small overlap or can be isolated, and the electron blocking layer of adjacent sub-pixels can have a small overlap or can be isolated.
[0058] In an exemplary embodiment, the encapsulation layer 104 may include a first encapsulation layer 401, a second encapsulation layer 402, and a third encapsulation layer 403 stacked together. The first encapsulation layer 401 and the third encapsulation layer 403 may be made of inorganic materials, while the second encapsulation layer 402 may be made of organic materials. The second encapsulation layer 402 is disposed between the first encapsulation layer 401 and the third encapsulation layer 403, which can ensure that external moisture cannot enter the light-emitting structure layer 103. In an exemplary embodiment, the display substrate may also include a touch layer or other film layer located on the side of the encapsulation layer 104 away from the substrate 101, and this disclosure does not limit this.
[0059] Figure 4 is a cross-sectional view along the BB direction of Figure 2 in an exemplary embodiment, illustrating the film layer structure of the display substrate near the first modified region Bx1. As shown in Figure 4, within the first modified region Bx1 and the surrounding region PA, the display substrate includes a substrate 101, a buffer layer 12, and a planarization layer 23 disposed sequentially. The first modified region Bx1 has fewer film layers, which facilitates subsequent removal of the display substrate from the display motherboard. The first modified channel Px1 may be located within the first modified region Bx1 and surround the surrounding region PA. In other embodiments, the buffer layer 12 may not be disposed on the display substrate, and this disclosure does not limit this.
[0060] As shown in Figure 4, the first modification path Px1 may include multiple discrete first modification points located inside the substrate 101. In a plane perpendicular to the substrate 101, these multiple first modification points can be connected to form an arc shape curving away from the surrounding area PA. The edge shape of the subsequently obtained single display substrate is similar to this arc shape, which helps to maintain high edge strength. In this embodiment, a laser can be used to irradiate the positions of the multiple first modification points in Figure 4 through a diffractive optical element (DOE) to modify the substrate 101. The position distribution of the multiple first modification points can be designed as needed. Using a suitable DOE, the edge of the display substrate can be customized. The shape of the first modification path shown in Figure 4 can make the edge of the subsequently obtained display substrate arc-shaped, which helps to improve the edge strength of the display substrate. In other embodiments, the first modification path can be in the shape of a broken line, a curve, or other shapes in a plane perpendicular to the display substrate. The distribution of the multiple first modification points can be designed according to actual needs to obtain first modification paths of different shapes. Figure 4 illustrates the first modification channel Px1, which includes four first modification points. For clarity, each first modification point is highlighted. The number of first modification points included in the first modification channel Px1 can be set as needed, and this disclosure does not impose any restrictions on this.
[0061] Figure 5 is a schematic diagram illustrating the principle of laser focusing on the first modified area in Figure 4 in an exemplary embodiment, omitting the surrounding area PA. As shown in Figure 5, during the formation of the first modified channel Px1, the side of the substrate 101 without a film layer can be facing upwards, and a signal transmitter 21 and a signal receiver 22 can be positioned above the substrate 101. The signal transmitter 21 can emit an optical signal towards the substrate 101 of the first modified area Bx1, and the signal receiver 22 can receive multiple reflected signals after the optical signal illuminates the first modified area Bx1. The first depth of focus (DOF) position of the side surface of the substrate 101 with a film layer can be determined based on the intensity difference between the multiple reflected signals. For example, the signal transmitter 21 can emit a first optical signal L1 towards the substrate 101 of the first modified area Bx1. The first optical signal L1 is incident on the first modified area Bx1 at a certain angle and is reflected on the surface of each film layer in the first modified area Bx1. As shown in Figure 5, the first optical signal L1 can generate a first reflected signal L2 on the surface of the substrate 101 away from the film layer, a second reflected signal L3 on the surface of the buffer layer 12, and a third reflected signal L4 on the surface of the planarization layer 23. The first reflected signal L2, the second reflected signal L3, and the third reflected signal L4 are received by the signal receiver 22. It can be considered that the position where the second reflected signal L3 is generated is the first focal depth position on the side surface of the substrate 101 where the film layer is located. After determining the first focal depth position, a preset distance can be moved upward based on the first focal depth position to obtain the first laser modification lower limit o1. The corresponding first modification point is formed starting from the first laser modification lower limit o1, and the remaining multiple first modification points are formed sequentially by moving upward along the first laser modification lower limit o1. The substrate 101 and the remaining film layers located outside the first modification path Px1 will not be modified by the laser and will not be damaged. During the process of determining each first modification point, the substrate 101 at the first modification point can be modified using a laser. After modification, a tiny crack is formed in the substrate 101 at the first modification point. During the subsequent etching process of the substrate 101, the etching rate at the first modification point is faster, and a fracture can be formed more quickly at the first modification path Px1. The substrate 101 can be broken along the first modification path Px1.
[0062] However, since the substrate 101 is made of glass, the buffer layer 12 is typically made of silicon oxide (SiOx) or silicon nitride (SiNx), and the planarization layer 23 is typically made of organic materials such as polyimide (PI), these materials have high light transmittance. The intensities of the first reflection signal L2, the second reflection signal L3, and the third reflection signal L4 are low, and the intensity differences between them are small, making it difficult for the detector to accurately determine the first depth of focus. If the first depth of focus is inaccurate, the data for the first laser modification lower limit o1 will also be inaccurate, resulting in poor laser adjustment precision. This can easily damage the film layer beneath the substrate 101 during the modification process. Furthermore, organic materials such as polyimide have a high absorption rate for infrared lasers. With poor laser adjustment precision, the planarization layer 23 is prone to absorbing excessive laser light during the modification process and generating microcracks, affecting the yield of the display substrate and the display effect.
[0063] This disclosure provides a selective laser etching method for a display motherboard, the display motherboard including a plurality of display substrates and a first modification region surrounding the display substrates, the first modification region including a first alignment portion surrounding the display substrates; the reflectivity of the first alignment portion is greater than the reflectivity of the remaining film layers within the first modification region; the method includes: emitting a light signal from a side of the substrate without film layers toward the first modification region; determining the depth-of-focus position of the first alignment portion near the surface of the substrate based on the reflected signal from the first alignment portion; determining a first laser modification lower limit based on the depth-of-focus position of the first alignment portion near the surface of the substrate, the first laser modification lower limit being located within the substrate; modifying the substrate at the first laser modification lower limit using a laser to form a first modification channel within the substrate; the first modification channel surrounding the display substrates and located on the side of the first alignment portion near the display substrates; etching the substrate from the side of the substrate without film layers to form a first opening along the first modification channel; and removing the display substrate from the display motherboard along the first opening.
[0064] The display substrate provided in this embodiment features a first alignment portion within a first modification region. The reflectivity of this first alignment portion is greater than that of the remaining film layers within the first modification region. This results in a stronger reflected signal after the light signal illuminates the first alignment portion, creating a sharper contrast with the other reflected signals. This allows for accurate determination of the focal depth of the first alignment portion near the substrate surface and the lower limit of the first laser modification, improving the precision of the laser modification, avoiding damage to other film layers of the display substrate, minimizing structural changes to the display motherboard, and simplifying the manufacturing process. Furthermore, using SLE technology to remove the display substrate from the display motherboard represents a novel approach. This method is simple to operate, more efficient, and contributes to obtaining a display substrate with better structural strength.
[0065] Figure 6 is a schematic diagram of the planar structure of the display substrate in another exemplary embodiment. The difference between Figure 6 and Figure 2 is that a first alignment portion 30 and a second modified region Bx2 are added. The rest can be referred to the description of Figure 2, and will not be repeated here.
[0066] As shown in Figure 6, a first alignment part 30 is provided on the side of the first modification zone Px1 away from the surrounding area PA. The first alignment part 30 can surround the surrounding area PA. The reflectivity of the first alignment part 30 is greater than that of the other film layers in the first modification area Bx1. It can reflect the light signal from the substrate 101 side with higher intensity. The signal receiver can accurately determine the focal depth position of the first alignment part 30 near the substrate 101 based on the reflected signal from the first alignment part 30. This allows for accurate determination of the first laser modification lower limit o1, ensuring the accuracy of the laser modification process and avoiding damage to other film layers of the display substrate.
[0067] Figure 7 is a schematic diagram of the shape of the first alignment portion in an exemplary embodiment, which simply illustrates the display area and the surrounding area. In the exemplary embodiment, the first alignment portion 30 may be a discontinuous line shape, as shown in Figure 7. The first alignment portion 30 may include a plurality of first sub-alignment portions 31, which are isolated from each other and surround the surrounding area PA. Figure 7 illustrates an example where the first sub-alignment portions 31 are rectangular and the shapes of the multiple first sub-alignment portions 31 are the same. In other embodiments, the shape of the first sub-alignment portions 31 may be triangular, elliptical, circular, quadrilateral, or polygonal, as well as character shapes such as "T", "+", or other irregular shapes. The sides of the first sub-alignment portions 31 may be straight, curved, or wavy, and the corners of the first sub-alignment portions 31 may be rounded. The shapes of at least two first sub-alignment portions 31 may be different. The multiple first sub-alignment portions 31 may surround the display area AA and the surrounding area PA in multiple loops. The number and distribution of the first sub-alignment portions 31 can be set as needed, and this disclosure does not limit this.
[0068] In an exemplary embodiment, within the plane of the substrate 101, the width of the first sub-alignment portion 31 is a first width S1, which can be the dimension of the first sub-alignment portion 31 along the direction away from the display area AA. For example, when the first direction X and the second direction Y are perpendicular to each other, the first width S1 of the first sub-alignment portion 31 located on both sides of the display area AA along the first direction X can be the maximum dimension of the first sub-alignment portion 31 along the first direction X; the first width S1 of the first sub-alignment portion 31 located on both sides of the display area AA along the second direction Y can also be the maximum dimension of the first sub-alignment portion 31 along the second direction Y. The larger the first width S1, the larger the size of the first alignment portion 30, the easier it is for the first optical signal L1 to irradiate the first alignment portion 30, and the easier it is for the signal receiver 22 to receive the reflected signal from the first alignment portion 30, which helps to quickly and accurately determine the first laser modification lower limit o1 and accurately form multiple first modification points. In other embodiments, the dimensional relationship of the first width S1 can be set as needed, and this disclosure does not limit this.
[0069] In an exemplary embodiment, the first width S1 may be greater than or equal to 180 micrometers, for example, the first width S1 may be greater than or equal to 300 micrometers, and this disclosure does not limit it.
[0070] In an exemplary embodiment, the orthographic projection of the first sub-alignment portion 31 onto the substrate 101 can be square, with a side length of approximately 500 micrometers, as shown in FIG7. Along the extending direction of the first alignment portion 30, the distance L1 between adjacent first sub-alignment portions 31 can be less than or equal to 3 millimeters. The distance L1 between adjacent first sub-alignment portions 31 can be the distance between the opposing surfaces of adjacent first sub-alignment portions 31. By setting a larger area of the orthographic projection of the first sub-alignment portion 31 onto the substrate 101 and a smaller distance L1 between adjacent first sub-alignment portions 31, the detection accuracy and continuity of the rangefinder spot are improved, and the lower limit o1 of the first laser modification can be accurately determined.
[0071] In an exemplary embodiment, the first alignment portion 30 is disposed on the side of the first modification path Px1 away from the peripheral area PA. By disposing of the first alignment portion 30 on the side of the first modification path Px1 away from the peripheral area PA, the first alignment portion 30 can be removed along with the display substrate after it is subsequently removed, without affecting the remaining structures and wiring on the display substrate. Furthermore, when the material of the first alignment portion 30 includes a metallic material, setting the first alignment portion 30 as a discontinuous pattern can reduce the possibility of static electricity generation on the display substrate, ensuring the smooth fabrication of the display substrate. After the display substrate is removed from the display motherboard, the first alignment portion 30 is removed without affecting the subsequent display of the display substrate.
[0072] Figure 8 is a schematic diagram illustrating the principle of laser focusing on the first modified area using the first alignment part in an exemplary embodiment, showing the cross-sectional structure along the BB direction of Figure 6. The difference between Figure 8 and Figure 5 is that a first alignment part 30 is provided on the side of the first modified channel Px1 away from the surrounding area PA. The first alignment part 30 is disposed between the buffer layer 12 and the planarization layer 23. The first modified area Bx1 may include multiple first etching blocking parts 231. The first etching blocking parts 231 may be disposed in the same layer as the planarization layer 23. The orthogonal projection of the first etching blocking parts 231 on the substrate 101 at least covers the orthogonal projection of the first modified channel Px1 on the substrate 101. During the subsequent etching process of the substrate 101, the first etching blocking parts 231 can block the etching liquid (such as hydrofluoric acid) and prevent the etching liquid from spreading to other positions of the display substrate. As shown in Figure 8, the first optical signal L1 forms a fifth reflected signal L5 after illuminating the surface of the first alignment portion 30. Due to the low reflectivity of the substrate 101, buffer layer 12, and first etch barrier 231, the first optical signal L1 experiences minimal signal attenuation after passing through the substrate 101 and buffer layer 12. However, the first alignment portion 30 has a high reflectivity, causing almost all light to be reflected after illuminating its surface. Therefore, the intensity of the fifth reflected signal L5 is significantly greater than the other reflected signals, allowing the signal receiver to easily distinguish it. The detector can then obtain the accurate depth-of-focus position of the first alignment portion 30 near the substrate 101. As shown in Figure 8, obtaining the accurate depth-of-focus position allows for the accurate determination of the first laser modification lower limit o1. This prevents interference with other layers of the display substrate during laser modification to create multiple first modification points, thus helping to ensure the yield and display quality of the display substrate. In Figure 8, the first thickness H0 is the initial thickness of the substrate 101 before etching, and the first thickness H0 is the dimension in the direction perpendicular to the substrate 101.
[0073] In an exemplary embodiment, by providing the first alignment portion 30 surrounding the peripheral region PA, the first optical signal L1 can be reflected by the plurality of first sub-alignment portions 31 regardless of the direction from which it illuminates the vicinity of the first modified path Px1, thereby enhancing the salience of the first alignment portion 30 as a marker. Furthermore, by providing mutual isolation between the plurality of first sub-alignment portions 31, the first optical signal L1 can simultaneously illuminate both the first sub-alignment portion 31 and the first etch barrier portion 231. Since the reflected signal intensity of the first sub-alignment portion 31 and the first etch barrier portion 231 differs significantly, it is easier for the signal receiver 22 to distinguish the received reflected signal.
[0074] In an exemplary embodiment, the first alignment portion 30 can be disposed in the same layer as the first gate metal layer, which helps to save fabrication steps. The phrase "A and B are disposed in the same layer" as used in this disclosure means that A and B are formed simultaneously through the same patterning process during the fabrication of the display substrate.
[0075] In an exemplary embodiment, the material of the first alignment portion 30 may include metallic materials such as molybdenum (Mo), aluminum (Al), titanium (Ti), and silver (Ag) and their alloys, or the first alignment portion 30 may be made of other materials with high reflectivity. The material of the first alignment portion 30 may be set as needed, and this disclosure does not limit it.
[0076] Figure 9 is a cross-sectional view along the EE direction in Figure 7 of an exemplary embodiment, illustrating the structure after etching the substrate. As shown in Figure 9, after forming the first modification channel Px1, the substrate 101 can be etched from the side of the substrate 101 away from the first etching barrier 231. Since the etching rate of the substrate 101 at the first modification channel Px1 is greater than the etching rate at other locations, after the substrate 101 is etched from the first thickness H0 to the second thickness H1, the substrate 101 at the first modification channel Px1 is etched through, forming a first opening X1 surrounding the peripheral region PA. The shape of the first opening X1 is similar to that of the first modification channel Px1, appearing as an arc in a plane perpendicular to the substrate 101. Subsequently, the display substrate can be removed from the display motherboard along the first opening X1. The shape at the first opening X1 is the edge shape of the display substrate. The ideal shape of the edge of the display substrate can be obtained by controlling the shape of the first modification channel Px1 and the etching process. In Figure 9, the second thickness H1 is the thickness of the substrate 101 after etching, and the second thickness H1 is the dimension in the direction perpendicular to the substrate 101.
[0077] In an exemplary embodiment, the first thickness H0 may be approximately 500 mm and the second thickness H1 may be approximately 200 mm, and this disclosure does not limit this.
[0078] In an exemplary embodiment, as shown in FIG9, the first modification region Bx further includes a first sacrificial portion 33. The first sacrificial portion 33 is located on the side of the first etch barrier portion 231 near the substrate 101. The orthographic projection of the first sacrificial portion 33 on the substrate 101 at least covers the orthographic projection of the first modification path Px1 on the substrate 101. The absorption rate of the first sacrificial portion 33 to the laser is greater than that of other film layers such as the substrate 101, the buffer layer 12, and the first etch barrier portion 231 to the laser, and it will not detach or undergo significant deformation after absorbing the heat of the laser. During the laser modification process, the first sacrificial portion 33 can absorb the heat from the laser, thereby preventing the laser from damaging the first etch barrier portion 231 and helping to improve the yield of the display substrate.
[0079] In an exemplary embodiment, as shown in FIG6, the display substrate may further include a second modified region Bx2, and the display region AA may at least partially surround the second modified region Bx2. For example, the second modified region Bx2 may be located within the display region AA. A second modified path Px2 may be formed within the second modified region Bx2 by laser modification. The second modified path Px2 may, for example, be a closed shape. Subsequent modification can be performed along the second modified path Px2. After etching and other steps, the film layer located within the range of the second modified path Px2 can be removed using a laser, forming a first opening on the display substrate. The shape of the first opening may be similar to the shape of the second modified path Px2. In an exemplary embodiment, the position of the first opening may correspond to the position of the optical device, and the first opening is configured to accommodate the optical device. By placing the optical device within the first opening, it is helpful to achieve a "full-screen" display on the display substrate, improving the aesthetics of the display substrate and the user experience. Compared to the process of directly creating TGV holes in the glass, SLE technology allows for the control of the shape of the second modification path to achieve the ideal edge shape of the first opening. This helps ensure the strength of the display substrate near the first opening and also enables customized morphology of the first opening. Multiple second modification points can be designed and positioned as needed, and appropriate DOEs can be used for modification to achieve a customized edge morphology for the first opening.
[0080] In an exemplary embodiment, the position of the second modified region Bx2 within the display region AA is not limited; it can be located at the upper or lower part of the display region AA along the second direction Y, or at the edge of the display region AA. In an exemplary embodiment, within a plane parallel to the display substrate, the shape of the first opening can be any one or more of the following: square, rectangle, polygon, circle, and ellipse, etc., and the optical device can be a fingerprint recognition device, a camera device, or an optical sensor such as a 3D imaging device. The shape and size of the first opening can be set as needed, and this disclosure does not limit this.
[0081] In an exemplary embodiment, the second modified region Bx2 also has the problem of unclear reflection signal and difficulty in determining focal depth during laser modulation. Therefore, a second alignment part can be provided on the side of the second modified channel Px2 away from the surrounding region PA. The reflectivity of the second alignment part is greater than the reflectivity of other films in the second modified channel Px2. The function of the second alignment part is similar to that of the first alignment part, and will not be described again here.
[0082] Figure 10 is a top view of the dashed area C in Figure 6 in an exemplary embodiment, illustrating the structure of the second modified area Bx2, the second modified channel Px2, and the second alignment portion 40. As shown in Figure 10, the second modified channel Px2 can be annular, and the second alignment portion 40 is provided on the side of the second modified channel Px2 away from the peripheral area PA. The second alignment portion 40 can be cross-shaped and can be located at the geometric center of the second modified channel Px2. Since the size of the first opening on the display substrate is generally small, by providing the second alignment portion 40 at the center of the annular second modified channel Px2, the first optical signal L1 can be reflected by the second alignment portion 40 regardless of the direction from which it illuminates the vicinity of the second modified channel Px2. The difference in reflected signal intensity between the second alignment portion 40 and other film layers is large, which facilitates the signal receiver to distinguish the received reflected signal and thus accurately determine the depth of focus. By providing a second alignment portion 40 on the side of the second modification path Px2 away from the surrounding area PA, the second alignment portion 40 can be removed together after subsequent processing without affecting the remaining structure and wiring on the display substrate, and helps to prevent static electricity from being generated near the second alignment portion 40, which could affect the display substrate.
[0083] In an exemplary embodiment, within the plane of the substrate 101, the dimension of the second alignment portion 40 along the first direction X can be a second width S2, which can be approximately 500 micrometers. The dimension of the second alignment portion 40 along the first direction X can be the maximum dimension of the second alignment portion 40 along the first direction X. The dimension of the second alignment portion 40 along the second direction Y can be equal to the dimension of the second alignment portion 40 along the first direction X, which will not be elaborated further here.
[0084] In an exemplary embodiment, within the plane of the substrate 101, the width of the second modified region Bx2 is a third width S3. The third width S3 can be the dimension of the second modified region Bx2 in the direction away from its own geometric center. If the second modified region Bx2 is an annular shape, the third width S3 can be the width of the annular ring in the radial direction.
[0085] Figure 11 is a top view of the dashed area C in Figure 6 in another exemplary embodiment. The difference between Figure 11 and Figure 10 is that the shape of the second alignment part 40 is different. The rest can be referred to the description of Figure 10 above, and will not be repeated here.
[0086] As shown in Figure 11, the second alignment portion 40 may include a plurality of second sub-alignment portions 41. These second sub-alignment portions 41 may be arranged in a ring with gaps, and may be concentric with the ring of the second modified channel Px2. By setting the second alignment portion 40 to also be ring-shaped, and with a shape similar to the second modified channel Px2, the first optical signal L1 can be reflected by these multiple second sub-alignment portions 41 regardless of the direction from which it illuminates the vicinity of the second modified channel Px2. Furthermore, by isolating the multiple second sub-alignment portions 41 from each other, the first optical signal L1 can simultaneously illuminate the second sub-alignment portions 41 and other film layers. Since the reflected signal intensity of the second sub-alignment portions 41 differs significantly from that of other film layers, it facilitates the signal receiver's differentiation of the received reflected signal. The shape formed by the multiple second sub-alignment portions 41 can be configured according to the shape of the second modified channel Px2. For example, if the second modified channel Px2 is rectangular, the multiple second sub-alignment portions 41 can form a rectangle with gaps; this disclosure does not impose any limitations on this.
[0087] In an exemplary embodiment, the second alignment portion 40 may include four second sub-alignment portions 41, each of which is arc-shaped, and the four second sub-alignment portions 41 may form a ring with four gaps. In other embodiments, the second alignment portion 40 may include a greater number of second sub-alignment portions 41, and the plurality of second sub-alignment portions 41 may include a greater number of gaps. The second sub-alignment portions 41 may also be formed in other shapes. The shape and material of the second sub-alignment portions 41 can be referred to the foregoing description of the first sub-alignment portion 31, and this disclosure does not limit them.
[0088] In an exemplary embodiment, within the plane of the substrate 101, the width of the second sub-alignment portion 41 is a fourth width S4. The fourth width S4 can be the dimension of the second sub-alignment portion 41 along a direction away from the display area AA. For example, the fourth width S4 can be the dimension of the second sub-alignment portion 41 along a direction away from the geometric center of the second modified area Bx2. The fourth width S4 can be greater than or equal to the third width S3. By setting the fourth width S4 to be greater than or equal to the third width S3, the size of the second alignment portion 40 is greater than or equal to the size of the second modified area Bx2. The first light signal L1 is more likely to illuminate the second alignment portion 40, and the signal receiver 22 is more likely to receive the reflected signal from the second alignment portion 40. In other embodiments, the dimensional relationship between the third width S3 and the fourth width S4 can be set as needed, and this disclosure does not limit this.
[0089] In an exemplary embodiment, the third width S3 may be greater than or equal to 180 micrometers and less than or equal to 220 micrometers, and the fourth width S4 may be greater than or equal to 180 micrometers and less than or equal to 220 micrometers. For example, the third width S3 and the fourth width S4 may be approximately 200 micrometers, and this disclosure does not limit them.
[0090] Figure 12 is a cross-sectional view along the EE direction of Figure 10 in an exemplary embodiment, illustrating the film structure of the display substrate in the second modification region Bx2, and omitting the remaining structures of the display substrate. As shown in Figure 12, in the second modification region Bx2, the display substrate includes a substrate 101, a buffer layer 12, a second alignment portion 40, a second etching barrier portion 232, a light-emitting structure layer 103, and a top protective film (TPF) 501 arranged sequentially. The orthographic projection of the second etching barrier portion 232 on the substrate 101 can cover the orthographic projection of the second modification path Px2 on the substrate 101. The second modification path Px2 may include multiple discrete second modification points. The position, arrangement, and formation process of the multiple second modification points on the substrate 101 can be referred to the aforementioned description of the first modification point, and will not be repeated here.
[0091] In an exemplary embodiment, the display substrate may further include a second source / drain metal layer (not shown), a second passivation layer (not shown), and a second planarization layer (not shown) disposed on the side of the planarization layer 23 away from the substrate 101. The light-emitting structure layer 103 can be connected to the corresponding transistor through the second source / drain metal layer. As shown in FIG12, the second etch barrier 232 may include a first dam base 410, and at least one of a second dam base 420 and a third dam base 430, wherein the first dam base 410 may be disposed in the same layer as the planarization layer 23, the second dam base 420 may be disposed in the same layer as the second planarization layer, and the third dam base 430 may be disposed in the same layer as the pixel definition layer 304. In other embodiments, the second etch barrier 232 may further include a fourth dam base (not shown) disposed on the side of the third dam base 430 away from the substrate 101, and the fourth dam base may be disposed in the same layer as the isolation pillar 305. In an exemplary embodiment, the projected areas of the first dam base 410, the second dam base 420, the third dam base 430, and the fourth dam base on the substrate 101 can be increased or decreased sequentially. The number of film layers included in the second etching barrier portion 232 and their overlapping relationship can be set as needed. This disclosure does not limit this.
[0092] In an exemplary embodiment, as shown in FIG12, the orthographic projection of the second alignment portion 40 on the substrate 101 may be within the range of the orthographic projections of at least one of the first dam base 410, the second dam base 420, the third dam base 430, and the fourth dam base on the substrate 101.
[0093] Figure 13 is a cross-sectional view of the substrate of Figure 12 after etching in an exemplary embodiment, illustrating the cross-sectional structure along the EE direction of Figure 10. As shown in Figure 13, after forming the second modification channel Px2, the substrate 101 can be etched from the side of the substrate 101 away from the second etching barrier 232, and the substrate 101 is etched through at the second modification channel Px2, forming an annular second opening X2. The substrate 101 can be etched after forming the first modification channel Px1 and the second modification channel Px2, simultaneously forming the first opening X1 and the second opening X2. The process of forming the second opening X2 can refer to the aforementioned description of the process of forming the first opening X1, and will not be repeated here.
[0094] Figure 14 is a cross-sectional view of the substrate in Figure 12 after the first opening is formed in an exemplary embodiment, illustrating the cross-sectional structure along the EE direction of Figure 10. In the exemplary embodiment, after forming the second opening X2, the display substrate can be irradiated with a laser in a direction perpendicular to the substrate 101 to remove the film layer located within the range of the second opening X2, forming the first opening DA as shown in Figure 14. In other embodiments, other film layers within the range of the second opening X2 can be removed using other methods, and this disclosure is not limiting in this regard.
[0095] Figure 15 is a cross-sectional view of Figure 10 along the EE direction in another exemplary embodiment. The difference between Figure 15 and Figure 12 is that a sacrificial part 43 is added. The rest can be referred to the description of Figure 12 above, and will not be repeated here.
[0096] As shown in Figure 15, a second sacrificial portion 43 can be provided on the side of the buffer layer 12 near the planarization layer 23. The orthographic projection of the second sacrificial portion 43 on the substrate 101 can cover the orthographic projection of the second modified path Px2 on the substrate 101. The effect of the second sacrificial portion 43 can be referred to the aforementioned description of the first sacrificial portion 33, and will not be repeated here.
[0097] In an exemplary embodiment, the laser used for laser modification can be an infrared laser, and this disclosure does not limit this.
[0098] This disclosure provides a display substrate obtained by selective laser etching of a display motherboard as described above.
[0099] This disclosure also provides a display device, including a display substrate obtained by selective laser etching of the display motherboard using any of the above embodiments. The display device can be any product or component with display functionality, such as an OLED display, QLED display, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator; this disclosure is not limited thereto.
[0100] Although embodiments of the present disclosure have been shown and described above, it is to be understood that the above embodiments are exemplary and should not be construed as limiting the present disclosure. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present disclosure.
Claims
1. A selective laser etching method for a display motherboard, the display motherboard comprising a plurality of display substrates and a first modified region surrounding the display substrates, the first modified region including a first alignment portion surrounding the display substrates; the reflectivity of the first alignment portion being greater than the reflectivity of the remaining film layers within the first modified region; the method comprising: A light signal is emitted from the side of the substrate where no film layer is provided toward the first modified area, and the focal depth position of the first alignment part near the surface of the substrate is determined based on the reflected signal from the first alignment part. The lower limit of laser modification is determined based on the focal depth position of the first alignment portion on the side surface near the substrate, and the lower limit of laser modification is located within the substrate. The substrate is modified using a laser at the lower limit of the first laser modification, forming a first modification channel within the substrate; the first modification channel surrounds the display substrate and is located on the side of the first alignment portion close to the display substrate; The substrate is etched from the side of the substrate without a film layer, so that the substrate forms a first opening along the first modification path; The display substrate is removed from the display motherboard along the first opening.
2. The selective laser etching method for a display motherboard according to claim 1, wherein, The first alignment portion includes a plurality of first sub-alignment portions, which are isolated from each other; the step of determining the depth-of-focus position of the first alignment portion near the substrate surface based on the reflected signal from the first alignment portion includes: The focal depth position of the first sub-alignment portion near the surface of the substrate is determined based on the reflected signal from the first sub-alignment portion.
3. The selective laser etching method for a display motherboard according to claim 2, wherein, In a plane perpendicular to the substrate, the first modification channel includes a plurality of first modification points spaced apart. The step of modifying the substrate using a laser at the lower limit of the first laser modification, forming a first modification channel within the substrate, includes: The laser is used to form the plurality of first modification points at the first laser modification lower limit on the substrate and at a plurality of preset points located at the first laser modification lower limit away from the first alignment portion.
4. The selective laser etching method for a display motherboard according to claim 3, wherein during the process of forming the plurality of first modification points using the laser, the plurality of first modification points are formed into an arc shape that bends away from the display substrate in a plane perpendicular to the substrate.
5. The selective laser etching method for a display motherboard according to claim 3, wherein, In a direction perpendicular to the substrate, the first modified region includes the substrate, the first alignment portion, and the first etching barrier portion arranged sequentially, wherein the orthogonal projection of the first etching barrier portion on the substrate at least covers the orthogonal projection of the first modified path on the substrate.
6. The selective laser etching method for a display motherboard according to claim 5, wherein, In a direction perpendicular to the substrate, the first modified region further includes a first sacrificial portion, which is located on the side of the first etching barrier portion near the substrate; the orthographic projection of the first sacrificial portion on the substrate at least covers the orthographic projection of the first modified trace on the substrate; the absorption rate of the laser by the first sacrificial portion is greater than the absorption rate of the laser by the remaining film layers in the first modified region.
7. The selective laser etching method for a display motherboard according to claim 1, wherein, The display substrate includes a display area, a peripheral area surrounding the display area, and a second modified area, wherein the display area at least partially surrounds the second modified area; a second alignment portion is disposed within the second modified area, the reflectivity of the second alignment portion being greater than the reflectivity of the remaining film layers within the second modified area; before etching the substrate, the method further includes: A light signal is emitted from the side of the substrate where no film layer is provided toward the second modified region, and the focal depth position of the second alignment part near the surface of the substrate is determined based on the reflected signal from the second alignment part. The lower limit of laser modification is determined based on the focal depth position of the second alignment portion on the side surface near the substrate, and the lower limit of laser modification is located within the substrate. The substrate is modified by using a laser at the lower limit of the second laser modification, forming a second modification channel within the substrate; the second modification channel has a closed shape surrounding the second alignment portion.
8. The selective laser etching method for a display motherboard according to claim 7, wherein, The etching of the substrate from the side of the substrate without a film layer further includes: The substrate is made to form a second opening along the second modification channel; Remove the film layer of the display substrate located within the second opening area to form a first opening.
9. The selective laser etching method for a display motherboard according to claim 7, wherein the second alignment portion is located at the geometric center of the second modification track within the plane of the substrate.
10. The selective laser etching method for a display motherboard according to claim 7, wherein, The second alignment portion includes at least two second sub-alignment portions, and the at least two second sub-alignment portions are isolated from each other.
11. The selective laser etching method for a display motherboard according to claim 10, wherein, In the direction away from the geometric center of the second modification path, the size of the second sub-alignment portion is larger than the size of the second modification region.
12. The selective laser etching method for a display motherboard according to claim 7, wherein, In a direction perpendicular to the substrate, the second modified region includes the substrate, the second alignment portion, the second etching barrier portion, the light-emitting structure layer and the upper protective film arranged sequentially, wherein the orthogonal projection of the second etching barrier portion on the substrate at least covers the orthogonal projection of the second modified path on the substrate.
13. The selective laser etching method for a display motherboard according to claim 12, wherein, In a direction perpendicular to the substrate, the second modified region further includes a second sacrificial portion, which is located on the side of the second etching barrier portion near the substrate; the orthographic projection of the second sacrificial portion on the substrate at least covers the orthographic projection of the second modified trace on the substrate; the absorption rate of the laser by the second sacrificial portion is greater than the absorption rate of the laser by the remaining film layers in the second modified region.
14. A display substrate, wherein the display substrate is obtained by selective laser etching of a display motherboard as described in any one of claims 1-13.
15. A display device comprising the display substrate as described in claim 14.