Light-emitting chip and laser light source

Abstract

Provided in the present application are a light-emitting chip and a laser light source. The light-emitting chip comprises: a substrate, an N electrode, an N-type Bragg reflector stack, an active layer, a current-blocking layer, a P-type Bragg reflector stack and a P electrode, wherein the current-blocking layer is formed on the active layer, and a current injection aperture is formed in the central area of the current-blocking layer; the P-type Bragg reflector stack is formed on the current-blocking layer, and along a current injection direction, the projection of the P-type Bragg reflector stack on the active layer is larger than the current injection aperture; the P electrode is formed on the P-type Bragg reflector stack; and a PN junction depletion region is formed at the interface between the current-blocking layer and the P-type Bragg reflector stack, and the PN junction depletion region is used for preventing a current from flowing towards the current-blocking layer, such that the current is injected into the active layer through the current injection aperture, thereby improving the injection efficiency of the current in the active layer, and enabling more electrons and holes to be recombined in the active layer, thus improving the electro-optical conversion rate and light-emission quality of the light-emitting chip.

Description

A light-emitting chip and a laser light source

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202510389727.1, filed on March 28, 2025, entitled "A Light-Emitting Chip and Laser Light Source", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of laser technology, and more particularly to a light-emitting chip and a laser source. Background Technology

[0004] Laser light sources have a wide range of crucial applications in many fields. For example, in the field of projectors, their high brightness, high color saturation, and excellent contrast can bring users clear, realistic, and gorgeous image display effects. Whether it is presenting professional presentations in business office scenarios or creating an immersive viewing experience in home entertainment environments, they play a core role. In projection TVs, laser light sources can achieve large-size, high-definition screen displays, making the home theater viewing experience better and meeting people's growing demand for high-quality audio-visual experiences with their superior visual effects.

[0005] However, the light emission quality and electro-optical conversion efficiency of the light-emitting chips in related technologies need to be further improved. Summary of the Invention

[0006] A first aspect of this application discloses a light-emitting chip that can improve light emission quality and electro-optical conversion efficiency.

[0007] To achieve the above objectives, in some embodiments, the light-emitting chip includes:

[0008] Substrate;

[0009] N electrode, the N electrode being formed on the upper or lower side of the substrate;

[0010] An N-type Bragg mirror assembly, wherein the N-type Bragg mirror assembly is formed on the substrate;

[0011] An active layer is formed on the N-type Bragg mirror assembly;

[0012] A current blocking layer is formed on the active layer, and a current injection aperture is formed in the central region of the current blocking layer;

[0013] A P-type Bragg reflector array is formed on the current blocking layer, and along the current injection direction, the projection of the P-type Bragg reflector array on the active layer is larger than the current injection aperture.

[0014] The P-electrode is formed on the P-type Bragg mirror assembly;

[0015] A PN junction depletion region is formed at the junction of the current blocking layer and the P-type Bragg mirror group. The PN junction depletion region is used to prevent current from flowing into the current blocking layer, so that the current is injected into the active layer through the current injection aperture.

[0016] On the other hand, this application also discloses a laser light source, which includes a surface-emitting laser array, the surface-emitting laser array including a plurality of light-emitting units, and at least one of the light-emitting units being provided with any of the above-mentioned light-emitting chips. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 is a schematic diagram of the structure of the light-emitting chip provided in an embodiment of this application;

[0019] Figure 2 is a schematic diagram of the structure of a light-emitting chip provided in another embodiment of this application;

[0020] Figure 3 is a schematic diagram showing that the current blocking layer provided in the embodiment of this application is entirely N-type doped;

[0021] Figure 4 is a schematic diagram showing that the current blocking layer portion of the embodiment provided in this application is N-type doped;

[0022] Figure 5 is a schematic diagram of the current injection aperture using P-type doping provided in the embodiments of this application;

[0023] Figure 6 is a schematic diagram of the structure of a light-emitting chip provided in another embodiment of this application;

[0024] Figure 7 is a schematic diagram of the structure of a light-emitting chip provided in another embodiment of this application;

[0025] Figure 8 is a schematic diagram of the current blocking layer being epitaxially grown on the substrate during the fabrication of the light-emitting chip provided in the embodiments of this application.

[0026] Figure 9 is a schematic diagram of forming an etching window in the portion of the current blocking layer that needs to be etched when fabricating the light-emitting chip provided in the embodiments of this application;

[0027] Figure 10 is a schematic diagram of the current blocking layer in the etching window after etching when manufacturing the light-emitting chip provided in the embodiment of this application.

[0028] Figure 11 is a schematic diagram after cleaning the mask protective layer during the fabrication of the light-emitting chip provided in the embodiment of this application;

[0029] Figure 12 is a schematic diagram showing the remaining portion after epitaxial growth during the fabrication of the light-emitting chip provided in the embodiment of this application.

[0030] Figure 13 is a schematic diagram of etching the current blocking layer and the etching blocking layer within the etching window during the fabrication of the light-emitting chip provided in the embodiments of this application.

[0031] Figure 14 is a schematic diagram of the process of etching the current blocking layer and the etching blocking layer in the etching window and cleaning the mask protective layer when fabricating the light-emitting chip provided in the embodiment of this application.

[0032] Figure 15 is a schematic diagram showing the epitaxial growth of the remaining portion after etching the current blocking layer and the etching blocking layer in the etching window and cleaning the mask protective layer when fabricating the light-emitting chip provided in the embodiment of this application.

[0033] Figure 16 is a schematic diagram of a laser source provided in an embodiment of this application.

[0034] Key reference numerals: A-Light-emitting chip; 1-Substrate; 2-N-electrode; 3-N-type Bragg mirror assembly; 4-Active layer; 5-Current blocking layer; 6-Current injection aperture; 7-P-type Bragg mirror assembly; 8-P-electrode; 9-Phase matching layer; 10-Etching barrier layer; 11-Mask protection layer; 12-Etching window; 13-Hollow region; 13a-First hollow region; 13b-Second hollow region; B-Laser source; C-Surface laser emission array; D-Microlens array; EX-Cube combining prism; 100-Imaging lens; 200-Screen. Detailed Implementation

[0035] To make the objectives, implementation methods and advantages of this application clearer, the exemplary implementation methods of this application will be clearly and completely described below with reference to the accompanying drawings of the exemplary embodiments of this application. Obviously, the described exemplary embodiments are only some embodiments of this application, and not all embodiments.

[0036] In this application, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "middle," "vertical," "horizontal," "lateral," and "longitudinal" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing this application and its embodiments, and are not intended to limit the indicated device, element, or component to having a specific orientation, or to be constructed and operated in a specific orientation.

[0037] Furthermore, in addition to indicating location or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in some cases to indicate a certain dependency or connection relationship. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0038] Furthermore, the terms "first," "second," etc., are primarily used to distinguish different devices, elements, or components whose specific types and structures may be the same or different, and are not intended to indicate or imply the relative importance or quantity of the indicated devices, elements, or components. Unless otherwise stated, "a plurality of" means two or more.

[0039] As some related technologies have mentioned, the light-emitting chip is the core component for photoelectric conversion in laser light sources. The light-emitting chip is mainly composed of key structures such as a substrate, electrodes, and semiconductor functional layers. The substrate provides a stable physical support for the other components of the light-emitting chip. The electrodes are used to construct the paths for current input and output. The semiconductor functional layer includes N-type semiconductor regions and P-type semiconductor regions, which work together with the active layer in the middle. When a positive voltage is applied across the electrodes, electrons will start from the N-type semiconductor region and be injected into the active layer, while holes will migrate from the P-type semiconductor region towards the active layer. In the active layer, electrons and holes meet and recombine. In this process, energy is released and radiated outward in the form of photons, thereby completing the conversion from electrical energy to light energy and realizing light emission.

[0040] However, due to the difficulty in ensuring the uniformity of the materials in the light-emitting chip, the distribution of impurities within the material inevitably varies. In addition, the manufacturing process has certain limitations in precision. These factors combined result in the current not being effectively concentrated in the ideal effective area when injected into the active layer. This leads to disordered diffusion of the current as it propagates within the chip, preventing uniform distribution of the current within the active layer. Consequently, the recombination of charge carriers varies greatly in different parts of the active layer. Some areas have excessively strong charge carrier recombination, resulting in bright light emission, while other areas have insufficient charge carrier recombination, resulting in dim light emission. This leads to poor light emission quality of the entire light-emitting chip. Furthermore, because the current cannot be efficiently concentrated in the active layer for charge carrier recombination, a large amount of electrical energy is lost in non-critical areas, resulting in low electro-optical conversion efficiency.

[0041] This application provides a light-emitting chip that forms a PN junction depletion region at the junction of a current blocking layer and a P-type Bragg mirror assembly. This depletion region prevents current from flowing into the current blocking layer, allowing current to enter the active layer only through a current injection aperture. This improves the injection efficiency of the current in the active layer, enabling more electrons and holes to recombine within it, thus increasing the electro-optical conversion efficiency of the light-emitting chip. Furthermore, because the current is effectively confined within the current injection aperture, disordered current diffusion within the chip is avoided, resulting in a more uniform carrier distribution in the active layer. This reduces differences in carrier recombination across different parts of the active layer, preventing some areas from emitting too much light while others emit too little, thereby improving the uniformity of light emission across the entire chip and enhancing the light emission quality.

[0042] The technical solution of the light-emitting chip of this application will be further described below with reference to specific embodiments and Figures 1-15.

[0043] As shown in Figure 1, the light-emitting chip A includes a substrate 1. The substrate 1 can provide stable support for other functional layers of the light-emitting chip A, ensuring that the light-emitting chip A maintains its structural integrity during manufacturing, packaging and use, and can withstand the influence of various processes and external environments. In this embodiment, the substrate 1 can be a gallium arsenide (GaAs) substrate, a gallium nitride (GaN) substrate, an indium phosphide (InP) substrate or a silicon (Si) substrate, etc., and is not limited here.

[0044] As shown in Figures 1 and 2, the light-emitting chip A may also include an N electrode 2, which is formed on the upper or lower side of the substrate 1.

[0045] As shown in Figures 1 and 2, the light-emitting chip A may also include an N-type Bragg mirror group 3. The N-type Bragg mirror group 3 may be located on the same side of the substrate 1 as the N electrode 2, or on a different side.

[0046] The N-type Bragg reflector group 3 is typically a periodic structure composed of alternating stacks of two semiconductor materials with different refractive indices. These materials are generally made to exhibit N-type conductivity through specific doping processes. For example, in common vertical-cavity surface-emitting lasers (VCSELs), aluminum arsenide (AlAs) and aluminum gallium arsenide (AlGaAs) may be used to alternately grow the reflector group. Based on the Bragg reflection principle, when light waves propagate in this periodic structure, reflection occurs at the interface between materials with different refractive indices. By rationally designing the thickness and refractive index of each layer, the light waves reflected from different interfaces can produce constructive interference at a specific wavelength, thereby achieving high reflectivity for that specific wavelength of light. For the light-emitting chip A, the N-type Bragg reflector group 3 can effectively reflect the light generated in the active region back into the cavity, increasing the number of round trips of light in the cavity, thereby improving the luminous efficiency.

[0047] The N-type Bragg reflector group 3 is typically formed on the substrate 1 using epitaxial growth techniques, such as molecular beam epitaxy (MBE). In this technique, various elements that make up the reflector group (such as gallium, aluminum, arsenic, etc.) are placed in different evaporation sources and heated to evaporate and form molecular beams. These molecular beams are directed toward the heated surface of the substrate 1 at a certain speed and direction. On the surface of the substrate 1, these atoms are arranged according to a certain crystal structure and growth rules, gradually growing the desired semiconductor thin film layer. Alternatively, metal-organic chemical vapor deposition (MOCVD) can be used, which utilizes metal-organic compounds and gaseous hydrides as source materials. Under high temperature and a suitable gas atmosphere, these source materials undergo a chemical reaction on the surface of the substrate 1, decomposing the desired elements and depositing them on the substrate 1 to form a semiconductor thin film.

[0048] As shown in Figure 1, the light-emitting chip A may also include an active layer 4, which is formed on the N-type Bragg mirror group 3. The active layer 4 is usually composed of a quantum well structure. Common material systems include gallium arsenide (GaAs)-based, gallium nitride (GaN)-based, and indium phosphide (InP)-based. Taking red light GaAs-based as an example, a thin gallium indium phosphide (GaInP) quantum well is generally embedded in aluminum gallium indium phosphide (AlGaInP) material. The width of the quantum well is usually tens of nanometers or even smaller. This nanoscale structure can effectively confine electrons and holes. When the current... When injected into the active layer 4, electrons and holes are injected into the quantum well. Due to the confinement effect of the quantum well, the movement of electrons and holes within the well is restricted to a two-dimensional plane, and their energy states become discrete. When an electron transitions from a high-energy state to a low-energy state and recombines with a hole, it releases energy in the form of a photon, thereby achieving light emission. By adjusting parameters such as the material composition and well width of the quantum well, the wavelength of light emission can be precisely controlled. Furthermore, the active layer 4 has optical gain characteristics, meaning that when light propagates in the active layer 4, the number of photons continuously increases due to stimulated emission, and the light intensity is amplified.

[0049] The formation of the active layer 4 on the N-type Bragg mirror group 3 also requires precise epitaxial growth technology. Common formation methods include molecular beam epitaxy (MBE) and metal-organic chemical vapor deposition (MOCVD), which are conventional techniques in this field and will not be elaborated here.

[0050] As shown in Figure 1, the light-emitting chip A may also include a current blocking layer 5, which is formed on the active layer 4. A current injection aperture 6 is formed in the central region of the current blocking layer 5. The current blocking layer 5 is typically formed on the active layer 4 using molecular beam epitaxy (MBE) or metal-organic chemical vapor deposition (MOCVD) techniques.

[0051] Forming a current injection aperture 6 in the central region of the current blocking layer 5 can be achieved by etching away the current blocking layer 5 at that location, thereby forming a hollow region. It is worth noting that after forming the hollow region, other structures need to be grown in the hollow region. For example, when a P-type Bragg reflector group 7 is subsequently formed on the current blocking layer 5, some of the material of the P-type Bragg reflector group 7 will automatically fill the hollow region, thereby forming the current injection aperture 6 in this embodiment. Therefore, the current injection aperture 6 is not a hollow structure, but a channel through which current and light can pass.

[0052] As shown in Figure 1, the light-emitting chip A may further include a P-type Bragg mirror group 7 formed on the current blocking layer 5. Along the current injection direction, the projection of the P-type Bragg mirror group 7 onto the active layer 4 is larger than the current injection aperture 6. The current injection direction is the direction indicated by arrow X in Figure 1.

[0053] P-type Bragg reflector group 7 corresponds to N-type Bragg reflector group 3. The two work together to achieve efficient laser emission. P-type Bragg reflector group 7 is also a periodic structure formed by alternating stacking of two semiconductor materials with different refractive indices. Its material system is usually similar to that of N-type Bragg reflector group 3, but it is P-type in terms of doping type. For example, gallium arsenide (GaAs) and different composition aluminum gallium arsenide (AlGaAs) materials are commonly used. By doping with acceptor impurities such as zinc (Zn), it exhibits P-type conductivity. This periodic structural design is based on the Bragg reflection principle. By precisely controlling the thickness and refractive index of each layer of material, high reflectivity for light of a specific wavelength can be achieved.

[0054] For example, in a common vertical-cavity surface-emitting laser (VCSEL), the P-type Bragg mirror group 7 and the N-type Bragg mirror group 3 together form an optical resonant cavity. The light generated by the active layer 4 is reflected multiple times within the cavity, increasing the number of round trips of the light in the active layer 4. This increases the probability of interaction between the light and the electron-hole pairs in the active layer 4, enhancing the stimulated emission process and thus improving the luminous efficiency and output power of the laser. At the same time, it can also control the direction of the emitted light, allowing the laser to be emitted perpendicular to the chip surface, achieving efficient light extraction. In addition, the P-type Bragg mirror group 7, the N-type Bragg mirror group 3, and the active layer 4 together form a complete PIN structure. When a forward bias voltage is applied across the device, holes in the P-type Bragg mirror group 7 can be smoothly injected into the active layer 4 and recombine with electrons injected from the N-type Bragg mirror group 3 into the active layer 4, thereby realizing current conduction and laser generation.

[0055] As shown in Figure 1, the light-emitting chip A may also include a P electrode 8, which is formed on the P-type Bragg reflector group 7.

[0056] A positive voltage is applied across P electrode 8 and N electrode 2, and current flows in from P electrode 8, passing through P-type Bragg mirror group 7. Due to the presence of current blocking layer 5, the current can only flow to active layer 4 through the current injection aperture 6 in its central region. At the same time, electrons are injected into active layer 4 from N electrode 2 through N-type Bragg mirror group 3. Electrons and holes meet and recombine in active layer 4. Active layer 4 usually adopts a quantum well structure, which can effectively confine electrons and holes, allowing them to release energy in the form of photons during recombination. P-type Bragg mirror group 7 and N-type Bragg mirror group 3 form an optical resonant cavity, which reflects the light generated by active layer 4 multiple times, increasing the number of round trips of the light in the cavity. When the gain of the light in the cavity is greater than the loss, a stable laser oscillation is formed, and finally, it is emitted vertically from the chip surface.

[0057] In one possible embodiment, a PN junction depletion region is formed at the junction of the current blocking layer 5 and the P-type Bragg mirror group 7. The PN junction depletion region is used to prevent current from flowing into the current blocking layer 5 so that current can be injected into the active layer 4 through the current injection aperture 6.

[0058] Within the depletion region of a PN junction, there exists a built-in electric field pointing from the N-region to the P-region. For majority carriers, such as holes in the P-region diffusing into the N-region and electrons in the N-region diffusing into the P-region, the built-in electric field exerts a force opposite to the diffusion direction, hindering their movement and thus suppressing the diffusion current of majority carriers. From a macroscopic perspective, this manifests as a blockage of current. Furthermore, the concentration of mobile carriers within the depletion region of a PN junction is extremely low, with almost no large number of carriers capable of free movement and forming a current. This means that even under the influence of an external electric field, there are not enough carriers to conduct current, resulting in a high-resistivity depletion region that effectively blocks current flow.

[0059] Without a PN junction depletion region, current may diffuse laterally at the junction of the current blocking layer 5 and the P-type Bragg mirror group 7, preventing the current from being effectively concentrated in the current injection aperture 6 and injected into the active layer 4. In this embodiment, a PN junction depletion region is formed at the junction of the current blocking layer 5 and the P-type Bragg mirror group 7 to prevent current from flowing into the current blocking layer 5. This allows the current to enter the active layer 4 only through the current injection aperture 6, thereby improving the injection efficiency of the current in the active layer 4. This allows more electrons and holes to recombine in the active layer 4, thereby improving the luminous efficiency and output power of the light-emitting chip A. Furthermore, when the current can be accurately injected into the active layer 4, the power loss in non-critical areas (such as the current blocking layer 5) is reduced. By limiting the current path through the PN junction depletion region, unnecessary energy consumption is reduced, thereby improving the electro-optical conversion efficiency of the light-emitting chip A.

[0060] Furthermore, since the current is effectively confined within the current injection aperture 6 to the active layer 4, the PN junction depletion region formed at the interface between the current blocking layer 5 and the P-type Bragg mirror group 7 undergoes diffusion due to the difference in carrier concentration between the P-region and the N-region. This results in a built-in electric field at the interface, directed from the N-region to the P-region. For holes (majority carriers) in the P-type Bragg mirror group 7, the potential difference created by the built-in electric field makes it difficult for them to diffuse into the current blocking layer 5, as holes need to overcome the electric field force to enter the current blocking layer 5 from the P-type Bragg mirror group 7. Similarly, for electrons in the current blocking layer 5 (assuming an N-type semiconductor, where electrons are the majority carriers), the built-in electric field also prevents them from diffusing into the P-type Bragg mirror group 7. The ragm mirror group 7 diffuses the current, and the built-in electric field acts as a "barrier," effectively blocking the lateral diffusion of current at the interface. This forces the current to be injected vertically into the active layer 4 only through the current injection aperture 6. Furthermore, the PN junction depletion region is a high-resistance region. Within the PN junction depletion region, most charge carriers have been consumed by diffusion, leaving only immobile ionic impurities. Therefore, the charge carrier concentration in this region is very low, and the resistance is very high. When the current attempts to flow laterally from the P-type Bragg mirror group 7 to the current blocking layer 5, it encounters the high resistance of the depletion region, making it difficult for the lateral current to pass through. This restricts the lateral diffusion of the current and guides the current to preferentially enter the active layer 4 through the relatively low-resistance current injection aperture 6.

[0061] In this way, the current is injected vertically into the active layer 4 along the current injection aperture 6. Compared with lateral diffusion, this vertical injection method can more directly transport the charge carriers to specific locations in the active layer 4, avoiding the situation where charge carriers accumulate in some areas and are scarce in others due to lateral diffusion. This helps to achieve a uniform distribution of charge carriers in the active layer 4, reduces the difference in charge carrier recombination in different parts of the active layer 4, and avoids the phenomenon of some areas emitting light too strongly while others emitting light too weakly. This improves the uniformity of light emission of the entire light-emitting chip A and enhances the light emission quality.

[0062] In addition, some related technologies use oxide-doped barrier layers as current-blocking layers to guide current through the current injection aperture. The oxide-doped barrier layer mainly relies on its own high resistance characteristics to limit the lateral diffusion of current. This method is difficult to form a completely uniform resistance distribution. In practical applications, when the current density is high, local current leakage is likely to occur, causing some current to bypass the aperture and fail to be effectively injected into the active layer. In this embodiment, a PN junction depletion region is constructed at the junction of the current-blocking layer and the P-type Bragg mirror group. The PN junction depletion region blocks the current based on the built-in electric field. When the PN junction depletion region is formed at the junction of the current-blocking layer and the P-type Bragg mirror group, the built-in electric field will force the charge carriers to move in a specific direction, which will greatly prevent the current from flowing into the current-blocking layer. This allows the current to enter the active layer more accurately through the current injection aperture. Even under high current density, it can maintain a good current confinement effect and significantly improve the current injection efficiency.

[0063] The formation of the PN junction depletion region at the junction of the current blocking layer 5 and the P-type Bragg reflector group 7 can be achieved by making the current blocking layer 5 N-type doped. The current blocking layer 5 can be entirely N-type doped (as shown in Figure 3, a1 is the PN junction depletion region), or it can be N-type doped only at the junction of the two (as shown in Figure 4, a1 is the PN junction depletion region). This allows holes in the P-type region to diffuse into the current blocking layer 5 due to the difference in carrier concentration when they come into contact, while electrons in the current blocking layer 5 diffuse into the P-type region. This causes the carriers at the junction to recombine, thereby forming a region lacking mobile carriers at the junction, i.e., the PN junction depletion region.

[0064] For example, the current blocking layer 5 is an N-type doped current blocking layer 5, and the doping concentration of the current blocking layer 5 can be a fixed value. In this way, its internal electrical properties are relatively uniform and stable, and the current blocking ability is relatively consistent throughout the entire current blocking layer 5. It can reliably prevent the current from diffusing into unnecessary areas in the current blocking layer 5, so that the current flows more concentratedly through the current injection aperture 6 to the active layer 4. Moreover, its implementation process is relatively simple, requiring only precise control of one doping process to make the doping concentration of the entire current blocking layer 5 reach the set fixed value. This can reduce the complexity and cost of the manufacturing process, and improve production efficiency and product yield. For example, the N-type doped current blocking layer 5 can be Si doped, and its doping concentration can be 1×e18 cm⁻¹. -1 .

[0065] Alternatively, the doping concentration can increase along the growth direction of the N-type doped current blocking layer 5 (i.e., along the direction from the active layer 4 to the P-type Bragg mirror group 7). Thus, as the doping concentration increases along the growth direction, the region closer to the P-type Bragg mirror group 7 has a higher doping concentration and stronger current blocking capability. Since the current has a greater diffusion tendency near the P-type Bragg mirror group 7, a higher doping concentration can better suppress this diffusion, thereby more effectively confining the current and allowing it to enter the active layer 4 more concentratedly through the current injection aperture 6. For example, the current blocking layer 5 can be Si-doped, and its doping concentration along the growth direction of the N-type doped current blocking layer 5 can range from 5 × 17 cm⁻¹. -1 Increasing to 1×e18 cm -1 .

[0066] In one possible embodiment, the refractive index of the current blocking layer 5 is n1, and the refractive index of the current injection aperture 6 is n2, where n1 and n2 satisfy: -1.3≤n1-n2≤1.3.

[0067] The refractive index of the current injection aperture 6 refers to the refractive index of the filling material inside the current injection aperture 6.

[0068] During the operation of the light-emitting chip A, when light propagates from the current injection aperture 6 to the current blocking layer 5, if the refractive index difference between the two is large, the lateral refractive index distribution of the current blocking layer 5 and the current injection aperture 6 will exhibit a step abrupt change, which will cause a series of problems that are detrimental to the display imaging quality. For example, when the diameter of the current injection aperture 6 is small (e.g., <5um, more preferably ≤3um), the evanescent wave of the light field at the edge of the current injection aperture 6 is abruptly cut off, resulting in a strong diffraction effect, which in turn leads to a sharp increase in the divergence angle of the beam and distortion of the light field distribution. When the light-emitting chip A forms an array structure in the form of light-emitting units, crosstalk of the beam will occur between adjacent light-emitting units. In addition, the high refractive index difference also exacerbates the field intensity gradient at the edge of the current injection aperture 6, leading to an increase in diffraction loss, which in turn leads to problems such as an increase in the beam divergence angle, distortion of the light field distribution, and increased crosstalk, seriously degrading the display imaging quality.

[0069] This embodiment ensures that -1.3 ≤ n1 - n2 ≤ 1.3, thereby controlling the refractive index difference between the two media within the range of ±1.3. According to Snell's law of refraction, when light enters another medium (refractive index n1) from one medium (refractive index n2), the incident angle θ1 and the refraction angle θ2 satisfy n1sinθ2=n2sinθ1. When |n1-n2| is large, for the same incident angle, the change in the refraction angle will be greater. For example, if n1 is much larger than n2, when light enters the current blocking layer 5 from the current injection aperture 6, the refracted light will be significantly deflected towards the normal direction; conversely, if... When n1 is much smaller than n2, the refracted light rays will deflect significantly away from the normal direction. When the refractive index difference is limited to -1.3≤n1-n2≤1.3, this degree of deflection is effectively controlled. The refraction angle of light at the interface between the current blocking layer 5 and the current injection aperture 6 is relatively small, making the light propagate closer to the central axis during propagation. This reduces beam divergence caused by refraction. In display imaging, good beam collimation is crucial for maintaining image clarity. Reducing refraction helps ensure that the light is accurately projected to the predetermined position and avoids image blurring due to light dispersion.

[0070] When light propagates between the current blocking layer 5 and the current injection aperture 6, the wavefront changes due to the difference in their refractive indices. If |n1-n2| is too large, the change in the wavefront becomes drastic, leading to complex interference of the secondary waves emitted by the secondary wave source and thus enhancing the diffraction effect. When -1.3≤n1-n2≤1.3, the change in the wavefront when light passes through the interface is relatively small. This means that the interference between the secondary waves emitted by the secondary wave source is relatively simple and will not produce obvious side lobes or complex interference patterns, thereby effectively suppressing the diffraction effect. After the diffraction effect is weakened, the divergence angle of the beam can be controlled, and the light field distribution is more uniform. In display applications, a uniform light field distribution is crucial for ensuring uniform brightness and color consistency of the image, avoiding problems such as local overbrightness or underbrightness and color deviation caused by light field distribution distortion.

[0071] For example, when n1-n2 = -1.3, the refractive index difference reaches its lower limit. When light propagates between the current blocking layer and the current injection aperture, the wavefront will change to some extent, but still within a relatively small range. The secondary interference emitted by the secondary source is relatively simple, without producing obvious sidelobes or complex interference patterns, effectively suppressing diffraction effects. The beam divergence angle can be well controlled, and the light field distribution is relatively uniform. In display applications, it can basically guarantee uniform brightness and color consistency of the image, without obvious local overbrightness or underbrightness or color deviation. When n1-n2 = 1.3, the refractive index difference reaches its upper limit, and the degree of wavefront change during light propagation is still within an acceptable range.

[0072] When n1-n2=0, it means that the refractive indices of the current blocking layer and the current injection aperture are the same. When light propagates between the two, the wavefront hardly changes. The secondary interference situation emitted by the secondary source is the simplest, and there is almost no diffraction effect. The divergence angle of the beam is the smallest, and the light field distribution is the most uniform. In display applications, it can provide the most ideal uniform brightness and color consistency for the image, and avoid various problems caused by light field distribution distortion to the greatest extent.

[0073] In one possible embodiment, the refractive index of the current blocking layer 5 is n1, and the refractive index of the current injection aperture 6 is n2, where n1 and n2 satisfy: -0.75≤n1-n2≤0.75.

[0074] Thus, when the refractive index difference between the current injection aperture 6 and the current blocking layer 5 decreases, the refraction at their interface is further weakened, thereby further reducing the geometric divergence of the beam. At the same time, a smaller refractive index difference may lead to waveguide mode broadening and increase the size of the outgoing beam spot. According to diffraction theory, a larger beam spot size will reduce the diffraction divergence angle, thereby making the overall beam divergence angle smaller and the light field distribution more uniform.

[0075] For example, when n1 > n2 (anti-waveguide structure), the material of the current blocking layer 5 is N-doped AlGaAs (2.92 < n1 < 3.65), the material of the current injection aperture 6 is AlAs (n2 = 2.92), and the maximum n1-n2 is 0.73; when n1 < n2 (positive waveguide structure), the material of the current blocking layer 5 is N-doped AlGaAs (2.92 < n1 < 3.65), the material of the current injection aperture 6 is GaAs (n2 = 3.65), and the maximum n1-n2 is -0.73; or, the material of the current blocking layer 5 is N-doped AlAs (n1 = 2.92), the material of the current injection aperture 6 is AlGaAs (2.92 < n2 < 3.65), and the maximum n1-n2 is -0.73.

[0076] In one possible embodiment, the refractive index of the current blocking layer 5 is n1, and the refractive index of the current injection aperture 6 is n2, where n1 and n2 satisfy: -0.35≤n1-n2≤0.35.

[0077] For example, the material of the current blocking layer 5 is N-doped Al. 0.5 Ga 0.5 As(n1=3.285), the material for current injection aperture 6 is Al. 0.95 Ga 0.05 As(n2=2.957), n1-n2=0.328.

[0078] In one possible embodiment, the current blocking layer 5 and the current injection aperture 6 are composed of the same material with different doping types.

[0079] For example, the material of the current blocking layer 5 is N-doped Al. 0.95 Ga 0.05 As (n1 = 2.957), the material injected into the current-hole aperture 6 is P-doped Al. 0.95 Ga 0.05 As(n2=2.957), n1-n2=0; or, the material of the current blocking layer 5 is N-doped Al. 0.5 Ga 0.5 As (n1 = 3.285), the material for current injection aperture 6 is P-doped Al. 0.5 Ga 0.5 As(n2=3.285), n1-n2=0.

[0080] Since the current blocking layer 5 and the current injection aperture 6 are made of the same material, only with different doping types, the refractive index of the material will not change abruptly at the interface between the current blocking layer 5 and the current injection aperture 6. This maintains the consistency and uniformity of the refractive index, and the light will not produce additional scattering and diffraction due to the sudden change in refractive index during propagation. This effectively reduces the diffraction effect, makes the light field distribution more uniform, and makes the propagation direction of the beam more stable, which is beneficial to improving the quality and efficiency of display imaging.

[0081] Of course, the current blocking layer 5 and the current injection aperture 6 can also be different materials with a small difference in refractive index. For example, the current blocking layer 5 is GaAs and the current injection aperture 6 is AlGaAs.

[0082] Furthermore, different electrical properties can be achieved in the same material by using different doping types. For example, if the current blocking layer 5 is N-type doped and the current injection aperture 6 is P-type doped, a PN junction depletion region can be formed at the junction of the current blocking layer 5 and the current injection aperture 6 (see Figure 5, the straight arrows indicate the direction of current flow, a1 and a2 are both PN junction depletion regions). This effectively blocks the lateral diffusion of current toward the current blocking layer 5, thereby confining the current to a specific path and making it flow more concentratedly through the current injection aperture 6 to the active region, thus improving the efficiency and accuracy of current injection.

[0083] In the light-emitting chip A, when the diameter of the current injection aperture 6 is small, due to the dominance of the wave nature of light, the small aperture will induce a stronger diffraction effect (the divergence angle is inversely proportional to the aperture diameter). In actual propagation, when light passes through the micron-sized aperture, it will rapidly spread laterally due to diffraction. Waveguide constraints need to be constructed through the refractive index difference to suppress divergence.

[0084] While traditional oxide-confined structures provide strong waveguide confinement, they introduce a sharp abrupt change in refractive index at the aperture edge. This abrupt change excites more higher-order modes and enhances Fresnel scattering at the interface, causing some of the light field energy to shift towards the lateral propagation direction, thus increasing the effective divergence angle. In contrast, this embodiment guides the light field towards the axis through a gradually varying refractive index distribution, reducing the refractive index contrast at the aperture edge and weakening the diffraction main lobe broadening and side lobe scattering caused by the abrupt interface. This concentrates the light field energy more towards axial propagation, providing moderate optical confinement while minimizing the exacerbating effect of interface perturbations on the diffraction process. It also avoids the negative coupling effect between strong refractive index differences and micro / nano apertures. Therefore, the structure in this embodiment is particularly suitable for light-emitting chips with small-diameter current-injected apertures.

[0085] For example, VCSELs with an oxide confinement layer structure that utilizes refractive index difference to confine the beam typically have an oxide confinement layer made of high-aluminum AlGaAs material. An insulating oxide layer is formed through a wet oxidation process. This layer has a much lower refractive index than the unoxidized region (current injection aperture 6) (such as unoxidized Al). 0.95 Ga 0.05 As material has a refractive index of 3, and Al after oxidation... x O y The material has a refractive index of only 1.6. There is an effective refractive index difference between the oxidized and non-oxidized regions, which plays a certain role in light confinement. However, during the oxidation process, the oxidation gradually proceeds from the outer periphery of the layer structure towards the center. For the relatively small current injection aperture 6, it is difficult to control the oxidation range. The light-emitting chip A structure provided in this embodiment does not require an oxidation process (it does not require oxidation of the current blocking layer 5 to create a refractive index difference between the current blocking layer 5 and the current injection aperture 6), which reduces the manufacturing difficulty of the light-emitting chip A.

[0086] In one possible embodiment, the diameter of the current injection aperture 6 ranges from 0.1 μm to 5 μm, preferably from 0.3 μm to 3 μm, and more preferably from 0.3 μm to 2 μm.

[0087] In this embodiment, the diameter of the current injection aperture 6 is limited to between 0.1 μm and 5 μm. This smaller aperture restricts the lateral diffusion of the current, reducing its spread outside the active region. The current can then be injected more concentrated into the active region, more effectively exciting electron-hole recombination. This allows the threshold current of the light-emitting chip A to be reached at a lower current, achieving light emission. Furthermore, the smaller aperture 6 allows for a relatively higher carrier concentration injected into the active region. Because the smaller aperture 6 limits the injection area, at the same injection current, the smaller aperture leads to an increase in carrier density within the active region. When the carrier concentration reaches a certain level, population inversion is more easily achieved, thereby reducing the threshold current of the device. In addition, with a large aperture, the current distribution is relatively dispersed, which may lead to a lower carrier concentration at the edge of the active region, thus increasing the probability of nonradiative recombination. On the other hand, a small aperture concentrates the current in the center of the active region, where the crystal quality is usually better and there are fewer defects, which helps to reduce nonradiative recombination and improve luminous efficiency. This reduces the energy required to reach the threshold current, which is the minimum current value at which the light-emitting chip A starts to work effectively. Lowering the threshold current means that the light-emitting chip A can reach the working state at a lower current, thereby reducing energy consumption.

[0088] For example, when the diameter of the current injection aperture 6 is 0.1 μm, this aperture is extremely small, which maximizes the restriction on the lateral diffusion of the current. The current can be injected into the active region in a highly concentrated manner. Under the same injection current, the carrier density in the active region increases significantly, so that the current is highly concentrated in the center of the active region. The crystal quality in this region is good and there are few defects, which greatly reduces non-radiative recombination, thereby significantly improving the luminous efficiency, reducing the threshold current, and enabling the light-emitting chip to operate at a lower current, thus reducing energy consumption.

[0089] When the diameter of the current injection aperture 6 is 2.55 μm, this aperture achieves a balance between restricting current diffusion and maintaining a certain injection area. It can effectively restrict the lateral diffusion of the current, allowing the current to be injected into the active region in a more concentrated manner, while avoiding the increase in injection difficulty due to the aperture being too small. The current can still be concentrated in the center of the active region, reducing non-radiative recombination.

[0090] When the current injection aperture 6 has a diameter of 5μm, although the aperture is relatively large, it can still limit the lateral diffusion of the current to a certain extent. Compared with larger apertures or unrestricted cases, the current is still injected into the active region in a relatively concentrated manner.

[0091] In one possible embodiment, the threshold current of the light-emitting chip A is 0.1μA-400μA, preferably 0.3μA-260μA; more preferably, the threshold current of the light-emitting chip A is 0.5-200μA.

[0092] In one possible embodiment, the thickness of the current injection aperture 6 is d1, which satisfies: d1=λ / 4n2, where λ is the wavelength of the laser emitted by the light-emitting chip A, and n2 is the refractive index of the current injection aperture 6.

[0093] For example, in this embodiment, the wavelength λ of the laser emitted by the light-emitting chip A can be in the range of 625nm-660nm.

[0094] From an optical perspective, when the thickness of the current injection aperture 6 satisfies d1 = λ / 4n2 (Bragg condition), it is equivalent to a thin film with an optical thickness of λ / 4n2. During light propagation, when light travels from the active layer 4 to the current injection aperture 6, it will be reflected at the upper and lower interfaces of the current injection aperture 6. According to the thin film interference principle, since the optical path difference between the reflected light at the upper and lower interfaces is λ / 2, these two reflected beams will undergo constructive interference, thereby enhancing the intensity of the reflected light. This enhanced reflection effect helps to confine more light within the resonant cavity composed of the active layer 4 and the mirror, increasing the number of round trips of light within the cavity, increasing the probability of interaction between light and charge carriers in the active layer 4, and thus enhancing the stimulated emission process, thereby improving the luminous efficiency and output power of the light-emitting chip A.

[0095] In one possible embodiment, the thickness of the current blocking layer 5 is 30nm-60nm to ensure that the current blocking layer 5 will not experience electrical failures such as breakdown when subjected to a certain voltage, and to ensure that the current blocking layer 5 can achieve the function of blocking current.

[0096] In one possible embodiment, as shown in FIG6, a phase matching layer 9 is provided between the current blocking layer 5 and the active layer 4.

[0097] An optical resonant cavity is formed between the P-type Bragg reflector group 7 and the N-type Bragg reflector group 3. Light emitted from the active layer 4 is reflected back and forth between the two reflector groups. The phase matching layer 9 ensures that the phase of the light remains consistent after each reflection, causing constructive interference between the reflected light. Constructive interference enhances the intensity of the light, thereby improving the light extraction efficiency of the light-emitting device and outputting a stronger light signal.

[0098] The thickness of the phase matching layer 9 is designed such that when light propagates in the material, the phase change of the light after passing through the phase matching layer 9 can compensate for the phase difference generated when the light is reflected by the Bragg reflector group and propagates between different medium layers. For example, the thickness of the phase matching layer 9 is d2, which can satisfy: d2=λ / 4n3, where λ is the wavelength of the laser emitted by the light-emitting chip A, and n3 is the refractive index of the phase matching layer 9.

[0099] Furthermore, the refractive index of the phase matching layer 9 is compatible with the refractive indices of the adjacent current blocking layer 5, the N-type Bragg mirror group 3, and the active layer 4. By selecting a material with a suitable refractive index as the phase matching layer 9, the phase change caused by reflection and refraction of light at different medium interfaces can be reduced.

[0100] In one possible embodiment, the phase matching layer 9 is a P-type doped phase matching layer 9.

[0101] When the current blocking layer 5 is an N-doped current blocking layer 5, the junction between the P-type doped phase matching layer 9 and the N-doped current blocking layer 5 forms a PN junction depletion region, thereby further strengthening the current blocking effect.

[0102] For example, the dopant of the P-type doped phase-matching layer 9 can be magnesium (Mg), zinc (Zn), carbon (C), etc., and its doping concentration can range from 1 × 10⁻⁶. 17 cm -3 -1×10 18 cm -3 between.

[0103] In one possible embodiment, a current blocking layer 5 and a phase matching layer 9 constitute a set of current limiting structures, and the light-emitting chip A includes multiple sets of current limiting structures.

[0104] The current blocking layer 5 in the multi-group current limiting structure can limit the lateral diffusion of the current to the greatest extent, so that the current passes through the active region more concentratedly. The phase matching layer 9 is to ensure the phase consistency of the light during the reflection process, so as to achieve constructive interference and improve the light extraction efficiency. Multiple phase matching layers 9 can finely adjust the phase of the light at different positions to compensate for the phase difference generated when the light propagates along different paths, thereby more effectively enhancing the constructive interference effect.

[0105] In one possible embodiment, as shown in FIG7, an etch barrier layer 10 is disposed between the current blocking layer 5 and the phase matching layer 9.

[0106] The etching barrier layer 10 can prevent the etchant from excessively etching the phase matching layer 9, so as to avoid damage to the phase matching layer 9 or change its characteristics when etching the current barrier layer 5, ensuring that the phase matching layer 9 can work normally and maintain a good phase matching effect, thereby improving the luminous efficiency and light quality of the light-emitting chip A.

[0107] The material of the etching barrier layer 10 is different from that of the current barrier layer 5 and the phase matching layer 9, so that the etching solution or gas that can react with the current barrier layer 5 and the phase matching layer 9 cannot react with the etching barrier layer 10. Therefore, the etching barrier layer 10 will not be affected when etching the current barrier layer 5. For example, when the material of the current barrier layer 5 is AlGaAs or GaAs, the material of the etching barrier layer 10 can be GaInP. When the material of the current barrier layer 5 is AlGaN, the material of the etching barrier layer 10 can be AlN or InAlN. When the material of the current barrier layer 5 is InP, the material of the etching barrier layer 10 can be InGaAs or InAlAs.

[0108] In one possible embodiment, the thickness of the etching barrier layer 10 is 3nm-20nm, so that it can effectively block the etching solution or gas without adversely affecting the light field.

[0109] This application also provides a method for manufacturing the above-mentioned light-emitting chip A.

[0110] Example 1:

[0111] S1: Epitaxial wafer pretreatment.

[0112] As shown in Figure 8, after the current blocking layer 5 is epitaxially grown on the substrate 1, the epitaxial wafer is removed.

[0113] S2: An etching window is formed on the part of the current blocking layer that needs to be etched.

[0114] As shown in Figure 9, a mask protective layer 11 is set on the part of the current blocking layer 5 that does not need to be etched. Specifically, the substrate where the current blocking layer 5 is located is cleaned, and a suitable photoresist is selected according to the process and material characteristics. The photoresist is uniformly coated on the surface of the current blocking layer 5. The substrate after coating is heated to remove the solvent in the photoresist, enhance the adhesion between the photoresist and the substrate, and improve the hardness and uniformity of the photoresist. The mask is precisely aligned with the substrate, and exposure is performed using a photolithography machine to cause the photoresist to undergo a photochemical reaction. The exposed substrate is heated, and the exposed substrate is immersed in the developer to dissolve the photoresist in the corresponding area, forming the above-mentioned etching window 12. Finally, the substrate is rinsed with deionized water to remove residual developer and prevent over-development.

[0115] Alternatively, SiO2 thin films grown by PECVD can be used as mask protective layers 11. This method can have higher corrosion resistance, higher etching selectivity, better resolution, higher thermal stability and mechanical strength, and is suitable for the needs of complex processes.

[0116] S3: Etch the current blocking layer within the etching window.

[0117] As shown in Figure 10, the current blocking layer 5 inside the etching window is etched away to form a hollow region 13.

[0118] For example, when the current blocking layer 5 is made of AlGaAs, the ICP dry etching gas is a mixture of BCl3 / Cl2 / Ar gas; the wet etching solution is citric acid:H2O2:H2O; and the etching blocking layer 10 can be GaInP.

[0119] S5: Clean the mask protective layer.

[0120] As shown in Figure 11, when using SiO2 as a mask, the mask protective layer 11 needs to be cleaned. For example, the SiO2 mask protective layer 11 can be cleaned and removed using BOE etching solution, and then soaked in dilute HCl solution for 10s-30s to remove the oxide layer formed in the air.

[0121] S6: Continue subsequent structural growth.

[0122] As shown in Figure 12, after completing the above steps, the remaining parts (P-type Bragg reflector group 7, P electrode 8, etc.) are epitaxially grown. In this step, some of the material of P-type Bragg reflector group 7 will automatically fill the hollow area, thereby forming the current injection aperture 6.

[0123] The epitaxial growth technique described above is a conventional technique in this field and will not be elaborated further here.

[0124] Example 2:

[0125] S1: Epitaxial wafer pretreatment.

[0126] As shown in Figure 8, after the current blocking layer 5 is epitaxially grown on the substrate 1, the epitaxial wafer is removed.

[0127] S2: An etching window is formed on the part of the current blocking layer that needs to be etched.

[0128] As shown in Figure 9, a mask protective layer 11 is set on the part of the current blocking layer 5 that does not need to be etched. Specifically, the substrate where the current blocking layer 5 is located is cleaned, and a suitable photoresist is selected according to the process and material characteristics. The photoresist is uniformly coated on the surface of the current blocking layer 5. The substrate after coating is heated to remove the solvent in the photoresist, enhance the adhesion between the photoresist and the substrate, and improve the hardness and uniformity of the photoresist. The mask is precisely aligned with the substrate, and exposure is performed using a photolithography machine to cause the photoresist to undergo a photochemical reaction. The exposed substrate is heated, and the exposed substrate is immersed in the developer to dissolve the photoresist in the corresponding area, forming the above-mentioned etching window 12. Finally, the substrate is rinsed with deionized water to remove residual developer and prevent over-development.

[0129] Alternatively, SiO2 thin films grown by PECVD can be used as mask protective layers 11. This method can have higher corrosion resistance, higher etching selectivity, better resolution, higher thermal stability and mechanical strength, and is suitable for the needs of complex processes.

[0130] S4: Etch the current blocking layer within the etching window.

[0131] As shown in Figure 13, the current blocking layer 5 inside the etching window 12 is etched away to form the first hollow region 13a.

[0132] For example, when the current blocking layer 5 is made of AlGaAs, the ICP dry etching gas is a mixture of BCl3 / Cl2 / Ar gas; the wet etching solution is citric acid:H2O2:H2O; and the etching blocking layer 10 can be GaInP.

[0133] S5: Etch the etching barrier layer within the etching window.

[0134] As shown in Figure 13, the etching barrier layer 10 inside the etching window 12 is etched to form the second hollow region 13b.

[0135] For example, the etching barrier layer 10 can be GaInP, the ICP dry etching gas is a CH4 / H2 / Ar mixture, the wet etching solution is HCl:H2O, and the phase matching layer 9 is made of AlGaInP.

[0136] In this embodiment, the etching barrier layer 10 can be N-type doped, so that the current barrier layer 5 can be thickened by the etching barrier layer 10 to avoid the problem that the injection current tunnels through and is injected from both sides of the current injection aperture 6 due to the current barrier layer 5 being too thin.

[0137] S5: Cleaning of the mask protective layer.

[0138] As shown in Figure 14, when using SiO2 as a mask, the mask protective layer 11 needs to be cleaned. For example, the SiO2 mask protective layer 11 can be cleaned and removed using BOE etching solution, and then soaked in dilute HCl solution for 10s-30s to remove the oxide layer formed in the air.

[0139] S6: Continue subsequent structural growth.

[0140] As shown in Figure 15, after completing the above steps, the remaining parts (P-type Bragg reflector group 7, P electrode 8, etc.) are epitaxially grown. In this step, part of the material of P-type Bragg reflector group 7 will automatically fill the first hollow region 13a and the second hollow region 13b, thereby forming the current injection aperture 6.

[0141] As shown in Figure 16, this application also provides a laser source B, which includes a surface-emitting laser array C. The surface-emitting laser array C includes multiple light-emitting units, and at least one light-emitting unit is provided with the aforementioned light-emitting chip A.

[0142] In this embodiment, the light-emitting chip A may have the same structure as the light-emitting chip A in the above embodiments and may bring the same or similar beneficial effects. For details, please refer to the description in the above embodiments. This embodiment will not be repeated here.

[0143] For example, as shown in Figure 16, in the three-color laser light source combining scheme, there are three surface-emitting laser arrays C, namely a red Micro-LD Panel array, a green Micro-LD Panel array, a blue Micro-LD Panel array, a microlens array D, and an X-cube combining prism E. The three colors of laser light are combined by the X-cube combining prism E and then incident on the imaging lens 100. The imaging lens 100 magnifies the combined colored laser beam and images it on the screen 200. The monochrome Micro-LD Panel array is composed of M×N light-emitting chips A, and each light-emitting chip A can emit light independently through an addressing driving circuit. Using light-emitting chips A as the light-emitting unit of the Micro-LD Panel array can achieve higher resolution, thereby further reducing the size of the overall optical path system.

[0144] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A light-emitting chip, characterized in that, include: Substrate; N electrode, the N electrode being formed on the upper or lower side of the substrate; An N-type Bragg mirror assembly, wherein the N-type Bragg mirror assembly is formed on the substrate; An active layer is formed on the N-type Bragg mirror assembly; A current blocking layer is formed on the active layer, and a current injection aperture is formed in the central region of the current blocking layer; A P-type Bragg reflector array is formed on the current blocking layer, and along the current injection direction, the projection of the P-type Bragg reflector array on the active layer is larger than the current injection aperture. The P-electrode is formed on the P-type Bragg mirror assembly; A PN junction depletion region is formed at the junction of the current blocking layer and the P-type Bragg mirror group. The PN junction depletion region is used to prevent current from flowing into the current blocking layer, so that the current is injected into the active layer through the current injection aperture.

2. The light-emitting chip according to claim 1, characterized in that, The refractive index of the current blocking layer is n1, and the refractive index of the current injection aperture is n2, wherein n1 and n2 satisfy: -1.3≤n1-n2≤1.

3.

3. The light-emitting chip according to claim 2, characterized in that, The refractive index of the current blocking layer is n1, and the refractive index of the current injection aperture is n2, wherein n1 and n2 satisfy: -0.75≤n1-n2≤0.

75.

4. The light-emitting chip according to claim 1, characterized in that, The current blocking layer and the current injection aperture are composed of the same material with different doping types.

5. The light-emitting chip according to claim 2, characterized in that, The thickness of the current injection aperture is d1, which satisfies the following condition: d1 = λ / 4n2, where λ is the wavelength of the laser emitted by the light-emitting chip, and n2 is the refractive index of the current injection aperture.

6. The light-emitting chip according to any one of claims 1-5, characterized in that, A phase matching layer is provided between the current blocking layer and the active layer.

7. The light-emitting chip according to claim 6, characterized in that, A current blocking layer and a phase matching layer constitute a set of current limiting structures, and the light-emitting chip includes multiple sets of the current limiting structures; An etching barrier layer is provided between the current blocking layer and the phase matching layer.

8. The light-emitting chip according to any one of claims 1-5, characterized in that, The diameter of the current injection aperture ranges from 0.1 μm to 5 μm.

9. The light-emitting chip according to any one of claims 1-5, characterized in that, The threshold current of the light-emitting chip is 0.1μA-400μA.

10. A laser light source, characterized in that, The laser source includes: A surface-emitting laser array, the surface-emitting laser array comprising a plurality of light-emitting units, wherein at least one of the light-emitting units is provided with a light-emitting chip as described in any one of claims 1-9.

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