Communication method and communication apparatus

Abstract

Embodiments of the present application provide a communication method and a communication apparatus. The method may comprise: determining first encoding on the basis of first information, wherein the first encoding is HBCC encoding or TBCC encoding, and the first information comprises one or more of a code rate, the size of a first bit sequence, the CRC length of the first bit sequence, the number of block repetitions, and a message type; performing the first encoding on the first bit sequence to obtain a second bit sequence; and sending the second bit sequence. The embodiments of the present application can reduce transmission delay.

Description

Communication methods and communication devices

[0001] This application claims priority to Chinese Patent Application No. 202510382023.1, filed on March 27, 2025, with the China National Intellectual Property Administration, entitled “Communication Method and Communication Device”, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technology, and in particular to a communication method and communication device. Background Technology

[0003] With the increasing application of 5G NR machine-type communication (MTC) and Internet of Things (IoT) communication, the number of connected IoT devices is growing daily. Given the low power consumption advantages of radio frequency identification (RFID) communication technology, 5G Ambient IoT has emerged.

[0004] For AIoT devices, in their uplink processing, information bits need to undergo cyclic redundancy check (CRC) first, followed by forward error correction (FEC). When information bits need CRC, the initial register value for D2R convolutional encoding can use tail-biting convolutional code (TBCC). That is, the information bits need to undergo CRC first, and after the CRC is completed, the CRC output bits are read bit by bit into the FEC module, convolutionally encoded, and then output bit by bit, resulting in a significant latency. Therefore, how to reduce transmission latency is an urgent technical problem to be solved. Summary of the Invention

[0005] This application provides a communication method and communication device that can reduce transmission latency and reduce complexity.

[0006] In a first aspect, embodiments of this application provide a communication method. This method can be applied to a transmitting end, which can be applied to a device side, a reader / writer side, a terminal device side, or a network device side, such as a device or an encoding module in the device, or a circuit or chip in the device responsible for encoding functions (such as an encoding / decoding chip, also known as a baseband chip, or a system-on-chip (SoC) chip or system-in-package (SIP) chip containing an encoding / decoding core, etc.). The method may include: determining a first encoding based on first information, wherein the first encoding is head-biting convolutional code (HBCC) encoding or TBCC encoding, and the first information includes one or more of the following: code rate, size of a first bit sequence, length of cyclic redundancy check (CRC) of the first bit sequence, number of block repetitions, and message type; performing a first encoding on the first bit sequence to obtain a second bit sequence; and transmitting the second bit sequence.

[0007] This application embodiment enables the design of initial register values ​​for AIoT devices during device-to-reader (D2R) convolutional encoding. Since using TBCC for CRC encoding of sequence bits leads to additional processing latency, while using HBCC introduces additional complexity, this application embodiment allows determining whether the transmitting end uses TBCC or HBCC to encode the first bit sequence to obtain the second bit sequence under different conditions. This achieves the effects of improved transmission efficiency, reduced transmission latency, and reduced complexity.

[0008] In one possible implementation, determining the first encoding based on the first information includes: if a first condition is met, determining the first encoding as HBCC encoding, the first condition includes any one or more of the following: the code rate is greater than or equal to a first threshold; the size of the first bit sequence is greater than or equal to a second threshold; the CRC length of the first bit sequence is greater than or equal to a third threshold; and the number of block repetitions is equal to 1.

[0009] In this embodiment, HBCC or TBCC can be used depending on the conditions. For example, if the first condition is met, the first encoding can be determined as HBCC. Different encodings can be selected for different conditions, thereby improving transmission efficiency and reducing transmission latency.

[0010] In one possible implementation, determining the first encoding based on the first information includes: if a second condition is met, determining the first encoding as TBCC encoding, the second condition includes any one or more of the following: the code rate is less than a first threshold, the size of the first bit sequence is less than a second threshold and the number of block repetitions is not equal to 1; the CRC length of the first bit sequence is less than a third threshold.

[0011] In this embodiment, HBCC or TBCC can be used depending on the conditions. For example, if the second condition is met, the first code can be determined to be TBCC. Different codes can be selected for different conditions, thereby reducing complexity.

[0012] In one possible implementation, the second threshold value is related to one or more of the following: the time-domain repetition factor of the second bit sequence, a chip length of the second bit sequence, a chip length of the first information, and a time interval, wherein a chip length of the first information is equal to 1 / M of the length of one orthogonal frequency division multiplexing (OFDM) symbol, where M is a positive integer, and the time interval is the time interval between the end time of receiving the first information and the start time of sending the second bit sequence.

[0013] In one possible implementation, the second threshold value is related to the time interval, including: the second threshold value is related to the range of values ​​for the duration of the time interval.

[0014] In one possible implementation, the duration of the time interval is related to one or more of the following: the temporal repetition factor of the second bit sequence, the chip length of the second bit sequence, and the sampling frequency offset (SFO).

[0015] In one possible implementation, the duration of the time interval can range from: T _R2D_min =10*2*N*D2R chip length*(1-|SFO|) T _R2D_max =10*2*N*D2R chip length*(1+|SFO|)

[0016] Among them, T _R2D_min T represents the minimum value of the time interval. _R2D_max The maximum value of the time interval is represented by N, the time-domain repetition factor of the second bit sequence is represented by N, and the D2R chip length is represented by the chip length of the second bit sequence.

[0017] In one possible implementation, the second threshold value is related to the range of values ​​for the duration of the time interval, including:

[0018] N=1,D2R chip length=0.69us,T _R2D_min =12.42us, T _R2D_max =15.18us, then the second threshold value is greater than or equal to 24; or

[0019] N=1,D2R chip length=2.78us,T _R2D_min =50.04us, T _R2D_max =61.16us, then the second threshold value is greater than or equal to 40; or

[0020] N=1,D2R chip length=133.33us,T _R2D_min =2399.94us, T _R2D_max =2933.26us, then the second threshold value is greater than or equal to 36.

[0021] In one possible implementation, the second threshold value is related to the time interval, including: the second threshold value is related to the duration of the time interval.

[0022] In one possible implementation, the second threshold value is related to the duration of the time interval, including: the duration of the time interval is 15.6 μs, and the second threshold value is greater than or equal to 24; or the duration of the time interval is 75.6 μs, and the second threshold value is greater than or equal to 176.

[0023] In one possible implementation, the first message carries a second bit sequence, and if the message type of the first message is Msg3, the first encoding is TBCC.

[0024] In this embodiment, since the sending end knows that Msg3 will be sent next after sending Msg1 during the random access process, and also knows the information included in Msg3, Msg3 can be generated in advance after sending Msg1. Therefore, the delay can be ignored, that is, there is no need to spend time generating Msg3 after receiving Msg2. Thus, the first code can be determined to be TBCC, and no additional processing delay will be caused.

[0025] In one possible implementation, the number of block repetitions is the number of block repetitions of the first bit sequence, or the number of block repetitions of the first bit sequence after adding CRC, or the number of block repetitions of the second bit sequence.

[0026] Secondly, embodiments of this application provide a communication method. This method can be applied to a receiving end, which can be applied to a reader / writer side, a device side, a terminal device side, or a network device side, such as a reader / writer or a decoding module in a reader / writer, or a circuit or chip in a reader / writer responsible for decoding (such as a decoding chip, also known as a baseband chip, or a system-on-chip (SoC) chip or system-in-package (SIP) chip containing an encoding / decoding core, etc.). The method may include: receiving a second bit sequence; determining a first decoding based on first information, wherein the first decoding is HBCC decoding or TBCC decoding, and the first information includes one or more of the following: code rate, size of the first bit sequence, CRC length of the first bit sequence, block repetition count, and message type; and performing the first decoding on the second bit sequence to obtain the first bit sequence.

[0027] This application embodiment enables the design of initial register values ​​for AIoT devices during device-to-reader (D2R) convolutional encoding. Since using TBCC for CRC calculations on sequence bits leads to additional processing latency, while using HBCC introduces additional complexity, this application embodiment allows determining whether the receiving end uses TBCC or HBCC to decode the first bit sequence to obtain the second bit sequence under different conditions. This achieves the effects of improved transmission efficiency, reduced transmission latency, and reduced complexity.

[0028] In one possible implementation, determining the first decoding based on the first information includes: if a first condition is met, determining the first decoding as HBCC decoding, the first condition includes any one or more of the following: the code rate is greater than or equal to a first threshold; the size of the first bit sequence is greater than or equal to a second threshold; the CRC length of the first bit sequence is greater than or equal to a third threshold; and the number of block repetitions is equal to 1.

[0029] In one possible implementation, determining the first decoding based on the first information includes: if a second condition is met, determining the first decoding as TBCC decoding, the second condition includes any one or more of the following: the code rate is less than a first threshold, the size of the first bit sequence is less than a second threshold and the number of block repetitions is not equal to 1; the CRC length of the first bit sequence is less than a third threshold.

[0030] In one possible implementation, the second threshold value is related to one or more of the following: the time-domain repetition factor of the second bit sequence, a chip length of the second bit sequence, a chip length of the first information, and a time interval, wherein a chip length of the first information is equal to 1 / M of the length of one OFDM symbol, M is a positive integer, and the time interval is the time interval between the end time of receiving the first information and the start time of sending the second bit sequence.

[0031] In one possible implementation, the second threshold value is related to the time interval, including: the second threshold value is related to the range of values ​​for the duration of the time interval.

[0032] In one possible implementation, the duration of the time interval is related to the temporal repetition factor of the second bit sequence, the chip length of the second bit sequence, and one or more of the SFO.

[0033] In one possible implementation, the duration of the time interval can range from: T _R2D_min =10*2*N*D2R chip length*(1-|SFO|) T _R2D_max =10*2*N*D2R chip length*(1+|SFO|)

[0034] Among them, T _R2D_min T represents the minimum value of the time interval. _R2D_max The maximum value of the time interval is represented by N, the time-domain repetition factor of the second bit sequence is represented by N, and the D2R chip length is represented by the chip length of the second bit sequence.

[0035] In one possible implementation, the second threshold value is related to the range of values ​​for the duration of the time interval, including:

[0036] N=1,D2R chip length=0.69us,T _R2D_min =12.42us, T _R2D_max =15.18us, then the second threshold value is greater than or equal to 24; or

[0037] N=1,D2R chip length=2.78us,T _R2D_min =50.04us, T _R2D_max =61.16us, then the second threshold value is greater than or equal to 40; or

[0038] N=1,D2R chip length=133.33us,T _R2D_min =2399.94us, T _R2D_max=2933.26us, then the second threshold value is greater than or equal to 36.

[0039] In one possible implementation, the second threshold value is related to the time interval, including: the second threshold value is related to the duration of the time interval.

[0040] In one possible implementation, the second threshold value is related to the duration of the time interval, including: the duration of the time interval is 15.6 μs, and the second threshold value is greater than or equal to 24; or the duration of the time interval is 75.6 μs, and the second threshold value is greater than or equal to 176.

[0041] In one possible implementation, the first message carries a second bit sequence, and if the message type of the first message is Msg3, the first encoding is TBCC.

[0042] In one possible implementation, the number of block repetitions is the number of block repetitions of the first bit sequence, or the number of block repetitions of the first bit sequence after adding CRC, or the number of block repetitions of the second bit sequence.

[0043] Thirdly, embodiments of this application provide a communication device for executing the method in the first aspect and its possible implementations. The communication device includes a module for executing the method in the first aspect and its possible implementations.

[0044] Fourthly, this application provides a communication apparatus for performing the method in the second aspect and its possible implementations. The communication apparatus includes modules for performing the method in the second aspect and its possible implementations.

[0045] The modules in the third or fourth aspect can also be replaced with units or means, etc. The aforementioned modules can be implemented in software, hardware, or a combination of both.

[0046] Fifthly, this application provides a communication device including a processing circuit for executing the method of the first aspect or any possible implementation thereof. The processing circuit executes a program stored in a memory, and when the program is executed, the method described in the first aspect or any possible implementation thereof is performed.

[0047] In one possible implementation, the memory is located outside the aforementioned communication device.

[0048] In one possible implementation, the memory is located within the aforementioned communication device.

[0049] In this embodiment, the processing circuit and memory can be integrated into a single device; that is, the processing circuit and memory can be integrated together. For example, the communication device can be a chip responsible for the aforementioned transmitting end function, such as a baseband chip, or a SoC chip or SIP chip containing modules implementing the aforementioned transmitting end function.

[0050] In one possible implementation, the communication device further includes a transceiver circuit for receiving information (or inputting information) or sending information (or outputting information). For example, the communication device may be a device or a reader / writer, etc.

[0051] Sixthly, this application provides a communication device including a processing circuit for executing the method of the second aspect or any possible implementation thereof. The processing circuit executes a program stored in a memory, and when the program is executed, the method described in the second aspect or any possible implementation thereof is performed.

[0052] In one possible implementation, the memory is located outside the aforementioned communication device.

[0053] In one possible implementation, the memory is located within the aforementioned communication device.

[0054] In this embodiment, the processing circuit and memory can also be integrated into a single device; that is, the processing circuit and memory can be integrated together. For example, the communication device can be a chip responsible for the aforementioned receiving end functions, such as a baseband chip, or a SoC chip or SIP chip containing modules implementing the aforementioned receiving end functions.

[0055] In one possible implementation, the communication device further includes a transceiver circuit for receiving information (or inputting information) or sending information (or outputting information). For example, the communication device may be a device or a reader / writer, etc.

[0056] In a seventh aspect, embodiments of this application provide a communication device, which includes a processing circuit and a transceiver circuit. The processing circuit can be a logic circuit, and the transceiver circuit can be an interface circuit. The logic circuit and the interface are coupled. The interface circuit is used to input and / or output information, and the logic circuit is used to execute the method in the first aspect or any possible implementation thereof.

[0057] Eighthly, embodiments of this application provide a communication device including a processing circuit and a transceiver circuit. The processing circuit can be a logic circuit, and the transceiver circuit can be an interface circuit. The logic circuit and the interface are coupled. The interface circuit is used to input and / or output information, and the logic circuit is used to execute the method in the second aspect or any possible implementation thereof.

[0058] Ninthly, embodiments of this application provide a computer-readable storage medium for storing a computer program that, when run on a computer, causes the methods shown in any of the first to second aspects or any possible implementation thereof to be executed.

[0059] In a tenth aspect, embodiments of this application provide a computer program product that, when run on a computer, causes the methods shown in any of the first to second aspects or any possible implementations described above to be executed.

[0060] The computer described in the ninth or tenth aspect may include, but is not limited to, devices or readers.

[0061] Eleventhly, embodiments of this application provide a communication system including a transmitting end and a receiving end. The transmitting end may be a communication device as provided in the third, fifth, and seventh aspects, and the receiving end may be a communication device as provided in the fourth, sixth, and eighth aspects. The transmitting end may be used to perform the method shown in the first aspect or any possible implementation thereof, and the receiving end may be used to perform the method shown in the second aspect or any possible implementation thereof.

[0062] The technical effects of any possible implementation of aspect four through aspect eleven can be found in the technical effects of different possible implementations of aspect one or aspect two above, and will not be repeated here. Attached Figure Description

[0063] Figure 1 is a schematic diagram of a system architecture provided in an embodiment of this application;

[0064] Figure 2 is a schematic diagram of an O-RAN system provided in an embodiment of this application;

[0065] Figure 3 is a diagram showing the network element function division and protocol layer structure of an O-RAN device according to an embodiment of this application;

[0066] Figure 4 is a schematic diagram of an AIoT device chip architecture provided in an embodiment of this application;

[0067] Figures 5 and 6 are schematic diagrams of a signal waveform provided in an embodiment of this application;

[0068] Figure 7 is a schematic diagram of the structure of a convolutional code encoder provided in an embodiment of this application;

[0069] Figure 8 is a schematic diagram of a tail-biting convolutional code provided in an embodiment of this application;

[0070] Figure 9 is a schematic diagram of a bit-head convolutional code provided in an embodiment of this application;

[0071] Figure 10 is a flowchart illustrating a random access procedure provided in an embodiment of this application;

[0072] Figure 11 is a schematic diagram of the uplink processing flow of an AIoT device provided in an embodiment of this application;

[0073] Figure 12 shows a flowchart of a communication method provided in an embodiment of this application;

[0074] Figures 13-15 are schematic diagrams of the possible communication devices provided in the embodiments of this application. Detailed Implementation

[0075] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0076] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0077] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0078] In this application, "at least one (item)" means one or more, "more than one" means two or more, "at least two (items)" means two or three or more, and "and / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0079] In this application, "send" and "receive" indicate the direction of signal transmission. For example, "send information to XX" can be understood as the destination of the information being XX, which can include direct transmission via the air interface or indirect transmission via the air interface from other units or modules. "Receive information from YY" can be understood as the source of the information being YY, which can include direct reception from YY via the air interface or indirect reception from YY via the air interface from other units or modules. "Send" can also be understood as the "output" of a chip interface, and "receive" can also be understood as the "input" of a chip interface. In other words, sending and receiving can occur between devices, such as between network devices and terminal devices, or within a device, such as between components, modules, chips, software modules, or hardware modules within the device via buses, traces, or interfaces.

[0080] To better understand the embodiments of this application, the system architecture involved in the embodiments of this application will be described first below:

[0081] The embodiments of this application can be applied to various wireless communication systems, including but not limited to long term evolution (LTE) systems, 5th generation mobile communication (5G) systems and other evolved communication systems, ambient internet of things (A-IoT) systems or their evolved systems, or they can also be applied to future mobile communication systems, etc., without any specific limitations.

[0082] The technical solutions provided in this application can be applied to wireless communication between communication devices. Wireless communication between communication devices can include: wireless communication between network devices and terminals, wireless communication between network devices, and wireless communication between terminals. In this application, the term "wireless communication" can also be abbreviated as "communication," and the term "communication" can also be described as "data transmission," "information transmission," or "transmission."

[0083] Furthermore, the embodiments of this application can involve air interface transmission between a device and a reader / writer. The form of the reader / writer is not limited; it can be a network device (such as a base station), a terminal device, or an integrated access and backhaul (IAB) relay node. Here, "device" can refer to an ambient internet of things (AIoT) device.

[0084] When the device is within the coverage area provided by the reader, the communication between the reader and the device is via the AIoT uu interface, i.e., air interface communication, when the reader is a terminal. The communication between the terminal and the device can also reuse the AIoT uu interface communication mechanism.

[0085] Please refer to Figure 1, which is a schematic diagram of a system architecture provided in an embodiment of this application. There are two main architectures for novel passive IoT communication systems based on cellular networks: one is the direct cellular connection type, where the reader (e.g., a base station) and the AIoT device (e.g., a tag) communicate directly, with the reader simultaneously supporting downlink signal excitation and uplink data reception; the other is the relay user equipment (UE) type, where the transmission of excitation signals and the reception of backscattered signals are achieved through UE relay. For example, typically, AIoT devices are attached to managed items (e.g., people, goods, vehicles, etc.); the reader sends instructions to the AIoT device, and after receiving the signal energy, the AIoT device can send encoded information to the reader; the reader receives the information fed back by the AIoT device, performs command interaction, and demodulates the encoded information.

[0086] As shown in Figure 1(a) and Figure 1(b), the reader and the AIoT device are connected via Uu, and the AIoT device and the intermediate node are connected via AIoT uu, and the intermediate node is then connected to the reader via uu; where the intermediate node can be a network device or a terminal device.

[0087] In a wireless communication system, communication devices are included, and these devices can communicate wirelessly using air interface resources. The communication devices may include network devices and terminal devices; network devices may also be referred to as network-side devices. Air interface resources may include at least one of time-domain resources, frequency-domain resources, code resources, and spatial resources. In the embodiments of this application, "at least one" may also be described as one or more, and "multiple" may be two, three, four, or more; this application does not impose any limitations.

[0088] The terminal device involved in the embodiments of this application can also be called a terminal, which can be a device with wireless transceiver capabilities. It can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; it can also be deployed on water (such as ships); and it can also be deployed in the air (such as airplanes, balloons, and satellites). The terminal device can be user equipment (UE), where UE includes handheld devices, vehicle-mounted devices, wearable devices, or computing devices with wireless communication capabilities. For example, a UE can be a mobile phone, tablet computer, or computer with wireless transceiver capabilities. The terminal device can also be a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a wireless terminal in industrial control, a wireless terminal in autonomous driving, a wireless terminal in telemedicine, a wireless terminal in a smart grid, a wireless terminal in a smart city, a wireless terminal in a smart home, and so on. In the embodiments of this application, the device used to implement the terminal's functions can be the terminal itself; it can also be a device capable of supporting the terminal in implementing these functions, such as a chip system, which can be installed in the terminal. In this application embodiment, the chip system may be composed of chips, or it may include chips and other discrete devices. In the technical solutions provided in this application embodiment, the device used to implement the functions of the terminal is a terminal, and the terminal is a UE (User Equipment) as an example to describe the technical solutions provided in this application embodiment.

[0089] The electronic tag involved in this embodiment can also be referred to as a terminal. The electronic tag is an RFID tag, and in this embodiment, it is also called an AIoT device. Radio frequency identification technology can be divided into three types: active, passive, and semi-active. Tag types can also be divided into passive tags, semi-passive tags, and active tags. Passive and semi-passive tags can use backscatter-based communication methods, while active tags can use actively generated carrier technology. Tag types can be classified based on whether they use backscatter-based communication methods, whether they have energy storage capabilities, or a combination of both. Currently (for example, in the 3GPP R19 Ambient IoT project), two types of devices to be studied have been proposed: a 1.1 microwatt-level power consumption tag with energy storage, an initial sampling frequency deviation of 10^X (usually understood as X=4 or 5), no uplink or downlink amplifiers, and uplink transmission based on externally provided carrier reflection transmission. 2. Power consumption in the hundreds of microwatts, with energy storage, initial sampling frequency deviation of 10X (usually understood as X=4 or 5), with uplink or downlink amplifiers, or amplifiers for both uplink and downlink. Uplink transmission can be initiated by the terminal or based on backscatter transmission using an external carrier. All of the above-mentioned devices are applicable to the embodiments of this application.

[0090] The reader / writer involved in the embodiments of this application can be a handheld or fixed device for reading (and sometimes writing) tag information, or it can be understood as a device that communicates with the tag. It can be a terminal, a base station, or a device with read / write capabilities. It can also be an IAB node or a relay node.

[0091] The network devices involved in the embodiments of this application include base stations (BS), which can be devices deployed in a wireless access network capable of wirelessly communicating with terminals. Base stations may take various forms, such as macro base stations, micro base stations, relay stations, and access points. For example, the base station involved in the embodiments of this application can be a 5G base station or an LTE base station, wherein a 5G base station can also be called a transmission reception point (TRP) or gNB. In the embodiments of this application, the apparatus for implementing the functions of the network device can be the network device itself; it can also be an apparatus capable of supporting the network device in implementing that function, such as a chip system, which can be installed in the network device. In the technical solutions provided in the embodiments of this application, the apparatus for implementing the functions of the network device is a network device, and the network device is a base station, as an example, to describe the technical solutions provided in the embodiments of this application.

[0092] Please refer to Figure 2, which is a schematic diagram of an O-RAN system provided in an embodiment of this application. As shown in Figure 2, the access network equipment (RAN, for example, an eNB, gNB, or next-generation access network equipment) communicates with the core network equipment (CN) via a backhaul link and with the terminal equipment via an air interface. Specifically, the baseband unit (BBU) in the access network equipment communicates with the core network via the backhaul link, and the radio unit (RU) in the access network equipment communicates with at least one terminal equipment via an air interface. The BBU communicates with at least one RU via a fronthaul link. The BBU and RU may or may not be co-located. The BBU includes at least one control unit (CU) and at least one distributed unit (DU), which can communicate via at least one midhaul link.

[0093] Understandably, an O-RAN system may also include other components besides those shown in Figure 2.

[0094] Please refer to Figure 3, which is a diagram illustrating the network element function division and protocol layer structure of an O-RAN device according to an embodiment of this application. As shown in Figure 3, in some examples, the CU is a logical node carrying the radio resource control (RRC) layer, service data adaptation protocol (SDAP) layer, packet data convergence protocol (PDCP) layer, and other control functions of the access network device. The CU is connected to network nodes such as the core network through interfaces, which may be interfaces such as E2 interfaces. Optionally, the CU may have some functions of the core network. The CU (e.g., the PDCP layer and higher layers) is connected to the DU (e.g., the RLC layer and lower layers) through interfaces, which may be interfaces such as F1 interfaces. In some examples, these interfaces (e.g., the F1 interface) can provide control plane (C-Plane) and user plane (U-Plane) functions (e.g., interface management, system information management, UE context management, RRC message transmission, etc.). F1AP is the application protocol of the F1 interface, and in some examples, the signaling procedures of F1 are defined. The F1 interface supports the control plane F1-C and the user plane F1-U.

[0095] In some examples, the CU can be split into CU-CP (control unit-control plane) and CU-UP (control unit-user plane). CU-CP is a logical node carrying the RRC layer and PDCP-C (control plane part of PDCP) layer, used to implement the CU's control plane functions. CU-CP can interact with network elements in the core network used to implement control plane functions. These network elements in the core network can be access and mobility function (AMF) network elements, such as the access and mobility management function (AMF) in a 5G system. The AMF network element is responsible for mobility management in the mobile network, such as terminal device location updates, terminal device registration with the network, and terminal device handover. CU-UP is a logical node carrying the SDAP layer and PDCP-U (user plane part of PDCP) layer, used to implement the CU's user plane functions. CU-UP can interact with network elements in the core network used to implement user plane functions. These network elements in the core network, such as the UPF (user plane function) in a 5G system, are responsible for data forwarding and receiving in terminal devices. The above CU and DU configurations are merely examples; the functions of the CU and DU can be configured as needed. For instance, the CU or DU can be configured to have more protocol layer functions, or only some protocol layer processing functions. For example, some RLC layer functions and protocol layer functions above the RLC layer can be placed in the CU, while the remaining RLC layer functions and protocol layer functions below the RLC layer can be placed in the DU. Furthermore, the functions of the CU or DU can be divided according to service type or other system requirements, such as by latency. Functions that require low latency can be placed in the DU, while functions that do not require low latency can be placed in the CU.

[0096] In some examples, a DU is a logical node that carries the radio link control (RLC) layer, medium access control (MAC) layer, higher physical layer (Higher PHY) layer, and other functions. In some examples, a DU can control at least one RU. The DU connects to the RU through interfaces, which can be fronthaul interfaces.

[0097] In some examples, the CU may not have a PDCP layer, i.e., it only includes the RRC layer. CU-CP does not have PDCP-C. CU-UP may not have PDCP-U, or may not have CU-UP at all. In some examples, the DU may not have an RLC layer, only a MAC and a higher PHY layer. Furthermore, in some examples, it may not have a CU and may only include the DU.

[0098] In some examples, the Higher PHY layer includes the PHY layer processing, such as forward error correction (FEC) coding and decoding, scrambling, modulation, and demodulation. In some examples, the RU is a logical node carrying both lower physical layer (Lower PHY) and radio frequency (RF) processing. In some examples, the RU can be a 3GPP transmission reception point (TRP), a remote radio head (RRH), or other similar entities. In some examples, the Low-PHY includes the PHY processing, such as fast fourier transform (FFT), inverse fast fourier transform (IFFT), digital beamforming, and filtering. The RU communicates with one or more UEs via a radio link.

[0099] The DU and RU can be co-located or separate. The DU and RU exchange control plane and user plane information via a lower-layer split-control, user, and synchronization (LLS-CUS) interface through a fronthaul link. LLS-CUS may include LLS-C and LLS-U interfaces providing the control plane (C-Plane) and user plane (U-Plane), respectively. In some examples, the control plane (C-Plane) refers to real-time control between the DU and RU. The DU and RU exchange management information via an LLS-M interface on the fronthaul link; the management plane (M-Plane) refers to non-real-time management operations between the DU and RU. The DU and RU can cooperate to implement PHY layer functions. A DU can be connected to one or more RUs. The functions of the DU and RU can be configured in various ways depending on the design. For example, the DU may be configured to implement baseband functions, and the RU may be configured to implement mid-frequency functions. For example, DU is configured to implement higher-level functions in the PHY layer, and RU is configured to implement lower-level functions in the PHY layer, or to implement both lower-level functions and RF functions. Higher-level functions in the physical layer may include a portion of the physical layer's functions that are closer to the MAC layer, while lower-level functions in the physical layer may include another portion of the physical layer's functions that are closer to the mid-RF side.

[0100] For the AIoT devices mentioned above, the chip system architecture and module functions of different types of AIoT devices are described as follows:

[0101] Please refer to Figure 4, which is a schematic diagram of an AIoT device chip architecture provided in an embodiment of this application.

[0102] As shown in Figure 4(a), a possible AIoT device, such as Device1 (1μW peak power consumption), may have a chip architecture that includes the following components:

[0103] Antenna: RF energy reception and receiver / transmitter can be shared or separated.

[0104] Matching network: Matches the impedance between the antenna and other components (including modules related to the RF energy harvester and receiver).

[0105] RF energy harvester: includes a rectifier that converts radio frequency signals (AC) into DC.

[0106] Energy storage (e.g., capacitors): storing collected energy from an RF energy receiver.

[0107] Power Management Unit (PMU): Manages the energy stored from the energy harvester and provides energy to active modules that require energy supply.

[0108] Digital baseband logic includes functional modules such as encoders, decoders, and controllers.

[0109] Memory includes two types: 1) Non-volatile memory, such as electrically erasable programmable read-only memory (EEPROM), which can permanently store device identification (ID), etc. 2) Registers that temporarily store information, which can only store information when there is sufficient energy in the energy storage.

[0110] Clock generator: Provides clock signals.

[0111] Receiver-related modules: RF bandpass filter (BPF): improves frequency selectivity. RF envelope detector (ED): converts the RF signal to baseband. Baseband low-pass filter (LPF): filters out harmonics and high-frequency components, improving the signal quality input to the comparator. Comparator: determines the high / low (level) of the input signal.

[0112] Transmit-related modules: Backscatter modulator (impedance switching): modulates the backscatter signal with the transmit signal from the baseband logic.

[0113] As shown in Figure 4(b), a possible AIoT device, such as Device2, is a device with a peak power consumption of ≤ several hundred μW (using an intermediate frequency envelope detector receiver) that actively transmits by generating a carrier internally. Its chip architecture may include the following parts:

[0114] Antenna: RF energy reception and receiver / transmitter can be shared or separated.

[0115] Matching network: Matches the impedance between the antenna and other components (including modules related to the RF energy harvester).

[0116] RF energy harvester: includes a rectifier that converts radio frequency signals (AC) into DC.

[0117] Energy Management Unit (PMU): Manages the energy stored from the energy harvester and provides energy to the active modules that need energy supply.

[0118] Digital baseband logic includes functional modules such as encoders, decoders, and controllers.

[0119] Memory includes two types: 1) Non-volatile memory, such as electrically erasable programmable read-only memory (EEPROM), which can permanently store device identification (ID), etc. 2) Registers that temporarily store information, which can only store information when there is sufficient energy in the energy storage.

[0120] Clock generator: Provides clock signals.

[0121] The local oscillator (LO) generates a carrier frequency for the transmitter or a carrier frequency offset for the intermediate frequency (IF) receiver.

[0122] Receiver-related modules: RF bandpass filter (BPF): improves frequency selectivity. Mixer: converts the RF signal to an intermediate frequency (IF) signal. IF amplifier and IF filter: amplifies the IF signal and filters out unwanted RF and LO signals. IF envelope detector: detects the envelope from the IF signal. Baseband (BB) amplifier: may or may not be present depending on the implementation. Baseband low-pass filter (BB LPF): filters out harmonics and high-frequency components, improving the signal quality input to the comparator / analog-to-digital converter (ADC). Comparator or N-bit ADC.

[0123] Transmission-related modules: Transmit modulation: Modulates baseband bits according to the modulation scheme; this part can be part of the baseband logic module. Digital-to-analog converter (DAC): Converts digital signals into analog signals. Low-pass filter: Filters out unwanted signals. Mixer: Up-converts the baseband signal to the RF frequency range. Power amplifier (PA): If present, amplifies the transmitted signal.

[0124] To facilitate understanding of the embodiments of this application, some technical terms used in this application are explained below. It should be noted that these explanations are intended to make the embodiments of this application easier to understand and should not be considered as limitations on the scope of protection claimed by this application.

[0125] (1) Device-to-reader (D2R)

[0126] D2R signals can be signals sent from the device to the reader, or they can be understood as uplink transmission signals.

[0127] (2) Reader-to-device (R2D)

[0128] R2D signals can be signals sent from the reader to the device, or they can be understood as downlink transmission signals.

[0129] (3)M

[0130] The uplink and downlink time units of AIoT devices are both chips. For downlink: the length of the R2D chip is equal to 1 / M of the length of one OFDM symbol, where M is a positive integer. Specifically, R2D chip length = 1 / SCS / M, where SCS is the subcarrier spacing.

[0131] (4) Time-domain repetition factor

[0132] For the uplink: the bits before the line code encoding are denoted as information bits, and their length can be denoted as the information bit length (which can be written as T). b If the line code encoding is T, then the length of each chip can be denoted as D2R chip length, where D2R chip length = T. b / (2×N), where N represents the time-domain repetition factor. Optionally, N can also be understood as the frequency division multiple access (FDMA) multiplexing factor.

[0133] Specifically, please refer to Figures 5 and 6, which are schematic diagrams of a signal waveform provided in an embodiment of this application. Figures 5 and 6 respectively illustrate the time-domain and frequency-domain waveforms for N=1 and N=4. As shown in Figure 5, in the time domain, N=4 is equivalent to repeating every 2 chips of N=1 by a factor of 4, and shortening the length of each chip by a factor of 4. As shown in Figure 6, in the frequency domain, when N>1, compared to N=1, the frequency domain position of the signal will shift by ±N / T. b Hz.

[0134] (5)T_ R2D The time interval between a D2R signal (message) and its corresponding D2R signal (message). In this application, it can be expressed as the time interval between the end time of receiving the first information and the start time of sending the second bit sequence.

[0135] (6) Encoding process

[0136] Convolutional coding is typically described using (n, k, L), where k represents the number of input symbols to the encoder, n represents the number of output symbols, and L represents the constraint length of the encoder. From k input information bits, n encoded results are obtained, and the coding efficiency can be k / n. That is, convolutional codes convert the input bit sequence (c0, ..., c...) into n encoded results. K-1 The encoder performs modulo-2 multiplication with one or more generator polynomials, and then outputs the results in parallel to form the encoded sequence. The constraint length L means that the encoded result depends not only on the k bits of the current input information, but also on the information bits in the previous (L-1) time period. Under the condition k=1, the encoder requires m=L-1 shift register stages.

[0137] Please refer to Figure 7, which is a schematic diagram of a convolutional code encoder provided in an embodiment of this application. As shown in Figure 7, the convolutional code encoder may include 6 registers (represented by "D" in the figure) and 12 XOR gates (represented by ⊕ in the figure). The registers are used to store bit values, and the XOR gates are used to perform XOR operations. G0, G1, and G2 in the figure are generators; assuming the input bit sequence is c0, c1, c2, the resulting encoding is d0, d1, d2.

[0138] (7) Tail biting convolutional code:

[0139] Tail-biting convolutional coding is a special type of convolutional coding that sets the initial value of the encoder's shift register to the last bit value of the input stream, making the initial and final states of the shift register identical. When the encoder starts working, it undergoes special initialization, sequentially inputting the last m bits of the input information into the encoder's register. When encoding ends, the encoder's final state is the same as its initial state. Because this encoding method does not have a tail bit, it is called tail-biting coding. Tail-biting coding reduces the encoding overhead of the tail bit. For tail-biting coding, during decoding, since the initial and final states of the encoder are unknown, a certain amount of decoding complexity needs to be added to ensure good decoding performance. Compared with ordinary convolutional coding, the biggest advantage of the tail-biting scheme is that it overcomes the bit rate loss during encoding and is suitable for iterative decoding. For example, please refer to Figure 8, which is a schematic diagram of a tail-biting convolutional code provided in an embodiment of this application. As shown in Figure 8, the initial values ​​of the convolutional code encoder's register are the last 6 bits of the input bit sequence, i.e., s... i =C K-i-1 ,i=0,1,…,5.

[0140] (8) Head biting:

[0141] As shown in Figure 9, the initial values ​​of the registers of the convolutional code encoder are the first 6 bits of the input bit sequence, i.e., s. i =C i i = 0, 1, ..., 5. Furthermore, if a bit-biting convolutional code is used, the first 6 bits of the input bit sequence need to be shifted to the end, i.e., from c0, c1, c2, c3, c4, c5, ..., c K Change to c6,…,c K-1 ,c0,c1,c2,c3,c4,c5.

[0142] (9) CRC

[0143] The specific process of adding CRC can be as follows: Let a0, a1, a2, a3, ..., a A-1 This represents the input bit sequence of the CRC to be appended, p0, p1, p2, p3, ..., p L-1 This represents the parity bit, where A represents the size of the input sequence and L represents the number of parity bits.

[0144] The output bit sequence is: a0, a1, a2, a3, ..., a A-1 ,p0,p1,p2,p3,…,p L-1 .

[0145] Taking CRC16 as an example, let the CRC generator polynomial used be D. 16 +D 12 +D 5 +1 = 10001000000100001. First, a0, a1, a2, a3, ..., a A-1 Adding 16 zeros at the end gives a0, a1, a2, a3, ..., a A-1 ,0,…,0,and then, a0,a1,a2,a3,…,a A-1 Perform modulo-2 division between 0, ..., 0 and 10001000000100001, and take the lower 16 bits of the remainder. Specifically, let A = 32, a0, a1, a2, a3, ..., a A-1 The result is [1,1,1,0,1,1,1,1,1,1,0,0,1,1,0,1,1,0,1,1,0,1,1,1,0,1,0,1,0,1,0,1,0,1,0,1]. The resulting check bit sequence is [1,0,1,1,1,0,0,1,0,1,1,0,1,0,0,0].

[0146] (10) Random Access Procedure

[0147] As shown in Figure 10, a random access procedure can be performed between the reader and the device, followed by data transmission. R2D signaling (messages) can include paging, R2D trigger messages, Msg2, and Msg4. D2R signaling can include Msg1, Msg3, and Msg5. Paging, R2D trigger, Msg2, and Msg4 can carry control information; paging can carry the ID of the device to be stored and scheduling information.

[0148] R2D triggers are used to indicate Msg1 resources to the device. R2D triggers can also be called QueryRep-like messages or paging messages. If called QueryRep-like messages, the main difference between them and paging messages lies in the MAC header. If called paging messages, the difference is that they do not carry the device ID.

[0149] Msg1 carries a 16-bit random number ID generated by the device or an access stratum (AS). After successfully receiving Msg1, the reader returns Msg2, which may contain the aforementioned ID. Upon successfully receiving Msg2, the device considers a connection established with the reader and sends Msg3, which carries the device's identification ID, including at least the electronic product code (EPC). After successfully receiving Msg3, the reader sends Msg4, which carries command information, including instructions such as "read" or "write". After successfully receiving Msg4, the device will send Msg5. If Msg4 carries a "read" instruction, then Msg5 contains the information that the device needs to upload to the reader after reading. If Msg4 carries a "write" instruction, then the device will write the relevant content carried in Msg4 into memory and return the Msg5 message to the reader. Msg5 is used for feedback, that is, to inform the reader that the "write" instruction has been successfully completed.

[0150] First, in order to facilitate understanding of the embodiments of this application, the technical problems that this application specifically aims to solve will be further analyzed and proposed.

[0151] With the increasing prevalence of 5G NR communication, MTC, and IoT applications, the number of connected IoT devices is growing daily. The industry's demand for reduced cost and power consumption in IoT devices is becoming increasingly strong. During the 4G era, the 3rd Generation Partnership Project (3GPP) introduced the NB-IoT (narrow-band IoT) system. However, NB-IoT terminals still require external power (batteries) and have the ability to generate local high-frequency carrier waves, thus limiting their power consumption to milliwatts. But with the evolution and development of 5G IoT, the need for lower-power terminals in 5G networks is growing, and RFID technology provides a good technical reference for low power consumption, supporting microwatt-level power consumption. RFID terminals (tags) use low-precision, low-power mid-to-low frequency ring oscillators or receive downlink signals without a local oscillator. When the tag is working, the energy and carrier wave for communication are supplied by the reader, and communication is based on reflected carrier waves.

[0152] Given the low power consumption advantage of RFID communication technology, 5G Ambient IoT has emerged. To meet ultra-low power consumption requirements, terminal devices in Ambient IoT also use low-precision, low-power mid-to-low frequency ring oscillators or receivers without a local oscillator to receive downlink signals. This receiving method further reduces the power consumption of downlink reception. However, for this type of low-power receiving method, only amplitude detection, such as envelope detection, can be performed because a low-precision ring oscillator alone cannot guarantee accurate demodulation of signal phase information.

[0153] Existing RFID terminals are low in cost and design complexity, but suffer from poor coverage and limited applicability. During the research and development of 5G Ambient IoT, coverage enhancement designs also encounter some challenges.

[0154] For example, for an AIoT device, as shown in Figure 11, its uplink processing flow can include CRC attachment, FEC, repetition, line coding, small frequency shift, and modulation. It can be seen that the information bits (D2R information bits) need to undergo CRC first, followed by FEC. When the information bits need CRC, the initial register value for D2R convolutional coding can use TBCC, meaning the information bits need to undergo CRC first. After the CRC is completed, the CRC output bits are read bit by bit into the FEC module, convolutionally encoded, and then output bit by bit as PDRCH, resulting in a significant latency. Therefore, reducing transmission latency is a pressing technical problem that needs to be solved.

[0155] Figure 12 shows a flowchart of a communication method provided in an embodiment of this application. This embodiment illustrates the process using a sender and a receiver as the executing entities. The sender can be an AIoT device (such as a tag), and the receiver can be a reader / writer (such as a base station). As shown in Figure 12, the communication method specifically includes:

[0156] S1201: The sending end determines the first code based on the first information. The first code is either HBCC code or TBCC code.

[0157] The first information may include one or more of the following: bit rate, size of the first bit sequence, CRC length of the first bit sequence, block repetition count, and message type. The block repetition count is either the number of times the first bit sequence is repeated, or the number of times the first bit sequence is repeated after adding the CRC, or the number of times the second bit sequence is repeated.

[0158] The sending end can determine the first encoding based on the first information in any of the following ways:

[0159] In the first possible implementation, if the first condition is met, the sending end can determine that the first encoding is HBCC encoding. The first condition can include any one or more of the following:

[0160] The bit rate is greater than or equal to (or greater than) the first threshold value;

[0161] The size of the first bit sequence is greater than or equal to (or greater than) the second threshold value;

[0162] The CRC length of the first bit sequence is greater than or equal to (or greater than) the third threshold value;

[0163] The number of times the block is repeated is equal to 1.

[0164] In the second possible implementation, if the second condition is met, the sending end can determine that the first encoding is TBCC encoding. The second condition can include any one or more of the following:

[0165] The code rate is less than (or less than or equal to) the first threshold value, the size of the first bit sequence is less than (or less than or equal to) the second threshold value, and the number of block repetitions is not equal to 1;

[0166] The CRC length of the first bit sequence is less than (or less than or equal to) the third threshold value.

[0167] A third possible implementation is that the sending end can determine the first encoding based on the message type. For example, if the first message carries a second bit sequence, and the message type of the first message is Msg3, the first encoding can be TBCC. Optionally, TBCC can be used for all messages sent by the sending end before Msg3 in the random access procedure.

[0168] This is because during the random access process, after sending Msg1, the sending end knows that Msg3 will be sent next, and also knows the information included in Msg3. Therefore, after sending Msg1, Msg3 can be generated in advance, so latency can be disregarded. That is, there is no need to spend time generating Msg3 after receiving Msg2, thus confirming that the first encoding is TBCC, without causing additional processing latency. Optionally, HBCC can be used for all D2R messages after Msg3 in the random access process. For D2R messages before Msg3 (excluding Msg3), i.e., Msg1 and Msg3, the message content is known to the sending end. Therefore, even if TBCC is used, the sending end can perform CRC and FEC processing steps in advance, avoiding increasing real-time processing latency. However, for D2R messages after Msg3, the message content needs to be obtained from the corresponding R2D message. Therefore, the sending end cannot perform CRC and FEC processes in advance at this time, and using TBCC would cause additional transmission latency. Therefore, HBCC is required. For example, the transmission delay can be calculated as follows: when the length of the data that the sender needs to upload is K (before CRC) = 800 bits, if the clock used by the sender is 2kHz, the additional delay caused by TBCC is 40ms, which is 73% higher than that caused by HBCC.

[0169] The first threshold value can be represented as R1, for example, R1 = 1 / 2. Regarding the code rate, a higher code rate results in a shorter signal length, meaning a shorter second bit sequence length. This makes the transmission rate more likely to be limited by latency. Therefore, HBCC encoding can be used when the code rate is high. Compared to TBCC, HBCC can be equivalent to reducing the time interval between the end of receiving the first information and the start of sending the second bit sequence.

[0170] In the first and second possible implementations described above, the second threshold value can be related to one or more of the following: the time-domain repetition factor of the second bit sequence, the chip length of the second bit sequence, the chip length of the first information, and the time interval. The chip length of the first information is equal to 1 / M of the length of one OFDM symbol, where M is a positive integer, and the time interval is the time interval between the end of receiving the first information and the start of transmitting the second bit sequence.

[0171] Specifically, the second threshold value is related to the temporal repetition factor of the second bit sequence and the chip length of the second bit sequence. More specifically, the second threshold value is related to the product of the temporal repetition factor and the chip length of the second bit sequence. For example, N=1, D2R chip length=0.69us, K1>=24; or N=1, D2R chip length=2.78us, K1>=40; or N=4, D2R chip length=0.69us, K1>=40; or N=1, D2R chip length=133.33us, K1>=56; or N=128, D2R chip length=1.04us, K1>=56. Here, N represents the temporal repetition factor of the second bit sequence, D2R chip length represents the chip length of the second bit sequence, and K1 represents the second threshold value.

[0172] The second threshold value is related to the chip length of the first information, which can also be understood as the second threshold value being related to M. For example, M = 24 or 16, K1 >= 24; or M = 6 or 8, K1 >= 40; or M = 1, 2, or 4, K1 >= 56. For a detailed explanation of M, please refer to the relevant explanations of M in the aforementioned technical terminology description, which will not be repeated here.

[0173] The second threshold value is related to the time-domain repetition factor of the second bit sequence, the chip length of the second bit sequence, and the chip length of the first information. For example, M = 24 or 16, N = 1, D2R chip length = 0.69us, K1 >= 24; or M = 6 or 8, N = 1, D2R chip length = 2.78us, K1 >= 40; or M = 1, 2 or 4, N = 1, D2R chip length = 133.33us, K1 >= 56.

[0174] The second threshold is related to the time interval. Specifically:

[0175] One possible implementation is that the second threshold value is related to the range of values ​​for the time interval. Specifically, the range of values ​​for the time interval can be related to one or more of the temporal repetition factor of the second bit sequence, the chip length of the second bit sequence, and the SFO. For example, the range of values ​​for the time interval is: T _R2D_min =10*2*N*D2R chip length*(1-|SFO|) T _R2D_max =10*2*N*D2R chip length*(1+|SFO|)

[0176] Among them, T _R2D_min T represents the minimum value of the time interval. _R2D_max This indicates the maximum value of the time interval.

[0177] For example, N=1, D2R chip length=0.69us, T _R2D_min =12.42us, T _R2D_max =15.18us, then the second threshold value is greater than or equal to 24; or N=1, D2R chip length=2.78us, T _R2D_min =50.04us, T _R2D_max =61.16us, then the second threshold value is greater than or equal to 40; or N=1, D2R chip length=133.33us, T _R2D_min =2399.94us, T _R2D_max =2933.26us, then the second threshold value is greater than or equal to 36.

[0178] Another possible implementation involves a second threshold value related to the duration of the time interval. For example, the time interval could be 15.6 µs, with K1 >= 24; or the time interval could be 75.6 µs, with K1 >= 176. RFID's time interval at its highest reflection rate (640 kbps) is 15.6 µs. To achieve a comparable peak rate to RFID, the transmitting end's time interval can be 15.6 µs. In this case, if TBCC is used, K1 <= 24 is required. A slight increase in the time interval will not significantly affect the peak transmission rate; therefore, when the time interval is increased by an additional 60 µs, the peak transmission rate decreases by 5%. If the time interval is 75.6 µs, then K1 <= 176 is required.

[0179] If the CRC length of the first bit sequence is 0, then the processing delays of TBCC and HBCC are the same, and the sending end can determine that the first encoding can be either TBCC or HBCC.

[0180] Regarding the number of block repetitions, if the number of block repetitions is equal to 1, it means there are no block repetitions, and HBCC can be used. If the number of block repetitions is greater than 1, it means there are block repetitions, and for the repetitive blocks, HBCC needs to be cleared and the initial value of the register needs to be refreshed.

[0181] The bit rate, the size of the first bit sequence, the time-domain repetition factor of the second bit sequence, M, and the number of block repetitions mentioned above can be indicated by the receiver to the transmitter, and the CRC length of the first bit sequence can be determined by the transmitter based on predefined rules.

[0182] S1202: The transmitting end performs a first encoding on the first bit sequence to obtain the second bit sequence.

[0183] After determining the first encoding based on the first information, the sending end can perform the first encoding on the first bit sequence to obtain the second bit sequence.

[0184] The first bit sequence can be understood as the bit sequence to be encoded using the first encoding. For example, it can be the original bit sequence, or it can be a bit sequence encoded using another encoding technique, or it can be a bit sequence processed by adding other bits to the original bit sequence. The second bit sequence is understood to be the bit sequence after applying the first encoding to the first bit sequence.

[0185] In addition, if the sending end determines that the first encoding is HBCC encoding, that is, the first bit sequence is HBCC encoded, then the sending end can also preprocess the first bit sequence, for example, by moving the first 6 bits of the sequence to the end.

[0186] S1203: The transmitting end sends the second bit sequence to the receiving end. Correspondingly, the receiving end receives the second bit sequence from the transmitting end.

[0187] S1204: The receiving end determines the first decoding based on the first information. The first decoding is either HBCC decoding or TBCC decoding.

[0188] After receiving the second bit sequence from the transmitter, the receiver can determine the first decoding based on the first information. Specifically, the receiver's determination of the first decoding based on the first information can be adapted to the description of the transmitter determining the first encoding based on the first information in S1201 above, and will not be repeated here. The first decoding corresponds to the first encoding; for example, if the first encoding is HBCC, then the first decoding is also HBCC; if the first encoding is TBCC, then the first decoding is also TBCC.

[0189] S1205: The receiving end performs the first decoding on the second bit sequence to obtain the first bit sequence.

[0190] After determining the first decoding based on the first information, the receiving end can perform the first decoding on the received second bit sequence to obtain the first bit sequence.

[0191] In addition, if the receiver determines that the first decoding is HBCC decoding, that is, to perform HBCC decoding on the second bit sequence, the receiver can also preprocess the second bit sequence, for example, by moving the last 6 bits of the sequence to the beginning.

[0192] Since using TBCC for CRC calculations on sequence bits introduces additional processing delays, while using HBCC introduces additional complexity, the method embodiment shown in Figure 12, under different conditions, determines whether the transmitting end uses TBCC or HBCC to encode the first bit sequence to obtain the second bit sequence, and whether the receiving end uses TBCC or HBCC to decode the second bit sequence to obtain the first bit sequence. This achieves the effects of improving transmission efficiency, reducing transmission delays, and lowering complexity.

[0193] The apparatus provided in the embodiments of this application will be described below.

[0194] This application divides the device into functional modules according to the above method embodiments. For example, each function can be divided into its own functional modules, or two or more functions can be integrated into one processing module. The integrated modules can be implemented in hardware or as software functional modules. It should be noted that the module division in this application is illustrative and only represents one logical functional division; other division methods may be used in actual implementation. The device of the embodiment of this application will be described in detail below with reference to Figures 13 to 15.

[0195] Figure 13 is a schematic diagram of a communication device provided in an embodiment of this application. As shown in Figure 13, the communication device 1300 includes a processing module 1301 and a transceiver module 1302. The transceiver module 1302 can implement corresponding communication functions, and the processing module 1301 is used to implement corresponding processing functions. The transceiver module 1302 can also be referred to as an interface, communication interface, communication module, or input / output interface, etc.

[0196] In some embodiments of this application, the communication device can be used to perform the actions performed by the sending end in the above method embodiments. In this case, the sending end can be the device itself, or a chip or functional module configurable in the device, or the sending end can be the reader itself, or a chip or functional module configurable in the reader. The transceiver module 1302 is used to perform transmission and reception related operations or input / output related operations of the sending end in the above method embodiments, and the processing module 1301 is used to perform processing related operations of the sending end in the above method embodiments.

[0197] For example, processing module 1301 is used to determine a first encoding based on first information, wherein the first encoding is HBCC encoding or TBCC encoding, and the first information includes one or more of the following: bit rate, size of the first bit sequence, CRC length of the first bit sequence, number of block repetitions, and message type; such processing module 1301 may include a determining module, etc.

[0198] The processing module 1301 is further configured to perform a first encoding on the first bit sequence to obtain a second bit sequence. For example, the processing module 1301 may also include an encoding module, etc.

[0199] As an example, transceiver module 1302 is used to transmit a second bit sequence. Transceiver module 1302 may include a radio frequency module, an antenna module, etc.

[0200] One possible implementation is that the processing module 1301 determines the first encoding based on the first information, specifically for: if the first condition is met, determining the first encoding as HBCC encoding, the first condition includes any one or more of the following: the code rate is greater than or equal to a first threshold value; the size of the first bit sequence is greater than or equal to a second threshold value; the CRC length of the first bit sequence is greater than or equal to a third threshold value; the number of block repetitions is equal to 1.

[0201] One possible implementation is that the processing module 1301 determines the first encoding based on the first information, specifically for: if the second condition is met, determining the first encoding as TBCC encoding, the second condition includes any one or more of the following: the code rate is less than a first threshold, the size of the first bit sequence is less than a second threshold and the number of block repetitions is not equal to 1; the CRC length of the first bit sequence is less than a third threshold.

[0202] Reusing Figure 13, in some other embodiments of this application, the communication device can be used to perform the actions performed by the receiving end in the above method embodiments. In this case, the communication device can be the reader itself or a chip or functional module configurable in the reader; alternatively, the receiving end can be the device itself or a chip or functional module configurable in the device. The transceiver module 1302 is used to perform the transmission and reception related operations of the receiving end in the above method embodiments, and the processing module 1301 is used to perform the processing related operations of the receiving end in the above method embodiments.

[0203] For example, transceiver module 1302 is used to receive a second bit sequence;

[0204] The processing module 1301 is used to determine the first decoding based on the first information. The first decoding is HBCC decoding or TBCC decoding. The first information includes one or more of the following: code rate, size of the first bit sequence, CRC length of the first bit sequence, number of block repetitions, and message type.

[0205] Processing module 1301 is also used to perform a first decoding on the second bit sequence to obtain the first bit sequence.

[0206] One possible implementation is that the processing module 1301 determines the first decoding based on the first information, specifically for: if the first condition is met, determining that the first decoding is HBCC decoding, the first condition includes any one or more of the following: the code rate is greater than or equal to a first threshold value; the size of the first bit sequence is greater than or equal to a second threshold value; the CRC length of the first bit sequence is greater than or equal to a third threshold value; the number of block repetitions is equal to 1.

[0207] One possible implementation is that the processing module 1301 determines the first decoding based on the first information, specifically for: if the second condition is met, determining that the first decoding is TBCC decoding, the second condition includes any one or more of the following: the code rate is less than a first threshold, the size of the first bit sequence is less than a second threshold and the number of block repetitions is not equal to 1; the CRC length of the first bit sequence is less than a third threshold.

[0208] One possible implementation is that the second threshold value is related to one or more of the following: the time-domain repetition factor of the second bit sequence, a chip length of the second bit sequence, a chip length of the first information, and a time interval, wherein the chip length of the first information is equal to 1 / M of the length of one OFDM symbol, where M is a positive integer, and the time interval is the time interval between the end time of receiving the first information and the start time of sending the second bit sequence.

[0209] One possible implementation is that the second threshold value is related to the time interval, including: the second threshold value is related to the range of the duration of the time interval.

[0210] One possible implementation is that the duration of the time interval is related to the temporal repetition factor of the second bit sequence, the chip length of the second bit sequence, and one or more of the SFO.

[0211] One possible implementation is that the duration of the time interval can range from: T _R2D_min =10*2*N*D2R chip length*(1-|SFO|) T _R2D_max =10*2*N*D2R chip length*(1+|SFO|)

[0212] Among them, T _R2D_min T represents the minimum value of the time interval. _R2D_max The maximum value of the time interval is represented by N, the time-domain repetition factor of the second bit sequence is represented by N, and the D2R chip length is represented by the chip length of the second bit sequence.

[0213] One possible implementation is that the second threshold value is related to the range of values ​​for the duration of the time interval, including:

[0214] N=1,D2R chip length=0.69us,T _R2D_min =12.42us, T _R2D_max =15.18us, then the second threshold value is greater than or equal to 24; or

[0215] N=1,D2R chip length=2.78us,T _R2D_min =50.04us, T _R2D_max =61.16us, then the second threshold value is greater than or equal to 40; or

[0216] N=1,D2R chip length=133.33us,T _R2D_min =2399.94us, T _R2D_max =2933.26us, then the second threshold value is greater than or equal to 36.

[0217] One possible implementation is that the second threshold is related to the time interval, including: the second threshold is related to the duration of the time interval.

[0218] One possible implementation, where the second threshold is related to the duration of the time interval, includes: a time interval of 15.6 μs with a second threshold greater than or equal to 24; or a time interval of 75.6 μs with a second threshold greater than or equal to 176.

[0219] One possible implementation is that the first message carries the second bit sequence, and if the message type of the first message is Msg3, the first encoding is TBCC.

[0220] One possible implementation is that the first message carries the second bit sequence, and if the message type of the first message is Msg3, the first decoding is TBCC.

[0221] One possible implementation is that the number of block repetitions is the number of block repetitions of the first bit sequence, or the number of block repetitions of the first bit sequence after adding CRC, or the number of block repetitions of the second bit sequence.

[0222] For a more detailed description of the above-mentioned processing module 1301 and transceiver module 1302, please refer to the relevant description in the method embodiment shown in Figure 12.

[0223] Optionally, in the above embodiments, the device may further include a storage module, which can be used to store instructions and / or data, and the processing module 1301 can read the instructions and / or data in the storage module to enable the device to implement the aforementioned method embodiments.

[0224] For specific explanations of terms or steps in the above embodiments, please refer to the descriptions in the above method embodiments, which will not be detailed here.

[0225] The specific descriptions of the transceiver module and processing module shown in the above embodiments are merely examples. For the specific functions or execution steps of the transceiver module and processing module, please refer to the above method embodiments, which will not be described in detail here.

[0226] It is understandable that the module division in the above-mentioned device is merely a logical functional division. Each function can correspond to a functional module, or two or more functions can be integrated into one functional module. In actual implementation, all or some modules can be integrated into one physical entity, or they can be distributed across different physical entities. Furthermore, the above-mentioned functional modules can be implemented in hardware, software, or a combination of both.

[0227] In one example, the functional unit in any of the above devices may be one or more integrated circuits configured to implement the above methods, such as: one or more application-specific integrated circuits (ASICs), or one or more central processing units (CPUs), one or more microcontroller units (MCUs), one or more digital signal processors (DSPs), or one or more field-programmable gate arrays (FPGAs), or a combination of at least two of these integrated circuit forms.

[0228] The apparatus of the embodiments of this application has been described above. The possible product forms of the described apparatus are described below. Any product possessing the functions of the apparatus described in FIG. 13 above falls within the protection scope of the embodiments of this application. The following description is merely illustrative and does not limit the product form of the apparatus of the embodiments of this application to this.

[0229] In one possible implementation, in the communication device shown in FIG13, the processing module 1301 can be one or more processing circuits, and the transceiver module 1302 can be a transceiver circuit, or the transceiver module 1302 can also be a transmitting module and a receiving module. The transmitting module can be a transmitting circuit, and the receiving module can be a receiving circuit, which are integrated into one device, such as a transceiver circuit. In the embodiments of this application, the processing circuit and the transceiver circuit can be coupled, etc., and the connection method of the processing circuit and the transceiver circuit is not limited in the embodiments of this application. In the process of performing the above method, the process of sending information in the above method can be the process of the processing circuit outputting the above information. When outputting the above information, the processing circuit outputs the above information to the transceiver circuit so that the transceiver circuit can transmit (or output). After the above information is output by the processing circuit, it may need to undergo other processing before reaching the transceiver circuit. Similarly, the process of receiving information in the above method can be the process of the processing circuit receiving the input above information. When the processing circuit receives the input information, the transceiver circuit receives the above information and inputs it into the processing circuit. Furthermore, after the transceiver circuit receives the aforementioned information, the information may need to undergo further processing before being input into the processing circuit.

[0230] Figure 14 is a schematic diagram of the structure of a device provided in an embodiment of this application. As shown in Figure 14, the communication device 1400 includes one or more processing circuits 1420 and transceiver circuits 1410.

[0231] In some embodiments of this application, the apparatus can be used to perform the steps, methods, or functions performed by the transmitting end described above. For example, the processing circuit 1420 can be used to perform the functions or steps implemented by the processing module 1301 shown in FIG. 13, and the transceiver circuit 1410 can be used to perform the functions or steps implemented by the transceiver module 1302 shown in FIG. 13. Detailed descriptions of the processing circuit 1420 and the transceiver circuit 1410 can be found in FIG. 13 or the method embodiments shown above, and will not be elaborated further here.

[0232] In other embodiments of this application, the apparatus is used to perform the steps, methods, or functions performed by the receiving end described above. For example, the processing circuit 1420 can be used to perform the functions or steps implemented by the processing module 1301 shown in FIG. 13, and the transceiver circuit 1410 can be used to perform the functions or steps implemented by the transceiver module 1302 shown in FIG. 13. Detailed descriptions of the processing circuit 1420 and the transceiver circuit 1410 can be found in FIG. 13 or the method embodiments shown above, and will not be elaborated further here.

[0233] For example, the processing circuitry may be one or more processors, or all or part of the circuitry within one or more processors. The transceiver circuitry may be a transceiver, an input / output circuit, or an interface circuit, etc.

[0234] For example, in various implementations of the apparatus shown in FIG14, the transceiver circuitry may include a receiver for performing a receiving function (or operation) and a transmitter for performing a transmitting function (or operation). The transceiver circuitry is also used to communicate with other devices / appliances via a transmission medium.

[0235] Optionally, the communication device 1400 may further include one or more memories 1430 for storing program instructions and / or data. The memories 1430 are coupled to the processing circuitry 1420. The coupling in this embodiment is an indirect coupling or communication connection between devices, units, or modules, and can be electrical, mechanical, or other forms, used for information exchange between devices, units, or modules. The processing circuitry 1420 may operate in conjunction with the memories 1430. The processing circuitry 1420 may execute the program instructions stored in the memories 1430. Optionally, the one or more memories may be integrated with the processing circuitry, or the one or more memories may be independent of the processing circuitry.

[0236] This embodiment does not limit the specific connection medium between the transceiver circuit 1410, processing circuit 1420, and memory 1430. In Figure 14, the memory 1430, processing circuit 1420, and transceiver circuit 1410 are connected via a bus 1440, which is represented by a thick line. The connection methods between other components are merely illustrative and not intended to be limiting. The bus can be an address bus, data bus, control bus, etc. For ease of illustration, only one thick line is used in Figure 14, but this does not indicate that there is only one bus or one type of bus.

[0237] In the embodiments of this application, the processing circuit may be a general-purpose processing circuit, a digital signal processing circuit, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, etc., and can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processing circuit may be a microprocessor circuit or any conventional processing circuit, etc. The steps of the methods disclosed in the embodiments of this application can be directly manifested as being executed by a hardware processing circuit, or being executed by a combination of hardware and software modules in the processing circuit, etc.

[0238] In this application embodiment, the memory may include, but is not limited to, non-volatile memory such as hard disk drive (HDD) or solid-state drive (SSD), random access memory (RAM), erasable programmable read-only memory (EPROM), read-only memory (ROM), or compact disc read-only memory (CD-ROM), etc. Memory is any storage medium capable of carrying or storing program code having instruction or data structure forms, and capable of being read and / or written by a computer (such as the device shown in this application), but is not limited to this. The memory in this application embodiment may also be a circuit or any other device capable of implementing storage functions, used to store program instructions and / or data.

[0239] For example, processing circuit 1420 is mainly used to process communication protocols and communication data, control the entire device, execute software programs, and process data from the software programs. Memory 1430 is mainly used to store software programs and data. Transceiver circuit 1410 may include control circuitry and an antenna. The control circuitry is mainly used for converting baseband signals to radio frequency signals and processing radio frequency signals. The antenna is mainly used for transmitting and receiving radio frequency signals in the form of electromagnetic waves. Input / output devices, such as touchscreens, displays, and keyboards, are mainly used to receive user input data and output data to the user.

[0240] When the device is powered on, the processing circuit 1420 can read the software program in the memory 1430, interpret and execute the instructions of the software program, and process the data of the software program. When data needs to be transmitted wirelessly, the processing circuit 1420 performs baseband processing on the data to be transmitted and outputs the baseband signal to the radio frequency (RF) circuit. The RF circuit then performs RF processing on the baseband signal and transmits the RF signal outward in the form of electromagnetic waves through the antenna. When data is sent to the device, the RF circuit receives the RF signal through the antenna, converts the RF signal into a baseband signal, and outputs the baseband signal to the processing circuit 1420. The processing circuit 1420 converts the baseband signal back into data and processes the data.

[0241] In another implementation, the radio frequency circuit and antenna can be set up independently of the processing circuit that performs baseband processing. For example, in a distributed scenario, the radio frequency circuit and antenna can be arranged remotely, independent of the device.

[0242] The device shown in this application embodiment may have more components than those in Figure 14, and this application embodiment does not limit this. The methods performed by the processing circuit and transceiver circuit shown above are only examples, and the specific steps performed by the processing circuit and transceiver circuit can be referred to the methods described above.

[0243] In another possible implementation, in the communication device shown in Figure 13, the processing module 1301 can be one or more logic circuits, and the transceiver module 1302 can be an input / output interface, or a communication interface, or an interface circuit, or an interface, etc. Alternatively, the transceiver module 1302 can also be a transmitting module and a receiving module. The transmitting module can be an output interface, and the receiving module can be an input interface. The transmitting module and the receiving module are integrated into one unit, such as an input / output interface.

[0244] Figure 15 is a schematic diagram of the structure of a device provided in an embodiment of this application. As shown in Figure 15, the communication device includes a logic circuit 1501 and an interface circuit 1502. That is, the processing module 1301 can be implemented using the logic circuit 1501, and the transceiver module 1302 can be implemented using the interface circuit 1502. The logic circuit 1501 can be a chip, processing circuit, integrated circuit, or system-on-chip (SoC) chip, etc., and the interface circuit 1502 can be a communication interface, input / output interface, pins, etc. For example, Figure 15 illustrates the communication device using a chip, which includes the logic circuit 1501 and the interface circuit 1502.

[0245] In this embodiment, the logic circuit and the interface circuit can also be coupled to each other. The specific connection method between the logic circuit and the interface is not limited in this embodiment. For example, the logic circuit 1501 can be used to execute the functions or steps implemented by the processing module 1301 shown in FIG. 13, and the interface circuit 1502 can be used to execute the functions or steps implemented by the transceiver module 1302 shown in FIG. 13. For a detailed description of the logic circuit 1501 and the interface circuit 1502, please refer to FIG. 13 or the method embodiment shown above, which will not be detailed here.

[0246] It is understood that the communication device shown in the embodiments of this application can implement the method provided in the embodiments of this application in hardware form or in software form, etc., and the embodiments of this application do not limit it in this way.

[0247] This application also provides a communication system, which includes a transmitter or a receiver. The transmitter and the receiver can be used to perform the methods in any of the foregoing embodiments.

[0248] In addition, this application also provides a computer program for implementing the operations and / or processes performed by the sending end in the method provided in this application.

[0249] This application also provides a computer program for implementing the operations and / or processes performed by the receiving end in the method provided in this application.

[0250] This application also provides a computer-readable storage medium storing computer code that, when executed on a computer, causes the computer to perform the operations and / or processes performed by the various devices in the methods provided in this application.

[0251] This application also provides a computer program product comprising computer code or a computer program that, when run on a computer, causes the operations and / or processes performed by various entities in the method provided in this application to be executed.

[0252] In the embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the couplings or direct couplings or communication connections shown or discussed may be indirect couplings or communication connections through some interfaces, devices, or modules, or they may be electrical, mechanical, or other forms of connection.

[0253] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected according to actual needs to achieve the technical effects of the solutions provided in the embodiments of this application.

[0254] Furthermore, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0255] If the integrated module is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a readable storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned readable storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0256] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A communication method, characterized in that, include: The first encoding is determined based on the first information. The first encoding is either head-biting convolutional code (HBCC) encoding or tail-biting convolutional code (TBCC) encoding. The first information includes one or more of the following: code rate, size of the first bit sequence, cyclic redundancy check (CRC) length of the first bit sequence, number of block repetitions, and message type. The first bit sequence is encoded to obtain the second bit sequence; Send the second bit sequence.

2. The method according to claim 1, characterized in that, Determining the first code based on the first information includes: If the first condition is met, the first encoding is determined to be HBCC encoding. The first condition includes any one or more of the following: The bit rate is greater than or equal to the first threshold value; The size of the first bit sequence is greater than or equal to the second threshold value; The CRC length of the first bit sequence is greater than or equal to the third threshold value; The number of times the block is repeated is equal to 1.

3. The method according to claim 1 or 2, characterized in that, Determining the first code based on the first information includes: If the second condition is met, the first code is determined to be a TBCC code. The second condition includes any one or more of the following: The code rate is less than a first threshold, the size of the first bit sequence is less than a second threshold, and the number of block repetitions is not equal to 1; The CRC length of the first bit sequence is less than the third threshold value.

4. The method according to claim 2 or 3, characterized in that, The second threshold value is related to one or more of the following: the time-domain repetition factor of the second bit sequence, the chip length of the second bit sequence, the chip length of the first information, and the time interval. The chip length of the first information is equal to 1 / M of the length of one orthogonal frequency division multiplexing (OFDM) symbol, where M is a positive integer. The time interval is the time interval between the end time of receiving the first information and the start time of sending the second bit sequence.

5. The method according to claim 4, characterized in that, The second threshold value is related to the time interval and includes: The second threshold value is related to the range of values ​​for the duration of the time interval.

6. The method according to claim 5, characterized in that, The duration of the time interval is related to one or more of the following: the temporal repetition factor of the second bit sequence, the chip length of the second bit sequence, and the sampling frequency error SFO.

7. The method according to claim 6, characterized in that, The duration of the time interval is in the range of: T _R2D_min =10*2*N*D2R chip length*(1-|SFO|) T _R2D_max =10*2*N*D2R chip length*(1+|SFO|) Among them, T _R2D_min T represents the minimum value of the time interval. _R2D_max The maximum value of the time interval is represented by N, the time-domain repetition factor of the second bit sequence is represented by N, and the D2R chip length is represented by the chip length of the second bit sequence.

8. The method according to claim 7, characterized in that, The second threshold value is related to the range of values ​​for the duration of the time interval, including: N=1,D2R chip length=0.69us,T _R2D_min =12.42us, T _R2D_max =15.18us, then the second threshold value is greater than or equal to 24; or N=1,D2R chip length=2.78us,T _R2D_min =50.04us, T _R2D_max =61.16us, then the second threshold value is greater than or equal to 40; or N=1,D2R chip length=133.33us,T _R2D_min =2399.94us, T _R2D_max =2933.26us, then the second threshold value is greater than or equal to 36.

9. The method according to claim 4, characterized in that, The second threshold value is related to the time interval and includes: The second threshold value is related to the duration of the time interval.

10. The method according to claim 9, characterized in that, The second threshold value is related to the duration of the time interval, including: The duration of the time interval is 15.6 μs, and the second threshold value is greater than or equal to 24; or The duration of the time interval is 75.6 μs, and the second threshold value is greater than or equal to 176.

11. The method according to any one of claims 1-10, characterized in that, The first message carries the second bit sequence, and when the message type of the first message is Msg3, the first encoding is TBCC.

12. A communication method, characterized in that, include: Receive the second bit sequence; The first decoding is determined based on the first information. The first decoding is either head-biting convolutional code (HBCC) decoding or tail-biting convolutional code (TBCC) decoding. The first information includes one or more of the following: code rate, size of the first bit sequence, cyclic redundancy check (CRC) length of the first bit sequence, number of block repetitions, and message type. The first bit sequence is obtained by performing the first decoding on the second bit sequence.

13. The method according to claim 12, characterized in that, The step of determining the first decoding based on the first information includes: If the first condition is met, the first decoding is determined to be HBCC decoding. The first condition includes any one or more of the following: The bit rate is greater than or equal to the first threshold value; The size of the first bit sequence is greater than or equal to the second threshold value; The CRC length of the first bit sequence is greater than or equal to the third threshold value; The number of times the block is repeated is equal to 1.

14. The method according to claim 12 or 13, characterized in that, The step of determining the first decoding based on the first information includes: If the second condition is met, the first decoding is determined to be TBCC decoding. The second condition includes any one or more of the following: The code rate is less than a first threshold, the size of the first bit sequence is less than a second threshold, and the number of block repetitions is not equal to 1; The CRC length of the first bit sequence is less than the third threshold value.

15. The method according to claim 13 or 14, characterized in that, The second threshold value is related to one or more of the following: the time-domain repetition factor of the second bit sequence, the chip length of the second bit sequence, the chip length of the first information, and the time interval. The chip length of the first information is equal to 1 / M of the length of one orthogonal frequency division multiplexing (OFDM) symbol, where M is a positive integer. The time interval is the time interval between the end time of receiving the first information and the start time of sending the second bit sequence.

16. The method according to claim 15, characterized in that, The second threshold value is related to the time interval and includes: The second threshold value is related to the range of values ​​for the duration of the time interval.

17. The method according to claim 16, characterized in that, The duration of the time interval is related to one or more of the following: the temporal repetition factor of the second bit sequence, the chip length of the second bit sequence, and the sampling frequency error SFO.

18. The method according to claim 17, characterized in that, The duration of the time interval is in the range of: T _R2D_min =10*2*N*D2R chip length*(1-|SFO|) T _R2D_max =10*2*N*D2R chip length*(1+|SFO|) Among them, T _R2D_min T represents the minimum value of the time interval. _R2D_max The maximum value of the time interval is represented by N, the time-domain repetition factor of the second bit sequence is represented by N, and the D2R chip length is represented by the chip length of the second bit sequence.

19. The method according to claim 18, characterized in that, The second threshold value is related to the range of values ​​for the duration of the time interval, including: N=1,D2R chip length=0.69us,T _R2D_min =12.42us, T _R2D_max =15.18us, then the second threshold value is greater than or equal to 24; or N=1,D2R chip length=2.78us,T _R2D_min =50.04us, T _R2D_max =61.16us, then the second threshold value is greater than or equal to 40; or N=1,D2R chip length=133.33us,T _R2D_min =2399.94us, T _R2D_max =2933.26us, then the second threshold value is greater than or equal to 36.

20. The method according to claim 15, characterized in that, The second threshold value is related to the time interval and includes: The second threshold value is related to the duration of the time interval.

21. The method according to claim 20, characterized in that, The second threshold value is related to the duration of the time interval, including: The duration of the time interval is 15.6 μs, and the second threshold value is greater than or equal to 24; or The duration of the time interval is 75.6 μs, and the second threshold value is greater than or equal to 176.

22. The method according to any one of claims 12-21, characterized in that, The first message carries the second bit sequence, and when the message type of the first message is Msg3, the first decoding is TBCC.

23. A communication device, characterized in that, Includes a module for performing the method as described in any one of claims 1-11.

24. A communication device, characterized in that, Includes modules for performing the method as described in any one of claims 12-22.

25. A communication device, characterized in that, It includes a processing circuit and a transceiver circuit, the transceiver circuit being used to input and / or output information, and the processing circuit being used to perform the method as described in any one of claims 1-22.

26. The communication device according to claim 25, characterized in that... The communication device further includes a memory for storing a computer program, which, when executed by the processing circuit, performs the method as described in any one of claims 1-22.

27. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store a computer program, which, when executed, performs the method as described in any one of claims 1-22.

28. A computer program product, characterized in that, When the computer program product is executed, the method described in any one of claims 1-22 is performed.

29. A communication system, characterized in that, It includes a sending end and a receiving end, wherein the sending end is used to implement the method as described in any one of claims 1-11, and the receiving end is used to implement the method as described in any one of claims 12-22.

Images