Encoding method, decoding method, and communication apparatus

Abstract

The present application relates to the technical field of communications, and discloses an encoding method, a decoding method, and a communication apparatus. On the basis of the method, in a scenario in which probabilistic shaping is introduced, an auxiliary bit value in a target sub-block is determined by using an information bit value in a non-target sub-block, so that the position of the auxiliary bit value in a bit sequence before encoding can be flexibly configured, thereby facilitating improving the flexibility of probabilistic shaping design, and simplifying the implementation of a polar encoding process. In addition, because the auxiliary bit value is determined by using the information bit value, accurate determination of the auxiliary bit value is facilitated, the biased distribution of probabilistic shaping can be improved, and the effect of probabilistic shaping is enhanced, thereby improving the transmission performance and decoding performance.

Description

An encoding method, a decoding method, and a communication device

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202510388026.6, filed on March 27, 2025, with the title “An Encoding Method, Decoding Method, Communication Device and Communication System”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of communication technology, and in particular to an encoding method, a decoding method, and a communication device. Background Technology

[0004] Polar codes were selected as the control channel coding scheme in the 5th generation (5G) communication standard. Polar codes are a coding scheme that can be rigorously proven to "achieve" the Shannon channel capacity and have the advantages of good decoding performance and low complexity.

[0005] Probabilistic shaping is a common "shaping" technique. The transmitter maps (or "shapes") information bits to a bit sequence that follows a specific distribution by cascading a precoder before channel coding. Then, during channel coding, systematic coding is used so that the sequence that meets the specific distribution appears directly in the coded sequence, thereby shaping the final modulation symbol.

[0006] After introducing probabilistic shaping, it is necessary to determine additional auxiliary bit values ​​for probabilistic shaping. How to determine these auxiliary bit values ​​to improve the flexibility of probabilistic shaping design and simplify the implementation of polar coding remains to be solved. Summary of the Invention

[0007] This application provides an encoding method, a decoding method, and a communication device to improve the flexibility of probabilistic shaping design and simplify the implementation of polarization coding process.

[0008] In a first aspect, embodiments of this application provide an encoding method, which can be executed by a first communication device. Unless otherwise specified, the "first communication device" in this application can refer to a communication device (e.g., a network device, a terminal device, etc.), a component within that communication device (e.g., a processor, a chip, or a chip system, etc.), or a logic module or software capable of implementing all or part of the functions of the communication device. The method includes: polar encoding a first bit sequence to obtain a second bit sequence; wherein the first bit sequence consists of N bit values, the N bit values ​​including K information bit values ​​and M auxiliary bit values, the first bit sequence including L sub-blocks, and the i-th sub-block among the L sub-blocks being composed of the i-th bit value among the N bit values. It consists of several bit values, i = 0, 1, ..., L-1. N is an integer greater than 1, K is an integer greater than or equal to 1, M is an integer greater than or equal to 1, and L is an integer greater than 1. The M auxiliary bit values ​​are located within the target sub-block of the L sub-blocks. The M auxiliary bit values ​​are determined based on the information bit values ​​within the Y sub-blocks (excluding the target sub-block) of the L sub-blocks, where Y is an integer greater than or equal to 1 and less than L. The information bit values ​​within the Y sub-blocks are included in the K information bit values. The bit values ​​in the second bit sequence corresponding to the target sub-block are related to the bit values ​​within the Y sub-blocks. The M auxiliary bit values ​​are used for probabilistic shaping of polarization coding. Modulation is performed according to the second bit sequence to obtain modulation symbol information. The modulation symbol information is then output.

[0009] Based on the above scheme, in the scenario of introducing probabilistic shaping, the auxiliary bit value in the target sub-block is determined by using the information bit value in the non-target sub-block. This allows for flexible setting of the position of the auxiliary bit value in the bit sequence before encoding, thus helping to improve the flexibility of probabilistic shaping design and simplifying the implementation of polarization coding.

[0010] In one possible implementation, the target sub-block is a sub-block among the first LX sub-blocks of the L sub-blocks, where X is an integer greater than or equal to 1 and less than L.

[0011] Based on the above implementation method, setting the target sub-block as the last X sub-blocks that are not L sub-blocks can support a nested sequence to construct polar coding, which helps to improve the flexibility of probabilistic shaping design and thus simplifies the implementation of the polar coding process.

[0012] In one possible implementation, the method further includes: performing polar coding based on the information bit values ​​within the Y sub-blocks to obtain a third bit sequence; determining a first symbol sequence based on the third bit sequence; and determining the M auxiliary bit values ​​based on the first symbol sequence.

[0013] Based on the above implementation method, the position of the auxiliary bit value can be flexibly set, thereby improving the flexibility of the probabilistic shaping design. Furthermore, since the auxiliary bit value is determined using the information bit values ​​within Y sub-blocks, it helps to accurately determine the auxiliary bit value, which can improve the bias distribution of the probabilistic shaping, enhance the probabilistic shaping effect, and thus improve transmission and decoding performance.

[0014] In one possible implementation, Y>1; the step of performing polar coding based on the information bit values ​​within the Y sub-blocks to obtain the third bit sequence includes: performing polar coding based on the information bit values ​​within the Y sub-blocks respectively to obtain multiple fourth bit sequences; and obtaining the third bit sequence based on the multiple fourth bit sequences.

[0015] Based on the above implementation method, the position of the auxiliary bit value can be flexibly set, thereby improving the flexibility of the probabilistic shaping design. Furthermore, since the auxiliary bit value is determined using the information bit values ​​within Y sub-blocks, it helps to accurately determine the auxiliary bit value, which can improve the bias distribution of the probabilistic shaping, enhance the probabilistic shaping effect, and thus improve transmission and decoding performance.

[0016] In one possible implementation, the method further includes: interleaving the third bit sequence to obtain a fifth bit sequence; determining an amplitude sequence based on the fifth bit sequence; and determining the M auxiliary bit values ​​based on the first symbol sequence, which includes: determining a second symbol sequence based on the first symbol sequence and the amplitude sequence; and determining the M auxiliary bit values ​​based on the second symbol sequence.

[0017] Based on the above implementation method, the position of auxiliary bit values ​​can be flexibly set, thereby improving the flexibility of probabilistic shaping design. Furthermore, since the auxiliary bit values ​​are determined using the information bit values ​​within Y sub-blocks, accurate determination of the auxiliary bit values ​​is facilitated, improving the bias distribution of probabilistic shaping and enhancing its effectiveness. Moreover, this method uses amplitude sequences to determine auxiliary bit values, making the distribution after probabilistic shaping closer to a Gaussian distribution, further improving the probabilistic shaping effect. Because of the improved probabilistic shaping effect, transmission and decoding performance can be enhanced. In addition, this method, by performing interleaving within sub-blocks, can break down bit correlations, further contributing to improved decoding performance.

[0018] In one possible implementation, the method further includes: obtaining a first amplitude sequence based on the third bit sequence; interleaving the first amplitude sequence to obtain a second amplitude sequence; and determining the M auxiliary bit values ​​based on the first symbol sequence, which includes: determining a third symbol sequence based on the first symbol sequence and the second amplitude sequence; and determining the M auxiliary bit values ​​based on the third symbol sequence.

[0019] Based on the above implementation method, the position of auxiliary bit values ​​can be flexibly set, thereby improving the flexibility of probabilistic shaping design. Furthermore, since the auxiliary bit values ​​are determined using the information bit values ​​within Y sub-blocks, accurate determination of the auxiliary bit values ​​is facilitated, improving the probabilistic shaping effect. Moreover, this method uses amplitude sequences to determine the auxiliary bit values, making the distribution after probabilistic shaping closer to a Gaussian distribution, further enhancing the probabilistic shaping effect. Because of the improved probabilistic shaping effect, transmission and decoding performance can be improved. In addition, this method, by performing interleaving within sub-blocks, can break down bit correlations, further contributing to improved decoding performance.

[0020] In one possible implementation, the M auxiliary bit values ​​are determined based on the information bit values ​​within the Y sub-blocks and the information bit values ​​within the target sub-block, wherein the information bit values ​​within the target sub-block are included in the K information bit values.

[0021] Based on the above implementation method, the position of the auxiliary bit value can be flexibly set, thereby improving the flexibility of the probabilistic shaping design. Furthermore, since the auxiliary bit value is determined using the information bit values ​​within the Y sub-blocks and the target sub-block, it helps to accurately determine the auxiliary bit value, which can improve the effect of probabilistic shaping, thereby improving transmission and decoding performance.

[0022] In one possible implementation, L = 4, the target sub-block is the first sub-block among the L sub-blocks, and the Y sub-blocks are the second sub-block among the L sub-blocks, or the second and third sub-blocks among the L sub-blocks. The L sub-blocks are numbered sequentially from 0, 1, ..., L-1. Therefore, when L = 4, the first sub-block refers to the sub-block with index 1, the second sub-block refers to the sub-block with index 2, and the third sub-block refers to the sub-block with index 3 (i.e., the last sub-block).

[0023] Based on the above implementation method, setting the target sub-block as the last X (X=2) sub-blocks that are not L sub-blocks can support a nested sequence to construct polar coding, which helps to improve the flexibility of probabilistic shaping design and thus simplifies the implementation of the polar coding process.

[0024] In one possible implementation, the value of L is related to the modulation order of the modulation coding scheme (MCS).

[0025] Based on the above implementation method, the requirements of different modulation methods can be matched, which helps to improve system performance.

[0026] In one possible implementation, L = 2 t ,in, This indicates rounding up, and Qm represents the modulation order.

[0027] Based on the above implementation method, the requirements of different modulation methods can be matched, which helps to improve system performance.

[0028] In one possible implementation, the step of modulating the second bit sequence to obtain modulation symbol information includes: performing rate matching on the second bit sequence to obtain a seventh bit sequence; and modulating the seventh bit sequence to obtain the modulation symbol information; wherein, when the modulation order is 6, 10, or 12, the rate matching method is puncturing.

[0029] Based on the above implementation method, rate matching is performed using a punching method. Since the punching method is easier to implement than other rate matching methods (i.e., shortening, repetition), it helps to improve the performance of rate matching.

[0030] Secondly, embodiments of this application provide a decoding method, which can be executed by a second communication device. Unless otherwise specified, the "second communication device" in this application can refer to a communication device (e.g., a terminal device, network device, etc.), a component within that communication device (e.g., a processor, chip, or chip system, etc.), or a logic module or software capable of implementing all or part of the functions of the communication device. The method includes: acquiring modulation symbol information; demodulating the modulation symbol information to obtain a sequence to be decoded; and performing polarization decoding on the sequence to be decoded to obtain a decoding result; wherein the sequence to be decoded corresponds to a first bit sequence, the first bit sequence consists of N bit values, the N bit values ​​including K information bit values ​​and M auxiliary bit values, the first bit sequence includes L sub-blocks, and the i-th sub-block among the L sub-blocks is composed of the i-th bit value among the N bit values. It consists of several bit values, i = 0, 1, ..., L-1. N is an integer greater than 1, K is an integer greater than or equal to 1, M is an integer greater than or equal to 1, L is an integer greater than 1, the M auxiliary bit values ​​are located in the target sub-block among the L sub-blocks, the M auxiliary bit values ​​are determined based on the information bit values ​​in the Y sub-blocks excluding the target sub-block among the L sub-blocks, Y is an integer greater than or equal to 1 and less than L, the information bit values ​​in the Y sub-blocks are included in the K information bit values, the bit value in the second bit sequence corresponding to the target sub-block is related to the bit value in the Y sub-blocks, and the M auxiliary bit values ​​are used for probabilistic shaping of polar coding.

[0031] Based on the above scheme, in the scenario of introducing probabilistic shaping, the auxiliary bit value in the target sub-block is determined by using the information bit value in the non-target sub-block. This allows for flexible setting of the position of the auxiliary bit value in the bit sequence before encoding, thus helping to improve the flexibility of probabilistic shaping design and simplifying the implementation of polarization coding.

[0032] In one possible implementation, the target sub-block is a sub-block among the first LX sub-blocks of the L sub-blocks, where X is an integer greater than or equal to 1 and less than L.

[0033] Based on the above implementation method, setting the target sub-block as the last X sub-blocks that are not L sub-blocks can support a nested sequence to construct polar coding, which helps to improve the flexibility of probabilistic shaping design and thus simplifies the implementation of the polar coding process.

[0034] In one possible implementation, L = 4, the target sub-block is the first sub-block among the L sub-blocks, and the Y sub-blocks are the third sub-block among the L sub-blocks, or the second and third sub-blocks among the L sub-blocks. The L sub-blocks are numbered sequentially from 0, 1, ..., L-1. Therefore, when L = 4, the first sub-block refers to the sub-block with index 1, the second sub-block refers to the sub-block with index 2, and the third sub-block refers to the sub-block with index 3 (i.e., the last sub-block).

[0035] Based on the above implementation method, setting the target sub-block as the last X (X=2) sub-blocks that are not L sub-blocks can support a nested sequence to construct polar coding, which helps to improve the flexibility of probabilistic shaping design and thus simplifies the implementation of the polar coding process.

[0036] In one possible implementation, the value of L is related to the modulation order of the modulation coding scheme (MCS).

[0037] Based on the above implementation method, the requirements of different modulation methods can be matched, which helps to improve system performance.

[0038] In one possible implementation, L = 2 t ,in, This indicates rounding up, and Qm represents the modulation order.

[0039] Based on the above implementation method, the requirements of different modulation methods can be matched, which helps to improve system performance.

[0040] Thirdly, this application provides a communication device that has the functions involved in implementing the first aspect or any possible implementation method of the first aspect. For example, the communication device includes modules, units, or means corresponding to the operations involved in performing the first aspect or any possible implementation method of the first aspect. The functions, units, or means can be implemented by software, or by hardware, or by hardware executing corresponding software.

[0041] In one possible design, the communication device includes a processing unit and a communication unit, wherein the communication unit can be used to transmit and receive signals to enable communication between the communication device and other devices; the processing unit can be used to perform some internal operations of the communication device. The functions performed by the processing unit and the communication unit can correspond to the operations involved in the first aspect or any possible implementation of the first aspect described above.

[0042] In one possible design, the communication device includes a processor that may be coupled to a memory. The memory may store necessary computer programs or instructions for implementing the functions involved in the first aspect or any possible implementation of the first aspect described above. The processor can execute the computer programs or instructions stored in the memory, which, when executed, cause the communication device to implement the first aspect or any possible implementation of the first aspect described above.

[0043] In one possible design, the communication device includes a processor and a memory, the memory of which may store necessary computer programs or instructions for implementing the functions involved in the first aspect or any possible implementation of the first aspect described above. The processor may execute the computer programs or instructions stored in the memory, and when the computer programs or instructions are executed, cause the communication device to implement the first aspect or any possible implementation of the first aspect described above.

[0044] In one possible design, the communication device includes a processor and an interface circuit, wherein the processor is configured to communicate with other devices via the interface circuit and execute the first aspect or any possible implementation thereof. Optionally, the communication device further includes a memory for storing computer programs or instructions that, when executed by the processor, implement the first aspect or any possible implementation thereof.

[0045] Understandably, the processor in the third aspect can be implemented in hardware or software. When implemented in hardware, the processor can be a logic circuit, integrated circuit, etc.; when implemented in software, the processor can be a general-purpose processor that reads software code stored in memory. Furthermore, there can be one or more processors, and one or more memories. The memory can be integrated with the processor or separated from it. In specific implementations, the memory can be integrated with the processor on the same chip or disposed on different chips. This application does not limit the type of memory or the arrangement of the memory and processor.

[0046] Fourthly, this application provides a communication device that has the functions involved in implementing the second aspect or any possible implementation method of the second aspect. For example, the communication device includes modules, units, or means corresponding to the operations involved in performing the second aspect or any possible implementation method of the second aspect. The functions, units, or means can be implemented by software, or by hardware, or by hardware executing corresponding software.

[0047] In one possible design, the communication device includes a processing unit and a communication unit, wherein the communication unit can be used to transmit and receive signals to enable communication between the communication device and other devices; the processing unit can be used to perform some internal operations of the communication device. The functions performed by the processing unit and the communication unit can correspond to the operations involved in the second aspect or any possible implementation of the second aspect described above.

[0048] In one possible design, the communication device includes a processor that may be coupled to a memory. The memory may store necessary computer programs or instructions for implementing the functions involved in the second aspect or any possible implementation of the second aspect described above. The processor can execute the computer programs or instructions stored in the memory, which, when executed, cause the communication device to implement the second aspect or any possible implementation of the second aspect described above.

[0049] In one possible design, the communication device includes a processor and a memory, the memory of which may store necessary computer programs or instructions for implementing the functions involved in the second aspect or any possible implementation of the second aspect described above. The processor may execute the computer programs or instructions stored in the memory, and when the computer programs or instructions are executed, cause the communication device to implement the second aspect or any possible implementation of the second aspect described above.

[0050] In one possible design, the communication device includes a processor and an interface circuit, wherein the processor is configured to communicate with other devices via the interface circuit and execute the second aspect or any possible implementation thereof described above. Optionally, the communication device further includes a memory for storing computer programs or instructions that, when executed by the processor, implement the second aspect or any possible implementation thereof.

[0051] Understandably, the processor in the fourth aspect can be implemented in hardware or software. When implemented in hardware, the processor can be a logic circuit, integrated circuit, etc.; when implemented in software, the processor can be a general-purpose processor that reads software code stored in memory. Furthermore, there can be one or more processors, and one or more memories. The memory can be integrated with the processor, or the memory and processor can be separate. In specific implementations, the memory can be integrated with the processor on the same chip, or they can be set on different chips. This application does not limit the type of memory or the way the memory and processor are set.

[0052] Fifthly, this application provides a communication system, which may include a first communication device and a second communication device; wherein the first communication device is used to execute the first aspect or any possible implementation of the first aspect, and the second communication device is used to execute the second aspect or any possible implementation of the second aspect.

[0053] In a sixth aspect, this application provides a computer-readable storage medium storing a computer program (or computer-readable instructions) in which any of the possible implementations of the first to second aspects described above is executed when a computer reads and executes some or all of the computer-readable instructions.

[0054] For example, a computer-readable storage medium can be any available medium that a computer can access. This includes, but is not limited to, non-transient computer-readable media, random-access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM) or other optical disk storage, magnetic disk storage media, or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer.

[0055] In a seventh aspect, this application provides a computer program product comprising instructions that, when read and executed by a computer, cause any one of the possible implementation methods of the first to second aspects described above to be executed.

[0056] Eighthly, this application provides a chip (or chip system) including a processor coupled to a memory storing a computer program; the processor is configured to invoke part or all of the computer program in the memory, such that any of the possible implementations of the first to second aspects described above are executed. Attached Figure Description

[0057] Figure 1 is a schematic diagram of the architecture of the communication system applicable to the embodiments of this application;

[0058] Figure 2(a) is a schematic diagram of a processing flow of information source and information sink according to an embodiment of this application;

[0059] Figure 2(b) is a schematic diagram of another processing flow of the information source and the information sink in an embodiment of this application;

[0060] Figure 2(c) shows the distribution of constellation points after reshaping;

[0061] Figure 2(d) is a schematic diagram of the probability shaping process;

[0062] Figure 3(a) shows an 8×8 polarization transformation matrix provided in an embodiment of this application;

[0063] Figure 3(b) is a schematic diagram of the serial cancellation decoding calculation process provided in the embodiment of this application;

[0064] Figure 3(c) is a schematic diagram of the decoding path in the serial cancellation list decoding method provided in the embodiments of this application;

[0065] Figure 4 is a flowchart illustrating the encoding method provided in an embodiment of this application;

[0066] Figure 5(a) is a schematic diagram of a probabilistic shaping scheme based on polar codes;

[0067] Figure 5(b) is a schematic diagram of a probabilistic shaping scheme based on polar codes;

[0068] Figure 6(a) is an example diagram for determining the auxiliary bit value;

[0069] Figure 6(b) is an example diagram for determining the auxiliary bit value;

[0070] Figure 6(c) is an example diagram for determining the auxiliary bit value;

[0071] Figure 7 is a flowchart illustrating the decoding method provided in an embodiment of this application;

[0072] Figure 8 is a schematic diagram of the structure of a communication device provided in an embodiment of this application;

[0073] Figure 9 is a schematic diagram of another communication device provided in an embodiment of this application. Detailed Implementation

[0074] In the embodiments of this application, words such as "exemplarily" and "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design scheme described as an "example" in this application should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of the term "example" is intended to present concepts in a concrete manner. In the embodiments of this application, "of," "relevant," and "corresponding" may sometimes be used interchangeably, and it should be noted that their intended meanings are consistent unless their distinction is emphasized.

[0075] The technical solutions of this application can be applied to various wireless communication systems, such as Universal Mobile Telecommunications System (UMTS), Wireless Local Area Network (WLAN), short-range wireless communication systems (such as sidelink, wireless fidelity, Wi-Fi, Bluetooth, etc.), wired networks, vehicle-to-everything (V2X) communication systems, device-to-device (D2D) communication systems, vehicle-to-everything (V2X) communication systems, 4th generation (4G) mobile communication systems (such as Long Term Evolution (LTE) systems), LTE Frequency Division Duplex (FDD) systems, LTE Time Division Duplex (TDD) systems, 5G mobile communication systems (such as New Radio (NR) systems), Future Communications systems, or other similar communication systems, without limitation. This application describes the communication system shown in Figure 1 as an example. When applying the technical solution of this application to other communication systems, the devices, components, modules, etc. in the embodiment can be replaced with corresponding devices, components, modules in other communication systems without limitation.

[0076] Figure 1 is a schematic diagram of the architecture of the communication system applied in the embodiments of this application. As shown in Figure 1, the communication system includes an access network 100. Optionally, the communication system may also include a core network 200 and an Internet 300. The access network 100 may include at least one network device, such as 110a and 110b in Figure 1, and may also include at least one terminal device, such as 120a-120j in Figure 1. Specifically, 110a is a base station, 110b is a micro-station, 120a, 120e, 120f, and 120j are mobile phones, 120b is a car, 120c is a fuel dispenser, 120d is a home access point (HAP) deployed indoors or outdoors, 120g is a laptop computer, 120h is a printer, and 120i is a drone. The same terminal device or network device can provide different functions in different application scenarios. For example, the mobile phones in Figure 1 are 120a, 120e, 120f and 120j. Mobile phone 120a can access base station 110a, connect to car 120b, communicate directly with mobile phone 120e and access HAP. Car 120b can access HAP and communicate directly with mobile phone 120a. Mobile phone 120f can access micro-station 110b, connect to laptop 120g and printer 120h. Mobile phone 120j can control drone 120i.

[0077] The communication system provided in this application may also include AI network elements for implementing some or all AI-related operations. AI network elements can also be referred to as AI nodes, AI devices, AI entities, AI modules, AI models, or AI units, etc. The AI ​​network elements may be built into the network elements of the communication system. For example, an AI network element may be an AI module built into: access network equipment, core network equipment, cloud server, or operation, administration, and maintenance (OAM) to implement AI-related functions. The OAM may act as the network management system for core network equipment and / or access network equipment. Alternatively, the AI ​​network element may also be an independently configured network element in the communication system. Optionally, the terminal or its built-in chip may also include AI entities for implementing AI-related functions.

[0078] (1) Network equipment

[0079] A network device is a network-side device with wireless transceiver capabilities. A network device can be a device in a radio access network (RAN) that provides wireless communication capabilities to terminal devices; this is called RAN equipment. The RAN can be an access network within the 3rd Generation Partnership Project (3GPP), such as 4G, 5G, or future networks. The RAN can also be an open RAN (O-RAN or ORAN), a cloud radio access network (CRAN), or a communication network combining two or more of these.

[0080] RAN equipment can also be a base station, an evolved NodeB (eNodeB), a transmission reception point (TRP), a next-generation NodeB (gNB) in a 5G mobile communication system, a base station in a future mobile communication system, or an access node in a WiFi system, etc.

[0081] RAN equipment can also be modules or units that perform some of the functions of a base station. For example, it can be a central unit (CU), a distributed unit (DU), or a radio unit (RU). The CU performs the functions of the radio resource control (RRC) and packet data convergence protocol (PDCP) of the base station, and can also perform the functions of the service data adaptation protocol (SDAP). The CU can be further divided into a CU control plane (CP) (i.e., CU-CP) and a CU user plane (UP) (i.e., CU-UP). The DU performs the functions of the radio link control (RLC) layer and medium access control (MAC) layer of the base station, and can also perform some or all of the physical layer functions. For specific descriptions of the above protocol layers, please refer to the relevant 3GPP technical specifications. The CU and DU can be set up separately, or they can be included in the same network element, such as in the baseband unit (BBU). The RU can be included in radio frequency equipment or radio frequency units, such as in a remote radio unit (RRU), an active antenna unit (AAU), or a remote radio head (RRH). In different systems, CU, DU, or RU may have different names, but those skilled in the art will understand their meaning. For example, in an ORAN system, CU can also be called O-CU (open CU), DU can also be called O-DU, and RU can also be called O-RU. Any of the CU (or CU-CP, CU-UP), DU, and RU units in this application can be implemented through software modules, hardware modules, or a combination of software and hardware modules. RAN equipment can be a macro base station (as shown in Figure 1, 110a), a micro base station or an indoor station (as shown in Figure 1, 110b), or a relay node or donor node, etc. The embodiments of this application do not limit the specific technology or equipment form used in the network equipment.

[0082] In the embodiments of this application, the functions of the network device can be executed by modules (such as chips) within the network device, or by a control subsystem that includes the functions of the network device. This control subsystem, which includes the functions of the network device, can be a control center in the aforementioned application scenarios such as smart grids, industrial control, intelligent transportation, and smart cities.

[0083] (2) Terminal equipment

[0084] A terminal device is a user-side device with wireless transceiver capabilities. Terminal devices can also be called terminals, user equipment (UE), mobile stations, mobile terminals, etc. They can be widely used in various scenarios, such as D2D communication, V2X communication, machine-type communication (MTC), the Internet of Things (IoT), virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grids, smart furniture, smart offices, smart wearables, intelligent transportation, and smart cities. Terminal devices can be mobile phones, tablets, computers with wireless transceiver capabilities, wearable devices, vehicle devices (such as vehicle units, in-vehicle modules, in-vehicle chips, on-board units (OBUs) or telematics boxes (T-BOXs), etc.), drones, helicopters, airplanes, ships, robots, robotic arms, smart home devices, satellite terminals, Internet of Things (IoT) terminals, virtual reality (VR) devices, augmented reality (AR) devices, smart point-of-sale (POS) machines, customer-premises equipment (CPE), light user equipment (UE), reduced capability UE (REDCAP UE), etc. In the embodiments of this application, the device used to implement the functions of the terminal device can be the terminal device itself, or a device capable of supporting the terminal device in implementing that function, such as a chip system or a combination of devices or components capable of implementing the functions of the terminal device. This device can be installed in the terminal device. The embodiments of this application do not limit the specific technology or specific device form used in the terminal device.

[0085] In this embodiment of the application, the functions of the terminal device can also be performed by modules (such as chips or modems) in the terminal device, or by a device containing the functions of the terminal device.

[0086] Network devices and terminal devices can be fixed in location or mobile. They can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; they can also be deployed on water; and they can also be deployed in the air on airplanes, balloons, and artificial satellites. The embodiments of this application do not limit the application scenarios of the network devices and terminal devices.

[0087] The roles of network devices and terminal devices can be relative. For example, the helicopter or drone 120i in Figure 1 can be configured as a mobile network device. For terminal devices 120j that access the wireless access network 100 via 120i, terminal device 120i is a network device; however, for network device 110a, 120i is a terminal device. That is, 110a and 120i communicate via a wireless air interface protocol. Of course, 110a and 120i can also communicate via a network device-to-network device interface protocol. In this case, relative to 110a, 120i is also a network device. Therefore, both network devices and terminal devices can be collectively referred to as communication devices. 110a and 110b in Figure 1 can be called communication devices with network device functions, and 120a-120j in Figure 1 can be called communication devices with terminal device functions.

[0088] Network devices and terminal devices, network devices and network devices, and terminal devices can communicate through licensed spectrum, unlicensed spectrum, or both simultaneously, without limitation.

[0089] The network architecture and business scenarios described in this application are intended to more clearly illustrate the technical solutions of the embodiments of this application, and do not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0090] The following is an explanation of the relevant terms used in the embodiments of this application. Unless otherwise specified, these explanations are provided to support the meaning of the relevant terms and to make the embodiments of this application easier to understand, and should not be regarded as a strict limitation of the relevant terms within the scope of protection claimed by this application.

[0091] (1) Channel coding and channel decoding

[0092] Figure 2(a) is a schematic diagram of a processing flow for the source and sink. As shown in Figure 2(a), the transmitting end (i.e., the source) obtains the bit sequence to be encoded (i.e., the information bit sequence) through source encoding, and then performs channel encoding on the bit sequence to be encoded to obtain the encoded bit sequence. Correspondingly, after the receiving end (i.e., the sink) obtains the symbol sequence to be decoded, it performs channel decoding on the symbol sequence to be decoded to obtain the information bit sequence, and then performs source recovery on the information bit sequence to obtain useful information.

[0093] Since source coding does not consider interference resistance, if the bit sequence output from source coding is directly transmitted through the channel, noise interference in the channel will cause bit errors, reducing communication reliability. Therefore, channel coding, which encodes the bit sequence output from source coding again, can improve communication reliability. Channel decoding is the inverse process of channel coding.

[0094] There are various channel coding methods, such as polar coding or LDPC coding. Polar codes were selected as the control channel coding method in the 5G standard. Polar codes are a coding scheme that can be rigorously proven to "achieve" the Shannon channel capacity, and have the advantages of good decoding performance and low complexity. LDPC codes were selected as the data channel coding method in the 5G standard. LDPC codes are linear block codes with a sparse parity-check matrix, exhibiting good performance approaching the Shannon limit, low decoding complexity, and flexible structure.

[0095] (2) Modulation and demodulation

[0096] Referring to Figure 2(a), the transmitting end can also map the encoded bit sequence to the modulation symbol sequence, and then send the modulation symbol sequence; correspondingly, the receiving end can receive the modulation symbol sequence and then demodulate it to obtain the symbol sequence to be decoded.

[0097] Modulation refers to the process by which the transmitting end maps the encoded bit sequence to a constellation based on a constellation diagram to obtain a modulated symbol sequence. Demodulation is the reverse process of modulation. Common modulation methods include quadrature amplitude modulation (QAM) and amplitude shift keying (ASK) modulation.

[0098] For example, the encoded bit sequence can be mapped to the modulation symbol sequence by referring to a lookup table or according to a preset rule. Here, only a lookup table is used as an illustration. As shown in Table 1, for the 16ASK modulation scheme, after determining the encoded bit sequence, the transmitting end can refer to Table 1 to map every four encoded bits (represented by b0, b1, b2, b3) to one modulation symbol. For example, bit 1111 maps to modulation symbol -15, bit 1110 maps to modulation symbol -13, and so on. In practical applications, only some rows in Table 1 may be used; this application does not impose specific limitations here.

[0099] Table 1: Mapping between bit values ​​and modulation symbols

[0100] When using 16ASK modulation, the encoded bit sequence can be mapped to the modulation symbol sequence according to the bit values, referring to Table 1. When using QAM (such as 16QAM, 64QAM, etc.) modulation, the QAM constellation diagram has real and imaginary parts, which can be mapped to the modulation symbol sequence according to Table 1 or other tables, respectively. This application will not elaborate on this further.

[0101] It should be noted that different bits have different functions when mapping the encoded bit sequence to the modulation symbol sequence. For example, in Table 1, bit b0 is used to determine the quadrant of the modulation symbol, so bit b0 is also called the symbol bit. Bits b1, b2, and b3 are used to determine the amplitude of the modulation symbol, so bits b1, b2, and b3 are also called amplitude bits. Furthermore, the transmission reliability of bits b0, b1, b2, and b3 decreases in that order, that is, the transmission reliability satisfies the following relationship: transmission reliability of b0 > transmission reliability of b1 > transmission reliability of b2 > transmission reliability of b3.

[0102] It should be noted that the values ​​of the modulation symbols in Table 1 (i.e., the magnitude of x) are only examples. In actual applications, x can be adjusted according to power consumption requirements, such as scaling up or down the multiple x values ​​shown in Table 1 by the same proportion.

[0103] (3) Probabilistic shaping

[0104] Higher-order modulation maps multiple bits to the same modulation symbol, thereby further improving spectral efficiency. Common higher-order modulation schemes include 16QAM and 64QAM, without specific limitations. 16QAM maps 4 bits to one modulation symbol, while 64QAM maps 6 bits to one modulation symbol.

[0105] In higher-order modulation, different symbols may have different energies. As shown in Table 1 above, the energies of the modulation symbols from highest to lowest are: modulation symbol -15 (modulation symbol 15), modulation symbol -13 (modulation symbol 13), modulation symbol -11 (modulation symbol 11), modulation symbol -9 (modulation symbol 9), modulation symbol -7 (modulation symbol 7), modulation symbol -5 (modulation symbol 5), modulation symbol -3 (modulation symbol 3), and modulation symbol -1 (modulation symbol 1). Among them, modulation symbol -15 has the same energy as modulation symbol 15, modulation symbol -13 has the same energy as modulation symbol 13, modulation symbol -11 has the same energy as modulation symbol 11, modulation symbol -9 has the same energy as modulation symbol 9, modulation symbol -7 has the same energy as modulation symbol 7, modulation symbol -5 has the same energy as modulation symbol 5, modulation symbol -3 has the same energy as modulation symbol 3, and modulation symbol -1 has the same energy as modulation symbol 1.

[0106] By transmitting more low-energy symbols and fewer high-energy symbols, average energy can be saved. Theoretical analysis shows that for a Gaussian white noise channel, the information transmitted per unit energy is maximized when the transmitted symbol distribution follows a Gaussian distribution. Compared to a uniform distribution, a Gaussian distribution performs better, theoretically offering a performance gain of 1.53 dB.

[0107] Probabilistic shaping is a common "shaping" technique. A typical flowchart is shown in Figure 2(b), which illustrates another processing flow for the source and sink. The difference between Figure 2(b) and Figure 2(a) is that in Figure 2(b), the transmitting end requires probabilistic shaping (or distribution matching), and the receiving end requires deprobabilistic shaping (or dedistribution matching). As shown in Figure 2(b), by cascading a pre-encoder before channel coding, the information bits are mapped (or "shaped") to a bit sequence that follows a specific distribution. Therefore, the pre-encoder is also called a distribution matcher (DM). Then, during channel coding, systematic coding is used, so that the sequence satisfying the specific distribution ultimately appears directly in the coded sequence, thus achieving the shaping of the final modulation symbol. The constellation point distribution after "shaping" is shown in Figure 2(c). It can be seen that the probability of low-energy symbols appearing is higher than that of high-energy symbols.

[0108] In this application, probabilistic shaping can also be simply referred to as shaping, which will be explained uniformly here and will not be elaborated on later.

[0109] Figure 2(d) is a schematic diagram of the probability shaping process. The information bit sequence is represented by u1, u2, ..., u... K This means that by utilizing u within it... m+1 ,u m+2 ,…,u KPrecoding is performed to obtain p1, p2, ..., p S Then u1, u2, ..., u K And p1, p2, ..., p S The inputs are fed into the channel encoder for channel coding to obtain x1, x2, ..., x N After interleaving and modulation, the data is transmitted. Where p1, p2, ..., p... S These are called auxiliary bits or auxiliary bit values. m is an integer greater than 0 and less than K-1, and s is an integer greater than 0.

[0110] For example, for 500 information bits, 100 information bits are not probabilistically shaped, and the other 400 information bits are probabilistically shaped to obtain a bit sequence that follows a specific distribution, which includes 512 bits; then, channel coding is performed on the 100 information bits and the shaped 512 bits.

[0111] (4) Information bit sequence

[0112] An information bit sequence refers to a sequence of bits to be transmitted. For example, if the bits to be transmitted are 1, 0, 1, 0, 1, 1, 0, 0, 1, 0, 1, then the resulting information bit sequence is 10101100101. In this application, K represents the length of the information bit sequence. The information bits may include payload bits. Optionally, the information bits may also include check bits, such as cyclic redundancy check (CRC) bits.

[0113] (5) Code length

[0114] Code length refers to the length of the bit sequence to be transmitted obtained by encoding the information bit sequence. The code length is greater than or equal to the length of the information bit sequence. In this application, E represents the code length.

[0115] (6) Bitrate

[0116] The code rate is the ratio of the length of the information bit sequence to the code length. In this application, R represents the code rate, therefore R = K / E.

[0117] The length, code length, and code rate of the information bit sequence can be pre-configured by higher-layer signaling, MAC layer signaling, or downlink physical layer signals, and can also be obtained or calculated by the transmitting and receiving devices. For example, the transmitting and receiving devices can determine the code length based on the coding method, the frame structure used to transmit the information bits, the number of layers, and the modulation scheme. For example, the transmitting and receiving devices can obtain the code rate based on higher-layer signaling, MAC layer signaling, or downlink physical layer signals, or determine the code rate based on the modulation and coding scheme (MCS).

[0118] (7) Rate matching

[0119] Rate matching refers to removing some bits from the encoded bit sequence without transmitting them, or repeating some bits.

[0120] The rate matching method will be further explained in three categories below.

[0121] Punching: Punching refers to directly creating holes in certain bit positions within the encoded bit sequence without transmitting them, thus generating bit sequences of arbitrary length. On the decoding side, since there is no information at the corresponding punctured positions, the log-likelihood ratio (LLR) of the corresponding bit is set to 0.

[0122] Shortening: Shortening involves fixing certain bit positions in the encoded bit sequence so that they do not need to be transmitted. On the decoding side, since the corresponding "shortened" positions are known at the receiver (usually 0), the LLR of the corresponding bit is set to infinity.

[0123] Repetition: "Repetition" refers to obtaining a longer bit sequence by repeatedly sending a portion of the encoded bit sequence.

[0124] Taking polar codes as an example, the encoding length (i.e., the mother code length) of a polar code is an integer power of 2. In practical applications, the required length may be a non-encoded length. In this case, it is necessary to remove some bits from the encoded bit sequence without transmitting them, or to repeatedly transmit some bits.

[0125] (8) Polar code

[0126] (8.1) Polar coding

[0127] Polar codes employ encoding strategies that utilize noiseless channels to transmit useful user information, or utilize noisy channels to transmit agreed-upon information or no information at all. The generator matrix of a polar code is G.N Its encoding process is as follows It is a binary row vector with length N; and Defined as The Kronecker product of matrices F2, x1 N It is the encoded bit sequence (also called a codeword). With the generating matrix G N After multiplication, we get the encoded bit sequence; the multiplication process is the encoding process. G N Also known as an Arikan polarization nucleus of length N or a canonical polarization nucleus.

[0128] During the encoding process of polar codes, A portion of the bits are used to carry information, called the information bit set, and the set of indices of these bits is denoted as A; the other portion of the bits are set to fixed values ​​agreed upon in advance by the receiver and the transmitter, called the fixed bit set or frozen bit set, and the set of its bit indices is denoted by the complement of A, denoted as A'. c These freeze bits are typically set to 0, but they can be set arbitrarily as long as the receiver and sender agree in advance.

[0129] Currently, in NR, the frozen bits and information bits of the polar code are determined based on the reliability sequence corresponding to the mother code length. The reliability sequence corresponding to the mother code length can be calculated offline to reduce the encoding complexity. The mother code length is an integer power of 2, which is the length of the bit sequence after polar code encoding; the mother code length can also be called the encoding length. Taking a mother code length of 8 as an example, assuming the reliability sequence is [0 1 2 4 3 5 6 7], the reliability of the bits from highest to lowest is: the bit corresponding to bit number 7, the bit corresponding to bit number 6, the bit corresponding to bit number 5, the bit corresponding to bit number 3, the bit corresponding to bit number 4, the bit corresponding to bit number 2, the bit corresponding to bit number 1, and the bit corresponding to bit number 0. Here, a bit can be understood as a bit sub-channel. The bit number can be understood as the index or identifier of the bit. For example, when constructing a polar code with a master code length of 8 and an information length of 4, the bits corresponding to bit number 7, bit number 6, bit number 5, and bit number 3 are selected from the end to the beginning as information bits, while the bits corresponding to bit number 4, bit number 2, bit number 1, and bit number 0 are selected as frozen bits.

[0130] Figure 3(a) shows an 8×8 polarization transformation matrix, where the left side can be understood as the side to be encoded, and the bits on the left are represented by u. The right side can be understood as the encoding side (or codeword side), and the bits on the right are represented by x. The process from left to right is the process of the transmitter encoding the bit sequence to be encoded. The information bits to be encoded are represented by the sequence u(0, 0, 0, 0, 0, 0, 1, 1). After the polarization transformation matrix, the encoded bits are represented by the sequence x(0, ​​1, 0, 1, 0, 1, 0, 1). Then, x is mapped to a modulation symbol for transmission in channel W. The bits corresponding to high channel reliability are used to map information bits, and the bits corresponding to low channel reliability are used to map frozen bits. As shown in Figure 3(a), {u0, u1, u2, u4} are frozen bits, i.e., the positions of frozen bits, and {u3, u5, u6, u7} are information bits, i.e., the positions of information bits. In this embodiment, information bits are also called information bits, and frozen bits are also called frozen bits.

[0131] Referring to Figure 3(a), in the encoding process, two adjacent columns constitute a coding layer. The left column of bits represents the input bits of the coding layer, and the right column represents the output bits. For example, in the leftmost coding layer, the input bit sequence is (0, 0, 0, 0, 0, 0, 1, 1), and the output bit sequence is (0, 0, 0, 0, 0, 0, 0, 1). The operation symbols in the middle of the coding layer... This represents the XOR operation, specifically... express The bits in the current row and A single XOR operation between the bits in the row. The bits on the right represent the result of the operation. For example, in the leftmost coding layer, the first input bit (value 0) and the second input bit (value 0) are processed... The operation yields the first output bit (with a value of 0).

[0132] (8.2) Polarization Decoding

[0133] There are several methods for decoding polar codes, such as successive cancellation (SC) decoding and successive cancellation list (SCL) decoding.

[0134] The SC decoding method refers to calculating the LLR of each decoded bit sequentially based on the LLR sequence corresponding to the bit sequence to be decoded, and making a bit-by-bit decision. When the decoded bit is an information bit, if the LLR of the decoded bit is greater than 0, then the decoded bit is 0; if the LLR of the decoded bit is less than 0, then the decoded bit is 1. When the decoded bit is a fixed bit, the decoding result is set to 0 regardless of the LLR value. Figure 3(b) is a schematic diagram of the SC decoding calculation process. Taking 4 decoded bits as an example, there are 8 calculation nodes in Figure 3(b), including 4 f nodes and 4 g nodes. The f nodes and g nodes correspond to the f operation and the g operation, respectively. The operation of the f node requires the two LLR inputs on its right side, and the operation of the g node requires the two LLR inputs on its right side and the output of the previous stage as inputs. Only after the input items are calculated can the output be calculated. According to the above calculation rules, the decoded bits obtained by calculating sequentially from the right side in Figure 3(b) are ①→②→③→④, and the decoding is completed.

[0135] The SCL decoding method refers to using the LLR sequence corresponding to the bit sequence to be decoded. When decoding each information bit, the decoding results corresponding to 0 and 1 are saved as two branch decoding paths (referred to as path splitting). Figure 3(c) shows a schematic diagram of the decoding paths in the SCL decoding method. As shown in Figure 3(c), each level represents one decoded bit. If the decoding result is 0, the path is developed along the left subtree; if the decoding result is 1, the path is developed along the right subtree. When the total number of decoding paths exceeds the preset path width L (generally L = 2, 4, 8, 16, or 32), the L paths with the best path metric (PM) value are selected, saved, and the path is further developed to decode subsequent bits. The PM value is used to judge the quality of the path, and the PM value is calculated using LLR. For each level of decoded bits, the PM values ​​of the L paths are sorted in ascending order, and the correct path is selected based on the PM value. This process is repeated until the last bit is decoded.

[0136] As mentioned earlier, after introducing probabilistic shaping, it is necessary to determine additional auxiliary bit values ​​for probabilistic shaping. How to determine these auxiliary bit values ​​to improve decoding performance remains to be solved.

[0137] To address this issue, this application provides a corresponding solution.

[0138] The methods provided in the embodiments of this application are described in detail below. The methods provided in the embodiments of this application involve a first communication device and / or a second communication device. The first communication device is a signal transmitter, and the second communication device is a signal receiver. Unless otherwise specified, the term "first communication device" in this application can refer to a communication device (e.g., a network device, a terminal device, an encoding device, etc.), a component within that communication device (e.g., a processor, a chip, or a chip system, etc.), or a logic module or software capable of implementing all or part of the functions of the communication device. Similarly, the term "second communication device" in this application can refer to a communication device (e.g., a terminal device, a network device, a decoding device, etc.), a component within that communication device (e.g., a processor, a chip, or a chip system, etc.), or a logic module or software capable of implementing all or part of the functions of the communication device. For example, the first communication device may be a network device, and the second communication device may be a terminal device; or, the first communication device may be a terminal device, and the second communication device may be a network device.

[0139] Figure 4 is a flowchart illustrating an encoding method provided in an embodiment of this application. This method is an implementation method on the encoding side, and includes the following steps:

[0140] Step 401: The first communication device performs polarization encoding on the first bit sequence to obtain the second bit sequence.

[0141] The first bit sequence consists of N bit values, including K information bits and M auxiliary bits. Optionally, these N bit values ​​also include S frozen bits, the size of which is fixed (generally 0). The M auxiliary bits are used for probabilistic shaping in polar coding. That is, the N bit values ​​consist of K information bits and M auxiliary bits, or K information bits, M auxiliary bits, and S frozen bits. N is an integer greater than 1 and is a power of 2, K is an integer greater than or equal to 1, M is an integer greater than or equal to 1, and S is an integer greater than or equal to 1.

[0142] The bit sequence consisting of these K information bit values ​​is also called the information bit sequence. This information bit sequence can consist of payload bits, or it can include both payload bits and CRC bits.

[0143] The first bit sequence comprises L sub-blocks, and the i-th sub-block in the L sub-blocks is composed of the i-th bit value from the N bit values. It consists of several bit values, i = 0, 1, ..., L-1. L is an integer greater than 1. Figure 5(a) is a schematic diagram of the probabilistic shaping scheme based on polar codes. In this example, N = 16 and L = 4. That is, the first bit sequence consists of 16 bit values, and these 16 bit values ​​are divided into 4 sub-blocks, each sub-block including 4 bit values. Specifically, the 0th sub-block (hereinafter referred to as sub-block 0) includes the 0th to 3rd bits of the 16 bit values, the 1st sub-block (hereinafter referred to as sub-block 1) includes the 4th to 7th bits of the 16 bit values, the 2nd sub-block (hereinafter referred to as sub-block 2) includes the 8th to 11th bits of the 16 bit values, and the 3rd sub-block (hereinafter referred to as sub-block 3) includes the 12th to 15th bits of the 16 bit values.

[0144] The K information bit values ​​in the first bit sequence are located in any one or more of the L sub-blocks, and the M auxiliary bit values ​​in the first bit sequence are located in the target sub-block of the L sub-blocks.

[0145] As one possible implementation, the target sub-block is a sub-block among the first LX sub-blocks of the L sub-blocks, where X is an integer greater than or equal to 1 and less than L. Taking Figure 5(a) as an example, assuming X = 1, the target sub-block is not sub-block 3, that is, the target sub-block can be sub-block 0, sub-block 1, or sub-block 2. Assuming X = 2, the target sub-block is neither sub-block 2 nor sub-block 3, that is, the target sub-block can be sub-block 0 or sub-block 1.

[0146] As one implementation method, the first communication device can determine which of the L sub-blocks is the target sub-block based on the modulation order (i.e., Qm) of the MCS, that is, determine which sub-block is used to carry auxiliary bit values.

[0147] As one implementation method, the value of L can also be related to the modulation order of the MCS. For example, L = 2 t ,in, This indicates rounding up, and Qm represents the modulation order. Based on this implementation method, the requirements of different modulation schemes can be matched, which helps improve system performance. For example, when Qm = 6 or 8, then L = 4; when Qm = 10 or 12, then L = 8, and so on.

[0148] As one implementation method, the M auxiliary bit values ​​are determined based on the information bit values ​​in Y sub-blocks (excluding the target sub-block) of the L sub-blocks, where Y is an integer greater than or equal to 1 and less than L. The information bit values ​​in the Y sub-blocks are included in the aforementioned K information bit values, and the bit values ​​in the second bit sequence corresponding to the target sub-block are related to the bit values ​​in the Y sub-blocks. For example, when L = 4, the target sub-block can be the first sub-block among the L sub-blocks, and the Y sub-blocks can be the third sub-block among the L sub-blocks, or the second and third sub-blocks among the L sub-blocks. Referring to the example in Figure 5(a), when the target sub-block is sub-block 1, the M auxiliary bit values ​​in the target sub-block can be determined based on the information bit values ​​in sub-block 3, or the M auxiliary bit values ​​in the target sub-block can be determined based on the information bit values ​​in sub-blocks 2 and 3.

[0149] Figure 5(b) is a schematic diagram of a probabilistic shaping scheme based on polar codes. In this example, N=16, L=4, sub-block 1 is the target sub-block, M=1, and the Y sub-blocks used to determine the M auxiliary bit values ​​within the target sub-block are sub-block 3. Based on this example, the first communication device can determine one auxiliary bit value within sub-block 1 (i.e., the target sub-block) based on the information bit values ​​within sub-block 3. It can be seen that the bit value corresponding to the target sub-block (i.e., sub-block 1) in the second bit sequence is related to the bit value within sub-block 3. Specifically, the bit value corresponding to the target sub-block (i.e., sub-block 1) in the second bit sequence can be obtained by polar coding the bit value within sub-block 3 without the need for bit values ​​from other sub-blocks to participate in polar coding.

[0150] The following describes several different implementation methods for determining the M auxiliary bit values ​​in the target sub-block based on the information bit values ​​in the Y sub-blocks.

[0151] In the first method, the first communication device performs polar coding on the information bit values ​​in the Y sub-blocks to obtain the third bit sequence, determines the first symbol sequence based on the third bit sequence, and determines M auxiliary bit values ​​based on the first symbol sequence.

[0152] The size of the coding matrix used for polar coding based on the information bit values ​​within the Y sub-blocks is related to the size of the sub-blocks.

[0153] When Y is greater than 1, the first communication device performs polar coding based on the information bit values ​​within the Y sub-blocks to obtain the third bit sequence. Specifically, the first communication device performs polar coding on the information bit values ​​within the Y sub-blocks respectively to obtain multiple fourth bit sequences, and then obtains the third bit sequence based on these multiple fourth bit sequences. For example, if Y = 2, then a fourth bit sequence is obtained by polar coding based on the information bit values ​​within one sub-block, and another fourth bit sequence is obtained by polar coding based on the information bit values ​​within another sub-block. Then, these two fourth bit sequences are XORed to obtain the third bit sequence. Based on this implementation method, the position of the auxiliary bit values ​​can be flexibly set, thereby improving the flexibility of probabilistic shaping design. Furthermore, since the auxiliary bit values ​​are determined using the information bit values ​​within the Y sub-blocks, it helps to accurately determine the auxiliary bit values, which can improve the bias distribution of probabilistic shaping, enhance the effect of probabilistic shaping, and thus improve transmission and decoding performance.

[0154] The following example illustrates this. Figure 6(a) shows an example of determining auxiliary bit values. In this example, N=16, L=4, the target sub-block is sub-block 1, and the Y sub-blocks used to determine the M auxiliary bit values ​​within the target sub-block are sub-block 3. First, based on the information bit values ​​within sub-block 3, the third bit sequence is determined, for example, bits in the third bit sequence are 0, 1, 1, 1; then, based on the third bit sequence, the first symbol sequence is determined, for example, symbols in the first symbol sequence are 1, -1, -1, -1; then, the first symbol sequence is used as the decoding input to decode and obtain the M auxiliary bit values ​​in sub-block 1.

[0155] Based on the first implementation method described above, the position of the auxiliary bit value can be flexibly set, thereby improving the flexibility of the probabilistic shaping design. Furthermore, since the auxiliary bit value is determined using the information bit values ​​within Y sub-blocks, it helps to accurately determine the auxiliary bit value, which can improve the bias distribution of the probabilistic shaping, enhance the probabilistic shaping effect, and thus improve transmission and decoding performance.

[0156] In the second implementation method, the first communication device performs polar coding on the information bit values ​​in the Y sub-blocks to obtain the third bit sequence, determines the first symbol sequence based on the third bit sequence, interleaves the third bit sequence to obtain the fifth bit sequence, determines the amplitude sequence based on the fifth bit sequence, then determines the second symbol sequence based on the first symbol sequence and the amplitude sequence, and determines M auxiliary bit values ​​based on the second symbol sequence.

[0157] The size of the coding matrix used for polar coding based on the information bit values ​​within the Y sub-blocks is related to the size of the sub-blocks.

[0158] Specifically, when Y is greater than 1, the first communication device performs polar coding based on the information bit values ​​in the Y sub-blocks to obtain the third bit sequence. For details on this method, please refer to the relevant description in the first implementation method above.

[0159] The following example illustrates this. Figure 6(b) shows an example of determining auxiliary bit values. In this example, N = 16, L = 4, the target sub-block is sub-block 1, and the Y sub-blocks used to determine the M auxiliary bit values ​​within the target sub-block are sub-block 3. First, based on the information bit values ​​within sub-block 3, the third bit sequence is determined, for example, bits in the third bit sequence are 0, 1, 1, 1; then, based on the third bit sequence, the first symbol sequence is determined, for example, symbols in the first symbol sequence are 1, -1, -1, -1. The third bit sequence is then interleaved to obtain the fifth bit sequence, for example, interleaving the first two bits of 0, 1, 1, 1 to obtain 1, 0, 1, 1 (i.e., the fifth bit sequence). Then, based on the fifth bit sequence, the amplitude sequence is determined, for example, the amplitude sequence determined by 1, 0, 1, 1 is 3, 1, 3, 3. Then, based on the first symbol sequence and the amplitude sequence, the second symbol sequence is obtained. For example, multiplying the first symbol sequence 1,-1,-1,-1 with the amplitude sequence 3,1,3,3 at corresponding positions yields the second symbol sequence 3,-1,-3,-3. Finally, the second symbol sequence is used as the decoding input to decode and obtain the M auxiliary bit values ​​in sub-block 1.

[0160] Based on the second implementation method described above, the position of the auxiliary bit values ​​can be flexibly set, thereby improving the flexibility of the probabilistic shaping design. Furthermore, since the auxiliary bit values ​​are determined using the information bit values ​​within Y sub-blocks, accurate determination of the auxiliary bit values ​​is facilitated, improving the probabilistic shaping effect. Moreover, this method uses amplitude sequences to determine the auxiliary bit values, making the distribution after probabilistic shaping closer to a Gaussian distribution, further enhancing the probabilistic shaping effect. Because the probabilistic shaping effect is improved, transmission and decoding performance can be enhanced. In addition, this method, by performing interleaving within sub-blocks, can break down bit correlations, further improving decoding performance.

[0161] In the third method, the first communication device performs polar coding on the information bit values ​​in the Y sub-blocks to obtain a third bit sequence, determines a first symbol sequence based on the third bit sequence, obtains a first amplitude sequence based on the third bit sequence, interleaves the first amplitude sequence to obtain a second amplitude sequence, then determines a third symbol sequence based on the first symbol sequence and the second amplitude sequence, and determines M auxiliary bit values ​​based on the third symbol sequence.

[0162] The size of the coding matrix used for polar coding based on the information bit values ​​within the Y sub-blocks is related to the size of the sub-blocks.

[0163] Specifically, when Y is greater than 1, the first communication device performs polar coding based on the information bit values ​​in the Y sub-blocks to obtain the third bit sequence. For details on this method, please refer to the relevant description in the first implementation method above.

[0164] The following example illustrates this. Figure 6(c) shows an example of determining auxiliary bit values. In this example, N=16, L=4, the target sub-block is sub-block 1, and the Y sub-blocks used to determine the M auxiliary bit values ​​within the target sub-block are sub-block 3. First, based on the information bit values ​​within sub-block 3, the third bit sequence is determined, for example, bits in the third bit sequence are 0, 1, 1, 1; then, based on the third bit sequence, the first symbol sequence is determined, for example, symbols in the first symbol sequence are 1, -1, -1, -1. And based on the third bit sequence, the first amplitude sequence is determined, for example, the first amplitude sequence determined by the third bit sequence 0, 1, 1, 1 is 1, 3, 3, 3. Then, the first amplitude sequence is interleaved to obtain the second amplitude sequence, for example, interleaving the first two positions of the first amplitude sequence 1, 3, 3, 3 to obtain the second amplitude sequence 3, 1, 3, 3. Then, based on the first symbol sequence and the second amplitude sequence, the third symbol sequence is obtained. For example, multiplying the first symbol sequence 1,-1,-1,-1 by the second amplitude sequence 3,1,3,3 at corresponding positions yields the third symbol sequence 3,-1,-3,-3. Finally, the third symbol sequence is used as the decoding input to decode and obtain the M auxiliary bit values ​​in sub-block 1.

[0165] Based on the above-described method three, the position of the auxiliary bit values ​​can be flexibly set, thereby improving the flexibility of the probabilistic shaping design. Furthermore, since the auxiliary bit values ​​are determined using the information bit values ​​within Y sub-blocks, accurate determination of the auxiliary bit values ​​is facilitated, improving the probabilistic shaping effect. Moreover, this method uses amplitude sequences to determine the auxiliary bit values, making the distribution after probabilistic shaping closer to a Gaussian distribution, further enhancing the probabilistic shaping effect. Because the probabilistic shaping effect is improved, transmission and decoding performance can be enhanced. In addition, this method, by performing interleaving within sub-blocks, can break down bit correlations, further improving decoding performance.

[0166] The above presents three different implementation methods for determining the M auxiliary bit values ​​in the target sub-block based on the information bit values ​​in the Y sub-blocks. As another implementation method, the first communication device can also determine the M auxiliary bit values ​​in the target sub-block based on the information bit values ​​in the aforementioned Y sub-blocks and the information bit values ​​in the target sub-block. The information bit values ​​in the target sub-block are included in the aforementioned K information bit values. The specific implementation process of this method is similar to the three methods described above, except for the difference in the number of information bit values, and therefore will not be elaborated further.

[0167] Step 402: The first communication device modulates the second bit sequence to obtain modulation symbol information.

[0168] As one implementation method, the first communication device can perform rate matching on the second bit sequence to obtain the seventh bit sequence, and then modulate the seventh bit sequence to obtain modulation symbol information. Specifically, when the modulation order is 6, 10, or 12, the rate matching method is puncturing. For example, a modulation order of 6 results in 64QAM; a modulation order of 10 results in 1024QAM; and a modulation order of 12 results in 4096QAM.

[0169] Of course, this application does not limit the rate matching method; for example, the rate matching method can also be shortening or repetition.

[0170] As another implementation method, the first communication device may also directly modulate the second bit sequence to obtain modulation symbol information instead of performing rate matching on the second bit sequence.

[0171] Step 403: The first communication device outputs modulation symbol information.

[0172] Here, the output modulation symbol information can be the modulation symbol information sent by the first communication device to the outside world, such as sending modulation symbol information to the second communication device, or it can be the modulation symbol information sent between different internal units.

[0173] Based on the above scheme, in scenarios where probabilistic shaping is introduced, using the information bit values ​​within non-target sub-blocks to determine the auxiliary bit values ​​within the target sub-block allows for flexible setting of the auxiliary bit values' positions in the bit sequence before encoding. This enhances the flexibility of probabilistic shaping design, thereby simplifying the implementation of polar coding. Furthermore, using information bit values ​​to determine auxiliary bit values ​​helps in accurately determining these values, improving the bias distribution of probabilistic shaping, enhancing its effectiveness, and ultimately improving transmission and decoding performance.

[0174] Figure 7 is a flowchart illustrating a decoding method provided in an embodiment of this application. This method is an implementation method on the decoding side, and includes the following steps:

[0175] Step 701: The second communication device acquires modulation symbol information.

[0176] For example, the second communication device can receive modulation symbol information from the first communication device.

[0177] Step 702: The second communication device demodulates the modulation symbol information to obtain the sequence to be decoded.

[0178] For example, after demodulating the modulation symbol information, the second communication device also performs deinterleaving and / or derate matching to obtain the sequence to be decoded.

[0179] The sequence to be decoded corresponds to the first bit sequence in the embodiment of Figure 4. For example, the first communication device polarizes the first bit sequence to obtain the second bit sequence, and then performs rate matching, interleaving, and modulation on the second bit sequence before sending it to the second communication device. The second communication device demodulates, deinterleaves, and de-rate-matches the received modulation symbol information to obtain the sequence to be decoded.

[0180] Step 703: The second communication device performs polarization decoding on the sequence to be decoded to obtain the decoding result.

[0181] When the second communication device performs polarization decoding, it can decode only the information bit values ​​and not the auxiliary bit values. In this case, the decoding result includes the information bit values ​​but does not include the auxiliary bit values. Specifically, in the case of correct decoding, the decoding result includes K information bit values, and these K information bit values ​​are the same as the K information bit values ​​in the first bit sequence of the embodiment in Figure 4 above.

[0182] Alternatively, when performing polarization decoding, the second communication device can decode both information bit values ​​and auxiliary bit values. In this case, the decoding result includes both information bit values ​​and auxiliary bit values. Specifically, in the case of correct decoding, the decoding result includes K information bit values ​​and M auxiliary bit values, and these K information bit values ​​and M auxiliary bit values ​​are the same as the K information bit values ​​and M auxiliary bit values ​​in the first bit sequence of the embodiment in Figure 4 above.

[0183] Based on the above scheme, in scenarios where probabilistic shaping is introduced, using the information bit values ​​within non-target sub-blocks to determine the auxiliary bit values ​​within the target sub-block allows for flexible setting of the auxiliary bit values' positions in the bit sequence before encoding. This enhances the flexibility of probabilistic shaping design, thereby simplifying the implementation of polar coding. Furthermore, using information bit values ​​to determine auxiliary bit values ​​helps in accurately determining these values, improving the bias distribution of probabilistic shaping, enhancing its effectiveness, and ultimately improving transmission and decoding performance.

[0184] The above mainly describes the solution provided by the embodiments of this application from the perspective of the interaction between the first communication device and the second communication device. It is understood that, in order to achieve the above functions, the first communication device and the second communication device may include hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should readily recognize that, in conjunction with the units and algorithm steps of the various examples described in the embodiments disclosed herein, the embodiments of this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0185] In this application embodiment, the first communication device and the second communication device can be divided into functional units according to the above method example. For example, each function can be divided into a separate functional unit, or two or more functions can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0186] In the case of using integrated units, FIG8 shows a possible exemplary block diagram of the device involved in the embodiments of this application. As shown in FIG8, the device 800 may include a processing unit 802 and a communication unit 803. The processing unit 802 is used to control and manage the operation of the device 800. The communication unit 803 is used to support communication between the device 800 and other devices. Optionally, the communication unit 803 is also called a transceiver unit, and may include a receiving unit and / or a sending unit, respectively used to perform receiving and sending operations. The device 800 may also include a storage unit 801 for storing the program code and / or data of the device 800.

[0187] The device 800 can be the first communication device in the above embodiments. The processing unit 802 can support the device 800 in performing the actions of the first communication device in the above method embodiments. Alternatively, the processing unit 802 mainly performs the internal actions of the first communication device in the method embodiments, and the communication unit 803 can support communication between the device 800 and other devices.

[0188] For example, in one embodiment, processing unit 802, in a first aspect, provides an encoding method that can be executed by a first communication device. Unless otherwise specified, the "first communication device" in this application can refer to a communication device (e.g., a network device, a terminal device, etc.), a component within that communication device (e.g., a processor, a chip, or a chip system, etc.), or a logic module or software capable of implementing all or part of the functions of the communication device. The method includes: processing unit 802, configured to polarize encode a first bit sequence to obtain a second bit sequence; wherein the first bit sequence consists of N bit values, the N bit values ​​including K information bit values ​​and M auxiliary bit values, the first bit sequence including L sub-blocks, and the i-th sub-block among the L sub-blocks being composed of the i-th bit value among the N bit values. It consists of several bit values, i = 0, 1, ..., L-1. N is an integer greater than 1, K is an integer greater than or equal to 1, M is an integer greater than or equal to 1, L is an integer greater than 1, the M auxiliary bit values ​​are located in the target sub-block among the L sub-blocks, the M auxiliary bit values ​​are determined based on the information bit values ​​in the Y sub-blocks excluding the target sub-block among the L sub-blocks, Y is an integer greater than or equal to 1 and less than L, the information bit values ​​in the Y sub-blocks are included in the K information bit values, the bit value in the second bit sequence corresponding to the target sub-block is related to the bit value in the Y sub-blocks, the M auxiliary bit values ​​are used for probabilistic shaping of polarization coding; and, modulation is performed according to the second bit sequence to obtain modulation symbol information; communication unit 803 is used to output the modulation symbol information.

[0189] In one possible implementation, the processing unit 802 is further configured to perform polar coding based on the information bit values ​​within the Y sub-blocks to obtain a third bit sequence; determine a first symbol sequence based on the third bit sequence; and determine the M auxiliary bit values ​​based on the first symbol sequence.

[0190] In one possible implementation, Y>1; the processing unit 802 is configured to perform polar coding based on the information bit values ​​within the Y sub-blocks to obtain a third bit sequence, specifically including: performing polar coding based on the information bit values ​​within the Y sub-blocks respectively to obtain multiple fourth bit sequences; and obtaining the third bit sequence based on the multiple fourth bit sequences.

[0191] In one possible implementation, the processing unit 802 is further configured to interleave the third bit sequence to obtain a fifth bit sequence; determine an amplitude sequence based on the fifth bit sequence; and the processing unit 802 is configured to determine the M auxiliary bit values ​​based on the first symbol sequence, specifically including: determining a second symbol sequence based on the first symbol sequence and the amplitude sequence; and determining the M auxiliary bit values ​​based on the second symbol sequence.

[0192] In one possible implementation, the processing unit 802 is further configured to obtain a first amplitude sequence based on the third bit sequence; interleave the first amplitude sequence to obtain a second amplitude sequence; and the processing unit 802 is configured to determine the M auxiliary bit values ​​based on the first symbol sequence, specifically including: determining a third symbol sequence based on the first symbol sequence and the second amplitude sequence; and determining the M auxiliary bit values ​​based on the third symbol sequence.

[0193] In one possible implementation, the processing unit 802 is used to modulate the second bit sequence to obtain modulation symbol information, specifically including: performing rate matching on the second bit sequence to obtain a seventh bit sequence; and modulating the seventh bit sequence to obtain the modulation symbol information; wherein, when the modulation order is 6, 10 or 12, the rate matching method is puncturing.

[0194] The device 800 can be the second communication device in the above embodiments. The processing unit 802 can support the device 800 in performing the operations of the second communication device in the above method embodiments. Alternatively, the processing unit 802 mainly performs the internal operations of the second communication device in the method embodiments, and the communication unit 803 can support communication between the device 800 and other devices.

[0195] For example, in one embodiment, a communication unit 803 is used to acquire modulation symbol information; a processing unit 802 is used to demodulate the modulation symbol information to obtain a sequence to be decoded; and to perform polarization decoding on the sequence to be decoded to obtain a decoding result; wherein the sequence to be decoded corresponds to a first bit sequence, the first bit sequence is composed of N bit values, the N bit values ​​include K information bit values ​​and M auxiliary bit values, the first bit sequence includes L sub-blocks, and the i-th sub-block in the L sub-blocks is composed of the i-th bit value in the N bit sequence. It consists of several bit values, i = 0, 1, ..., L-1. N is an integer greater than 1, K is an integer greater than or equal to 1, M is an integer greater than or equal to 1, L is an integer greater than 1, the M auxiliary bit values ​​are located in the target sub-block among the L sub-blocks, the M auxiliary bit values ​​are determined based on the information bit values ​​in the Y sub-blocks excluding the target sub-block among the L sub-blocks, Y is an integer greater than or equal to 1 and less than L, the information bit values ​​in the Y sub-blocks are included in the K information bit values, the bit value in the second bit sequence corresponding to the target sub-block is related to the bit value in the Y sub-blocks, and the M auxiliary bit values ​​are used for probabilistic shaping of polar coding.

[0196] It should be understood that the division of units in the above device is merely a logical functional division. In actual implementation, they can be fully or partially integrated into a single physical entity, or they can be physically separated. Furthermore, all units in the device can be implemented entirely through software calls from processing elements; all units can be implemented entirely in hardware; or some units can be implemented through software calls from processing elements, and some units can be implemented in hardware. For example, each unit can be a separate processing element, or it can be integrated into a chip within the device. Alternatively, it can be stored as a program in memory, called and executed by a processing element of the device. Moreover, these units can be fully or partially integrated together, or implemented independently. The processing element mentioned here can also be called a processor, which can be an integrated circuit with signal processing capabilities. In the implementation process, the operations of the above methods or the various units mentioned above can be implemented through integrated logic circuits in the processor element or through software calls from processing elements.

[0197] In one example, a unit in any of the above devices can be one or more integrated circuits configured to implement the methods described above, such as: one or more application-specific integrated circuits (ASICs), or one or more digital signal processors (DSPs), or one or more field-programmable gate arrays (FPGAs), or a combination of at least two of these forms of integrated circuits. As another example, when a unit in the device can be implemented in the form of a processing element scheduler, the processing element can be a processor, such as a general-purpose central processing unit (CPU), or other processor capable of calling programs. Furthermore, these units can be integrated together and implemented as a System-on-a-Chip (SoC).

[0198] The receiving unit described above is an interface circuit of the device, used to receive signals from other devices. For example, when the device is implemented as a chip, the receiving unit is an interface circuit for the chip to receive signals from other chips or devices. The transmitting unit described above is an interface circuit of the device, used to transmit signals to other devices. For example, when the device is implemented as a chip, the transmitting unit is an interface circuit for the chip to transmit signals to other chips or devices.

[0199] Based on the same technical concept, this application also provides a communication device for implementing the functions of the first or second communication device described above. As shown in FIG9, the device may be a communication equipment or a component within a communication equipment (e.g., a processor, chip, or chip system). The device includes a processor 901 and a communication interface 902, and optionally, a memory 903. The memory 903 may be independent of the processor 901 or integrated into the processor 901; no specific limitation is made. It is understood that FIG9 only shows the main components of the communication device. In one possible implementation, the communication device may further include an input / output device (not shown in the figure).

[0200] The processor 901 is used to execute the program code stored in the memory 903, specifically to perform the actions of the processing unit 802 described above, which will not be described in detail here. The communication interface 902 is specifically used to perform the actions of the communication unit 803 described above, which will not be described in detail here.

[0201] The processor 901 can be a CPU, a digital processing unit, or something similar. The processor 901 can be used to process communication protocols and communication data, control the entire communication device, execute software programs, and process data from those programs, such as, but not limited to, baseband-related processing. The communication interface 902 can be used to transmit and receive signals, such as, but not limited to, radio frequency (RF) transceivers. These devices can be disposed on separate chips, or at least partially or entirely on the same chip. For example, the processor 901 can be further divided into an analog baseband processor and a digital baseband processor. The analog baseband processor can be integrated with the transceiver on the same chip, while the digital baseband processor can be disposed on a separate chip. With the continuous development of integrated circuit technology, more and more devices can be integrated on the same chip. For example, a digital baseband processor can be integrated with multiple application processors (such as, but not limited to, graphics processors, multimedia processors, etc.) on the same chip. Such a chip can be called a system-on-a-chip (SoC). Whether to dispose of the devices independently on different chips or integrate them on one or more chips often depends on the specific needs of the product design. This application does not limit the specific implementation of the above-mentioned devices.

[0202] The communication interface 902 can be a transceiver, an interface circuit such as a transceiver circuit, or a transceiver chip, etc. Optionally, the communication interface 902 may include radio frequency (RF) circuitry and an antenna. The RF circuitry is mainly used for converting baseband signals to RF signals and processing RF signals. The antenna is mainly used for transmitting and receiving RF signals in the form of electromagnetic waves. Optionally, the communication interface 902 can be an input / output interface or a chip pin.

[0203] Input / output devices, such as touchscreens, displays, and keyboards, are primarily used to receive user input data and output data to the user.

[0204] Memory 903 is used to store programs executed by processor 901. Memory 903 can be non-volatile memory, such as a hard disk drive (HDD) or solid-state drive (SSD), or it can be volatile memory, such as cache or random-access memory (RAM). Memory 903 can be any other medium capable of carrying or storing desired program code in the form of instructions or data structures that can be accessed by a computer, but is not limited to this.

[0205] When the communication device is powered on, the processor 901 can read the software program in the memory 903, interpret and execute the instructions of the software program, and process the data of the software program. When data needs to be transmitted wirelessly, the processor 901 performs baseband processing on the data to be transmitted and outputs the baseband signal to the radio frequency (RF) circuit. The RF circuit processes the baseband signal and transmits the RF signal outward in the form of electromagnetic waves through the antenna. When data is sent to the communication device, the RF circuit receives the RF signal through the antenna, converts the RF signal into a baseband signal, and outputs the baseband signal to the processor 901. The processor 901 converts the baseband signal into data and processes the data.

[0206] In another implementation, the radio frequency circuitry and antenna can be set up independently of the processor performing baseband processing. For example, in a distributed scenario, the radio frequency circuitry and antenna can be arranged remotely, independent of the communication device.

[0207] This application embodiment does not limit the specific connection medium between the communication interface 902, processor 901, and memory 903. In this application embodiment, the memory 903, processor 901, and communication interface 902 are connected via a bus 904 in Figure 9. The bus is represented by a thick line in Figure 9. The connection methods between other components are only for illustrative purposes and are not intended to be limiting. Buses can be divided into address buses, data buses, control buses, etc. For ease of illustration, only one thick line is used in Figure 9, but this does not mean that there is only one bus or one type of bus.

[0208] Optionally, the communication device described above can be a standalone device or part of a larger device. For example, the communication device can be:

[0209] (1) An independent integrated circuit (IC), or chip, or chip system or subsystem;

[0210] (2) A collection of one or more ICs, optionally including a storage component for storing data and instructions;

[0211] (3) Application-specific integrated circuit (ASIC), such as modem;

[0212] (4) Modules that can be embedded in other devices;

[0213] (5) Receivers, smart terminals, wireless devices, handheld devices, mobile units, vehicle-mounted devices, cloud devices, artificial intelligence devices, etc.;

[0214] (6) Others, etc.

[0215] This application provides a chip (or chip system) including a processor for implementing any of the above-described method embodiments.

[0216] This application provides a computer-readable storage medium storing a computer program or instructions that, when executed, implement any of the above-described method embodiments.

[0217] This application provides a computer program product, which includes a computer program or instructions that, when executed, implement any of the above-described method embodiments.

[0218] This application provides a communication system, including a first communication device and a second communication device in the above method embodiments.

[0219] In this application embodiment, "multiple" can refer to two or more. Therefore, in this application embodiment, "multiple" can also be understood as "at least two". "At least one" can be understood as one or more, such as one, two, or more. For example, "including at least one" means including one, two, or more. For example, including at least one of A, B, and C, then it could include A, B, C, A and B, A and C, B and C, or A, B, and C. "And / or" describes the association relationship between related objects. Specifically, there can be three relationships. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / ", unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship.

[0220] Furthermore, the terms "system" and "network" in the embodiments of this application can be used interchangeably, as can "according to" and "based on". The ordinal numbers such as "first" and "second" mentioned in the embodiments of this application are generally used to distinguish different objects and are not used to limit the order, sequence, priority, or importance of multiple objects. For example, the first communication device and the second communication device in the embodiments of this application are used to distinguish between two communication devices, and do not limit the priority or importance of these two communication devices.

[0221] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0222] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in one or more blocks of the flowchart illustrations and / or one or more blocks of the block diagrams.

[0223] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.

[0224] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide steps for implementing the functions specified in one or more flowcharts and / or one or more block diagrams.

Claims

1. An encoding method, characterized in that, include: The first bit sequence is polar-coded to obtain the second bit sequence; wherein the first bit sequence consists of N bit values, the N bit values ​​including K information bit values ​​and M auxiliary bit values, and the first bit sequence includes L sub-blocks, the i-th sub-block of the L sub-blocks being composed of the i-th bit value from the N bit values. It consists of several bit values, i = 0, 1, ..., L-1. N is an integer greater than 1, K is an integer greater than or equal to 1, M is an integer greater than or equal to 1, L is an integer greater than 1, the M auxiliary bit values ​​are located in the target sub-block among the L sub-blocks, the M auxiliary bit values ​​are determined based on the information bit values ​​in the Y sub-blocks excluding the target sub-block among the L sub-blocks, Y is an integer greater than or equal to 1 and less than L, the information bit values ​​in the Y sub-blocks are included in the K information bit values, the bit value in the second bit sequence corresponding to the target sub-block is related to the bit value in the Y sub-blocks, and the M auxiliary bit values ​​are used for probabilistic shaping of polar coding; Modulation is performed based on the second bit sequence to obtain modulation symbol information; Output the modulation symbol information.

2. The method as described in claim 1, characterized in that, Also includes: The target sub-block is a sub-block among the first LX sub-blocks of the L sub-blocks, where X is an integer greater than or equal to 1 and less than L.

3. The method as described in claim 1 or 2, characterized in that, Also includes: Based on the information bit values ​​within the Y sub-blocks, polar coding is performed to obtain the third bit sequence; Based on the third bit sequence, determine the first symbol sequence; The M auxiliary bit values ​​are determined based on the first symbol sequence.

4. The method as described in claim 3, characterized in that, Y>1； The step of performing polar coding based on the information bit values ​​within the Y sub-blocks to obtain the third bit sequence includes: Based on the information bit values ​​within the Y sub-blocks, polar coding is performed respectively to obtain multiple fourth bit sequences; The third bit sequence is obtained based on the plurality of fourth bit sequences.

5. The method as described in claim 3 or 4, characterized in that, The method further includes: The third bit sequence is interleaved to obtain the fifth bit sequence; Determine the amplitude sequence based on the fifth bit sequence; Determining the M auxiliary bit values ​​based on the first symbol sequence includes: Determine the second symbol sequence based on the first symbol sequence and the amplitude sequence; The M auxiliary bit values ​​are determined based on the second symbol sequence.

6. The method as described in claim 3 or 4, characterized in that, The method further includes: Based on the third bit sequence, the first amplitude sequence is obtained; The first amplitude sequence is interleaved to obtain the second amplitude sequence; Determining the M auxiliary bit values ​​based on the first symbol sequence includes: The third symbol sequence is determined based on the first symbol sequence and the second amplitude sequence; The values ​​of the M auxiliary bits are determined based on the third symbol sequence.

7. The method according to any one of claims 1 to 6, characterized in that, The M auxiliary bit values ​​are determined based on the information bit values ​​in the Y sub-blocks and the information bit values ​​in the target sub-block, wherein the information bit values ​​in the target sub-block are included in the K information bit values.

8. The method according to any one of claims 1 to 7, characterized in that, L=4, the target sub-block is the first sub-block among the L sub-blocks, and the Y sub-blocks are the second sub-block among the L sub-blocks, or the second and third sub-blocks among the L sub-blocks.

9. The method according to any one of claims 1 to 8, characterized in that, The value of L is related to the modulation order of the modulation coding scheme (MCS).

10. The method as described in claim 9, characterized in that, L=2 t ,in, This indicates rounding up, and Qm represents the modulation order.

11. The method according to any one of claims 1 to 10, characterized in that, The process of modulating according to the second bit sequence to obtain modulation symbol information includes: Rate matching is performed on the second bit sequence to obtain the seventh bit sequence; The seventh bit sequence is modulated to obtain the modulation symbol information; When the modulation order is 6, 10 or 12, the rate matching method is punching.

12. A decoding method, characterized in that, The method includes: Obtain modulation symbol information; The modulation symbol information is demodulated to obtain the sequence to be decoded; The sequence to be decoded is subjected to polarization decoding to obtain the decoding result; The sequence to be decoded corresponds to a first bit sequence, which consists of N bit values, including K information bit values ​​and M auxiliary bit values. The first bit sequence includes L sub-blocks, and the i-th sub-block in the L sub-blocks is composed of the i-th bit value among the N bit values. It consists of several bit values, i = 0, 1, ..., L-1. N is an integer greater than 1, K is an integer greater than or equal to 1, M is an integer greater than or equal to 1, L is an integer greater than 1, the M auxiliary bit values ​​are located in the target sub-block among the L sub-blocks, the M auxiliary bit values ​​are determined based on the information bit values ​​in the Y sub-blocks excluding the target sub-block among the L sub-blocks, Y is an integer greater than or equal to 1 and less than L, the information bit values ​​in the Y sub-blocks are included in the K information bit values, the bit value in the second bit sequence corresponding to the target sub-block is related to the bit value in the Y sub-blocks, and the M auxiliary bit values ​​are used for probabilistic shaping of polar coding.

13. The method as described in claim 12, characterized in that, Also includes: The target sub-block is a sub-block among the first LX sub-blocks of the L sub-blocks, where X is an integer greater than or equal to 1 and less than L.

14. The method as described in claim 12 or 13, characterized in that, L=4, the target sub-block is the first sub-block among the L sub-blocks, and the Y sub-blocks are the third sub-block among the L sub-blocks, or the second and third sub-blocks among the L sub-blocks.

15. The method according to any one of claims 12 to 14, characterized in that, The value of L is related to the modulation order of the modulation coding scheme (MCS).

16. The method as described in claim 15, characterized in that, L=2 t ,in, This indicates rounding up, and Qm represents the modulation order.

17. A communication device, characterized in that, It includes a processor and an interface circuit, the processor being used to communicate with other devices through the interface circuit and to implement the method of any one of claims 1 to 11, or to implement the method of any one of claims 12 to 16.

18. The apparatus as claimed in claim 17, characterized in that, The communication device further includes a memory for storing computer programs or instructions, which, when executed by the processor, implement the method of any one of claims 1 to 11, or the method of any one of claims 12 to 16.

19. A computer program product, characterized in that, The computer program product includes instructions that, when executed, implement the method of any one of claims 1 to 16.

20. A computer-readable storage medium, characterized in that, The storage medium stores a computer program or instructions, which, when executed, implement the method described in any one of claims 1 to 16.

21. A chip, characterized in that, The chip includes a processor for implementing the method according to any one of claims 1 to 16.

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