Power converter and power conversion circuit

Abstract

Disclosed in the present application are a power converter and a power conversion circuit. The power converter comprises: an inductor; and at least one switch capacitor circuit. Each switch capacitor circuit comprises a first switch transistor, a second switch transistor, a third switch transistor, a fourth switch transistor, and a capacitor, wherein the first switch transistor, the second switch transistor, the third switch transistor and the fourth switch transistor are connected in series between a first terminal of the inductor and a ground terminal; a midpoint node of the second switch transistor and the third switch transistor is connected to an input voltage; a first terminal of the capacitor is connected to a first switch node between the first switch transistor and the second switch transistor; and a second terminal of the capacitor is connected to a second switch node between the third switch transistor and the fourth switch transistor. The power converter can enhance the output voltage regulation capability of a circuit within a specific voltage range, realize a reduction in the size of an inductor, achieve the miniaturization of the circuit, and improve the conversion efficiency of the circuit.

Description

Power converter and power conversion circuit Cross-references to related applications

[0001] This application claims priority to Chinese Patent Application No. CN202510354056.5, filed on March 24, 2025, entitled "Power Converter and Power Conversion Circuit", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This invention relates to the field of power conversion technology, and more specifically, to a power converter and a power conversion circuit. Background Technology

[0003] A power converter is a power module that converts an input voltage waveform into a desired output voltage or output current. A power converter includes switching elements and energy storage elements. The switching elements periodically turn on and off according to a control signal, while the energy storage elements correspondingly store and release electrical energy, thereby providing an output voltage signal at the output terminal of the power converter.

[0004] In the field of power converters, different types of converters have their own characteristics and limitations. For boost power converters that use inductors as energy storage elements, the inductor current is intermittently fed into the output energy storage capacitor during operation. This characteristic causes the switching elements to bear significant stress during switching. This significant stress not only limits further improvements in conversion efficiency but also hinders the reduction of component size, which is detrimental to the miniaturization and high efficiency development of equipment. Power converters that use capacitors as energy storage elements have advantages such as small capacitor size, high circuit conversion efficiency and power density, and low voltage stress on switching elements. However, switched-capacitor topology power converters can only achieve high conversion efficiency when the input / output voltage ratio matches the ratio determined by their structure. In practical applications, when the input / output voltage ratio exceeds this specific range, switched-capacitor power converters alone cannot effectively stabilize the output voltage, which greatly limits their application scenarios and applicability.

[0005] As portable devices such as mobile phones become increasingly thinner and lighter, more stringent requirements are being placed on the selection of internal components. Traditional inductor-driven boost switching power supply structures face a difficult-to-reconcile contradiction between switching frequency, efficiency, and inductor size. On the one hand, to improve conversion efficiency and reduce inductor size, the switching frequency needs to be increased; on the other hand, excessively high switching frequencies can lead to problems such as increased electromagnetic interference and increased switching losses, thereby affecting overall efficiency and making it difficult to rationally arrange components within a limited space.

[0006] Therefore, there is a need to develop novel hybrid power converter circuits that combine the advantages of traditional inductive and capacitor-based power converters, thereby providing power solutions with high conversion efficiency and high power density. Summary of the Invention

[0007] In view of this, the purpose of the present invention is to provide a power converter and a power conversion circuit that uses both an inductor and a capacitor as energy storage elements and employs multiple switching elements to periodically change the connection of the inductor and the capacitor to obtain an output voltage that can be adjusted within a predetermined voltage range.

[0008] To achieve the above objectives, the present invention provides a power converter for generating an output voltage within a preset voltage range based on an input voltage, comprising:

[0009] Inductors; and

[0010] At least one switched capacitor circuit,

[0011] Each switched capacitor circuit includes a first to a fourth switching transistor and a capacitor. The first to fourth switching transistors are connected in series between the first end of the inductor and the ground end. The middle node of the second and third switching transistors is connected to the input voltage. The first end of the capacitor is connected to the first switching node between the first and second switching transistors. The second end of the capacitor is connected to the second switching node between the third and fourth switching transistors.

[0012] Preferably, the preset voltage range is between one and two times the input voltage.

[0013] Preferably, the power converter includes a switched capacitor circuit, and each switching cycle of the power converter includes a first operating phase and a second operating phase.

[0014] During the first operation phase, the capacitor and the inductor are connected in series between the input voltage and the output voltage.

[0015] In the second operation phase, the capacitor is connected in parallel between the two ends of the input voltage, and the inductor is connected between the input voltage and the output voltage.

[0016] Preferably, the power converter includes multiple switched capacitor circuits, and the multiple switched capacitor circuits are connected in parallel between the first terminal of the inductor and ground.

[0017] Preferably, in each switching cycle, the plurality of switched capacitor circuits operate in an interleaved control manner, thereby connecting the plurality of capacitors in series with the inductor between the input voltage and the output voltage.

[0018] Preferably, the power converter includes multiple sub-cycles in each switching cycle, and each sub-cycle includes a first operation phase and a second operation phase.

[0019] In the first operation phase, one of the plurality of capacitors is connected in series with the inductor between the input voltage and the output voltage, and the remaining capacitors are connected in parallel between the two ends of the input voltage.

[0020] In the second operation phase, the plurality of capacitors are connected in parallel between the input voltages, and the inductor is connected between the input voltage and the output voltage.

[0021] Preferably, the power converter can operate in continuous conduction mode or intermittent conduction mode.

[0022] Preferably, the third switch in the at least one switched capacitor circuit has a dead time with respect to the second and fourth switches, and the second and fourth switches are turned on or off in an out-of-order manner.

[0023] To achieve the above objectives, the present invention also provides a power conversion circuit, comprising:

[0024] The aforementioned power converter; and

[0025] The control circuit is used to adjust the duty cycle of multiple switching transistors in the power converter through closed-loop control to obtain the desired output voltage.

[0026] Preferably, the control modes of the control circuit include: a voltage control mode with a fixed frequency or a non-fixed frequency, a current control mode, a constant on-time control mode, and a constant off-time control mode.

[0027] In summary, the power converter of this invention uses inductors and capacitors as energy storage elements. Compared with traditional power converters that use inductors, the volt-second product applied to the inductor when the switching element is turned on or off within a switching cycle is significantly reduced. Even with small-sized inductors, high conversion efficiency can be achieved. Therefore, this hybrid power converter can reduce the size of the inductor to achieve miniaturization.

[0028] Furthermore, compared to traditional switched-capacitor converters, the power converter of the present invention adds an inductor to the charging and discharging path of the capacitor for current limiting, which can reduce the loss during capacitor charge distribution and further improve the power density of the hybrid power converter. Attached Figure Description

[0029] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0030] Figure 1 shows a schematic circuit diagram of a boost converter.

[0031] Figure 2 shows a schematic circuit diagram of a power converter according to a first embodiment of the present invention.

[0032] Figure 3 shows a schematic waveform diagram of the power converter of the first embodiment of the present invention in continuous conduction mode.

[0033] Figures 4 and 5 show the equivalent circuit diagrams of the power converter of the first embodiment of the present invention in the first and second operating stages in continuous conduction mode.

[0034] Figure 6 shows a schematic waveform diagram of the power converter of the first embodiment of the present invention in discontinuous conduction mode.

[0035] Figure 7 shows a schematic waveform diagram of the power converter of the first embodiment of the present invention under soft-switching drive.

[0036] Figure 8 shows a schematic circuit diagram of a power converter according to a second embodiment of the present invention.

[0037] Figure 9 shows a schematic waveform diagram of the power converter according to the second embodiment of the present invention.

[0038] Figures 10 to 13 show the equivalent circuit diagrams of the power converter in the first to fourth operation stages according to the second embodiment of the present invention.

[0039] Figure 14 shows a schematic circuit diagram of a power converter according to a third embodiment of the present invention.

[0040] Figure 15 shows a schematic waveform diagram of the power converter according to the third embodiment of the present invention.

[0041] Figure 16 shows a comparison of inductor losses between the power converter of this invention and a conventional boost converter using inductors of the same size.

[0042] Figure 17 shows a comparison of inductor losses between the power converter of this invention and a conventional boost converter using inductors of different sizes.

[0043] Figure 18 shows a comparison of switching losses between the power converter of this invention and a conventional boost converter.

[0044] Figure 19 shows a schematic structural diagram of a power conversion circuit according to a fourth embodiment of the present invention. Detailed Implementation

[0045] The present invention is described below based on embodiments, but the invention is not limited to these embodiments. In the detailed description of the invention below, certain specific details are described in detail. Those skilled in the art will fully understand the invention even without these details. To avoid obscuring the essence of the invention, well-known methods, processes, flows, elements, and circuits are not described in detail.

[0046] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes and are not necessarily drawn to scale. It should also be understood that, in the following description, "circuit" refers to a conductive loop formed by at least one element or sub-circuit connected by an electrical or electromagnetic link. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0047] Figure 1 shows a schematic circuit diagram of a boost converter 100. As shown in Figure 1, the boost converter 100 includes a switching transistor Q1 (also referred to as a low-side switch), a switching transistor Q2 (also referred to as a high-side switch), an inductor Ls, and an output capacitor Co. The boost converter 100 receives an input voltage VIN and generates an output voltage VOUT greater than the input voltage VIN. In this embodiment, the output voltage VOUT is provided to an external load RL. The first terminals of the low-side switch Q1 and the high-side switch Q2 are connected to each other, and their common terminal forms a switching node Lx. The second terminal of the low-side switch Q1 is connected to ground, and the second terminal of the high-side switch Q2 is connected to the output voltage VOUT. The first terminal of the inductor Ls is connected to the input voltage VIN, and its second terminal is connected to the switching node Lx. The output capacitor Co is disposed between the output terminal and ground of the boost converter 100 to generate the output voltage VOUT across its terminals. It should be understood that in this embodiment, switch Q1 is the main power transistor and switch Q2 is the rectifier transistor. Switches Q1 and Q2 can be any type of field-effect transistor, such as metal-oxide-semiconductor field-effect transistor (MOSFET). Without departing from the teachings of this invention, they can also be other types of field-effect transistors and other types of transistors known to those skilled in the art.

[0048] In the example of Figure 1, the low-side switch Q1 is controlled by control signal G1, and the high-side switch Q2 is controlled by control signal G2. The output voltage VOUT can be adjusted by regulating the pulse widths of control signals G1 and G2. For example, when control signal G1 is high, the low-side switch Q1 is turned on, and when the complementary control signal G2 is high, the high-side switch Q2 is turned on. When the low-side switch Q1 is on and the high-side switch Q2 is off, the input voltage VIN is applied across the inductor Ls, the inductor current rises linearly, and energy is stored in the inductor Ls in the form of a magnetic field. Simultaneously, the output capacitor Co supplies power to the load RL, maintaining a stable output voltage. When the low-side switch Q1 is off and the high-side switch Q2 is on, a back EMF is generated in the inductor Ls, and the inductor current charges the output capacitor Co through the high-side switch Q2. The inductor current decreases linearly, and the output voltage is determined by both the input voltage and the inductor's stored energy. By periodically repeating the above operation, the output voltage VOUT can be stabilized within the set voltage range.

[0049] In power converters, the slope of the inductor current change is determined by the voltage difference between the switching node Lx and the output voltage VOUT. Therefore, at lower switching frequencies, the inductor current exhibits a large current ripple amplitude, leading to an increase in the current ripple amplitude when the switching frequency is reduced. To ensure that the inductor does not experience peak current saturation under a given load current, traditional designs require the use of larger inductors. However, this directly conflicts with the trend towards thinner and lighter portable electronic devices like mobile phones, which necessitates miniaturization of power converters. Therefore, to meet miniaturization requirements, current designs tend to increase the switching frequency to reduce the size of magnetic components in the power converter. However, increasing the switching frequency introduces problems such as increased electromagnetic interference and switching losses, thus affecting overall efficiency.

[0050] Figure 2 shows a schematic circuit diagram of a power converter according to a first embodiment of the present invention. As shown in Figure 2, the power converter 200 of this embodiment includes a switched capacitor circuit 210, an inductor Ls, and an output capacitor Co. The switched capacitor circuit 210 includes switching transistors Q1-Q4 and a capacitor Cfly (also referred to as a flying capacitor). Switches Q1 and Q2 are connected in series between the first terminal of the inductor Ls and the intermediate node MID. Switches Q3 and Q4 are connected in series between the intermediate node MID and ground. The first terminal of the input voltage source VIN is connected to the intermediate node MID, and the second terminal of the input voltage source VIN is connected to ground. For example, the input voltage source VIN may be composed of a single lithium-ion battery, used to generate an input voltage VIN in the range of 2.7V to 4.5V. The first terminal of the capacitor Cfly is connected to the switching node SW1 between switching transistors Q1 and Q2, and the second terminal of the capacitor Cfly is connected to the switching node SW2 between switching transistors Q3 and Q4. The first terminal of the output capacitor Co is connected to the second terminal of the inductor Ls and the output terminal of the power converter 200, and the second terminal of the output capacitor Co is connected to the ground terminal. The output terminal of the power converter 200 can be connected to any desired load RL.

[0051] Furthermore, the switching transistors Q1-Q4 in this embodiment can be any type of field-effect transistor, such as a metal-oxide-semiconductor field-effect transistor (MOSFET). Without departing from the scope of the teachings of this invention, they can also be other types of field-effect transistors and other types of transistors known to those skilled in the art.

[0052] Furthermore, in this embodiment, the switching transistors Q1-Q4 are configured to periodically switch the connection paths of the capacitor Cfly and the inductor Ls, and generate a regulated output voltage VOUT at the output terminal connected to the output capacitor Co. Compared to the boost converter 100 in FIG1, the power converter 200 of this embodiment can reduce the switching losses of the power transistors, thereby allowing the power converter to operate at a higher switching frequency, and thus reducing the size of the magnetic components in the power converter, meeting the current trend of thinner and lighter electronic devices.

[0053] Furthermore, the output voltage VOUT of this embodiment is configured to be adjusted within a preset voltage range. For example, the voltage range of the output voltage VOUT in this embodiment is VIN to 2*VIN. The power converter 200 of this embodiment is mainly used to replace the traditional inductor-based switching power supply architecture in application scenarios where the output voltage range is VIN to 2*VIN, thereby improving circuit size and efficiency. Furthermore, the power converter 200 of this embodiment is particularly suitable for application scenarios powered by a single lithium battery (input voltage range of 2.7V to 4.5V). Its unique voltage conversion characteristics can generate a regulated power supply of 5V to 5.2V based on an input voltage of 2.7V to 4.5V. The regulated power supply of 5V to 5.2V is a key power supply guarantee for the USB system, audio system, vibration drive, and antenna radio frequency system of a mobile phone. Its stability and reliability directly affect the collaborative working efficiency of multiple modules and are an indispensable core component in the power supply architecture of mobile terminals.

[0054] Figure 3 shows a schematic waveform diagram of the power converter of the first embodiment of the present invention in continuous conduction mode. Figures 4 and 5 show the equivalent circuit diagrams of the first and second operation stages of the power converter of the first embodiment of the present invention in continuous conduction mode, respectively. Figure 6 shows a schematic waveform diagram of the power converter of the first embodiment of the present invention in discontinuous conduction mode. Figure 7 shows a schematic waveform diagram of the power converter of the first embodiment of the present invention under soft switching drive.

[0055] As shown in Figures 2 and 3-7, the switching transistors Q1-Q4 are controlled by control signals G1-G4 respectively. Since this embodiment uses N-type field-effect transistors to implement the switching transistors Q1-Q4, the corresponding switching transistor is turned on when the given control signal is high. However, this invention is not limited to this, and P-type transistors, N-type and P-type transistors, and / or other types of switches can also be used to implement the switching transistors Q1-Q4.

[0056] As shown in Figures 3 and 5, in one exemplary embodiment, control signals G2, G3, and G4 are periodic signals, each including an on-time and an off-time in each switching cycle Tsw. Furthermore, control signals G2 and G4 have the same frequency and phase, and control signal G3 is a complementary signal to control signals G2 and G4; that is, when control signal G3 is high, control signals G2 and G4 are low; and when control signal G3 is low, control signals G2 and G4 are high.

[0057] For clarity, the control circuit for generating control signals G2-G4 is not shown in the figure. As described below, the control circuit can adjust the duty cycle D of control signals G2-G4, i.e., D=Ton / (Ton+Toff)=Ton / Tsw, to change the proportional relationship between the output voltage VOUT and the input voltage VIN, thereby obtaining the desired output voltage VOUT.

[0058] Furthermore, the power converter 200 in this embodiment has two conduction modes depending on the load conditions: continuous conduction mode (CCM) and discontinuous conduction mode (DCM). In DCM mode, the switch Q1 is turned off when the inductor current IL freewheeling decreases to 0A. In CCM mode, after the inductor current IL freewheels to 0A, the switch Q1 is not turned off in a controlled manner, thereby enabling the inductor current IL to be continuous.

[0059] During the operation of the power converter 200, the control signals G2-G4 change periodically, and the conduction state of the switching transistors Q2-Q4 changes accordingly. Therefore, the connection relationship between the capacitor Cfly and the inductor Ls is different at different stages of the switching cycle Tsw, thus changing the charging and discharging state accordingly.

[0060] As shown in Figure 4, when the power converter 200 is in CCM mode, during the first operating phase of the switching cycle Tsw, corresponding to the time period Ton in Figure 3, control signals G1 and G3 are at high level, and control signals G2 and G4 are at low level. Therefore, switches Q1 and Q3 are turned on, and switches Q2 and Q4 are turned off. Capacitor Cfly and inductor Ls are connected in series between the input voltage VIN and the output voltage VOUT. The input voltage VIN and capacitor Cfly charge inductor Ls, causing the inductor current IL to rise linearly. Simultaneously, the voltage at switching node SW2 equals the input voltage VIN, and the voltage at switching node SW1 equals twice the input voltage VIN.

[0061] As shown in Figure 5, during the second operating phase of the switching cycle Tsw, corresponding to the time period Toff in Figure 3, control signals G1, G2, and G4 are at high level, and control signal G3 is at low level. Therefore, switches Q1, Q2, and Q4 are turned on, and switch Q3 is turned off. Capacitor Cfly is connected in parallel across the input voltage source, and inductor Ls is connected in series between the input voltage VIN and the output voltage VOUT. The input voltage VIN charges capacitor Cfly, and inductor Ls discharges via freewheeling. Therefore, the inductor current IL decreases linearly. Simultaneously, the voltage at switching node SW2 equals the ground voltage (0V), and the voltage at switching node SW1 equals the input voltage VIN.

[0062] During continuous switching cycles, according to the charge balance principle of the flying capacitor in the power converter, the voltage difference across the capacitor Cfly in steady state is equal to the input voltage VIN. In the first operating phase of the switching cycle Tsw, the voltage across the first terminal of the inductor Ls is equal to 2*VIN. In the second operating phase of the switching cycle Tsw, the voltage across the first terminal of the inductor Ls is equal to VIN. Throughout the entire switching cycle, the voltage across the second terminal of the inductor Ls is equal to VOUT.

[0063] Based on the volt-second balance principle of inductors, the following equation can be obtained: Therefore, it can be deduced that during continuous switching cycles, the steady-state output voltage VOUT of the power converter 200 is:

[0064] (1)

[0065] Wherein, VIN represents the input voltage of the power converter 200, Ton represents the duration of the first operation phase in Figure 3, and Toff represents the duration of the second operation phase in Figure 3.

[0066] In summary, the power converter 200 of this embodiment can operate as a boost converter, theoretically providing an output voltage range from the input voltage VIN to twice the input voltage VIN. Furthermore, within this output voltage range, the desired output voltage can be obtained by adjusting the duty cycle of the control signal.

[0067] As shown in Figure 6, when the power converter 200 operates in DCM mode, during the first operating phase of the switching cycle Tsw, corresponding to the time period Ton in Figure 6, control signals G1 and G3 are at high level, and control signals G2 and G4 are at low level. Therefore, switches Q1 and Q3 are turned on, and switches Q2 and Q4 are turned off. Consequently, capacitor Cfly and inductor Ls are connected in series between the input voltage VIN and the output voltage VOUT. The input voltage VIN and capacitor Cfly charge inductor Ls, causing the inductor current IL to rise linearly. Simultaneously, the voltage at switching node SW2 equals the input voltage VIN, and the voltage at switching node SW1 equals twice the input voltage VIN.

[0068] During the second operating phase of the switching cycle Tsw, corresponding to the time period Toff in Figure 6, control signals G1, G2, and G4 are at high level, and control signal G3 is at low level. Therefore, switches Q1, Q2, and Q4 are turned on, and switch Q3 is turned off. Thus, capacitor Cfly is connected in parallel across the input voltage source, and inductor Ls is connected in series between the input voltage VIN and the output voltage VOUT. The input voltage VIN charges capacitor Cfly, and inductor Ls discharges via freewheeling. Therefore, the inductor current IL rises linearly, and simultaneously, the voltage at switching node SW2 equals the ground voltage (0V), and the voltage at switching node SW1 equals the input voltage VIN. Furthermore, control signal G1 is also used to go low when the inductor current IL drops to 0A, thereby turning off switch Q1. At this time, the voltage at switching node SW1 equals the output voltage VOUT. In the next switching cycle, control signals G1 and G3 synchronously flip to high level, thereby causing switches Q1 and Q3 to turn on synchronously.

[0069] Furthermore, to prevent series communication between switches Q2-Q4 during turn-on / turn-off, the power converter 200 of this embodiment is configured to insert a dead time between the turn-on / turn-off times of switch Q3 and switch Q2 or Q4, and to turn on or off switches Q2 and Q4 in a staggered switching manner. Specifically, as shown in FIG7, in an exemplary embodiment, the power converter 200 of this embodiment sets a dead time t1 between the turn-off of switch Q3 and the turn-on of switch Q2, and a dead time t4 between the turn-off of switch Q2 and the turn-on of switch Q3. In addition, the power converter 200 of this embodiment is also configured to, when turning on switches Q2 and Q4, first turn on switch Q2, and then turn on switch Q4 after a staggered time t2; and when turning off switches Q2 and Q4, first turn off switch Q4, and then turn off switch Q2 after a staggered time t3. With this configuration, the power converter 200 of this embodiment can reduce the switching overlap loss of switching transistors Q2 and Q4, achieve soft switching drive, and improve the efficiency of the power converter. Especially in the light load range where the switching loss has a greater impact, the efficiency improvement of the power converter is more obvious.

[0070] Figure 8 shows a schematic circuit diagram of a power converter according to a second embodiment of the present invention. Figure 9 shows a schematic waveform diagram of a power converter according to a second embodiment of the present invention. Figures 10 to 13 show equivalent circuit diagrams of the power converter according to the second embodiment of the present invention in the first to fourth operation stages, respectively.

[0071] In the first embodiment, when the input voltage VIN is low (e.g., when the battery voltage drops to the 2.5V~2.7V range) and the output load is large, the power converter 200's switching duty cycle approaches 100% to achieve a regulated 5V output. This may lead to an imbalance in the charging and discharging of the flying capacitor Cfly. Specifically, in the first operating phase of the switching cycle, the flying capacitor Cfly discharges through the inductor Ls, causing its voltage to decrease. In the second operating phase of the switching cycle, the input voltage VIN charges the flying capacitor Cfly, causing its voltage to rise. However, the near-100% switching duty cycle results in a very short second operating phase, insufficient to fully charge the flying capacitor Cfly. Consequently, the steady-state voltage on the flying capacitor Cfly is lower than the input voltage VIN, failing to achieve the desired voltage output.

[0072] To address this issue, a second embodiment of the present invention provides a multiphase power converter 300, as shown in FIG8. The power converter 300 includes a first switched capacitor circuit 310, a second switched capacitor circuit 320, an inductor Ls, and an output capacitor Co. The first switched capacitor circuit 310 and the second switched capacitor circuit 320 are connected in parallel between the first terminal of the inductor Ls and ground, and the second terminal of the inductor Ls is connected to the output capacitor Co. Further, the first switched capacitor circuit 310 includes switching transistors Q1-Q4 and a capacitor Cfly1. Switching transistors Q1 and Q2 are connected in series between the first terminal of the inductor Ls and the intermediate node MID, and switching transistors Q3 and Q4 are connected in series between the intermediate node MID and the ground terminal. The first terminal of the input voltage source VIN is connected to the intermediate node MID, and the second terminal of the input voltage source VIN is connected to the ground terminal. For example, the input voltage source VIN may be composed of a single lithium-ion battery, used to generate an input voltage VIN in the range of 2.7V to 4.5V. The first terminal of capacitor Cfly1 is connected to the switching node SW1 between switching transistors Q1 and Q2, and the second terminal of capacitor Cfly1 is connected to the switching node SW2 between switching transistors Q3 and Q4. The first terminal of output capacitor Co is connected to the second terminal of inductor Ls and the output terminal of power converter 200, and the second terminal of output capacitor Co is connected to ground. The output terminal of power converter 200 can be connected to any desired load RL.

[0073] Furthermore, the second capacitor circuit 320 in this embodiment includes switching transistors Q5-Q8 and capacitor Cfly2. Switches Q5 and Q6 are connected in series between the first terminal of inductor Ls and intermediate node MID, and switches Q7 and Q8 are connected in series between intermediate node MID and ground. The first terminal of capacitor Cfly2 is connected to the switching node SW3 between switches Q5 and Q6, and the second terminal of capacitor Cfly2 is connected to the switching node SW4 between switches Q7 and Q8.

[0074] Furthermore, the power converter 300 employs an interleaved control method to operate the first switched capacitor circuit 310 and the second switched capacitor circuit 320. This allows capacitors Cfly1 and Cfly2 to be connected in series with inductor Ls between the input voltage VIN and the output voltage VOUT in each switching cycle. This results in a more continuous input current for the power converter, reducing the impact of the load on the input circuitry. Additionally, the effective value of the input current in this embodiment is reduced, decreasing the resistance of the input circuitry (e.g., wiring impedance) and capacitor ESR losses, further improving circuit efficiency. Furthermore, the power converter 300 of this embodiment is suitable for applications with an input voltage range of 2.5V to 4.5V.

[0075] It should be noted that the power converter 300 in this embodiment includes not only two switched capacitor circuits (e.g., the two switched capacitor circuits in the embodiment of FIG8), but may also include other numbers of switched capacitor circuits, and the present invention does not limit this.

[0076] Furthermore, in this embodiment, switching transistors Q1-Q4 are controlled by control signals G1A-G4A, and switching transistors Q5-Q8 are controlled by control signals G1B-G4B. Since this embodiment uses N-type field-effect transistors to implement switching transistors Q1-Q8, the corresponding switching transistor is turned on when the given control signal is high. However, the present invention is not limited to this, and P-type transistors, N-type and P-type transistors, and / or other types of switches can also be used to implement switching transistors Q1-Q8.

[0077] Furthermore, in this embodiment, the control signals G1A-G4A and G1B-G4B are periodic signals, each including an on-time and an off-time in each switching cycle Tsw. Also, control signals G2A, G4A, and G1B have the same frequency and phase, and control signal G3A is the complementary signal to control signals G2A, G4A, and G1B.

[0078] During the operation of the power converter 300, the control signals G1A-G4A and G1B-G4B change periodically, and the conduction state of the switching transistors Q1-Q8 changes accordingly. Therefore, at different stages of the switching cycle Tsw, the connection relationship between capacitors Cfly1 and Cfly2 and inductor Ls is different, thus changing the charging and discharging state accordingly.

[0079] As shown in Figure 10, during time period T1, control signals G1A, G3A, G2B, and G4B are at high level, and control signals G2A, G4A, G1B, and G3B are at low level. Therefore, switches Q1, Q3, Q6, and Q8 are turned on, while switches Q2, Q4, Q5, and Q7 are turned off. Capacitor Cfly1 and inductor Ls are connected in series between the input voltage VIN and the output voltage VOUT, and capacitor Cfly2 is connected in parallel between the two ends of the input voltage source. The input voltage VIN and capacitor Cfly1 charge inductor Ls, causing the inductor current IL to rise linearly. The input voltage VIN charges capacitor Cfly2, and simultaneously, the voltage at switching node SW1 is equal to twice the input voltage VIN, and the voltage at switching node SW3 is equal to the input voltage VIN.

[0080] As shown in Figure 11, during time period T2, control signals G1A, G2A, G4A, G1B, G2B, and G4B are at high level, while control signals G3A and G3B are at low level. Therefore, switches Q1, Q2, Q4, Q5, Q6, and Q8 are turned on, while switches Q3 and Q7 are turned off. Capacitors Cfly1 and Cfly2 are connected in parallel across the input voltage source, and inductor Ls is connected in series between the input voltage VIN and the output voltage VOUT. The input voltage VIN charges capacitors Cfly1 and Cfly2, while inductor Ls freewheels and discharges. Therefore, the inductor current IL decreases linearly, and simultaneously, the voltages at switching nodes SW1 and SW3 are equal to the input voltage VIN.

[0081] As shown in Figure 12, during time period T3, control signals G2A, G4A, G1B, and G3B are at high level, and control signals G1A, G3A, G2B, and G4B are at low level. Therefore, switches Q2, Q4, Q5, and Q7 are turned on, while switches Q1, Q3, Q6, and Q8 are turned off. Capacitor Cfly2 and inductor Ls are connected in series between the input voltage VIN and the output voltage VOUT, and capacitor Cfly1 is connected in parallel across the input voltage source. The input voltage VIN and capacitor Cfly2 charge inductor Ls, causing the inductor current IL to rise linearly. The input voltage VIN charges capacitor Cfly1, and simultaneously, the voltage at switch node SW1 equals the input voltage VIN, and the voltage at switch node SW3 equals twice the input voltage VIN.

[0082] As shown in Figure 13, during time period T4, control signals G1A, G2A, G4A, G1B, G2B, and G4B are at high level, while control signals G3A and G3B are at low level. Therefore, switches Q1, Q2, Q4, Q5, Q6, and Q8 are turned on, while switches Q3 and Q7 are turned off. Capacitors Cfly1 and Cfly2 are connected in parallel across the input voltage source, and inductor Ls is connected in series between the input voltage VIN and the output voltage VOUT. The input voltage VIN charges capacitors Cfly1 and Cfly2, while inductor Ls freewheels and discharges. Therefore, the inductor current IL decreases linearly, and simultaneously, the voltages at switching nodes SW1 and SW3 are equal to the input voltage VIN.

[0083] In summary, the power converter 300 of this embodiment, by having two switched capacitor circuits operate in parallel and alternately, creates a phase difference between their switching signals. This allows for a more rational allocation of the charging and discharging process of the flying capacitor over the overall time, improving the problem of excessively short charging time for the flying capacitor in a single switched capacitor module under high duty cycles. From a macroscopic perspective, the power converter 300 of this embodiment effectively extends the effective charging time of the flying capacitor. Even under high duty cycles, due to the alternating operation of the two modules, one module always has sufficient time to charge the flying capacitor, allowing it to approach a fully charged state and thus alleviating the charging and discharging imbalance.

[0084] Furthermore, by addressing the issue of charging and discharging imbalance in the flying capacitor, the power converter 300 of this embodiment improves output voltage stability, reduces output ripple, enhances current distribution uniformity, and reduces component stress, resulting in significantly improved circuit stability over a wide input voltage and load range. In addition, the power converter 300 of this embodiment effectively reduces energy loss under high duty cycles, thereby improving energy conversion efficiency.

[0085] Figure 14 shows a schematic circuit diagram of a power converter according to a third embodiment of the present invention. This embodiment provides a 3-phase power converter, which can be implemented as including 3 switched capacitor circuits. Of course, those skilled in the art can set 4-phase or more switched capacitor circuits in the power converter according to specific circumstances, thereby increasing the operating frequency to be suitable for high-power output applications. Specifically, as shown in Figure 14, the power converter 400 of this embodiment includes a first switched capacitor circuit 410, a second switched capacitor circuit 420, a third switched capacitor circuit 430, an inductor Ls, and a capacitor Cout. The first switched capacitor circuit 410, the second switched capacitor circuit 420, the inductor Ls, and the output capacitor Cout of this embodiment are implemented in a manner similar to the power converter 300 in Figure 8.

[0086] Furthermore, the third switched capacitor circuit 430 includes switching transistors Q9-Q12 and capacitor Cfly3. Switching transistors Q9 and Q10 are connected in series between the first terminal of inductor Ls and intermediate node MID, and switching transistors Q11 and Q12 are connected in series between intermediate node MID and ground. The first terminal of capacitor Cfly3 is connected to the switching node SW5 between switching transistors Q9 and Q10, and the second terminal of capacitor Cfly3 is connected to the switching node SW6 between switching transistors Q11 and Q12.

[0087] The power converter 400 operates the first switched capacitor circuit 410, the second switched capacitor circuit 420, and the third switched capacitor circuit 430 using an interleaved control method. Similarly, in this embodiment, switches Q1-Q4 are controlled by control signals G1A-G4A, switches Q5-Q8 are controlled by control signals G1B-G4B, and switches Q9-Q12 are controlled by control signals G1C-G4C. Since this embodiment uses N-type field-effect transistors to implement switches Q1-Q12, the corresponding switch is turned on when the given control signal is high. However, this invention is not limited to this; P-type transistors, N-type and P-type transistors, and / or other types of switches can also be used to implement switches Q1-Q12.

[0088] Figure 15 shows a schematic waveform diagram of the power converter according to the third embodiment of the present invention. As shown in Figure 15, the control signals G1A-G4A, G1B-G4B, and G1C-G4C in this embodiment are periodic signals, each including an on-time and an off-time in each switching cycle Tsw. During the operation of the power converter 400, the control signals G1A-G4A, G1B-G4B, and G1C-G4C change periodically, and the on-state of the switching transistors Q1-Q12 changes accordingly. Therefore, at different stages of the switching cycle Tsw, the connection relationship between capacitors Cfly1, Cfly2, and Cfly3 and inductor Ls is different, thereby changing the charging and discharging state accordingly.

[0089] During time period T1, control signals G1A, G3A, G2B, G4B, G2C, and G4C are at high level, while control signals G2A, G4A, G1B, G3B, G1C, and G3C are at low level. Therefore, switches Q1, Q3, Q6, Q8, Q10, and Q12 are turned on, while switches Q2, Q4, Q5, Q7, Q9, and Q11 are turned off. Capacitor Cfly1 and inductor Ls are connected in series between the input voltage VIN and the output voltage VOUT, while capacitors Cfly2 and Cfly3 are connected in parallel across the input voltage source. The input voltage VIN and capacitor Cfly1 charge inductor Ls, causing the inductor current IL to rise linearly. The input voltage VIN charges capacitors Cfly2 and Cfly3, and simultaneously, the voltage at switching node SW1 is equal to twice the input voltage VIN, while the voltages at switching nodes SW3 and SW5 are equal to the input voltage VIN.

[0090] During time period T2, control signals G1A, G2A, G4A, G1B, G2B, G4B, G1C, G2C, and G4C are at high level, while control signals G3A, G3B, and G3C are at low level. Therefore, switches Q1, Q2, Q4, Q5, Q6, Q8, Q9, Q10, and Q12 are turned on, while switches Q3, Q7, and Q11 are turned off. Capacitors Cfly1-Cfly3 are connected in parallel across the input voltage source, and inductor Ls is connected in series between the input voltage VIN and the output voltage VOUT. The input voltage VIN charges capacitors Cfly1-Cfly3, and inductor Ls freewheels, causing the inductor current IL to decrease linearly. Simultaneously, the voltages at switching nodes SW1, SW3, and SW5 are equal to the input voltage VIN.

[0091] During time period T3, control signals G2A, G4A, G1B, G3B, G2C, and G4C are at high level, while control signals G1A, G3A, G2B, G4B, G1C, and G3C are at low level. Therefore, switches Q2, Q4, Q5, Q7, Q10, and Q12 are turned on, while switches Q1, Q3, Q6, Q8, Q9, and Q11 are turned off. Capacitor Cfly2 and inductor Ls are connected in series between the input voltage VIN and the output voltage VOUT, while capacitors Cfly1 and Cfly3 are connected in parallel across the input voltage source. The input voltage VIN and capacitor Cfly2 charge inductor Ls, causing the inductor current IL to rise linearly. The input voltage VIN charges capacitors Cfly1 and Cfly3, and simultaneously, the voltages at switching nodes SW1 and SW5 are equal to the input voltage VIN, while the voltage at switching node SW3 is equal to twice the input voltage VIN.

[0092] During time period T4, control signals G1A, G2A, G4A, G1B, G2B, G4B, G1C, G2C, and G4C are at high level, while control signals G3A, G3B, and G3C are at low level. Therefore, switches Q1, Q2, Q4, Q5, Q6, Q8, Q9, Q10, and Q12 are turned on, while switches Q3, Q7, and Q11 are turned off. Capacitors Cfly1-Cfly3 are connected in parallel across the input voltage source, and inductor Ls is connected in series between the input voltage VIN and the output voltage VOUT. The input voltage VIN charges capacitors Cfly1-Cfly3, and inductor Ls freewheels, causing the inductor current IL to decrease linearly. Simultaneously, the voltages at switching nodes SW1, SW3, and SW5 are equal to the input voltage VIN.

[0093] During time period T5, control signals G2A, G4A, G2B, G4B, G1C, and G3C are at high level, while control signals G1A, G3A, G1B, G3B, G2C, and G4C are at low level. Therefore, switches Q2, Q4, Q6, Q8, Q9, and Q11 are turned on, while switches Q1, Q3, Q5, Q7, Q10, and Q12 are turned off. Capacitor Cfly3 and inductor Ls are connected in series between the input voltage VIN and the output voltage VOUT. Capacitors Cfly1 and Cfly2 are connected in parallel across the input voltage source. The input voltage VIN and capacitor Cfly3 charge inductor Ls, causing the inductor current IL to rise linearly. The input voltage VIN charges capacitors Cfly1 and Cfly2. Simultaneously, the voltages at switching nodes SW1 and SW3 are equal to the input voltage VIN, and the voltage at switching node SW5 is equal to twice the input voltage VIN.

[0094] During time period T6, control signals G1A, G2A, G4A, G1B, G2B, G4B, G1C, G2C, and G4C are at high level, while control signals G3A, G3B, and G3C are at low level. Therefore, switches Q1, Q2, Q4, Q5, Q6, Q8, Q9, Q10, and Q12 are turned on, while switches Q3, Q7, and Q11 are turned off. Capacitors Cfly1-Cfly3 are connected in parallel across the input voltage source, and inductor Ls is connected in series between the input voltage VIN and the output voltage VOUT. The input voltage VIN charges capacitors Cfly1-Cfly3, and inductor Ls freewheels, causing the inductor current IL to decrease linearly. Simultaneously, the voltages at switching nodes SW1, SW3, and SW5 equal the input voltage VIN.

[0095] Figure 16 shows a comparison of inductor losses between the power converter of this invention and a conventional boost converter using inductors of the same size. The dashed line represents the total inductor loss of a conventional inductor-based switching power supply architecture, while the solid line represents the total inductor loss of the power converter of this application. As shown in Figure 16, when both the power converter of this application and a conventional switching power supply converter use power inductors of the same size, and when the output voltage and output current are the same, the average inductor current and inductor ripple current of the power converter of this application are both smaller than those of the conventional switching power supply converter. Therefore, the total inductor loss of the power converter of this application is significantly smaller than that of the conventional switching power supply converter.

[0096] Figure 17 shows a comparison of inductor losses between the power converter of this invention and a conventional boost converter using inductors of different sizes. The dashed line represents the total inductor loss of a conventional inductor-based switching power supply architecture, while the solid line represents the total inductor loss of the power converter of this application. As shown in Figure 17, when the power converter of this application uses a smaller power inductor than a conventional switching power supply converter (e.g., the power converter of this application uses a 0.1uH inductor, while a conventional switching power supply converter uses a 1uH inductor), under the same input voltage and output capacitance conditions, the output ripple of the power converter of this application is still smaller than that of a conventional switching power supply converter. Furthermore, the average inductor current and inductor ripple current of the power converter of this application are still smaller than those of a conventional switching power supply converter, and its total inductor loss is also significantly smaller than that of a conventional switching power supply converter.

[0097] Figure 18 shows a comparison of the switching losses of the power converter according to an embodiment of the present invention and a conventional boost converter. The dashed line represents the switching losses of a conventional inductor-based switching power supply architecture, while the solid line represents the switching losses of the power converter of this application. As shown in Figure 18, under the same conditions of input voltage, output voltage, and output current, the switching losses of the power converter of this application are less than those of a conventional switching power supply converter.

[0098] Figure 19 shows a schematic structural diagram of a power conversion circuit according to a third embodiment of the present invention. As shown in Figure 19, the power conversion circuit 500 of this embodiment includes a power converter 501 and a control circuit 502. The power converter 501 can be implemented using the power converters 200-400 described in the previous embodiments. The control circuit 502 is used to adjust the duty cycle of multiple switching transistors in the power converter 501 through closed-loop control, thereby obtaining the desired output voltage VOUT. Furthermore, the control circuit 502 of this embodiment has multiple control modes, including but not limited to a voltage control mode with a fixed frequency or a non-fixed frequency, a current control mode, a constant on-time control mode, and a constant off-time control mode.

[0099] In one exemplary embodiment, the control circuit 502 includes an error amplifier 521, a PWM comparator 522, and a logic control module 523. The error amplifier 521 compares the output voltage VOUT or its feedback signal with a reference signal VREF, and generates an error amplification signal EA based on the comparison result. The PWM comparator 522 compares the error amplification signal EA with a ripple signal Ripple, and generates a pulse width modulation signal PWM based on the comparison result. The logic control module 523 generates control signals based on the PWM signal to be applied to multiple switching transistors in the power converter 501, thereby adjusting the duty cycle of the multiple switching transistors in each switching cycle and thus regulating the output voltage VOUT.

[0100] It should be noted that the ripple signal generation methods in this embodiment include, but are not limited to, inductor current sampling, switching node ripple injection, or external signal superposition, etc., and the present invention does not limit these methods.

[0101] In summary, the power converter of this invention uses inductors and capacitors as energy storage elements. Compared with traditional power converters that use inductors, the volt-second product applied to the inductor when the switching element is turned on or off within a switching cycle is significantly reduced. Even with small-sized inductors, high conversion efficiency can be achieved. Therefore, this hybrid power converter can reduce the size of the inductor to achieve miniaturization.

[0102] Furthermore, compared to traditional switched-capacitor converters, the power converter of the present invention adds an inductor to the charging and discharging path of the capacitor for current limiting, which can reduce the loss during capacitor charge distribution and further improve the power density of the hybrid power converter.

[0103] Furthermore, the power converter in this embodiment operates the two switched capacitor circuits and two flying capacitors in parallel and alternately, resulting in a phase difference between their switching signals. This allows for a more rational allocation of the charging and discharging processes of the flying capacitors over the overall time, improving the problem of excessively short charging time for flying capacitors in a single switched capacitor module under high duty cycles. This improves output voltage stability, reduces output ripple, enhances current distribution uniformity, and reduces component stress, significantly improving circuit stability over a wide input voltage and load range. In addition, the power converter in this embodiment effectively reduces energy loss under high duty cycles, improving energy conversion efficiency.

[0104] It should be noted that relational terms such as "first" and "second" used herein are merely used to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0105] As described above, these embodiments of the present invention do not exhaustively cover all details, nor do they limit the invention to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The scope of protection of this invention should be determined by the scope defined in the claims of this invention.

Claims

1. A power converter for generating an output voltage within a preset voltage range based on an input voltage, comprising: Inductor; as well as At least one switched capacitor circuit, Each switched capacitor circuit includes a first to a fourth switching transistor and a capacitor. The first to fourth switching transistors are connected in series between the first end of the inductor and the ground end. The middle node of the second and third switching transistors is connected to the input voltage. The first end of the capacitor is connected to the first switching node between the first and second switching transistors. The second end of the capacitor is connected to the second switching node between the third and fourth switching transistors.

2. The power converter according to claim 1, wherein, The preset voltage range is between one and two times the input voltage.

3. The power converter according to claim 1, wherein, The power converter includes a switched capacitor circuit, and each switching cycle of the power converter includes a first operating phase and a second operating phase. During the first operation phase, the capacitor and the inductor are connected in series between the input voltage and the output voltage. In the second operation phase, the capacitor is connected in parallel between the two ends of the input voltage, and the inductor is connected between the input voltage and the output voltage.

4. The power converter according to claim 1, wherein, The power converter includes multiple switched capacitor circuits, and the multiple switched capacitor circuits are connected in parallel between the first terminal of the inductor and ground.

5. The power converter according to claim 4, wherein, In each switching cycle, the multiple switched capacitor circuits operate in an interleaved control manner, thereby connecting multiple capacitors in series with the inductor between the input voltage and the output voltage.

6. The power converter according to claim 5, wherein, The power converter includes multiple sub-cycles in each switching cycle, and each sub-cycle includes a first operation phase and a second operation phase. In the first operation phase, one of the plurality of capacitors is connected in series with the inductor between the input voltage and the output voltage, and the remaining capacitors are connected in parallel between the two ends of the input voltage. In the second operation phase, the plurality of capacitors are connected in parallel between the input voltages, and the inductor is connected between the input voltage and the output voltage.

7. The power converter according to claim 1, wherein, The power converter can operate in continuous conduction mode or intermittent conduction mode.

8. The power converter according to claim 1, wherein, The third switch in the at least one switched capacitor circuit has a dead time with respect to the second and fourth switches, and the second and fourth switches are turned on or off in an out-of-order manner.

9. A power conversion circuit, comprising: The power converter according to any one of claims 1-8; as well as The control circuit is used to adjust the duty cycle of multiple switching transistors in the power converter through closed-loop control to obtain the desired output voltage.

10. The power conversion circuit according to claim 9, wherein, The control modes of the control circuit include: fixed frequency or non-fixed frequency voltage control mode, current control mode, constant on-time control mode, and constant off-time control mode.

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