Method for producing a composite substrate comprising an iii-v material layer on a receiver substrate

WO2026201953A1PCT designated stage Publication Date: 2026-10-01SOITEC SA
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Patent Information

Application Number
PCT/EP2026/058225
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-03-28
Filing Date
2026-03-23
Publication Date
2026-10-01

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Abstract

The invention relates to a method for producing a composite substrate comprising an III-V material layer on a receiver substrate, the method comprising: (a) providing a donor substrate (1) comprising the III-V material (1) and a surface oxide layer (2) of the III-V material covering the surface of the III-V material, the surface layer (2) being a native oxide layer or a passivation layer; (b) etching the surface layer (2) by atomic layer etching (ALE) so as to expose the surface of the III-V material; (c) depositing an intermediate dielectric layer (3) on the exposed surface of the III-V material by atomic layer deposition (ALD); (d) forming a weakened zone (4) in the donor substrate by atomic species implantation so as to delimit a III-V material layer (5) to be transferred; (e) directly bonding the III-V material layer (5) to the receiver substrate (6) via the intermediate layer (3); (f) detaching the III-V material layer (5) along the weakened zone (4) so as to transfer the layer onto the receiver substrate (6).
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Description

[0001] DESCRIPTION

[0002] TITLE: Process for manufacturing a composite substrate comprising a layer of III-V material on a receiving substrate

[0003] TECHNICAL FIELD:

[0004] The invention relates to a method for manufacturing a composite material comprising a layer of a III-V material, an intermediate layer and a receiving substrate whose interfaces are precisely controlled to allow optimal bonding to the receiving substrate.

[0005] STATE OF THE ART

[0006] Semiconductor substrates used in microelectronics, particularly III-V materials, are generally coated with a layer of native oxide formed in an uncontrolled, open-air environment. In addition, III-V substrates may also include a thin passivation layer intentionally formed from ammonium sulfide ((NH4)2S) or sulfuric acid (H2SO4), for example. This passivation layer is a native oxide layer whose growth has been slowed by the presence of sulfur, and whose thickness is therefore more precisely controlled.

[0007] The presence of this native oxide layer, or this passivation layer, results, following heat treatment, in reduced adhesion between a III-V material substrate and a layer intended to be bonded or deposited onto the substrate. Indeed, the native oxides of III-V materials are inherently unstable above 400°C.

[0008] In the microelectronics industry, surface finish is typically normalized by pre-cleaning followed by the deposition of a dielectric layer that acts as an adhesive layer. Pre-cleaning can be performed chemically using, for example, a high-frequency hydrofluoric acid solution, or by a low-reactivity plasma, which allows for surface stripping and removal of the native oxide or passivation layer.

[0009] However, in the case of indium phosphide (InP), such a plasma produces indium beads of varying sizes and densities on the substrate surface, which significantly impacts the substrate's roughness and prevents, or at least impairs, direct bonding of the InP or bonding via an intermediate layer without a planarization step. Furthermore, this roughness degrades the crystalline quality of the material.

[0010] Direct bonding does not require an adhesive and is achieved through molecular adhesion. Bonds are established at the atomic scale between the surfaces being joined. Several types of molecular adhesion bonding exist, differing primarily in their temperature, pressure, atmospheric conditions, and pretreatment processes before the surfaces are brought into contact. Examples include room-temperature bonding with or without prior plasma activation of the surfaces to be joined, atomic diffusion bonding (ADB), surface-activated bonding (SAB), and others. These bonding techniques require a surface roughness of less than 0.5 nm RMS (1 x 1 pm). 2 ) to be implemented.

[0011] When chemical cleaning is used, the rapid oxidation of InP leads to the formation of a native oxide layer on the InP surface in open air, between the cleaning step and the deposition or bonding of a layer of interest. This uncontrolled native oxide formation limits, or even negates, the effects of pre-cleaning.

[0012] Thus, there remains a need to develop a manufacturing process for a composite substrate comprising a layer of a III-V material on a receiving substrate, the state of which is improved at the interface and where the native oxide is removed in order to allow direct bonding or deposition on the receiving substrate of better quality.

[0013] SUMMARY OF THE INVENTION

[0014] An object of the invention is therefore to design a method for manufacturing a composite substrate comprising a layer of a III-V material on a receiving substrate, in which the interface between the layer of III-V material and the receiving substrate is precisely controlled to allow optimal adhesion between said layer and the receiving substrate.

[0015] To this end, the invention proposes a method for manufacturing a composite substrate, comprising a layer of III-V material on a receiving substrate, comprising:

[0016] (a) the supply of a donor substrate comprising said III-V material and a surface layer of oxide of the III-V material covering the surface of the III-V material;

[0017] (b) etching of the surface layer by atomic layer etching so as to expose the surface of the III-V material;

[0018] (c) the deposition of an intermediate dielectric layer on the exposed surface of the III-V material by atomic thin film (ALD) deposition;

[0019] (d) the formation of a weakening zone in the donor substrate by implantation of atomic species so as to delimit a layer of III-V material to be transferred;

[0020] (e) direct bonding of the III-V material layer to the receiving substrate via the intermediate layer;

[0021] (f) the detachment of the III-V material layer along the embrittlement zone, so as to transfer said layer onto the receiving substrate.

[0022] The combination of ALE (Atomic Layer Etching) and ALD (Atomic Layer Deposition) processes allows for excellent interface control. Specifically, the interface between the intermediate layer and the III-V material layer exhibits improved adhesion due to the removal of native oxide, while the interface between the intermediate layer and the receiving substrate is of high quality due to the low roughness of the intermediate layer deposited by ALD. In an advantageous embodiment, performing these processes within a single chamber under a controlled atmosphere prevents the formation of a new native oxide layer on the III-V material substrate after the etching step.

[0023] According to other advantageous but optional features of the invention, possibly taken in combination:

[0024] - the III-V material is indium phosphide (InP);

[0025] - said surface layer is a native oxide layer or a passivation layer;

[0026] - the intermediate layer comprises a dielectric material, in particular silicon oxide (SiCh) or silicon nitride (SiN), amorphous silicon or aluminium oxide (Al2O3);

[0027] - the intermediate layer has a thickness between 3 and 30 nm, preferably between 7 and 12 nm;

[0028] - the intermediate layer has a roughness of less than 5 Â (0.5 nm) RMS;

[0029] - step (c) is carried out without re-exposing the donor substrate to air after step (b), in particular steps (b) and (c) are carried out in the same frame under an oxygen-free atmosphere;

[0030] - atomic layer etching is carried out at a temperature between 200 and 300°C, preferably between 230 and 270°C, and even more preferably at 250°C;

[0031] - Atomic layer etching is performed using a neon (Ne) ion beam and a chlorinated gas.

[0032] Another object of the invention relates to a composite substrate obtained by the process described above. Said substrate comprises a layer of a III-V material on a receiving substrate and an intermediate dielectric layer formed by ALD at the interface between the receiving substrate and the III-V material layer.

[0033] BRIEF DESCRIPTION OF THE FIGURES

[0034] Other features and advantages of the invention will become apparent from the detailed description that follows, with reference to the attached drawings, in which:

[0035] Figure 1 illustrates a substrate of a III-V material covered with a layer of native oxide;

[0036] Figure 2 represents the III-V material substrate after removal of the native oxide layer by ALE;

[0037] Figure 3 illustrates the III-V material substrate covered with an intermediate layer deposited by ALD;

[0038] Figure 4 represents the formation of a weakened zone in the III-V material substrate, delimiting a layer to be transferred; Figures 5A and 5B illustrate, respectively, the placement and bonding of the III-V material substrate onto a receiving substrate via the intermediate layer; and

[0039] Figure 6 represents the detachment of the III-V material substrate at the level of the embrittlement zone to transfer the III-V material layer onto the receiving substrate.

[0040] For readability reasons, the diagrams are not necessarily to scale.

[0041] DETAILED DESCRIPTION OF THE INVENTION

[0042] The invention relates to a method for manufacturing a composite material comprising a substrate of a III-V material on a receiving substrate, in which the interfaces are precisely controlled to improve adhesion, in particular for a direct bonding step on the receiving substrate.

[0043] Indeed, the inventors have developed a process that replaces a pre-cleaning step, used classically in the microelectronics industry, with a sequence of etching the surface oxide layer of the III-V substrate and deposition of an intermediate layer.

[0044] On the one hand, the etching is carried out by ALE. This etching technique allows very good control of the chemical nature of the interfaces and the thicknesses etched, with operating conditions known to those skilled in the art.

[0045] An ALE module includes a chamber in which the etching takes place, a support for the treated substrate, an inlet for etching gas and / or for purging the system, an inlet for an ion beam, an outlet for removing the etching products, a pump to control the atmosphere within the chamber, and a temperature control system.

[0046] After etching the native oxide, or any passivation layer, of the substrate of a III-V material, an intermediate layer can then be deposited without exposing the substrate to air. This prevents the formation of a new, unstable native oxide layer.

[0047] This deposition is carried out by ALD in order to control the thickness, uniformity and roughness of the deposited layer.

[0048] ALD is a process for depositing atomic thin films. The principle involves successively exposing a surface to different chemical precursors in gaseous form. The precursors react with the surface progressively to form an ultrathin layer. The maximum amount of material deposited on the surface after a single exposure to all the precursors, which corresponds to one ALD cycle, is determined by the nature of the precursor-surface interaction. By varying the number of cycles, it is possible to grow materials uniformly and with high precision on complex and large substrates.

[0049] An ALD module includes a chamber in which the deposition takes place, a support for the treated substrate, a gas inlet for the different precursors, a gas inlet for purging the system, an outlet for removing residual precursors, a pump to control the atmosphere within the chamber, and a temperature control system.

[0050] Similar to ALE, ALD preserves the roughness of the original substrate, making it compatible with direct bonding.

[0051] This sequence allows for control of the chemical bonds at the interface between the III-V material and the deposited intermediate layer, thus ensuring effective adhesion. Indeed, this sequence advantageously guarantees optimal adhesion between the layers, suitable for withstanding the mechanical, thermomechanical, and chemical stresses that may occur during subsequent manufacturing processes. These stresses may include chemical polishing, as well as various heat treatments that the heterostructure may undergo.For example, in the context of a layer transfer process, a SmartCut™ type process (described below), chemical mechanical polishing (CMP) steps and / or various heat treatments can be applied to this type of heterostructure, in other words the substrate comprising a layer of III-V material surmounted by a layer deposited on top.

[0052] To promote adhesion between a III-V material substrate and deposited thin films, it is desirable to group the ALE and ALD modules within the same frame. Advantageously, this frame is located in an oxygen-free atmosphere. This allows the substrate to be transferred from one module to the other without re-exposure to air. In this way, interface control is ensured throughout the entire process.

[0053] Figures 1 to 6 schematically illustrate one embodiment of the process of the present invention.

[0054] This process includes a step of supplying a donor substrate 1 comprising a III-V material and a layer 2 of native oxide covering the surface of the III-V material, as illustrated by Figure 1.

[0055] According to one embodiment, the III-V material of said substrate is indium phosphide (InP). Generally, the native oxide layer for InP has a thickness of 16 to 20 Å (1.6 to 2 nm).

[0056] When supplied, substrate 1 has a surface roughness of the order of 2 to 3 Â (0.2 to 0.3 nm) RMS.

[0057] The surface of the donor substrate is then treated to remove the native oxide layer by atomic layer etching (ALE) to expose the surface of substrate 1 (Fig. 2). This involves removing the native oxide and some atomic layers of the III-V material using a four-step cycle repeated as many times as necessary.

[0058] The substrate is placed in the ALE module. In the first step, substrate 1 is brought into contact with an etching gas, which adsorbs onto its surface and reacts with it. For example, the gas can be a chlorinated gas, particularly chlorine gas. The etching gas is often dissociated by plasma to increase the adsorption rate. In the second step, the residual etching gas is purged. In the third step, the surface of substrate 1 is bombarded with low-energy inert ions to remove the reacted surface layer. For example, the ions are neon ions. In the fourth step, the etching products are purged from the chamber. The first and third steps can be self-limiting depending on the operating conditions (gas selection, ion energy, etc.).

[0059] Typically, atomic layer etching is carried out at a temperature between 200 and 300°C, preferably between 230 and 270°C, and even more preferably at 250°C.

[0060] A Tissue of the engraving, the exposed surface of the substrate 1 has a roughness of less than 5 Å (0.5 nm) RMS, and preferably less than 3 Å (0.3 nm) RMS.

[0061] Figure 3 illustrates the deposition of an intermediate layer 3 on the exposed surface of the substrate 1 by atomic thin film (ALD) deposition. For this purpose, the substrate is transferred from the ALE module to the ALD module. Preferably, the transfer from the ALE module to the ALD module is carried out without exposure to open air to avoid the formation of a new native oxide layer on the substrate. For example, the ALE and ALD modules are arranged within the same frame under an oxygen-free atmosphere.

[0062] In the ALD module, the substrate is successively brought into contact with precursor gases of the elements of the intermediate layer, said gases never being present simultaneously in the module.

[0063] The intermediate layer 3 comprises a dielectric material, including silicon dioxide (SiCl) or silicon nitride (SiN), amorphous silicon or aluminium oxide (Al2O3).

[0064] Thus, the deposited intermediate layer 3 has a roughness of less than 5 Å (0.5 nm) RMS, preferably a roughness of 3 Å (0.3 nm) RMS. Advantageously, the thickness of the intermediate layer is between 3 and 30 nm, preferably between 7 and 12 nm.

[0065] When the intermediate layer contains SiCl₂, it can be deposited by ALD using the following process. By alternately exposing the substrate to tetraethoxysilane (TEOS) and an amine catalyst, a SiCl₂ layer forms on its surface. The reaction between the precursors takes place at room temperature. For further details, this process is described by J.D. Ferguson et al., 2004, J. Electrochem. Soc. 151 G528.

[0066] When the intermediate layer contains SiN, it can be deposited by ALD using a process called PEALD (plasma-enhanced ALD). The precursors used are SiEEN and NH3. The reaction of the precursors on the substrate surface takes place at temperatures ranging from 150 to 300°C. For more details, this process is described by Meng, Xin, et al. "Atomic layer deposition of silicon nitride thin films: a review of recent progress, challenges, and outlooks." Materials 9.12 (2016): 1007.

[0067] The substrate covered by the intermediate layer can then be extracted from the ALD module.

[0068] A weakening zone is then formed in said substrate 1 by implanting atomic species through the intermediate layer so as to delimit a layer of III-V material 5 to be transferred (Fig. 4). As schematically indicated by the arrows, the weakening zone 4 is advantageously formed by implanting atomic species, such as hydrogen and / or helium, at a depth corresponding to the thickness of the layer to be transferred.

[0069] The assembly consisting of the substrate 1 and the intermediate layer 3 is then placed and bonded directly onto a receiving substrate 6, as illustrated in Figures 5A and 5B. The receiving substrate 6 may be bare or coated, on its surface configured for bonding, with an adhesive layer. This adhesive layer may be made, for example, of at least one of the following materials: silicon dioxide (SiCl), silicon nitride (SiN), aluminum nitride (Ni), alumina (Al₂O₃), metal, etc.

[0070] Finally, the remaining substrate 1 is separated by detaching the layer of material III-V 5 to be transferred along the embrittlement zone 4, as illustrated by Figure 6. This separation can be initiated by thermal, mechanical and / or chemical action fracture.

[0071] In this way, we obtain a composite substrate with a controlled interface between the III-V material and the intermediate layer due to the suppression of the native oxide and a good quality interface between the intermediate layer and the receiving substrate due to the low roughness of the deposited intermediate layer.

[0072] The process just described applies similarly when the surface layer is a passivation layer obtained by attacking the surface with ammonium sulfide ((NHfkS) or sulfuric acid (H2SO4).

[0073] REFERENCES

[0074] J. D. Ferguson et al. « ALD of SiO2 at Room Temperature Using TEO S and H2O with NH3 as the Catalyst » 2004 J. Electrochem. Soc. 151 G528

[0075] Meng, Xin, et al. "Atomic layer deposition of silicon nitride thin films: a review of recent progress, challenges, and outlooks." Materials 9.12 (2016): 1007

Claims

DEMANDS 1. A method for manufacturing a composite substrate, comprising a layer of III-V material on a receiving substrate, comprising: (a) the provision of a donor substrate (1) comprising said III-V material and a surface layer (2) of oxide of the III-V material covering the surface of the III-V material; (b) the etching of the surface layer (2) by atomic layer etching (ALE) so as to expose the surface of the III-V material; (c) the deposition of an intermediate dielectric layer (3) on the exposed surface of the III-V material by atomic thin film (ALD) deposition; (d) the formation of a weakening zone (4) in the donor substrate by implantation of atomic species so as to delimit a layer of III-V material (5) to be transferred; (e) the direct bonding of the layer of III-V material (5) onto the receiving substrate (6) via the intermediate layer (3); (f) the detachment of the III-V material layer (5) along the embrittlement zone (4), so as to transfer said layer (5) onto the receiving substrate (6).

2. A method according to claim 1, wherein said surface layer (2) is a native oxide layer or a passivation layer.

3. A process according to claims 1 or 2, wherein the III-V material is indium phosphide (InP).

4. Method according to claims 1 to 3, wherein the intermediate layer (3) comprises silicon oxide (SiCh), silicon nitride (SiN), amorphous silicon or aluminium oxide (Al2O3).

5. A method according to any one of claims 1 to 4, wherein step (c) is carried out without re-exposing the donor substrate to air after step (b).

6. A method according to claim 5, wherein steps (b) and (c) are carried out in the same frame under an oxygen-free atmosphere.

7. A method according to any one of claims 1 to 6, wherein the atomic layer etching is carried out at a temperature between 200 and 300°C, preferably between 230 and 270°C, and even more preferably at 250°C.

8. A method according to any one of claims 1 to 7, wherein the atomic layer etching is carried out using a neon (Ne) ion beam and a chlorinated gas.

9. A method according to any one of claims 1 to 8, wherein the intermediate layer (3) has a thickness of between 3 and 30 nm, preferably between 7 and 12 nm.

10. A method according to any one of claims 1 to 9, wherein the intermediate layer (3) has a roughness of less than 5 Å (0.5 nm) RMS.