Electronic device, method and computer program

Abstract

An electronic device that comprises circuitry configured to determine, based on calibration parameters, a target current, and generate, based on the target current and a current signal indicating an electrical current of an emitter circuit, a control signal to control an operation of the emitter circuit.

Description

[0001] ELECTRONIC DEVICE, METHOD AND COMPUTER PROGRAM

[0002] TECHNICAL FIELD

[0003] The present disclosure generally pertains to an electronic device, method and computer program in the field of Time-of-Flight technology.

[0004] TECHNICAL BACKGROUND

[0005] Time-of-Flight (ToF) technology is an effective method for precise distance measurement, widely utilized in applications requiring accurate depth sensing and spatial mapping. This technique operates by emitting light pulses toward a target and measuring the time it takes for the reflected light to return to a sensor, enabling real-time distance calculations. A key component of ToF systems is the illumination source, often implemented using Vertical-Cavity Surface-Emitting Laser (VCSEL) arrays, which generate controlled light emissions for optimal performance.

[0006] The accuracy and reliability of ToF measurements are dependent on the efficiency, stability, and modulation of these illumination devices. Any variations in the emitted light pulses or inconsistencies in signal detection can introduce measurement errors, reducing the system's effectiveness.

[0007] ToF technology has gained widespread adoption across numerous industries, including augmented reality, automotive safety, and biometric authentication, where precise depth perception and object recognition are crucial. As the demand for advanced ToF-based systems continues to grow, improvements in illumination control and signal processing are necessary to enhance measurement accuracy, energy efficiency, and overall system performance.

[0008] SUMMARY

[0009] According to a first aspect the disclosure provides an electronic device according to independent claim 1. According to a second aspect, the disclosure provides a method according to independent claim 34.

[0010] Further aspects are set forth in the dependent claims, the drawings and the following description.

[0011] BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Embodiments are explained by way of example with respect to the accompanying drawings, in which:Fig. 1 symbolically illustrates a Time-of-Flight apparatus configured to operate according to the present disclosure;

[0013] Fig. 2 illustrates an example circuit diagram of a VCSEL driving circuit configured to control the operation of a VCSEL array;

[0014] Fig. 3 A illustrates a symbolic example of a structured illumination pattern as observed by the Time-of-Flight apparatus;

[0015] Fig. 3B illustrates a structured illumination pattern with individual illumination spots projected onto a scene as observed by the Time-of-Flight apparatus;

[0016] Fig. 4A is an illustrative graph that demonstrates the relationship between the number of illuminated dots and the driving current (LD current) available to each laser emitter;

[0017] Fig. 4B is an illustrative graph that demonstrates the nonlinearity between the requested driving current and the effective driving current resulting in a VCSEL due to the effect described in Fig.

[0018] 4A;

[0019] Fig. 5 illustrates a flow diagram for controlling a Time-of-Flight (ToF) system with a flexible Region of Interest (Rol) and current management mechanism;

[0020] Fig. 6 illustrates an embodiment of an emitter circuitry of the emitter;

[0021] Fig. 7 illustrates an alternative embodiment of the emitter circuitry with a plurality of detection sections;

[0022] Fig. 8 shows an embodiment of the signal conditioning section of the emitter circuitry;

[0023] Fig. 9 illustrates an exemplary implementation of the emitter circuitry as an integrated circuit; Fig. 10 provides an exemplifying process for the generation of a current control based on calibration parameters obtained through a calibration process, configuration parameters defined by the momentary operating conditions of the emitter array, and a current signal as obtained from the detection section that monitors the current flowing through a VCSEL;

[0024] Fig. 11 illustrates an embodiment where the overcurrent threshold for the emitter circuitry is dynamically adjusted based on calibration parameters, configuration parameters, and real-time current signals;

[0025] Fig. 12A is an explanatory diagram illustrating the dependence of the target current on the product of the number of illuminated dots and the duty ratio without calibration;Fig. 12B is an explanatory diagram of the dependence of the target current on the product of the number of illuminated dots and the duty ratio after calibration;

[0026] Fig. 13 illustrates a flowchart for a method of obtaining the calibration parameters to be used in the correction process;

[0027] Fig. 14 illustrates a flow diagram depicting a feedback-loop process for generating and adjusting the current control code;

[0028] Fig. 15 illustrates a flowchart of the process performed by the emitter circuitry; and

[0029] Fig. 16 illustrates an electronic device that incorporates the Time-of-Flight system described in the present disclosure.

[0030] DETAILED DESCRIPTION OF EMBODIMENTS

[0031] Before a detailed description of the embodiments under reference of Fig. 1 is given, general explanations are made.

[0032] An electronic device comprises circuitry configured to determine, based on calibration parameters, a target current, and generate, based on the target current and a current signal indicating an electrical current of an emitter circuit, a control signal to control an operation of the emitter circuit.

[0033] The calibration parameters may refer to predefined values and coefficients obtained through a systematic calibration process, which are used to ensure the accuracy and consistency of the system's measurements and operations. For example, the calibration parameters include an error slope value and an offset value that define a mapping function to map configuration parameters to a target current. The target current may indicate a desired electrical current or a current threshold for the emitter circuit, derived from the calibration parameters. For instance, the target current is calculated using the error slope and offset values. The current signal may be an electronic signal that represents the actual electrical current flowing through the emitter circuit. For example, the current signal is obtained from a detection section that monitors the current of the emitter circuit. The emitter circuit may be a part of the electronic device responsible for emitting light, such as a VCSEL array. In the description, the emitter circuit includes multiple VCSELs arranged in an array.

[0034] In some embodiments, the electronic device is configured to further determine the target current based on configuration parameters.The configuration parameters may refer to parameters that relate to the configuration of the system during operation. These parameters can be dynamically adjusted based on real-time conditions and requirements, allowing the system to adapt to varying scenarios and optimize performance accordingly. For example, the configuration parameters include the number of illuminated dots and the duty ratio of the emitter circuit.

[0035] In some embodiments, the calibration parameters define a lookup table configured to map the configuration parameters to the target current.

[0036] The lookup table may be a data structure used to map input values (configuration parameters) to output values (target currents) based on predefined calibration parameters. This table allows for quick retrieval of target currents corresponding to specific configuration parameters. For instance, the lookup table maps the number of illuminated dots and duty ratio to the corresponding target current.

[0037] In some embodiments, the calibration parameters include an error slope value and an offset value, wherein the error slope and offset define a mapping function that maps the configuration parameters to the target current.

[0038] The error slope value may refer to a coefficient that represents the rate of change in the target current relative to changes in the configuration parameters. For example, the error slope is calculated based on the difference between the reference slope and the actual measured slope. The offset value may be a constant added to the target current to correct for systematic deviations. For instance, the offset value is determined by the difference between the reference value and the measured value at a specific configuration point. The mapping function may be a mathematical function that uses the error slope and offset to translate configuration parameters into a target current.

[0039] In some embodiments, the configuration parameters comprise a number of illuminated dots and a duty ratio.

[0040] The number of illuminated dots may refer to the specific number of light-emitting elements (such as VCSELs) that are active and emitting light in a given configuration. For example, the number of illuminated dots is determined by the host device based on the region of interest. The duty ratio may be the proportion of time that the emitter circuit is actively emitting light within a given period, typically expressed as a percentage. For instance, the duty ratio is used to calculate the emitter configuration by multiplying it with the number of illuminated dots.In some embodiments, the circuitry is configured to obtain the target current based on an emitter configuration, wherein the emitter configuration is obtained by multiplying the number of illuminated dots by the duty ratio.

[0041] The emitter configuration represents a specific operational state of the emitter circuit, defined by the number of illuminated dots and the duty ratio. This configuration can be measured by multiplying the number of illuminated dots by the duty ratio. For instance, the emitter configuration is determined by combining these two factors.

[0042] In some embodiments, the mapping function is described as follows: The target current is calculated by multiplying the error slope by the ratio of the current emitter configuration to a preset configuration value, and then adding an offset value.

[0043] The target current may be obtained using this mapping function. For example, the target current is derived by applying the error slope and the offset to the emitter configuration. The emitter configuration parameter represents the current operational state of the emitter circuit, which is the result of multiplying the number of illuminated dots by the duty ratio.

[0044] The preset configuration value is a reference parameter used in the mapping function to standardize the emitter configuration. This reference value helps in normalizing the emitter configuration. The offset value is added to the product of the error slope and the normalized emitter configuration to arrive at the final target current.

[0045] In some embodiments, the target current indicates a desired electrical current of the emitter circuit.

[0046] The desired electrical current may refer to the target current that the emitter circuit should achieve to operate optimally, as indicated by the target current. For example, the target current represents the desired electrical current for the VCSEL array.

[0047] In some embodiments, the target current indicates a desired current threshold for the emitter circuit.

[0048] The desired current threshold may be a specific current level that the emitter circuit should not exceed, as indicated by the target current, to ensure safe and reliable operation. For instance, the target current can be used to set the overcurrent threshold for the emitter circuit.

[0049] In some embodiments, the circuitry is configured to determine a current control code for controlling the electrical current of an emitter circuit based on the target current and the current signal.The current control code may be a digital or analog signal generated by the circuitry to adjust the electrical current of the emitter circuit based on the target current and the current signal. For example, the current control code is generated by mapping the target current and the current signal to a correction value.

[0050] In some embodiments, the circuitry is configured to determine a threshold control code for controlling the current of the emitter circuit based on the target current and the current signal. The threshold control code may be a specific control signal used to set the current threshold for the emitter circuit, ensuring it operates within safe limits. For instance, the threshold control code TI is generated to set the overcurrent threshold based on the target current and allowable safety margin that is specified from the system requirement.

[0051] In some embodiments, the circuitry is configured to receive the current signal as a digital signal. The digital signal may refer to a binary representation of the current signal, which can be processed by digital circuitry for precise control and measurement. For example, the current signal SI is converted to a digital signal by an analog-to-digital converter (ADC).

[0052] In some embodiments the circuitry is further configured to generate a control signal based on a target current and a current signal, wherein the process for generating the control signal involves either iterative adjustment or direct calculation to ensure the driving current of the emitter circuit aligns with the desired target current.

[0053] In some embodiments, the configuration parameters are sourced externally from a host device associated with the emitter circuit that controls the operation of the emitter circuit.

[0054] The host device may be an external device that provides configuration parameters to the electronic device, enabling it to control the operation of the emitter circuit based on external inputs. For example, the host device provides the number of illuminated dots and the duty ratio to the emitter circuit.

[0055] In some embodiments, the configuration parameters relate to an illumination recipe used by the host device to optimize the performance of the Time-of-Flight (ToF) system.

[0056] The illumination recipe may be a predefined set of configuration parameters designed to optimize the performance of the ToF system, considering factors such as the number of illuminated dots and the duty ratio. For example, the illumination recipe specifies the number of illuminated dots and the duty ratio for different regions of interest.In some embodiments, the configuration parameters comprise a number of illuminated dots. The number of illuminated dots may refer to the specific count of light-emitting elements that are active in the emitter circuit. For example, the number of illuminated dots is determined based on the region of interest specified by the host device.

[0057] In some embodiments, the number of illuminated dots is a number of illuminated dots in a region of interest.

[0058] The region of interest (Rol) may be a specific area within the scene that the ToF system focuses on for detailed measurement and analysis, illuminated by a certain number of dots. For example, the number of illuminated dots in the Rol is determined based on the specific area that needs to be measured.

[0059] In some embodiments, the number of illuminated dots is a number of dots illuminated by an emitter array comprising the emitter circuit.

[0060] The emitter array may be a collection of multiple light-emitting elements, such as VCSELs, that collectively form the emitter circuit. For example, the number of illuminated dots is the count of active VCSELs in the emitter array.

[0061] In some embodiments, the configuration parameters comprise a duty ratio of the emitter circuit. The duty ratio may be the proportion of time that the emitter circuit is actively emitting light within a given period, typically expressed as a percentage. For example, the duty ratio is used to calculate the emitter configuration by multiplying it with the number of illuminated dots.

[0062] In some embodiments, the circuitry is further configured to generate a protection flag when the electrical current of the emitter circuit exceeds an overcurrent threshold.

[0063] The protection flag may be an electronic signal or indicator used to denote a specific condition or status, such as the driving current exceeding the overcurrent threshold. For example, the protection flag is generated when the current signal indicates that the driving current exceeds the preset overcurrent threshold.

[0064] In some embodiments, the circuitry is configured to obtain the current signal from a detection section that monitors the current of the emitter circuit.

[0065] The detection section may be a part of the circuitry responsible for monitoring the current flowing through the emitter circuit and generating the current signal. For example, the detection section includes a current sensor that measures the driving current of the VCSEL array.In some embodiments, the current signal indicates a driving current of a light emission element of the emitter circuit.

[0066] The driving current may be the electrical current supplied to a light emission element, such as a VCSEL, to enable it to emit light. For example, the current signal indicates the driving current of the VCSEL in the emitter circuit.

[0067] In some embodiments, the light emission element is a Vertical-Cavity Surface-Emitting Laser (VCSEL).

[0068] The Vertical-Cavity Surface-Emitting Laser (VCSEL) may be a type of semiconductor laser that emits light perpendicular to its surface, known for its efficiency and high-speed operation. For example, the VCSEL is used in the emitter circuit to emit light for Time-of-Flight measurements. In some embodiments, the emitter circuit is comprised in a VCSEL array.

[0069] The VCSEL array may be a collection of multiple VCSELs arranged in a specific pattern, forming the emitter circuit. For example, the emitter circuit includes a VCSEL array with multiple individually controllable VCSELs.

[0070] In some embodiments, the VCSEL array comprises a plurality of individually controllable VCSELs.

[0071] The individually controllable VCSELs may refer to VCSELs within the array that can be independently controlled to emit light, enabling various illumination patterns. For example, each VCSEL in the array can be activated or deactivated based on the region of interest.

[0072] In some embodiments, the detection section includes a current sensor and a signal conditioning section.

[0073] The current sensor may be a device that measures the electrical current flowing through the emitter circuit. For example, the current sensor detects the driving current of the VCSEL array. The signal conditioning section may be a part of the detection section that processes the current signal to ensure it is in a proper form and range for further analysis. For example, the signal conditioning section includes gain adjustment, offset cancellation, and filtering components. In some embodiments, the signal conditioning section comprises a gain adjustment section, an offset cancellation section, and / or a filtering section.

[0074] The gain adjustment section may be responsible for amplifying or attenuating the current signal to an optimal level. For example, the gain adjustment section ensures that the current signalremains within a detectable range. The offset cancellation section may remove any direct current (DC) offset present in the current signal. For instance, the offset cancellation section eliminates systematic deviations in the current signal. The filtering section may apply filtering techniques to remove unwanted noise and high-frequency components from the current signal. For example, the filtering section ensures that the current signal is clean and accurate for further processing. In some embodiments, the circuitry includes a conversion section configured to perform analog-to-digital conversion on the signal.

[0075] The conversion section may be a part of the circuitry that converts the analog current signal into a digital signal for further processing. For example, the conversion section includes an analog-to-digital converter (ADC) that digitizes the current signal.

[0076] In some embodiments, the emitter circuit is configured to emit light pulses with a specific duty ratio.

[0077] The light pulses may be short bursts of light emitted by the emitter circuit. For example, the VCSEL array emits light pulses for Time-of-Flight measurements. The specific duty ratio may refer to the proportion of time each light pulse is active within a given period. For instance, the duty ratio determines the duration and intensity of the light pulses emitted by the VCSEL array. In some embodiments, the control signal is generated based on a mapping function that obtains the target current and the signal indicating the electrical current to a correction value.

[0078] In some embodiments, the detection section comprises a PMOS transistor configured to control the current of the emitter circuit; and a replica transistor configured to mirror the current flowing through the PMOS transistor to generate the current signal indicating the electrical current of the emitter circuit.

[0079] The PMOS transistor may be a type of transistor used to control the current flow in the emitter circuit. For example, the PMOS transistor regulates the driving current of the VCSEL array. The replica transistor may be a transistor that mirrors the current flowing through the PMOS transistor, providing an accurate representation of the current for measurement purposes. For instance, the PMOS Replica mirrors the current of the PMOS transistor to generate the current signal.

[0080] In some embodiments, the circuitry is further configured to perform the calibration process to obtain the calibration parameters.The calibration process may be a systematic procedure used to determine the calibration parameters, ensuring accurate control of the driving current and optimal performance of the emitter circuit. For example, the calibration process involves measuring the driving current at different emitter configurations and calculating the error slope and offset values.

[0081] An apparatus comprises the electronic device, the apparatus being configured to generate depth information based on measuring a time taken for light to travel from the emitter circuit to an object and back to a receiver array.

[0082] The depth information may refer to data that represents the distance between the apparatus and an object, obtained by measuring the time taken for light to travel to the object and back. For example, the apparatus generates depth information by measuring the time-of-flight of light pulses emitted by the VCSEL array and detected by the receiver array. The receiver array may be a collection of sensors that detect the reflected light and provide data for depth calculation. For instance, the receiver array detects the reflected light rays and sends the data to the control circuitry for depth calculation.

[0083] In some embodiments, the apparatus is configured to operate using either Direct Time-of-Flight (dToF) or Indirect Time-of-Flight (iToF) techniques.

[0084] The Direct Time-of-Flight (dToF) may be a technique that measures the precise travel time of light from the emitter to the object and back to the receiver. For example, dToF systems measure the time taken for light pulses to travel to the object and back to calculate the distance. The Indirect Time-of-Flight (iToF) may be a technique that determines distance by measuring the phase shift between the emitted and received light waves. For instance, iToF systems use the phase shift information to compute the distance to the target.

[0085] A control method comprises determining, based on calibration parameters, a target current, and generating, based on the target current and a current signal indicating an electrical current of an emitter circuit, a control signal to control an operation of the emitter circuit.

[0086] The control method may refer to a systematic procedure used to determine the target current based on calibration parameters and generate a control signal to adjust the operation of the emitter circuit. For example, the control method involves calculating the target current using the calibration parameters and generating a current control code based on the target current and the current signal.A computer program that, when executed by circuitry, causes the circuitry to execute the method according to the control method.

[0087] The computer program may be a set of instructions that, when executed by the circuitry, enables the circuitry to perform the control method, ensuring accurate and reliable operation of the emitter circuit. For example, the computer program includes instructions for calculating the target current, generating the current control code, and adjusting the driving current of the emitter circuit.

[0088] Time-of-Flight Measurements

[0089] Time-of-Flight (ToF) technology enables precise distance measurement by determining the time taken for light to travel from an emitter to a target and back to a receiver. This principle is widely utilized in applications requiring depth sensing, object detection, and spatial mapping. ToF systems typically consist of an illumination source, a sensor array, and control circuitry that synchronizes signal transmission and reception while processing time delay data to compute depth information.

[0090] A VCSEL (Vertical-Cavity Surface-Emitting Laser) is a type of semiconductor laser that emits light perpendicular to its surface, rather than from the edges like conventional laser diodes.

[0091] VCSELs are widely used in optical communication, sensing, and 3D depth-mapping applications due to their efficiency, high-speed operation, and ability to be integrated into compact arrays. Fig. 1 symbolically illustrates a Time-of-Flight apparatus 1 configured to operate according to the present disclosure. The Time-of-Flight apparatus 1 comprises an emitter 2, a receiver array 3, and control circuitry 4. The emitter 2 comprises a VCSEL array 50, which is composed of a plurality of individual VCSELs 51 (only a single VCSEL 51 of the plurality of VCSELs being indicated). The ToF apparatus 1 operates by emitting outgoing light rays LI from the emitter 2 towards a scene or object. The light rays LI are reflected by the scene or object as reflected light rays L2 to the receiver array 3. The control circuitry 4 controls the operation of both the emitter 2 and the receiver array 3 and processes the time it takes for the light rays to travel to the object and back to generate depth information.

[0092] In Fig. 1, the control circuitry 4 is depicted as a separate component that manages the operation of both the emitter 2 and the receiver array 3 to process time-of-flight data and generate depth information. Alternatively, the control circuitry can also be integrated directly within the VCSEL array, allowing regulation of light emission and real-time calibration, or within the receiverarray, enabling it to function as the host by managing signal synchronization, data processing, and depth calculation while adapting dynamically to environmental conditions.

[0093] The emitter 2 serves as the light source that emits the outgoing light rays LI. VCSELs 51 of the VCSEL array 50 are arranged, for example, in a grid pattern. Each VCSEL 51 of the VCSEL array 50 can be individually controlled to emit light, enabling various dot patterns and illumination configurations.

[0094] The emitter 2 operates by supplying an electrical driving current to each VCSEL 51, enabling controlled emission of coherent light at a predetermined wavelength. The control circuitry 4 precisely regulates the driving current to modulate the intensity, duration, and timing of the emitted light pulses. This modulation allows for adaptive illumination strategies, optimizing depth sensing performance and minimizing power consumption based on the specific application requirements.

[0095] Each VCSEL 51 emits a beam of coherent light with a generally circular cross-section. When multiple VCSELs within the VCSEL array 50 are activated in a controlled manner, they collectively form a structured illumination pattern. Depending on the arrangement and activation of individual VCSELs, the emitted light may produce a pattern that appears as a grid or an array of discrete illumination spots on a target surface.

[0096] The emitted light LI is modulated with a specific duty cycle, which defines the proportion of time each VCSEL is actively emitting light within a given illumination cycle. By adjusting the duty cycle, the system can dynamically regulate the intensity, duration, and timing of the emitted pulses to optimize measurement accuracy, adapt to varying environmental conditions, and enhance energy efficiency based on specific application requirements.

[0097] Time-of-Flight (ToF) measurement techniques can be broadly classified into two main types: Direct Time-of-Flight (dToF) and Indirect Time-of-Flight (iToF). In dToF systems, the precise travel time of light from the emitter to the object and back to the receiver is measured directly, enabling accurate distance calculations. In contrast, iToF systems determine distance by measuring the phase shift between the emitted and received light waves. This phase shift provides information about the time delay, which is then used to compute the distance to the target. Both approaches offer distinct advantages depending on the specific application and system requirements. The ToF apparatus 1 described in Fig. 1 can be configured to operate using either dToF or iToF techniques, depending on the specific requirements of the application. The control circuitry 4 controls the emission, detection, and calculation processes.In the following, embodiments are described where an ToF apparatus 1 operates according to the dToF principle. It should be noted, however, that the principles described in the embodiments below are also applicable to iToF measurements.

[0098] Fig. 2 illustrates an example circuit diagram of a VCSEL driving circuit 20, which is configured to control the operation of a VCSEL array. The circuit includes a current sensor 22, a plurality of VCSELs 23-1, ..., 23-n, drive transistors 24-1, ..., 24-n, ground transistors 25-1, ..., 25-n, and ground nodes 26-1, ..., 26-n. The VCSELs 23-1 to 23-n collectively form a VCSEL array (50 in Fig. 1), which can be individually or collectively controlled for structured illumination.

[0099] In this example configuration, each drive transistor 24-1 to 24-n regulates the current supplied to its corresponding VCSEL 23-1 to 23-n, enabling precise modulation of the emitted light. The ground transistors 25-1 to 25-n function as controlled current sinks, providing a return path to the ground nodes 26-1 to 26-n. The ammeter 22 monitors the total current supplied to the VCSEL array, allowing for real-time adjustments to optimize performance.

[0100] By individually addressing VCSELs within the VCSEL array, the circuit supports adaptive illumination strategies, such as dynamic pattern projection, power-efficient depth sensing, and high-speed optical communication.

[0101] It should be noted that while Fig. 2 assumes a common anode configuration, it is also possible to implement the current sensor at the cathode. Placing the current sensor at the cathode allows for alternative circuit configurations that may offer different advantages in terms of design flexibility, signal integrity, and ease of integration with other components. In general, the driving currents can be monitored regardless of the specific arrangement of the VCSEL array.

[0102] Fig. 3A illustrates a symbolic example of a structured illumination pattern 30 as observed by the Time-of-Flight (ToF) apparatus 1. The pattern 30 consists of a plurality of individual illumination spots 31, which are formed when light LI, emitted by the emitter 2, interacts with the target scene or object. The structured pattern results from the controlled emission of light from multiple VCSELs 51 within the VCSEL array 50. Each illumination spot 31 corresponds to the output of a respective VCSEL 51, which contributes to the overall pattern observed by the ToF system.

[0103] Fig. 3B illustrates a structured illumination pattern 30, with individual illumination spots 31 projected onto a scene as observed by the Time-of-Flight (ToF) apparatus 1. The scene in Fig.

[0104] 3B comprises several objects: 41a, a framed picture; 42a, a standing lamp; and 43a, a sofa.Additionally, the figure highlights Regions of Interest (Rols) 1, 42, and 43, which correspond to the framed picture 41a, the standing lamp 42a, and the sofa 43a, respectively. These Rols 41, 42, and 43 are specific areas within the scene that the ToF system focuses on for detailed measurement and analysis. It is understood that these objects serve as examples of areas that may be designated as Rols, but an Rol may be defined for any type of object and number of objects, not limited to the examples shown in Fig. 3B.

[0105] Rols 41, 42, and 43 are defined by selectively activating the VCSELs 51 in the array 2 to emit light dots 31 towards the defined regions. Each Rol 41, 42, and 43 is illuminated by a different number of VCSELs and thus comprises a different number of dots. On a functional level, the control circuitry (4 in Fig. 1) manages this process, adjusting the emission parameters such as the Pulse Repetition Interval (PRI), duty cycle, and peak current (Ipeak) to suit the specific requirements of each Rol. Rols 41, 42, and 43 thus enable the ToF system to concentrate its measurement efforts on specific areas of interest within the scene. By focusing on these regions, the system can optimize a resource usage. For instance, in Fig. 3B, the ToF apparatus 1 can prioritize the framed picture 41a, the standing lamp 42a, and the sofa 43a by defining them as Rols 41, 42, and 43, respectively.

[0106] It should be noted that Rols may be dynamically defined to focus on other scene elements not shown by example in Fig. 3B, such as a foreground or a background.

[0107] Fig. 4A is an illustrative graph that demonstrates the relationship between the number of illuminated dots and the driving current (LD current) available to each laser emitter. The horizontal axis of the graph of Fig. 4A indicates the number of illuminated dots Ndot, which corresponds to the number of active VCSELs in the VCSEL array 50. The vertical axis represents the driving current (LD current) available to each laser emitter. The graph shows a downward trend, indicating that as the number of illuminated dots Ndot increases, the driving current available to each laser emitter decreases, potentially resulting in inconsistent optical characteristics. This inconsistency can adversely affect the accuracy and reliability of the ToF measurements. The decrease in driving current per dot means that the emitted light intensity varies, which can lead to errors in depth measurement and reduced performance of the ToF system.

[0108] Fig. 4B is an illustrative graph that demonstrates the nonlinearity between the requested driving current and the effective driving current resulting in a VCSEL due to the effect described in Fig.

[0109] 4B above.The horizontal axis represents an ID AC code, which is a digital code used to set the desired VCSEL current (the requested driving current). The vertical axis, LD current, of the graph represents the effective driving current resulting in a VCSEL when applying the IDAC code that corresponds to the requested driving current. The dashed line in the graph indicates the desired linear behavior (“target”) between the IDAC code and the resulting LD current, representing the ideal scenario where the effective driving current exactly matches the requested driving current for each IDAC code. The graph highlights the discrepancies between the requested driving current and the effective driving current. As can be seen, the effective driving current deviates from the target LD current indicated by the dashed line at higher IDAC codes. This discrepancy between the requested and actual LD current can lead to suboptimal performance of the ToF system, as the VCSELs may not emit light at the intended intensity. This can result in inaccuracies in depth measurements and reduced reliability of the ToF system.

[0110] The embodiments described below in more detail address the issue of nonlinearity between the requested driving current and the effective driving current by implementing a calibration process that determines calibration parameters which define a mapping function that corrects the driving current based on the current configuration of the emitter array, including real-time factors like the number of illuminated dots and the duty ratio. The system dynamically generates a current control code reflecting the target current derived from these calibration parameters and the current signal indicating the actual driving current. Additionally, the system applies gain adjustment, offset cancellation, and filtering to the current signal to improve measurement and control.

[0111] Time-of-Flight (ToF) system with a flexible Region of Interest (Rol) and current management mechanism

[0112] The process described in more detail below is targeted at illuminators or transmitters for Time-of-Flight (ToF) systems, which are widely utilized in applications requiring precise depth sensing, object detection, and spatial mapping. These applications include augmented reality, automotive safety, and biometric authentication.

[0113] The process addresses the demand for a flexible control over the Region-of-Interest (Rol) in ToF systems. This includes managing the number of illuminated dots and their locations to maximize efficiency in power reduction. By providing flexible Rol control, the system can optimize the usage of resources, ensuring that only the necessary areas are illuminated, thereby reducing power consumption. Additionally, the ability to offer various exposure recipes, including pulserepetition interval (PRI) and pulse width, with a desired peak current (IPEAK), provides a wider degree of freedom for direct Time-of-Flight (dToF) systems. This flexibility allows the system to adapt to different scenarios and requirements, enhancing its performance and usability.

[0114] Maintaining constant optical and electrical power for the Vertical-Cavity Surface-Emitting Laser (VCSEL) and its corresponding driver provides for better reliability. Stable power ensures consistent performance of the ToF system, leading to accurate and reliable depth measurements. Furthermore, the system keeps reliable overcurrent flowing detection regardless of the dot configuration. This capability ensures that the system can detect and respond to overcurrent conditions, preventing potential damage and maintaining safe operation. The laser diode driver should also exhibit robustness against variations in process, voltage, and temperature (PVT). Such robustness enhances the reliability of the ToF system, ensuring consistent performance under different environmental conditions and manufacturing variations.

[0115] The embodiments provide several solutions to address the aforementioned demands and motivations. The system detects signals indicating the current flowing through VCSEL, which is crucial for monitoring and adjusting the driving current to maintain optimal performance. The sensing path includes controllable gain to provide wider Rol control, accommodating different numbers of dots and duty ratios. This feature allows the system to dynamically adjust the sensing parameters based on the current Rol configuration, ensuring accurate and reliable detection. A systematic calibration based correction process is implemented to ensure robustness against variation and different configurations. This process includes obtaining calibration parameters, such as error slope and offset, to align the driving current with reference values, ensuring consistent performance. The system performs calibration-based updates for current and overcurrent flowing detection (OCFD) thresholds, synchronized with group exposure updates. This synchronization ensures that the system can dynamically adjust the thresholds based on real-time operating conditions, enhancing its reliability and safety.

[0116] Fig. 5 illustrates a flow diagram for controlling a Time-of-Flight (ToF) system with a flexible Region of Interest (Rol) and current management mechanism. The process begins at step S10, initiating the operations of the ToF system.

[0117] At SI 1, a Region of Interest (Rol) is defined. This involves identifying specific areas within the scene that require detailed measurement and analysis, allowing the system to concentrate its resources effectively.At S12 configuration parameters for the Rol are determined. The parameters include the number of illuminated dots (Ndot), which represents the count of VCSEL elements that will be active in the Rol, and the duty ratio ®, which quantifies the proportion of time the VCSEL array is actively emitting light within a given period.

[0118] At S13, an emitter configuration (e.g. Config P IN in Fig. 12B) is calculated. This calculation may for example combine the number of illuminated dots and the duty ratio to define the operational load of the emitter array for the current Rol.

[0119] At S14 predefined calibration parameters obtained through a systematic calibration process are retrieved. These parameters include the error slope (ErrorSlope), a coefficient representing the rate of change in the target current relative to changes in the emitter configuration; the offset (DOffset), a constant added to the target current to correct for systematic deviations; and the reference emitter configuration value (Config_P2), used to standardize the conversion process. At SI 5, a target current for the current control and a threshold for overcurrent detection (OCFD) is calculated using the calibration parameters and the emitter configuration. More details are described with regard to Figs. 9 and 10 below. This target current represents the desired driving current for the VCSEL array based on the current Rol configuration and calibration parameters. An overcurrent threshold value (for Overcurrent Flowing Detection (OCFD)) corresponding to the current configuration can also be calculated at this stage. Overcurrent Flowing Detection (OCFD) at S15 if foreseen to ensure the safe operation of components by monitoring and detecting when the electrical current exceeds a predefined threshold, representing the maximum allowable current for the VCSEL (Vertical-Cavity Surface-Emitting Laser) array. This threshold, dynamically adjusted based on calibration parameters, configuration parameters, and real-time conditions, aligns with operational needs and includes a safety margin based on system requirements. Typically, the threshold is calculated as the product of the target current (target current) and a safety margin.

[0120] At S16 the current signal (see Si in Figs. 9 and 10 below) is measured that indicates the electrical current flowing through the VCSEL array. This measurement is performed by a detection section of the emitter circuitry.

[0121] At SI 7, a current control code (see Ci in Figs. 7 and 8) is generated based on the target current and / or the measured current signal. This may include applying a mapping function to obtain the corrected current and using either a lookup table or calculation logic to generate the current control code.At S18 the driving current of the VCSEL array is adjusted by applying the current control code. At SI 9, the driving current is continuously monitored to ensure it does not exceed a predefined overcurrent threshold. This involves comparing the measured current to the threshold and generating a protection flag if the threshold is exceeded, signaling potential overcurrent conditions.

[0122] The flow diagram in Fig. 5 integrates the concepts of Rol control, calibration, and current control, emphasizing the flexibility and reliability of the ToF system’s illuminator. It illustrates how the system dynamically adjusts to different Rols and ensures consistent performance through systematic calibration and real-time current management.lt should be noted that step S16 of the process of Fig. 5, involving the measurement of the current signal Si indicating the electrical current of the VCSEL array, can be omitted. The target target current at a given configuration can be directly determined from the calibration parameters and configuration parameters, eliminating the need for real-time current measurement.

[0123] Emitter Circuitry

[0124] Fig. 6 illustrates an embodiment of an emitter circuitry 10 of the emitter 2. Emitter circuitry 10 comprises a detection and conditioning section 60, a conversion and control section 70, and a VCSEL array 50. The VCSEL array 50 comprises multiple VCSEL circuits 51-1, 51-2, ... 51-n. Each of the VCSEL circuits 51-1, 51-2, ... 51-n includes a VCSEL 52, a current source 53, and a VCSEL threshold (VCSTH). The VCSEL circuits 51-1, 51-2, ... 51-n are connected in parallel to controller 72, the detection section 62, and ground 54. In the emitter circuitry 10 of Fig. 6, one shared detection section 62 is provided for all of the multiple VCSEL circuits 51-1, 51-2, ... 51-n.

[0125] The detection and conditioning section 60 includes a signal conditioning section 61 and a detection section 62. The detection section 62 is responsible for detecting signals that indicate the current flowing through each VCSEL 52. This is achieved by monitoring the current source 53 associated with each VCSEL circuit 51-1, 51-2, ... 51-n. The detection section 62 then outputs the current signals to the signal conditioning section 61. The detection section 61 may, optionally, be placed at the cathode of the VCSEL driver.

[0126] The signal conditioning section 61 processes the current signals to ensure they are in a proper form and range for further analysis. This may for example include gain adjustment, filtering, and offset cancellation to produce a clean and accurate signal for conversion as shown in more detailin Fig 7 below. The signal conditioning section 61 performs signal conditioning on the current signals and then outputs conditioned signals to control section 70.

[0127] Control section 70 includes a conversion section 71 and a controller section 72. The conversion section 71 performs analog-to-digital conversion on the conditioned signal received from the signal conditioning section, and outputs the digital conditioned current signal to controller section 72.

[0128] The controller section 72 controls the current sources 53 of VCSEL circuits 51-1, ..., 51-n in order to dynamically adjust the driving current flowing through the respective VCSELs 52 of VCSEL circuits 51-1, ..., 51-n based on the digital conditioned current signals received from conversion section 71, and based on additional input parameters (such as configuration parameters 81, the desired peak current (Ipeak), and the pulse repetition interval (PRI), not shown in Fig. 6), ensuring optimal operation of the VCSEL array 50. The current control may be addressed to individual VCSEL circuits 51-1, ..., 51-n or collectively to the entire VCSEL array 50.

[0129] The controller section 72 further updating of the driving current and of an over current flowing detection (OCFD) threshold (hereinafter “overcurrent threshold”) values. These updates are synchronized with group exposure updates to maintain consistent optical performance and reliability.

[0130] The control section 72 applies a predetermined calibration to a current control in order to adjust the driving current of the VCSEL 51 (for example the VCSELs 51-1, ... , 51-n) based on the current signal. A process for determining the predetermined calibration will be discussed hereinbelow with reference to Figs. 8 et seqq.

[0131] In addition to controlling the driving currents of VCSEL circuits 51-1, ..., 51-n, the control section 72 outputs a protection flag 80 as an electronic signal or indicator used to denote a specific condition or status, such as the driving current exceeding the overcurrent threshold, a power output that may be higher than admissible by human eye protection or circuit protection. In should be noted that conversion and control in the emitter circuitry 10 of Fig. 6 can be implemented through either analog or digital means, depending on the specific requirements and design preferences. In cases where the detection involves small units of drivers, such as single VCSELs or sub-arrays, the conversion and control functionalities can be integrated within the unit itself. When employing a digital approach, an analog-to-digital converter (ADC) isnecessary to convert the analog current signals into digital form for further processing. The calculation and update of control parameters can be performed in various configurations, such as within an individual integrated circuit (IC) dedicated to the illuminator, as a slave component controlled by the receiver (RX) part, or as a component of the overall ToF system managed by software (S / W) and firmware (F / W) at the system level. The protection flag 80 generated by the control section 72 may include indicators related to human eye protection and circuit protection, ensuring safe and reliable operation of the VCSEL array 50.

[0132] Fig. 7 illustrates an alternative embodiment of the emitter circuitry 10. The emitter circuitry 10 of Fig. 7 is similar to the emitter circuitry 10 of Fig. 6 but includes a plurality of detection sections 62-1, .. ,62-n instead of a single shared detection section (62 in Fig. 6). In this configuration, each detection section 62-1, .. ,62-n detects the driving current generated by the respective current source 53 of the respective VCSEL 52. Each detection section outputs its own current signal.

[0133] The signal conditioning section 61 performs signal conditioning, such as gain adjustment, filtering, and offset cancellation on the signals obtained from the detection sections 62-1, .. ,62-n, and outputs conditioned signals to the conversion section 71. The conversion section 71 performs signal conversion, such as analog-to-digital conversion, and outputs the converted signals to the control section 72. The control section 72 then generates and provides a respective current control for each of the VCSEL circuits 51-1, 51-2, and 51-n, or provides a current control collectively to the entire VCSEL array 50.

[0134] Fig. 8 shows an embodiment of the signal conditioning section 61 of either the emitter circuitry 10 of Fig. 6 or the emitter circuitry 10 of Fig. 7. The signal conditioning section 61 is responsible for processing the current signals to ensure they are in a proper form and range for further analysis. The signal conditioning section 61 comprises three components in sequence: a gain adjustment section 611, an offset cancellation section 612, and a filtering section 613.

[0135] The gain adjustment section 611 is responsible for adjusting the gain of the current signal. By controlling the gain, the system amplifies or attenuates the signal (see 622 in Fig. 9 and corresponding description). By adjusting the gain, the system may ensure that the current signal remains at an optimal level — neither too low to be detected accurately nor too high to cause distortion or saturation in subsequent processing stages.

[0136] The offset cancellation section 612 removes any direct current (DC) offset present in the current signal (see 625 in Fig. 9 and corresponding description). Any known techniques for offsetcancellation may be applied, such as chopping or auto-zeroing methods, to eliminate the offset from current induced by the offset of the amplifier.

[0137] The filtering section 613 applies filtering techniques to the current signal to remove unwanted noise and high-frequency components (see 103a and 103b in Fig. 9 and corresponding description).

[0138] In the described embodiment, the signal conditioning section, responsible for gain adjustment, offset cancellation, and noise filtering, is separate from the detection section. However, it is also possible to integrate some or all of these signal conditioning functions directly within the detection section, depending on the design requirements.

[0139] Fig. 9 illustrates an exemplary implementation of the emitter circuitry 10 as an integrated circuit. The purpose of the emitter circuitry 10 illustrated in Fig. 15 is to control the emission of light from a VCSEL 52 for Time-of-Flight (ToF) measurements. This integrated circuit manages the driving current supplied to the VCSEL 52, ensuring accurate and stable light emission.

[0140] Emitter circuitry 10 comprises a control section 72 and a detection section 62. The control section 72 is responsible for managing the overall operation of the emitter circuitry, including the regulation of the driving current supplied to the VCSEL 52. The control section 72 includes a logic circuit 721 which processes digital signals which represent the current flowing through the VCSEL 52 as detected by a detection section 62, and generates control signals to dynamically adjust the current supplied to the VCSEL 52, to achieve optimal performance and accurate light emission for Time-of-Flight measurements. A capacitor 102 helps to stabilize the voltage and suppresses potential fluctuations in the current signal.

[0141] The detection section 62 is responsible for detecting the current flowing through the VCSEL 52 and providing the necessary signals to the control section 72 for further processing. A positive voltage node 621 supplies the driving voltage VDDH 621 for the detection section 62. This voltage VDDH is fed to the source of a variable PMOS transistor 622 (a P-channel MOSFET) which is positioned, as switching element, between the positive voltage supply (the high side) and the load (in this case, the VCSEL 52). The PMOS transistor 622 is controlled by a signal EN (PMOS Enable), which, when active, allows current to flow through the VCSEL 52, enabling it to emit light. The resistance of the PMOS transistor 622 can be adjusted depending on the level of the biasing voltage EN. When PMOS 622 is turned on by signal EN, it allows current to flow from the positive voltage node 621 through the VCSEL 52 to ground 54 (GND), enabling theVCSEL to emit light. Conversely, when the signal EN is inactive (high voltage for a P-channel MOSFET), it turns off PMOS 622, stopping the current flow and thus disabling the VCSEL 52. The current gain at the replica path is controlled by the ratio of on-resistance between PMOS transistor PMOS 622 and PMOS replica transistor 623. This control is facilitated through a feedback mechanism that ensures equal potential at the drains of both PMOS 622 and PMOS replica 623. By maintaining this equal potential, the system leverages the difference in on-resistance ratios between PMOS 622 and PMOS replica 623 to determine the current gain in the replica path. Essentially, the PMOS replica transistor 623 mirrors the current flowing through the PMOS 622, but the magnitude of this mirrored current is adjusted according to the resistance ratio.

[0142] PMOS transistor 622 can be controlled using either analog or digital methods to regulate its on-resistance, thus adjusting the current flow through the VCSEL 52. In the analog control method, the bias voltage (EN) is varied to modulate the transistor’s resistance, allowing precise analog control of the driving current. In the digital control method, a set of multiple digital control signals (EN[n-l : 0]) is used to adjust the width-to-length (W7L) ratio of the PMOS transistor 622. This digital control approach enables fine-grained modulation of the on-resistance by selectively engaging different transistor segments or configurations, effectively controlling the current flow through the VCSEL 52. Both methods provide robust mechanisms for gain adjustment, ensuring the emitted light pulses are accurately regulated for optimal Time-of-Flight measurements.

[0143] Parallel to PMOS 622 there is arranged another transistor 623 (PMOS Replica) as a replica that mirrors the current flowing through PMOS 622. PMOS Replica 623 operates under the control of signal CSEN (Current Sense Enable). When the CSEN signal is active, which typically means a low voltage for a P-channel MOSFET, it turns on the PMOS Replica 623, allowing it to conduct current. By doing so, the replica transistor mirrors the current flowing through the main PMOS transistor 622. This mirrored current is proportional to the current in the main transistor PMOS 622, enabling the current sensing circuitry 62 to measure the current indirectly by observing the current through the replica transistor. This method of current sensing via PMOS Replica transistor 623 isolates the sensing circuitry from the main current path, minimizing any potential interference or loading effects that could affect the accuracy of the current measurement. It allows for precise current sensing since the mirrored current is a direct representation of the main current. Additionally, this approach reduces power loss because there is no need to introduce additional resistive elements in the main current path, maintaining the efficiency of the circuit.By using PMOS Replica 623 for current sensing, the main PMOS transistor 622 can operate without any additional components in its current path, thus enhancing the overall performance and reliability of the circuit. In this embodiment, the current signal is the current at the source of the PMOS Replica 623. The current at the source of the PMOS Replica 623 is thus a detected current.

[0144] The current detected by the PMOS Replica 623 is then processed by an amplifier 625. The amplifier 625 compares the current flowing through the PMOS Replica 623 (the mirrored current) with the current through the PMOS 622. A low-pass filter 103a attenuates high-frequency noise from the current in PMOS 622. The output voltage of the amplifier is applied to the gate of the adjustment transistor 626, dynamically regulating its current to compensate for any offset. General offset cancellation methods, such as chopping or auto-zeroing, are employed to remove the offset generated by the amplifier. The amplifier in the feedback loop offers the advantage of robust sensing of the Anode voltage of the VCSEL relative to variations in process, voltage, and temperature (PVT).

[0145] After the current signal is processed by the offset cancellation, a low pass filter 103b is arranged to filter out high-frequency noise from the current signal, ensuring that only the relevant low-frequency components are retained. High-frequency noise can introduce significant inaccuracies in the signal, leading to erroneous measurements. By eliminating these unwanted high-frequency components, the low pass filter 103b helps maintain the integrity and accuracy of the current signal.

[0146] The clean signal obtain from low pass filter 103a is then passed to the Analog-to-Digital Converter (ADC) 105. ADC 105 converts the refined analog signal into a digital signal for further digital processing by logic circuit 721. The logic circuit 721 analyzes the digital data and generates a current control Ci (e.g. implemented as a control code) based on the processed information. The current control Ci is then sent to the ID AC 101. The ID AC 101 converts the received current control Ci into an analog signal which is provided to the current source 53 for controlling the current flowing through VCSEL 52.

[0147] That is, a feedback loop is established wherein the logic circuit 721 generates a signal representing the current driving current supplied by the power source 53 to the VCSEL 52. This signal is utilized by the logic circuit 721 to compute any necessary adjustments to the driving current. Based on these calculations, the logic circuit 721 produces a current control Ci . Thiscurrent control Ci is subsequently transmitted to the power source 53, thereby adjusting the driving current of the VCSEL 52 in accordance with the computed adjustments.

[0148] The emitter circuitry further provides an overcurrent protection mechanism. This overcurrent protection mechanism is implemented by the logic circuit 721, which monitors whether the driving current exceeds a predefined overcurrent threshold. The process begins with the logic circuit 721 generating a digital signal that represents the overcurrent threshold level. This digital signal is then sent to the Digital-to-Analog Converter (DAC) 722, which converts it into an analog signal. The analog signal is subsequently filtered by the Low-Pass Filter (LPF) 103c to eliminate any high-frequency noise. The filtered analog signal is then passed to a comparator 104, which compares it with the signal indicating the actual driving current as obtained from the detection section 62. Based on this comparison, the comparator 104 outputs a signal to the logic circuit 721 which has a first value if the driving current exceeds the overcurrent threshold and a second value if it does not. Through this mechanism, the logic circuit 721 can continuously monitor the driving current and ensure it remains within safe limits, thereby preventing potential overcurrent conditions.

[0149] Current control

[0150] In the following it is described exemplifying process of current control based on calibration parameters and based on additional configuration parameters. Here, "calibration parameters" refers to a collection of predefined values and coefficients obtained through a systematic calibration process (see Fig. 15), which are used for ensuring the accuracy and consistency of the system's measurements and operations. The term "configuration parameters" is used here to refer to parameters that relate to the configuration of the system during operation. These parameters can, for example, be dynamically adjusted based on real-time conditions and requirements, allowing the system to adapt to varying scenarios and optimize performance accordingly. For instance, configuration parameters may include factors related to power management, such as the number of illuminated dots of a particle Region of Interest (Rol) under illumination and the duty ratio the emitter circuit is currently operating with. The configuration parameters can for example be sourced externally, such as from a host device associated with the emitter circuit that controls operation of the emitter circuit. The configuration parameters may for example relate to an illumination recipe used by the host device. This illumination recipe may be designed to optimize the performance of the Time-of-Flight (ToF) system and may consider various factors,including the size and position of a Region of Interest (Rol) that needs to be focused on at a given time.

[0151] Fig. 10 provides an exemplifying process for the generation of a current control Ci based on calibration parameters 95 obtained through a calibration process, configuration parameters 81 defined by the momentary operating conditions of the emitter array, and a current signal Si as obtained from the detection section (62 in Fig. 9) that monitors the current flowing through a VCSEL.

[0152] At S74, a target current DCAL P IN is calculated based on the calibration parameters 95 defined by the momentary operating conditions of the emitter array and based on the configuration parameters 81 defined by the momentary operating conditions of the emitter array.

[0153] The calibration parameters 95 includes the two parameters Errorslope, and Doffset which define a linear model which, together with the reference parameters DREF_P2, and Config_P2, align the driving current of the VCSEL array with a reference slope (see Figs. 12A and Figs. 12B for details). These calibration parameters are obtained through a calibration process (see Fig. 15) to ensure accurate control of the driving current.

[0154] In the example of Fig. 10, the configuration parameters 81 include information about the configuration of the illuminator. They comprise information on the number of illuminated dots Ndot and a duty ratio R. The number of illuminated dots Adofmay for example be obtained from a host device of the emitter circuit 10 that controls the operating configuration. Ndot represents the specific number of emitters required to illuminate a particular Rol (cf. Fig. 3 A and 3B hereinabove). The duty ratio R quantifies the proportion of time within a given period that the emitter array 50 is actively emitting light, relative to the total duration of that period. This duty ratio is typically expressed as a percentage.

[0155] At S74, a target current DCAL P IN is obtained from the calibration parameters 95 and the current configuration parameters 81 using the following equation:

[0156] DCAL p IN = Error slopex(Config_P_IN Config_P2) x DREF_P2 + Doffset (1) Here, Config P IN is a configuration value, obtained from the configuration parameters 81 of the emitter array by multiplying the number of illuminated dots Adof(in the Region of Interest, Rol, (that is currently under illumination) by the duty ratio R:

[0157] Config_P_IN = Ndoi RConfig_P_IN relates to power consumption by combining two parameters, both of which directly affect the VCSEL array’s power consumption and light emission. The total power usage and light emission are proportional to Config P RX, meaning that higher Config_P_IN results in increased overall power consumption and light output, while lower Config P IN leads to reduced power consumption and light output. However, the optical power, or light emission power, of each individual VCSEL remains consistent regardless of the value of Config P RX. Equation (1) ensures that the driving current aligns with a reference slope obtained during calibration (SlopeREF as described in greater detail hereinbelow with reference to Fig. 12A and Fig. 12B).

[0158] In essence, S74 of Fig. 10 maps a momentary configuration of the emitter array to a target current DCAL PJN that is used in dynamically adjusting the driving current based on calibration parameters obtained in a calibration phase. This target current DCAL P IN indicates a desired VCSEL current.

[0159] At S75, the logic 721 of the control section 72 determines a current control code Ci for controlling the current flowing through VCSEL 52 based on the target current DCAL PJN, calculated at S74 and based on the current signal Si that indicates the momentary current flowing through the VCSEL.

[0160] The current signal Si is received by the logic (721 in Fig. 9) as a digital signal (output by the ADC 105 of Fig. 9). It carries information on the driving current Si of the VCSEL as measured by the detection section (62 in Fig. 9) of the emitter circuitry.

[0161] Translating the current signal Si to the current control code Ci based on the target current DCAL p IN may for example use an iterative process, a mapping function, or a lookup table as explained in more detail with regard to Fig. 14 below.

[0162] The current control code Ci obtained in this way is then used by the logic (721 in Fig. 9) to adjust the driving current of the VCSELs (51 in Fig. 9).

[0163] In the embodiment described with regard to Fig. 10 above, the target current DCAL P IN which is used in dynamically adjusting the driving current is obtained based on the driving current Si as measured by the detection section of the emitter circuitry. However, in alternative embodiments with the calibration, the control code Ci can be acquired without having current signal Si by exploiting the calculation for DCAL P IN thereby reducing the required process in generating the current control code. More detailed descriptions of obtaining Ci are provided below.In the embodiment described with regard to Fig. 10 above, the target current DCAL PJN which is used in dynamically adjusting the driving current is obtained from the calibration parameters error slope Errorslope, offset Doffset , DREF_P2, and configuration reference Config_P2, and momentary configuration parameters number of dots dofand duty ratio R of the emitter array using equation 1. According to this implementation option the calculation logic is implemented directly within the integrated circuit, where the configuration parameters, namely the error slope Errorslope , offset Doffset, and configuration reference Config_P2 are stored. This method involves dynamically calculating the target current DCAL PJN based on the real-time configuration parameters Ndot and R and the stored configuration parameters. This approach provides flexibility and ensures that the target current DCAL P IN is accurately tailored to the momentary operating conditions and allows full controllability of the driving current (and / or overcurrent threshold as described in more detail below) by software.

[0164] According to an alternative embodiment, there is a different implementation option for obtaining the target current DCAL P IN based on the momentary configuration parameters of the emitter array. According to this implementation option, a Lookup Table that is pre-built during the calibration phase maps the current values (and / or overcurrent threshold as described in more detail below) with respect to the configuration parameters of the emitter array (e.g. the number of illuminated dots Ndot and the duty ratio A). This alternative approach leverages the Lookup Table to quickly retrieve the necessary target currents based on the current operating conditions, thus simplifying the real-time computation and reducing the processing load on the system.

[0165] This implementation option allows full controllability of the driving current (and / or overcurrent threshold as described in more detail below) by hardware.

[0166] According to a still further implementation option, the first option and the second option are combined. This approach uses a smaller Lookup Table to store frequently used target currents, thereby reducing the size of the Lookup Table and the associated memory requirements. For scenarios not covered by the Lookup Table, a calculation logic implemented in the integrated circuit is employed to compute the target current using the stored configuration parameters Errorslope and Doffset. This compromise balances the Lookup Table size and the complexity of implementing the calculation logic, ensuring efficient and accurate determination of the target current while optimizing resource usage within the integrated circuit.

[0167] This implementation option allows full controllability of the driving current (and / or overcurrent threshold as described in more detail below) by hardware and software.Fig. 11 illustrates an embodiment where the overcurrent threshold Ti for the emitter circuitry is dynamically adjusted based on calibration parameters, configuration parameters, and real-time current signals. This embodiment is specifically focused on controlling the overcurrent threshold and closely resembles the process described in Fig. 10 for having DCAL PJN with respect to the current configuration.

[0168] The process begins with obtaining calibration parameters 95, which include the error slope Errorslope, offset Doffset, and a reference configuration value Config_P2. These calibration parameters are derived from a systematic calibration process to ensure accurate control of the driving current and over current threshold.

[0169] The next step involves gathering configuration parameters 81, such as the number of illuminated dots Ndot and the duty ratio R. These parameters reflect the current operating conditions of the emitter array.

[0170] At S74, the same calculation for DCAL PJN is performed as in equation 1.

[0171] At step S75b, the logic generates a corrected overcurrent threshold Ticorr based on the target current DCAL P IN and the required safety margin. This corrected threshold ensures that the driving current remains within safe limits, dynamically adjusting to the real-time operating conditions of the emitter array.

[0172] The corrected overcurrent threshold Ticorr (91b) obtained is used to regulate the driving current of the emitter circuit, ensuring safe and reliable operation.

[0173] In summary, Fig. 11 describes a method for dynamically adjusting the overcurrent threshold of an emitter circuitry based on calibration parameters, real-time configuration parameters, and current signals, ensuring optimal and safe operation of the Time-of-Flight system.

[0174] Fig. 12A and Fig. 12B are explanatory diagrams illustrating the dependence of the target current on the emitter configuration (e.g. product of the number of illuminated dots and the duty ratio before and after calibration), respectively. Fig. 12A illustrates the discrepancies between the target current, i.e. the ideal current, and the actual measured values prior to calibration, highlighting the inherent deviations in the system’s performance. In contrast, Fig. 12B demonstrates the convergence of the actual values to the ideal (target) values post-calibration, signifying the efficacy of the calibration process in aligning the system’s operation with the desired parameters.Fig. 12A illustrates the relationship between the emitter configuration, i.e. the operational characteristics of an emitter, specifically the product of the number of illuminated dots Ndot) and the duty ratio (R), and the target current (target current DCAL PJN) used to adjust the driving current of the VCSEL array as received from the detection section. The horizontal axis represents the product of the number of illuminated dots and the duty ratio (Ndot x R), which quantifies the operational load of the emitter array (also called "emitter configuration" in the following). The vertical axis represents the target current (DCAL PJN), which indicates VCSEL current.

[0175] The dashed line labeled “detection range” indicates the range within which the detection section can guarantee accurate sensing of the current flowing through the VCSEL. If the emitter configuration falls below this range, a different gain adjustment is necessary to maintain sensing accuracy. The graph is divided into n regions (Region 1, Region 2, ... , Region n), each corresponding to different operational conditions of the VCSEL array. Region 1 represents scenarios with a high number of illuminated dots and / or a high duty ratio,. Region 2 represents intermediate conditions, and Region n represents light load conditions with a low number of illuminated dots and / or a low duty ratio. The regions are specified with respect to the detectable range based on the sensing accuracy, as described above. The boundaries of these regions can be chosen based on the specific requirements of the application, the desired accuracy, and the operational range of the VCSEL array. Additionally, these boundaries are set to optimize the system’s performance, ensuring consistent detection and reliable depth measurements across varying conditions. The fundamental concept behind defining these regions relates to the need to provide flexible dot configurations while guaranteeing consistent optical performance of the VCSEL array. In scenarios where the number of illuminated dots and the duty ratio are low, the total current flowing through the VCSEL array becomes small. This reduction in current can lead to inaccuracies in current detection, which in turn affects the system’s ability to maintain precise light emission and distance measurement.

[0176] To address this issue, the regions are established based on the guaranteed accuracy of the current detection. Each region corresponds to specific operational conditions, such as heavy load (Region 1), intermediate load (Region 2), and light load (Region n). In heavy load conditions, where a large number of VCSEL s are active and the duty ratio is high, the total current is substantial, and detection accuracy is inherently maintained. Conversely, in light load conditions, the total current is low, and detection accuracy cannot be guaranteed without additional measures.To ensure accurate current detection across all regions, the system applies gain adjustments to enhance the detection signal. This gain adjustment compensates for the low current levels in light load conditions, thereby maintaining sufficient accuracy. By dynamically adjusting the gain, the system ensures that the current detection remains precise, regardless of the operational load. The calibration is based on determining and aligning actual slopes (SIOPCACTUAL) for the specific Regions 1, 2 and 3 with a reference slope (SlopeREF) using measured driving currents and corresponding emitter configurations.

[0177] To determine the reference slope (SlopeREF) in Region 1, the maximum emitter configuration DREF PI of Region 1 and the minimal emitter configuration DREF_P2 of Region 1 are used as reference points Pl and P2, respectively. DREF PI is the maximum emitter configuration in Region 1 (reference point Pl), corresponding to the highest possible operational load (all VCSELs active with a duty ratio of 1). DREF_P2 is the minimal emitter configuration in Region 1 (reference point P2), corresponding to the minimal emitter configuration. DCAL PI is the target target current at reference point Pl, and DCAL_P2 is the target target current at reference point P2. DCAL PI and DCAL P2 are the target values of the calibration that are provided by the calibration process. DREF PI and DREF_P2 thus serve as a reference for calibration. Together, DREF PI and DREF P2 define the reference slope SlopeREF. In terms of technical meaning, DREF_P2 is a maximum power configuration at calibration point P2. DREF PI thus defines a maximum power configuration of Region 1. Then, DREF PI is a maximum power configuration at calibration point Pl. DREF PI thus is a minimum power configuration required for distance measurement in Region 1.

[0178] Dpi and Dp2 correspond to the actually measured driving currents at these reference points Pl and P2 during the calibration phase. These measured values are used to determine the actual slope (SIOPCACTUAL). SIOPCACTUAL is determined based on the actually measured driving currents (Dpi and DIP-)' and the corresponding emitter configurations (Config_P2 and Config Pl).

[0179] The offset Doffset is indicated as the difference between DREF_P2 and Dp.

[0180] The calibration process is arranged in a way so that the target values for the driving currents as a function of the emitter configuration align with each other. For example, the calibration may calculate the offset and slope by comparing the ideal values and the actual values.The regions correspond to groups of activated VCSELs 51, here indicated by dashed arrows named Ggrpn in Region n, Ggrp2 in Region 2 and Ggrp1 in Region 1. Each of the groups Ggrp n, Ggrp2 and Ggrp_i comprises a plurality of VCSELs 51.

[0181] The regions 1, 2, to n represent different operational conditions or configurations of the VCSEL array in the Time-of-Flight (ToF) system. Region 1 corresponds to scenarios where a large number of VCSELs are illuminated, and / or the duty ratio is high, indicating heavy load conditions with the highest driving current. Region 2 represents intermediate conditions where a moderate number of VCSELs are illuminated, and / or the duty ratio is moderate, resulting in a higher driving current than in Region 3. Region n corresponds to scenarios where a small number of VCSELs are illuminated, and / or the duty ratio is low, indicating light load conditions with relatively low driving current.

[0182] Fig. 12B illustrates the relationship between the operational characteristics of an emitter, specifically the product of the number of illuminated dots Ndot) and the duty ratio (R), and the target current (DCAL PJN) after having been adjusted based on the driving current of the VCSEL array as received from the detection section.

[0183] The horizontal axis represents the product of the number of illuminated dots and the duty ratio (Ndot x R, again called "emitter configuration" in the following). The vertical axis represents the resulting target current (DCAL PJN).

[0184] In Region 1, the calibrated slope (SlopecAL) represents the target current obtained by applying the correction according to equation (1). The values DCAL P2 and DCAL PI indicate adjusted positions of the points Dpi and Dpi as discussed with reference to Fig. 12A. DCAL PI and DCAL P2 correspond to the corrected driving currents at the reference points Pl and P2. Thus, by application of the calibration, an emitter configuration corresponding to Config Pl is mapped to a corrected driving current DCAL PI and an emitter configuration corresponding to Config_P2 is mapped to a corrected driving current DCAL P2. Moreover, an emitter configuration in Region 1 not corresponding to either DCAL P2 and DCAL PI is mapped to a corresponding point on SlopecAL. For example, an emitter configuration Config P IN is mapped, by application of equation (1) to the driving current DCAL P IN. The mapping of Config P IN to DCAL P IN corresponds to S74 of Fig. 10.

[0185] The target current DCAL P IN is either a value that can be used to determine, based on Si a desired correction for the driving current (the correction for the driving current is represented by a valueIcor hereinbelow) or a value that can be used to determine, based on Si, a desired correction for the over current threshold.

[0186] Obtaining calibration parameters

[0187] Fig. 13 illustrates a flowchart for a method of obtaining the calibration parameters 95 to be used in the correction process as described with reference to Fig. 10. The aim is to acquire the correct values for Errorslope and Doffset such that the driving current of the VCSEL array 50 aligns with the reference slope SlopeREF) as described hereinabove with reference to Fig. 12A and 9B. The method begins with an absolute value adjustment step S91. The absolute value adjustment step S91 involves setting initial emitter configurations, which include driving current, and other parameters to predefined values that are known to be within the operational range of the VCSEL array 50. For example, the resistor 107 in Fig.7 might face chip-to-chip variation. Accordingly, before jumping into the calibration flow, this resistance may be set to a proper value.

[0188] Following the absolute value adjustment step S91, the method proceeds to an N point calibration step S92. In the N point calibration step S92, the system performs calibration atN different points, where N refers to the number of calibration value points. Specifically, the system starts at a first calibration point and iterates through a number of N further calibration points. N is thus an index of a calibration point. Config Pl is, for example, the calibration point with index N=1 and Config_P2 is a calibration point with index N=2. Each calibration point represents a specific combination of an emitter configuration and an associated target current. An emitter configuration includes parameters such as the number of illuminated dots Ndot) and the duty ratio (R) of the VCSEL array 50, while the associated target current is determined based on these parameters.

[0189] With reference to Fig. 12A, the emitter is set to the emitter configuration Config Pl, which represents a specific combination of a high number of illuminated dots (Ndot) and a high duty ratio (R). The resulting target current is measured and stored as Dpi. Similarly, the emitter is set to the emitter configuration Config_P2, which represents a specific combination of a low number of illuminated dots (Ndot and a low duty ratio (R). The resulting target current is measured and stored as Dpi. This process is repeated for N different points, covering the entire operational range of the VCSEL array 50.During the N point calibration step S92, the system measures the actual driving current at each calibration point and compares it to the desired reference values. The calibration points are chosen to cover the entire operational range of the VCSEL array 50.

[0190] At the end of the N point calibration step S92, the retrieved combinations of emitter configurations and target currents are stored. These stored values include the measured target currents Dpi and Dp2, which correspond to the emitter configurations Config Pl and Config_P2, respectively.

[0191] Next, the method moves to the correction value calculation step S93. In the correction value calculation step S93, the system calculates the correction values required to align the actual measured slopes (SIOPCACTUAL) with the reference slope (SlopepEF). These correction values include parameters such as Error slope and Doffset.

[0192] In the following, a mathematical background for method for acquiring the calibration parameters, namely the offset Doffset and the error slope Errorslope during a calibration process is described with reference to the points described in Fig. 12A hereinabove:

[0193] In the calibration process for acquiring the calibration parameters valid in Region 1, the emitter array 50 is operated with the emitter configuration Config Pl. This means that the emitter array is operated with a number of illuminated dots Ndot and a duty ratio R corresponding to the emitter configuration Config Pl. Then the driving current of the emitter array corresponding to the emitter configuration Config Pl is measured and recorded as the measured driving current Dpi. Additionally, the emitter array 50 is operated with the emitter configuration Config_P2 and the driving current of the emitter array corresponding to the emitter configuration Config_P2 is measured and recorded as the measured driving current Dp2.

[0194] Based on the values Config Pl and Config_P2 and the corresponding values Dpi and Dp2, the measured slope SlopeAcruAL can be calculated as the gradient, with respect to the emitter configuration, of the respective points. Then the value of the error slope Errorslope can be calculated according to the following equation:

[0195] Err or slope = (DREF_PI - DREF P?) / (DPI-DP2) (2)

[0196] This is equivalent to the difference of the gradient of the reference slope SlopepEF and the gradient of the measured slope SlopeAcruAL.

[0197] Conversely, the offset Doffset can be calculated according to the following equation:

[0198] Doffset ~ DvEV_? .-Dp2 (3)After calculating the correction values, the method proceeds to the decision step S94. In the decision step S94, the system decides whether calibration for additional points is required. If additional points need to be calibrated (“yes” in Fig. 15), for example because the index N has not reached a preset threshold, the method repeats from the N point calibration step S92 while incrementing the index N by a value of 1.

[0199] If no more points need to be calibrated (“no” in Fig. 15), the method ends. At this point, the system has obtained the necessary calibration values to ensure that the driving current of the VCSEL array 50 aligns with the reference slope (SlopeREF). The system stores the calibration values in memory for use during normal operation, ensuring that the driving current is adjusted dynamically based on the momentary operating conditions.

[0200] Generation of a current control code

[0201] The current control code, Ci, which corresponds to the target current, can be generated based on the target current DCAL PJN and a current signal Si obtained from the current measurement and / or calculation. The exemplifying implementations described below in more detail are embodiments for process S75 in Fig. 10.

[0202] Fig. 14 schematically shows an exemplifying implementation, where Ci is sequentially adjusted by increasing or decreasing it to make Si reach to DCAL PJN. This may be achieved by repeatedly performing detection, conversion, and generating Ci in a closed-loop feedback path as schematically shown in Fig. 14.

[0203] The process begins at S90. At S91, the initial value for Ci is set, which can be based on previous measurements or a predefined configuration suitable for the initial operating conditions of the VCSEL array, establishing a starting point for subsequent adjustments.

[0204] At S92, the actual driving current flowing through the VCSEL array is measured using the detection section (see 62 Fig. 9). The measured current, represented as the current signal Si, is converted into a digital signal using the analog-to-digital converter (ADC in Fig. 9) to ensure precision in processing. At S93, the measured current signal Si is compared with the desired target current DCAL P IN (as determined by S74 in Fig. 9) to determine whether the actual current is higher, lower, or equal to the desired current.

[0205] S94 serves as a decision point where the system checks if Si has reached DCAL P IN. If Si is equal (or close) to DCAL P IN, the process proceeds to step S95, where the process ends, and the final Ci value is either stored or used for ongoing control of the VCSEL array. If Si is not equal toDCAL P IN, the process continues to step S96, where Ci is adjusted to either increase or decrease the driving current. If Si is less than DCAL P IN, CI is incremented to boost the driving current supplied to the VCSEL array. Conversely, if Si exceeds DCAL P IN, CI is decremented to reduce the driving current.

[0206] At step S97, the adjusted Ci is applied to the current source to modulate the driving current of the VCSEL array. The process then loops back to step S92, where Si is measured again to check the effect of the adjustment. This iterative process ensures control over the driving current of the VCSEL array, optimizing the performance of the Time-of-Flight (ToF) system for accurate depth sensing and spatial mapping. The closed-loop feedback mechanism allows for fine-tuning of Ci, resulting in control of the driving current until Si converges to the target DCAL P IN.

[0207] Once Si stabilizes and converges to DCAL P IN, CI represents the optimal value needed to maintain the desired driving current. This final Ci is then either stored or used for ongoing control of the VCSEL array, ensuring consistent and reliable operation. The sequential adjustment process thereby ensures that the VCSEL array operates within the desired parameters.

[0208] To continuously adapt to changing conditions, such as modifications in the Region of Interest (ROI), the process described in the flow diagram may be repeated at certain time intervals or triggered by specific changes in the operating environment. This allows the system to dynamically maintain optimal performance for accurate depth sensing and spatial mapping, ensuring the VCSEL array operates efficiently under varying conditions.

[0209] In another embodiment, the process for generating the current control code Ci involves a calculation method that reduces the operation time by avoiding repeated detection and Ci generation cycles. This approach uses a mathematical calculation to determine the necessary adjustments to CL

[0210] The process begins with the initial setup where the desired target current DCAL P IN is determined based on the calibration parameters and the current configuration of the emitter array as set out in S74 Fig. 10 above. Next, the actual driving current flowing through the VCSEL array is measured, represented as the current signal Si. Instead of iteratively adjusting Ci and repeatedly measuring Si, the system calculates Ci using a direct mathematical formula.

[0211] The calculation involves subtracting the measured current signal Si from the desired target current DCAL P IN. This difference quantifies the discrepancy between the actual driving current and the target driving current. To adjust Ci accordingly, this difference is divided by a factor thatconsiders the configuration reference value (Config_P2 in Fig. 10), and the resistance 0 of the variable resistor 107 in Fig. 9, and the on-resistance ratio Rvarof the PMOS transistor 622 in Fig. 9.

[0212] The formula to obtain the correction ACi for Ci used for this calculation is:

[0213] ACi = (DCAL.P.IN - Si) / ((Config_P2 x Rvar) / 0).

[0214] Once Ci is calculated based on ACi, it is applied to the current source to modulate the driving current of the VCSEL array.

[0215] This approach ensures that Ci is adjusted to align the actual driving current with the desired target current in a single calculation step, reducing the operation time compared to the iterative method.

[0216] In yet another embodiment, the process for generating the current control code Ci leverages the calibration process to eliminate the need for detecting the actual current signal Si. This approach relies solely on the calculated target current DCAL.P.IN based on the current configuration of the emitter array.

[0217] The process begins with the system determining the desired target current DCAL.P.IN using the calibration parameters and the current configuration as set out in S74 Fig. 10 above. Since the calibration process has already accounted for various factors affecting the system’s performance, DCAL.P.IN accurately reflects the required driving current for the VCSEL array under the given conditions.

[0218] To generate Ci, the system performs a straightforward division. The target current DCAL.P.IN is divided by a factor that includes the configuration reference value Config_P2, the resistance of tge variable resistor 107 in Fig. 9, and the on-resistance ratio 0 of the PMOS transistor 622 in Fig. 9. This calculation is expressed as:

[0219] Ci = DCAL.P.IN / ((Config_P2 x Rvar) / 0).

[0220] By using DCAL.P.IN directly in this calculation, the system can generate Ci without needing to measure the actual driving current S This simplification reduces the complexity and operation time, as it bypasses the iterative measurement and adjustment steps.

[0221] Once Ci is calculated, it is applied to the current source to modulate the driving current of the VCSEL array.This embodiment streamlines the generation of Ci by using the calibration-derived DCAL PJN directly. By eliminating the need for real-time current detection, this approach simplifies the control process while ensuring consistent driving current adjustments.

[0222] Building upon these implementations, the principles outlined for generating the current control code Ci based on DCAL PJN can be extended to manage the overcurrent threshold. By applying similar methodologies, the system can ensure safe and reliable operation by dynamically adjusting the overcurrent threshold in response to varying conditions. This approach not only maintains optimal performance but also enhances the protective measures within the Time-of-Flight (ToF) system, safeguarding against potential overcurrent situations.

[0223] It is furthermore understood that the same principle as described here with regard to the driving current may also be applied to the overcurrent threshold. In this case the desired driving current is exchanged by the overcurrent threshold with additionally considering the safety margin. The logic circuit 721 then outputs a corresponding threshold code Ti to the DAC 722, which leads to detection of an overcurrent condition as described with reference to Fig. 9 above. The threshold code Ti is a digital signal that causes the DAC 722 to output an analog current corresponding to the desired overcurrent threshold.

[0224] Fig. 15 illustrates a flowchart of the process performed by the emitter circuitry 10 described with reference to Fig. 6 above. At S71, the process performed by the emitter circuitry begins with a detection operation, where the detection section 62 senses signals related to the VCSELs 51. At S72, in a signal conditioning operation, the signal conditioning section 61 processes the current signal 90 by applying gain adjustment, filtering, and offset cancellation to ensure the signal is in a proper form and range for further analysis.

[0225] In the consecutive signal conversion operation at S73, the conversion section 71 performs analog-to-digital conversion on the current signal 90. At S745, the process ends with the control signal generation operation. In the control signal generation operation at S745, the control section 72 uses the current signal 90, configuration parameters 81 and calibration parameters 95 to generate a current control code 91. The control signal generation at S745 comprises S74 and S75 as discussed hereinabove with reference to Fig. 10.

[0226] Implementation example

[0227] Fig. 16 illustrates an implementation of an electronic device 1200 described in the present disclosure. The electronic device 1200 can be any of a variety of mobile devices, including butnot limited to smart glasses, smartphones, head-mount displays, smart watches, or any other form of device capable of implementing ToF systems. However, the electronic device may also be a host device of an electronic device 1 according to the present disclosure.

[0228] The electronic device 1200 comprises several components that work together to enable the ToF functionality. These components include a central processing unit (CPU) 1201, storage 1202, random access memory (RAM) 1203, a communication interface 1204, a receiver array control 1205, a laser emitter array control 1210, a hardware interface 1211, and a user interface 1212. The CPU 1201 is the primary processing unit of the electronic device 1200, responsible for executing instructions and managing the overall operation of the device. It processes data received from various sensors and components, including the ToF system, and performs calculations necessary for depth measurement and other functionalities.

[0229] The storage 1202 provides non-volatile memory for the electronic device 1200, storing system software, applications, and data. This may include the calibration parameters 95 and correction values used by the ToF system to ensure accurate and reliable operation.

[0230] The RAM 1203 is a volatile memory that provides temporary storage for data and instructions that the CPU 1201 needs to access on a short timescale. It is used to store intermediate results and data during the execution of programs, including those related to the ToF system. This may also include the calibration parameters 95 and correction values used by the ToF system to ensure accurate and reliable operation.

[0231] The communication interface 1204 enables the electronic device 1200 to communicate with other devices and networks. This can include wireless communication protocols such as Wi-Fi, Bluetooth, and cellular networks, allowing the device to transmit and receive data related to the ToF measurements and other functionalities.

[0232] The receiver array control 1205 enables managing the operation of the receiver array 3, which detects the reflected light rays (L2) from the scene or object. It processes the signals received by the receiver array 3 and provides the necessary data to the CPU 1201 for depth calculation. The laser emitter array control 1210 manages the operation of the VCSEL array 50, which emits the outgoing light rays (LI) towards the scene or object. It controls the VCSEL current, pulse repetition interval (PRI), duty cycle, and other parameters to ensure optimal illumination for the ToF measurements. The laser emitter array control 1210 also implements the calibration processdescribed in the present disclosure, ensuring that the driving current aligns with the reference slope (SlopeREF) and maintains consistent optical performance.

[0233] The hardware interface 1211 provides the necessary connections and interfaces between the various hardware components of the electronic device 1200 or other components that may be present in the electronic device 1200.

[0234] The user interface 1212 allows the user to interact with the electronic device 1200. This can include input methods such as touchscreens, buttons, and voice commands, as well as output methods such as displays and speakers. The user interface 1212 enables the user to control the ToF system and access the depth measurement data and other functionalities provided by the device.

[0235] All units and entities described in this specification and claimed in the appended claims can, if not stated otherwise, be implemented as integrated circuit logic, for example on a chip, and functionality provided by such units and entities can, if not stated otherwise, be implemented by software.

[0236] In so far as the embodiments of the disclosure described above are implemented, at least in part, using software-controlled data processing apparatus, it will be appreciated that a computer program providing such software control and a transmission, storage or other medium by which such a computer program is provided are envisaged as aspects of the present disclosure.

[0237] Note that the present technology can also be configured as described below.

[0238] (1) An electronic device comprising circuitry configured to determine, based on calibration parameters, a target current DCAL PJN, and generate, based on the target current DCAL PJN and a current signal indicating an electrical current of an emitter circuit, a control signal to control an operation of the emitter circuit.

[0239] (2) The electronic device according to (1), configured to further determine the target current DCAL p IN based on configuration parameters.

[0240] (3) The electronic device according to (2), wherein the calibration parameters define a lookup table configured to map the configuration parameters to the target current DCAL P IN.

[0241] (4) The electronic device according to (2) or (3), wherein the calibration parameters include an error slope Errorslope value and an offset Doffset value, wherein the error slope Errorslope and offset Doffset define a mapping function that maps the configuration parameters to the target current DCAL P IN.(5) The electronic device according to (4), wherein the configuration parameters comprise a number of illuminated dots Ndot and a duty ratio R.

[0242] (6) The electronic device according to (5), wherein the circuitry is configured to obtain the target current DCAL PJN based on an emitter configuration Config_P_IN, wherein the emitter configuration Config_P_IN is obtained by multiplying the number of illuminated dots Ndot by the duty ratio R.

[0243] (7) The electronic device according to (6), wherein the mapping function can be expressed as DCAL p IN = (Error slopexConfi g_P_IN Config_P2) x DREF_P2 + D offset, wherein Config_P2 is a preset configuration value.

[0244] (8) The electronic device according to (1), wherein the target current DCAL PJN indicates a desired electrical current of the emitter circuit.

[0245] (9) The electronic device according to (1) or (8), wherein the target current DCAL P IN indicates a desired current threshold for the emitter circuit.

[0246] (10) The electronic device according to any one of (1) to (9), wherein the circuitry is configured to determine a current control code Ci for controlling the electrical current of an emitter circuit based on the target current DCAL P IN and the current signal.

[0247] (11) The electronic device according to any one of (1) to (10), wherein the circuitry is configured to determine a threshold control code Ti for controlling the current of the emitter circuit based on the target current DCAL P IN and the current signal.

[0248] (12) The electronic device according to any one of (1) to (11), wherein the circuitry is configured to receive the current signal as a digital signal.

[0249] (13) The electronic device according to any one of (2) to (12), wherein the configuration parameters are sourced externally from a host device associated with the emitter circuit that controls the operation of the emitter circuit.

[0250] (14) The electronic device according to any one of (2) to (13), wherein the configuration parameters relate to an illumination recipe used by the host device to optimize the performance of the Time-of-Flight (ToF) system.

[0251] (15) The electronic device according to any one of (2) to (14), wherein the configuration parameters comprise a number of illuminated dots Ndot.(16) The electronic device according to (14) or (15), wherein the number of illuminated dots Ndot is a number of illuminated dots in a region of interest.

[0252] (17) The electronic device according to (14) or (15), wherein the number of illuminated dots Ndot is a number of dots illuminated by an emitter array comprising the emitter circuit.

[0253] (18) The electronic device according to any one of (2) to (17), wherein the configuration parameters comprise a duty ratio R of the emitter circuit.

[0254] (19) The electronic device according to any one of (1) to (18), wherein the circuitry is further configured to generate a protection flag when the electrical current of the emitter circuit exceeds an over current threshold.

[0255] (20) The electronic device according to any one of (1) to (19), wherein the circuitry is configured to obtain the current signal from a detection section that monitors the current of the emitter circuit.

[0256] (21) The electronic device according to (20), wherein the current signal indicates a driving current of a light emission element of the emitter circuit.

[0257] (22) The electronic device according to (21), wherein the light emission element is a Vertical-Cavity Surface-Emitting Laser (VCSEL).

[0258] (23) The electronic device according to any one of (1) to (22), wherein the emitter circuit is comprised in a VCSEL array.

[0259] (24) The electronic device according to (23), wherein the VCSEL array comprises a plurality of individually controllable VCSELs.

[0260] (25) The electronic device according to (24), wherein the detection section includes a current sensor and a signal conditioning section.

[0261] (26) The electronic device according to (25), wherein the signal conditioning section comprises a gain adjustment section, an offset cancellation section, and / or a filtering section.

[0262] (27) The electronic device according to any one of (1) to (26), wherein the circuitry includes a conversion section configured to perform analog-to-digital conversion on the signal.

[0263] (28) The electronic device according to any one of (1) to (27), wherein the emitter circuit is configured to emit light pulses with a specific duty ratio.(29) The electronic device according to any one of (1) to (28), wherein the circuitry is further configured to generate a control signal (Ci) based on a target current (DCAL PJN) and a current signal (Si), wherein the process for generating the a control signal involves either iterative adjustment or direct calculation to ensure the driving current of the emitter circuit aligns with the desired target current.

[0264] (30) The electronic device according to (29), wherein the circuitry iteratively adjusts the current control code (Ci) in a feedback loop to ensure the current signal (Si) converges to the target current (DCAL PJN).

[0265] (31) The electronic device according to (29), wherein the circuitry calculates the current control code (Ci) based on a mathematical formula involving the target current (DCAL P IN) and the current signal (Si).

[0266] (32) The electronic device according to (29), wherein the circuitry calculates the current control code (Ci) directly from the target current (DCAL P IN) without detecting the current signal (Si). (33) The electronic device according to (20), wherein the detection section comprises a PMOS transistor configured to control the current of the emitter circuit; and a replica transistor configured to mirror the current flowing through the PMOS transistor to generate the current signal indicating the electrical current of the emitter circuit.

[0267] (34) The electronic device according to any one of (1) to (33), wherein the circuitry is further configured to perform the calibration process to obtain the calibration parameters.

[0268] (35) An apparatus comprising the electronic device according to any one of (1) to (34), the apparatus being configured to generate depth information based on measuring a time taken for light to travel from the emitter circuit to an object and back to a receiver array.

[0269] (36) The apparatus according to (35), wherein the apparatus is configured to operate using either Direct Time-of-Flight (dToF) or Indirect Time-of-Flight (iToF) techniques.

[0270] (37) A control method comprising: determining, based on calibration parameters, a target current DCAL p IN, and generating, based on the target current DCAL P IN and a current signal indicating an electrical current of an emitter circuit, a control signal to control an operation of the emitter circuit.

[0271] (38) A computer program that, when executed by circuitry, causes the circuitry to execute the method according to (37).LIST OF REFERENCE SIGNS LI - Outgoing light ray

[0272] L2 - Reflected light ray

[0273] 1 - Time-of-Flight apparatus

[0274] 2 - Emitter

[0275] 3 - Receiver array

[0276] 4 - Control circuitry

[0277] 10 - Emitter circuitry

[0278] 20 - VCSEL driving circuit

[0279] 22 - Current sensor

[0280] 23-1, 23-n - VCSELs

[0281] 24-1, ..., 24-n - Drive transistors

[0282] 25-1, ..., 25-n - Ground transistors

[0283] 26-1, ..., 26-n - Ground nodes

[0284] 30 - Structured illumination pattern

[0285] 31 - Individual illumination spots

[0286] 41a - Framed picture

[0287] 42a - Standing lamp

[0288] 43a - Sofa

[0289] 41, 42, 43 - Regions of Interest (Rols)

[0290] 50 - VCSEL array

[0291] 51 - Individual VCSELs

[0292] 51-1, 51-2, ... 51-n - VCSEL circuits

[0293] 52 - VCSEL

[0294] 53 - Current source

[0295] 54 - Ground60 - Detection and conditioning section

[0296] 61 - Signal conditioning section

[0297] 62 - Detection section

[0298] 62-1, ...62-n - Detection sections

[0299] 70 - Conversion and control section

[0300] 71 - Conversion section

[0301] 72 - Controller section

[0302] 80 - Protection flag

[0303] 81 - Configuration parameters

[0304] 90 - Current signal

[0305] 91 - Current control code

[0306] 95 - Calibration parameters

[0307] 101 - ID AC (Current Digital -to- Analog Converter) 102 - Capacitor

[0308] 103a, 103b, 103c - Low pass filters

[0309] 104 - Comparator

[0310] 105 - ADC (Analog-to-Digital Converter)

[0311] 106 - Ground node

[0312] 107 - Variable resistor

[0313] 1200 - Electronic device

[0314] 1201 - CPU (Central Processing Unit)

[0315] 1202 - Storage

[0316] 1203 - RAM (Random Access Memory)

[0317] 1204 - Communication interface

[0318] 1205 - Receiver array control

[0319] 1210 - Laser emitter array control1211 - Hardware interface

[0320] 1212 - User interface

[0321] 622 - PMOS transistor

[0322] 623 - PMOS Replica

[0323] 625 - Differential amplifier

[0324] 626 - Adjustment transistor

[0325] 721 - Logic circuit

[0326] 722 - DAC (Digital-to-Analog Converter)

Claims

CLAIMS1. An electronic device comprising circuitry configured todetermine, based on calibration parameters, a target current, andgenerate, based on the target current and a current signal indicating an electrical current of an emitter circuit, a control signal to control an operation of the emitter circuit.

2. The electronic device of claim 1, configured to further determine the target current based on configuration parameters.

3. The electronic device of claim 2, wherein the calibration parameters define a lookup table configured to map the configuration parameters to the target current.

4. The electronic device of claim 2, wherein the calibration parameters include an error slope value and an offset value, wherein the error slope and offset define a mapping function that maps the configuration parameters to the target current.

5. The electronic device of claim 4, wherein the configuration parameters comprise a number of illuminated dots and a duty ratio.

6. The electronic device of claim 5, wherein the circuity is configured to obtain the target current based on an emitter configuration, wherein the emitter configuration is obtained by multiplying the number of illuminated dots by the duty ratio.

7. The electronic device of claim 6, wherein the mapping function can be expressed as DCAL P IN = Errorslopex(Config_P_IN Config_P2) x DREF_P2 + D offset, wherein Config_P2 is a preset configuration value.

8. The electronic device of claim 1, wherein the target current indicates a desired electrical current of the emitter circuit.

9. The electronic device of claim 1, wherein the target current indicates a desired current threshold for the emitter circuit.

10. The electronic device of claim 1, wherein the circuitry is configured to determine a current control code for controlling the electrical current of an emitter circuit based on the target current and the current signal.

11. The electronic device of claim 1, wherein the circuitry is configured to determine a threshold control code for controlling the current of the emitter circuit based on the target current and the current signal.

12. The electronic device of claim 1, wherein the circuity is configured to receive the current signal as a digital signal.

13. The electronic device of claim 2, wherein the configuration parameters are sourced externally from a host device associated with the emitter circuit that controls the operation of the emitter circuit.

14. The electronic device of claim 2, wherein the configuration parameters relate to an illumination recipe used by the host device to optimize the performance of the Time-of-Flight system.

15. The electronic device of claim 2, wherein the configuration parameters comprise a number of illuminated dots.

16. The electronic device of claim 14, wherein the number of illuminated dots is a number of illuminated dots in a region of interest.

17. The electronic device of claim 14, wherein the number of illuminated dots is a number of dots illuminated by an emitter array comprising the emitter circuit.

18. The electronic device of claim 2, wherein the configuration parameters comprise a duty ratio of the emitter circuit.

19. The electronic device of claim 1, wherein the circuitry is further configured to generate a protection flag when the electrical current of the emitter circuit exceeds an overcurrent threshold.

20. The electronic device of claim 1, wherein the circuity is configured to obtain the current signal from a detection section that monitors the current of the emitter circuit.

21. The electronic device of claim 20, wherein the current signal indicates a driving current of a light emission element of the emitter circuit.

22. The electronic device of claim 21, wherein the light emission element is a Vertical-Cavity Surface-Emitting Laser.

23. The electronic device of claim 1, wherein the emitter circuit is comprised in a VCSEL array.

24. The electronic device of claim 23, wherein the VCSEL array comprises a plurality of individually controllable VCSELs.

25. The electronic device of claim 24, wherein the detection section includes a current sensor and a signal conditioning section.

26. The electronic device of claim 25, wherein the signal conditioning section comprises a gain adjustment section, an offset cancellation section, and / or a filtering section.

27. The electronic device of claim 1, wherein the circuitry includes a conversion section configured to perform analog-to-digital conversion on the signal.

28. The electronic device of claim 1, wherein the emitter circuit is configured to emit light pulses with a specific duty ratio.

29. The electronic device according to claim 1, wherein the circuitry is further configured to generate a control signal based on a target current and a current signal, wherein the process for generating the control signal involves either iterative adjustment or direct calculation to ensure the driving current of the emitter circuit aligns with the desired target current.

30. The electronic device of claim 20, wherein the detection section comprisesa PMOS transistor configured to control the current of the emitter circuit; anda replica transistor configured to mirror the current flowing through the PMOS transistor to generate the current signal indicating the electrical current of the emitter circuit.

31. The electronic device of claim 1, wherein the circuitry is further configured to perform the calibration process to obtain the calibration parameters.

32. An apparatus comprising the electronic device of claim 1, the apparatus being configured to generate depth information based on measuring a time taken for light to travel from the emitter circuit to an object and back to a receiver array.

33. The apparatus of claim 32, wherein the apparatus is configured to operate using either Direct Time-of-Flight or Indirect Time-of-Flight techniques.

34. A control method comprising:determine, based on calibration parameters, a target current, andgenerate, based on the target current and a current signal indicating an electrical current of an emitter circuit, a control signal to control an operation of the emitter circuit.

35. A computer program that, when executed by circuitry, causes the circuitry to execute the method according to claim 34.

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