Multilayer ceramic capacitor
Patent Information
- Application Number
- PCT/JP2025/011365
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-03-24
- Publication Date
- 2026-10-01
Smart Images
Figure JP2025011365_01102026_PF_FP_ABST
Abstract
Description
Multilayer ceramic capacitor
[0001] This invention relates to a multilayer ceramic capacitor.
[0002] With advancements in electronic components and equipment, further miniaturization and increased capacitance of multilayer ceramic capacitors are expected. Furthermore, as the applications of multilayer ceramic capacitors expand, the demand for improved reliability is increasing. Therefore, there is a need for multilayer ceramic capacitors that offer high insulation properties, minimal degradation even at high temperatures, and superior reliability, while simultaneously allowing for thinner dielectric ceramic layers.
[0003] Patent Document 1 discloses a multilayer ceramic capacitor comprising a capacitor body formed by alternately stacking dielectric layers and internal electrode layers, wherein the dielectric layer consists of crystalline particles and grain boundary phases made of a perovskite-type composite oxide containing metal elements Ba, Ti, rare earth elements, Mg, and Mn, and the crystalline particles contain Mg, Mn, and rare earth elements, and these Mg, Mn, and rare earth elements have a concentration gradient in which the concentration increases from the center of the crystalline particle to the particle surface, and the concentration gradient of the rare earth elements among the Mg, Mn, and rare earth elements is 0.02 atomic% / nm or more.
[0004] Japanese Patent Publication No. 2005-217000
[0005] According to Patent Document 1, as described above, by having a concentration gradient in the crystalline particles constituting a dielectric ceramic in which the concentration increases from the center to the particle surface, and by defining the concentration gradient of rare earth elements in particular among these elements, it is possible to obtain a material that satisfies capacitance-temperature characteristics while improving relative permittivity and high-temperature load life.
[0006] However, in the multilayer ceramic capacitor described in Patent Document 1, the concentration distribution of rare earth elements in the dielectric ceramic layer is non-uniform. Therefore, when the dielectric ceramic layer is thinned, there is a risk that the resistance to degradation of the insulation resistance (IR) under high temperature and high voltage loads will decrease.
[0007] This invention was made to solve the above problems and aims to provide a multilayer ceramic capacitor that exhibits excellent electrical reliability and is less prone to deterioration of insulation resistance under high temperature and high voltage loads.
[0008] The multilayer ceramic capacitor of the present invention comprises a base body including a plurality of dielectric ceramic layers and a plurality of internal electrode layers stacked in the stacking direction, and an external electrode provided on the surface of the base body and electrically connected to the internal electrode layer. The dielectric ceramic layer mainly contains a perovskite-type oxide. The perovskite-type oxide contains at least one of barium (Ba), calcium (Ca), and strontium (Sr), at least one of titanium (Ti) and zirconium (Zr), and at least one of a rare earth element (Re). In the central region of the grain surrounded by grain boundaries, which is analyzed based on a bright-field image of the dielectric ceramic layer taken by STEM (scanning transmission electron microscope), when the elemental concentration ratio expressed as Re / (Ti+Zr) converted to atom%, is determined by point analysis using a STEM-EDS (scanning transmission electron microscope-energy dispersive X-ray spectroscopy) instrument, there are multiple crystal grains that satisfy 0.03 < Re / (Ti+Zr) < 0.10. When analyzing the particle diameter of the crystal particles based on images taken by a scanning electron microscope (SEM), D10 is defined as the equivalent circular diameter calculated from the area representing 10% of the cumulative area distribution of the crystal particles present in the dielectric ceramic layer in the SEM image, and D50 is defined as the equivalent circular diameter calculated from the area representing 50% of the cumulative area. Then, the particle diameter ratio expressed as D10 / D50 satisfies 0.4 < D10 / D50 < 1.0.
[0009] According to the present invention, it is possible to provide a multilayer ceramic capacitor that is less prone to deterioration of insulation resistance under high temperature and high voltage loads and has excellent electrical reliability.
[0010] Figure 1 is a schematic perspective view showing an example of a multilayer ceramic capacitor of the present invention. Figure 2 is an example of an LT cross-sectional view of the multilayer ceramic capacitor shown in Figure 1, including the length direction L along the line II-II and the stacking direction T. Figure 3 is an example of a WT cross-sectional view of the multilayer ceramic capacitor shown in Figure 1, including the width direction W along the line III-III and the stacking direction T. Figure 4 is an example of a bright-field image of the dielectric ceramic layer and the internal electrode layer taken with a scanning transmission electron microscope. Figure 5 is an explanatory diagram of the crystal grain to be analyzed. Figure 6 is an explanatory diagram of a rectangle circumscribing the grain. Figure 7 is an explanatory diagram of the center point of the grain. Figure 8 is an explanatory diagram of the central region of the grain.
[0011] The multilayer ceramic capacitor of the present invention will be described below. However, the present invention is not limited to the following embodiments, and can be modified and applied as appropriate without altering the essence of the invention. Furthermore, a combination of two or more of the preferred configurations described in the following embodiments also constitutes the present invention.
[0012] In this specification, terms describing relationships between elements (e.g., "perpendicular," "parallel," "orthogonal," etc.) and terms describing the shapes of elements do not represent only strict meanings, but also include a range of substantially equivalent terms, such as differences of a few percent.
[0013] The following diagrams are schematic representations, and their dimensions, aspect ratios, and scales may differ from those of the actual product. The same reference numerals are used for identical or equivalent parts in the diagrams. Furthermore, identical elements are denoted by the same reference numerals in each diagram, and redundant explanations are omitted.
[0014] Figure 1 is a schematic perspective view showing an example of the multilayer ceramic capacitor of the present invention.
[0015] The multilayer ceramic capacitor 1 shown in Figure 1 comprises a base body 10 and external electrodes 11 and 12 provided on the surface of the base body 10. In the base body 10, the length direction, width direction, and stacking direction are defined by arrows L, W, and T, respectively.
[0016] The element body 10 has, for example, a rectangular parallelepiped shape. In this case, the element body 10 includes a first main surface 10a and a second main surface 10b opposed to each other in the lamination direction T, a first side surface 10c and a second side surface 10d opposed to each other in the width direction W orthogonal to the lamination direction T, and a first end surface 10e and a second end surface 10f opposed to each other in the length direction L orthogonal to both the lamination direction T and the width direction W.
[0017] At least one of corners and ridge portions of the element body 10 may be rounded. Here, the corner is a portion where three surfaces of the element body 10 intersect, and the ridge portion is a portion where two surfaces of the element body 10 intersect.
[0018] The external electrode 11 is provided on the first end surface 10e of the element body 10. The external electrode 11 may extend partially onto the first main surface 10a, the second main surface 10b, the first side surface 10c and the second side surface 10d of the element body 10.
[0019] The external electrode 12 is provided on the second end surface 10f of the element body 10. The external electrode 12 may extend partially onto the first main surface 10a, the second main surface 10b, the first side surface 10c and the second side surface 10d of the element body 10.
[0020] The dimensions of the multilayer ceramic capacitor 1 are not particularly limited. For example, the dimension of the element body 10 in the length direction L is 0.2 mm or more and 5.7 mm or less, the dimension of the element body 10 in the width direction W is 0.1 mm or more and 5.0 mm or less, and the dimension of the element body 10 in the lamination direction T is 0.1 mm or more and 5.0 mm or less.
[0021] FIG. 2 is an example of an LT cross-sectional view including the length direction L and the lamination direction T along the line II-II of the multilayer ceramic capacitor shown in FIG. 1. FIG. 3 is an example of a WT cross-sectional view including the width direction W and the lamination direction T along the line III-III of the multilayer ceramic capacitor shown in FIG. 1.
[0022] The element body 10 includes a plurality of dielectric ceramic layers 20 and a plurality of internal electrode layers 30 laminated in the lamination direction T.
[0023] The internal electrode layers 30 include first internal electrode layers 31 and second internal electrode layers 32 that are alternately arranged in the lamination direction T.
[0024] The first internal electrode layer 31 extends to the first end face 10e of the base body 10, where it is electrically connected to the external electrode 11.
[0025] The second internal electrode layer 32 extends to the second end face 10f of the base body 10, where it is electrically connected to the external electrode 12.
[0026] The first internal electrode layer 31 and the second internal electrode layer 32, which face each other with the dielectric ceramic layer 20 in between, are not electrically connected. Therefore, when a voltage is applied between the first internal electrode layer 31 and the second internal electrode layer 32 via the external electrodes 11 and 12, charge accumulates. The accumulated charge generates capacitance, thereby enabling the device to function as a capacitive element.
[0027] As shown in Figures 2 and 3, an outer layer 45 consisting only of dielectric ceramic layers 20 may be provided on the outside of the plurality of dielectric ceramic layers 20 and plurality of internal electrode layers 30 stacked in the stacking direction T. The outer layer 45 is located on both main surfaces of the base body 10 and is a dielectric ceramic layer located between each main surface and the internal electrode layer 30 closest to that main surface. On the other hand, the region sandwiched between both outer layer 45s, in which the internal electrode layers 30 exposed on different end faces of the base body 10 face each other in the stacking direction T via the dielectric ceramic layer 20, can also be called the inner layer 40.
[0028] The dielectric ceramic layer 20 is composed of ceramic. Specifically, the dielectric ceramic layer 20 mainly contains perovskite-type oxide. Alternatively, it can be said that the dielectric ceramic layer 20 is composed of a sintered body of perovskite-type oxide.
[0029] In this specification, the main component means the component that accounts for the largest mass percentage in the ceramic. The mass percentage of the main component is not particularly limited as long as it is less than 100% by mass, and may be, for example, 50% by mass or more, 60% by mass or more, 70% by mass or more, 80% by mass or more, or 90% by mass or more.
[0030] The perovskite-type oxide contained as the main component in the dielectric ceramic layer 20 includes at least one of barium (Ba), calcium (Ca), and strontium (Sr), at least one of titanium (Ti) and zirconium (Zr), and at least one of rare earth elements (Re).
[0031] The above perovskite-type oxide preferably contains at least Ba among Ba, Ca, and Sr, and more preferably contains at least one of Ca and Sr. On the other hand, the above perovskite-type oxide preferably contains at least Ti among Ti and Zr. In particular, the above perovskite-type oxide preferably contains Ba, Ca, and Ti.
[0032] The perovskite-type oxide included as the main component in the dielectric ceramic layer 20 is, for example, barium titanate (BaTiO2). ３ It is a compound of the ) system. BaTiO ３ It is a ferroelectric material that exhibits a tetragonal crystal structure at room temperature and has a high dielectric constant. Therefore, BaTiO ３ By using a compound system as the main component, the dielectric constant of the dielectric ceramic layer 20 can be increased, making it possible to increase the capacitance of the capacitor.
[0033] For example, a perovskite-type oxide is BaTiO ３ If it is a compound system, then BaTiO ３ The compound system is BaTiO ３ The compound may be one in which part of the Ba and / or Ti contained in it is substituted with other elements. For example, part of the Ba may be substituted with alkaline earth metal elements such as Ca and Sr, and part of the Ti may be substituted with transition metal elements such as Zr and hafnium (Hf). Furthermore, BaTiO ３ The molar ratio of A-site elements (Ba, Ca, Sr, etc.) to B-site elements (Ti, Zr, Hf, etc.) in a compound (hereinafter also referred to as the A / B ratio) is not strictly limited to 1:1. As long as the perovskite crystal structure is maintained, deviations in the molar ratio between A-site and B-site elements are acceptable.
[0034] Rare earth elements (Re) is a general term for elements constituting the group consisting of scandium (Sc) with atomic number 21, yttrium (Y) with atomic number 39, and lanthanum (La) with atomic number 57 to lutetium (Lu) with atomic number 71 in the periodic table. The perovskite oxide may contain one type of rare earth element (Re), or may contain a combination of a plurality of types of rare earth elements (Re).
[0035] The inclusion of rare earth element (Re) in the dielectric ceramic layer 20 can improve various characteristics such as the reliability of the multilayer ceramic capacitor 1 and the temperature characteristics of the dielectric constant. BaTiO ３ Perovskite oxides such as based compounds may contain many oxygen vacancies generated in the firing process. These oxygen vacancies tend to lower insulation resistance when accompanied by electron compensation, and also tend to migrate under an electric field to cause a time-dependent decrease in insulation resistance. Therefore, when the dielectric ceramic layer 20 contains a rare earth element (Re), BaTiO ３ It tends to form a solid solution at the A-site (for example, Ba site) or B-site (for example, Ti site) of perovskite oxides such as based compounds. The solid-dissolved rare earth element (Re) acts as a donor or an acceptor, hindering the migration of oxygen vacancies or suppressing the generation of conduction electrons. Therefore, the deterioration of insulation resistance is reduced, and the high-temperature load life is improved. In addition, BaTiO ３ Perovskite oxides such as based compounds have large temperature dependence of dielectric constant near the Curie temperature Tc. Therefore, BaTiO ３ By causing a rare earth element (Re) to form a solid solution in a perovskite oxide such as a based compound, it becomes possible to make the temperature change of the dielectric constant flatter over a wide range including the Curie temperature Tc.
[0036] The type of rare earth element (Re) is not particularly limited, but it is preferable that the rare earth element (Re) includes at least one selected from the group consisting of yttrium (Y), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu), and it is more preferable that it includes dysprosium (Dy). Dy is an element located near the middle of the lanthanide group in the periodic table, and its ionic radius is also of an intermediate size. Therefore, BaTiO ３ The material can be solid-solved in both the A site (e.g., the Ba site) and the B site (e.g., the Ti site) of perovskite-type oxides such as system compounds, which is effective in improving reliability. The dielectric ceramic layer 20 may contain only Dy as the rare earth element (Re), or it may contain other rare earth elements (Re) together with Dy.
[0037] The dielectric ceramic layer 20 may further contain elements other than the barium (Ba), calcium (Ca), strontium (Sr), titanium (Ti), zirconium (Zr), and rare earth elements (Re) mentioned above. For example, the dielectric ceramic layer 20 may contain at least one of magnesium (Mg), manganese (Mn), silicon (Si), and vanadium (V) as a minor component.
[0038] Figure 4 shows an example of a bright-field scanning transmission electron microscope image of the dielectric ceramic layer and the internal electrode layer.
[0039] In the field of view of the scanning transmission electron microscope (STEM) shown in Figure 4, the dielectric ceramic layer 20 is characterized by the presence of multiple crystal grains in the central region of the grains surrounded by grain boundaries, where, when the elemental concentration ratio expressed as Re / (Ti+Zr) converted to atom percent is determined by point analysis using a STEM-EDS (scanning transmission electron microscope-energy dispersive X-ray spectroscopy) instrument, the following condition is met: 0.03 < Re / (Ti+Zr) < 0.10. This means that, to some extent, crystal grains in which a certain amount of rare earth element (Re) is solid-dissolved exist in the dielectric ceramic layer 20 near the center of the grains.
[0040] In the dielectric ceramic layer 20 as observed by STEM, it is preferable that 90% or more of the crystalline particles satisfy 0.03 < Re / (Ti+Zr) < 0.10. That is, it is preferable that 90% or more of the crystalline particles satisfy 0.03 < Re / (Ti+Zr) < 0.10 in terms of number proportion, relative to the total number of crystalline particles present in the dielectric ceramic layer 20 as observed by STEM.
[0041] Furthermore, although not shown in the figures, in the multilayer ceramic capacitor 1, when the particle diameter of the crystal particles analyzed based on images taken by an SEM (scanning electron microscope) is defined as follows: D10 is the equivalent circle diameter calculated from the area representing 10% of the cumulative area distribution of crystal particles present in the dielectric ceramic layer 20 in the SEM image, and D50 is the equivalent circle diameter calculated from the area representing 50% of the cumulative area, the particle diameter ratio expressed as D10 / D50 satisfies 0.4 < D10 / D50 < 1.0.
[0042] The particle size ratio, expressed as D10 / D50, is an index that reflects the proportion of fine crystalline particles contained in the dielectric ceramic layer 20. The closer this value is to 1.0, the sharper the distribution of fine particles in the particle size distribution, meaning there are fewer fine crystalline particles. Conversely, the smaller this value is, the more fine crystalline particles are present. Rare earth elements have the effect of improving the resistance to degradation of insulation resistance, but as grain growth progresses, they solid-solve towards the center of the particle, so fine crystalline particles have a relatively low concentration of rare earth elements. As a result, the closer the D10 / D50 particle size ratio is to 1.0, the better the resistance to degradation of insulation resistance.
[0043] In the embodiment described later, a multilayer ceramic capacitor 1 has a length L dimension of the base body 10 of 3.2 mm, a width W dimension of the base body 10 of 1.6 mm, a dielectric ceramic layer 20 thickness of 1.7 μm, and 200 layers of dielectric ceramic layer 20 in the inner layer portion 40, and is subjected to a load of 160°C and 60V. In this case, by setting the particle size ratio of D10 / D50 to 0.4 < D10 / D50 < 1.0, the MTTF (mean time to failure) can be set to 80 hours or more.
[0044] From the viewpoint of improving the resistance to degradation of insulation resistance, it is preferable that the particle size ratio of the crystal grains satisfies 0.5 < D10 / D50 < 1.0.
[0045] As described above, the closer the D10 / D50 particle size ratio is to 1.0, the better the resistance to degradation of insulation resistance. However, if there are too few fine crystalline particles in the dielectric ceramic layer 20, the humidity resistance reliability tends to decrease due to a reduction in density. Therefore, the particle size ratio of the crystalline particles may satisfy D10 / D50 < 0.9.
[0046] The equivalent circular diameter D50 of the crystal grains is not particularly limited and may be, for example, 50 nm or more and 400 nm or less, 100 nm or more and 350 nm or less, or 150 nm or more and 300 nm or less. In the examples described later, the equivalent circular diameter D50 of the crystal grains is in the range of 180 nm or more and 270 nm or less.
[0047] The thickness of the dielectric ceramic layer 20 in the inner layer 40 is not particularly limited and may be, for example, 5.0 μm or less, 4.0 μm or less, 3.5 μm or less, 2.5 μm or less, 2.0 μm or less, 1.0 μm or less, or 0.8 μm or less. On the other hand, the thickness of the dielectric ceramic layer 20 in the inner layer 40 may be, for example, 0.3 μm or more, 0.4 μm or more, 0.5 μm or more, 0.6 μm or more, or 0.7 μm or more. If the thickness of the dielectric ceramic layer 20 is within the above range, deterioration of the insulating properties can be prevented. Furthermore, if the thickness of the dielectric ceramic layer 20 is within the above range, the dielectric ceramic layer 20 can be made thinner, and the capacitance can be improved.
[0048] The number of layers of dielectric ceramic layer 20 in the inner layer 40 is, for example, 50 or more and 1000 or less.
[0049] The thickness of the outer layer 45 (dimension in the lamination direction T) is not particularly limited and may be, for example, 110 μm or less, 80 μm or less, or 60 μm or less. On the other hand, the thickness of the outer layer 45 may be, for example, 20 μm or more, 30 μm or more, 40 μm or more, or 50 μm or more. The thicknesses of the outer layer 45 may be the same or different.
[0050] The ceramic material constituting the outer layer 45 may be the same as or different from the ceramic material of the dielectric ceramic layer 20 contained in the inner layer 40. For example, the ceramic material constituting the outer layer 45 may or may not satisfy the above-mentioned elemental concentration ratio of Re / (Ti+Zr) and particle size ratio of D10 / D50.
[0051] The internal electrode layer 30 contains a conductive metal. Examples of conductive metals include nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), and alloys containing at least one of these metals. The internal electrode layer 30 may also contain other components besides the conductive metal. Examples of other components include ceramic components that act as co-materials. Examples of ceramic components include BaTiO contained in the dielectric ceramic layer 20. ３ Examples include compound systems.
[0052] The thickness of the internal electrode layer 30 is not particularly limited, and is, for example, 0.3 μm or more and 0.7 μm or less. When the thickness of the internal electrode layer 30 is within the above range, defects such as electrode breaks are suppressed. Furthermore, when the thickness of the internal electrode layer 30 is within the above range, the decrease in the proportion of the electrically functional dielectric ceramic layer 20 in the capacitor is suppressed, making it possible to suppress a decrease in capacitance.
[0053] The thickness of the dielectric ceramic layer 20 and the internal electrode layer 30 is determined by observing the WT cross-section of the exposed substrate 10 by polishing using a scanning electron microscope (SEM). The thickness (dimension in the stacking direction T) is measured along a total of five lines: a center line passing through the center of the WT cross-section along the stacking direction T, and two equally spaced lines drawn on both sides of this center line. The average of these five measured values is then used.
[0054] The configuration of the external electrodes 11 and 12 is not particularly limited. The external electrodes 11 and 12 may have a laminated structure consisting of a base layer, a first plating layer, and a second plating layer, starting from the end face side of the multilayer ceramic capacitor 1. The base layer contains a metal such as nickel (Ni) or copper (Cu). The base layer may also contain ceramic powder as a co-material in addition to the metal. The first plating layer is, for example, a nickel (Ni) plating layer. The second plating layer is, for example, a tin (Sn) plating layer. A conductive resin layer may be provided between the base layer and the first plating layer. The conductive resin layer is a layer containing conductive metal particles such as copper (Cu), silver (Ag), and nickel (Ni), and resin. The external electrodes 11 and 12 are not limited in their form as long as they are electrically connected to the internal electrode layer 30 and function as external input / output terminals.
[0055] The manufacturing method of the multilayer ceramic capacitor of the present invention is not limited, as long as the above-mentioned requirements are satisfied.
[0056] The present invention provides a method for manufacturing a multilayer ceramic capacitor, comprising the steps of: preparing a green sheet containing, for example, at least one of barium (Ba), calcium (Ca), and strontium (Sr), at least one of titanium (Ti) and zirconium (Zr), and at least one of a rare earth element (Re) (green sheet preparation step); applying a conductive paste to the surface of the green sheet to obtain a green sheet with an internal electrode pattern formed on it (electrode pattern formation step); stacking and pressing a plurality of green sheets to obtain a laminated block (lamination step); cutting the obtained laminated block to obtain a laminated chip (cutting step); subjecting the obtained laminated chip to a binder removal process and a firing process to obtain a base body (firing step); and forming external electrodes on the obtained base body (external electrode formation step). Details of each step are described below.
[0057] <Green Sheet Manufacturing Process> In the green sheet manufacturing process, a green sheet is manufactured containing at least one of barium (Ba), calcium (Ca), and strontium (Sr), at least one of titanium (Ti) and zirconium (Zr), and at least one of rare earth elements (Re). The green sheet is a precursor of the dielectric ceramic layer and contains the main component raw material and additive raw material of the dielectric ceramic layer. The method for manufacturing the green sheet is not particularly limited. For example, a dielectric raw material can be manufactured by mixing the additive raw material with the main component raw material, a binder and a solvent can be added and mixed to the obtained dielectric raw material to form a slurry, and a green sheet can be formed from the obtained slurry.
[0058] For example, BaTiO ３ A powder of the compound is used. BaTiO ３ The compound can be synthesized using known ceramic synthesis methods such as solid-phase reaction, hydrothermal synthesis, or alkoxide synthesis, using known ceramic raw materials such as oxides, carbonates, hydroxides, nitrates, organic acid salts, alkoxides, and / or chelate compounds.
[0059] BaTiO ３ When synthesizing compound iontochemistry, for example, in addition to Ba, Ti, and Re raw materials, Ca, Sr, Zr, etc., as needed, are wet-mixed in a ball mill, dried, and then heated. At this time, in order to facilitate the solid solution of the element Re, the Re raw material may be pre-milled (also called fine powdering). Furthermore, in order to facilitate the solid solution of elements such as Re, Ca, Sr, and Zr, the wet-mixing and heating process may be repeated after heating.
[0060] As the Ba raw material, known ceramic raw materials such as Ba oxides, carbonates, acetates, hydroxides, and chlorides can be used.
[0061] As the Ti raw material, known ceramic raw materials such as Ti oxides, acetates, and chlorides can be used.
[0062] As the Re raw material, known ceramic raw materials such as Re oxides, carbonates, acetates, and hydroxides can be used.
[0063] As the Ca raw material, known ceramic raw materials such as Ca oxides and carbonates are used.
[0064] As the Sr raw material, known ceramic raw materials such as Sr oxides and carbonates are used.
[0065] As the Zr raw material, known ceramic raw materials such as Zr oxides, acetates, and chlorides can be used.
[0066] The additive raw materials may also include raw materials for other additive components such as Mg, Mn, Si, V, and Al. Furthermore, the main component is BaTiO ３ To adjust the composition of the compound system, barium carbonate (BaCO3) is used. ３ ) and titanium dioxide (TiO ２ Ba raw materials and Ti raw materials such as ) may be added to the additive raw materials.
[0067] Slurry formation can be carried out by known methods; for example, by mixing an organic binder and an organic solvent with the dielectric material. As the organic binder, known binders such as polyvinyl butyral-based binders can be used. As the organic solvent, known solvents such as toluene and ethanol can be used. Additives such as plasticizers may be added to the slurry as needed. Furthermore, the green sheet can be formed by known methods such as the doctor blade method or the lip method.
[0068] <Electrode Pattern Formation Process> In the electrode pattern formation process, a conductive paste is applied to the surface of a green sheet to obtain a green sheet with an internal electrode pattern formed on it. The internal electrode pattern becomes the internal electrode layer after firing. Conductive metals included in the conductive paste include, for example, conductive materials such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), and alloys containing these. In addition, ceramic components that act as co-materials may be added to the conductive paste. As ceramic components, for example, the main component raw materials of dielectric ceramic layers may be used. The conductive paste can be applied by known methods such as screen printing or gravure printing.
[0069] <Lamination Process> In the lamination process, multiple green sheets are laminated and compressed to obtain a laminated block. Green sheets with internal electrode patterns are used as the green sheets, but some green sheets without internal electrode patterns may also be used. Lamination and compression can be carried out by known methods.
[0070] <Cutting Process> In the cutting process, the obtained laminated block is cut to obtain a laminated chip. The cutting should be performed in such a way that a chip of a predetermined size is obtained and at least a portion of the internal electrode pattern is exposed on the end face of the laminated chip.
[0071] <Firing Process> In the firing process, the obtained laminated chip is subjected to a binder removal process and a firing process to obtain a base material. The firing process causes the green sheet and the internal electrode pattern to co-sinter, forming the dielectric ceramic layer and the internal electrode layer, respectively. The conditions for the binder removal process should be determined according to the type of organic binder contained in the green sheet and the internal electrode pattern. The firing process should be performed at a temperature at which the laminated chip becomes sufficiently dense. The firing process is performed, for example, with the main component BaTiO ３ The process is carried out in an atmosphere that prevents the reduction of the compound and suppresses the oxidation of the conductive metal. Furthermore, additional heat treatment may be performed after firing at an appropriate temperature and atmosphere.
[0072] <External Electrode Formation Process> In the external electrode formation process, external electrodes are formed on the obtained base material. The external electrodes can be formed by known methods. For example, they can be formed by applying and baking a conductive paste containing a metal such as silver (Ag), copper (Cu), and / or nickel (Ni) onto the end face of the base material exposed after the internal electrode layer has been drawn out. Alternatively, they can be formed by applying a conductive paste to both end faces of the laminated chip before firing and then performing a firing process. Furthermore, the formed electrodes can be used as a base layer, and a plating film of nickel (Ni) or tin (Sn) can be formed on top of it. A multilayer ceramic capacitor is then manufactured.
[0073] This specification discloses the following:
[0074] <1> A substrate comprising a plurality of dielectric ceramic layers and a plurality of internal electrode layers stacked in the stacking direction, and an external electrode provided on the surface of the substrate and electrically connected to the internal electrode layer, wherein the dielectric ceramic layer mainly contains a perovskite-type oxide, and the perovskite-type oxide contains at least one of barium (Ba), calcium (Ca), and strontium (Sr), at least one of titanium (Ti) and zirconium (Zr), and at least one of rare earth elements (Re), and in the central region of the grain surrounded by grain boundaries analyzed based on a bright-field image of the dielectric ceramic layer taken by STEM (scanning transmission electron microscope), when the elemental concentration ratio expressed as Re / (Ti+Zr) converted to atom%, is determined by point analysis using a STEM-EDS (scanning transmission electron microscope-energy dispersive X-ray spectroscopy) instrument, there are multiple crystal grains that satisfy 0.03 < Re / (Ti+Zr) < 0.10. A multilayer ceramic capacitor in which, when the particle diameter of the crystal particles analyzed based on images taken by an SEM (scanning electron microscope) is defined as follows: D10 is the equivalent circle diameter calculated from the area representing 10% of the cumulative area distribution of the crystal particles present in the dielectric ceramic layer in the SEM image, and D50 is the equivalent circle diameter calculated from the area representing 50% of the cumulative area; the particle diameter ratio expressed as D10 / D50 satisfies 0.4 < D10 / D50 < 1.0.
[0075] <2> The multilayer ceramic capacitor according to <1>, wherein the dielectric ceramic layer in the observation field of the STEM contains 90% or more of the crystal grains satisfying 0.03 < Re / (Ti + Zr) < 0.10 in number proportion.
[0076] <3> The multilayer ceramic capacitor according to <1> or <2>, wherein the equivalent circular diameter D50 of the crystal grain is 180 nm or more and 270 nm or less.
[0077] <4> The multilayer ceramic capacitor according to any one of <1> to <3>, wherein the particle size ratio of the above crystal particles satisfies 0.5 < D10 / D50 < 1.0.
[0078] <5> The multilayer ceramic capacitor according to any one of <1> to <4>, wherein the particle size ratio of the above crystal particles satisfies D10 / D50 < 0.9.
[0079] <6> The multilayer ceramic capacitor described in any one of <1> to <5>, wherein the above-mentioned rare earth element (Re) contains dysprosium (Dy).
[0080] <7> The perovskite-type oxide is a multilayer ceramic capacitor according to any one of <1> to <6>, comprising Ba, Ca, and Ti.
[0081] <8> The multilayer ceramic capacitor according to any one of <1> to <7>, wherein the dielectric ceramic layer contains at least one of magnesium (Mg), manganese (Mn), silicon (Si), and vanadium (V) as a minor component.
[0082] <9> The multilayer ceramic capacitor according to any one of <1> to <8>, wherein the thickness of the dielectric ceramic layer is 2.0 μm or less.
[0083] The following are examples that more specifically disclose the multilayer ceramic capacitor of the present invention. However, the present invention is not limited to these examples.
[0084] <Fabrication of Multilayer Ceramic Capacitors> BaCO ３ Powder, TiO ２ powder, and Dy ２ O ３ A powder was prepared. Composition formula: (Ba ０．９７５ Dy ０．０２５ ) (Ti ０．９７５ Dy ０．０２５ ) O ３ First, D ２ O ３ Weigh only the powder, ZrO ２ A 24-hour wet ball mill is performed using balls, and Dy ２ O ３ The powder was thoroughly ground into a fine powder. In this slurry, the following mixtures were added in the proportions shown in the above compositional formula: BaCO3 ３ Powder and TiO ２The powder was added, and a wet ball milling process was carried out for another 24 hours. Note that the compositional formula used here is for determining the weighing value and is not necessarily the same as the compositional formula of sintered porcelain. The prepared slurry was dried, and the resulting powder was heated in air at a rate of 600°C / hour to 1300°C, held for 2 hours, and then cooled to obtain calcined powder. This calcined powder was then processed again with ZrO ２ A wet ball mill was performed using balls for 24 hours to obtain a dry powder, and then the same synthesis at 1300°C as before was carried out. The heat treatment at 1300°C and the subsequent wet ball milling were repeated a total of three times to obtain the final calcined powder.
[0085] TiO in calcined powder ２ : BaCO3 per 100 moles ３ Powder: 1.0 mol part, MgCO ３ Powder: 1.0 mol part, MnCO ３ Powder: 0.3 moles, and SiO ２ Sol: 1.5 moles were added to the calcined powder, and the mixture was wet-mixed and dried to obtain dielectric powder.
[0086] A polyvinyl butyral-based binder and a plasticizer are added to the obtained dielectric powder, and then toluene and ethyl alcohol are added, resulting in ZrO ２ The material was slurryed using a wet ball mill with balls, and this slurry was molded to obtain a green sheet. The thickness of the green sheet was adjusted to 1.7 μm after sintering and densification.
[0087] A conductive paste, primarily composed of nickel, was screen-printed onto the surface of the obtained green sheet to form a pattern of conductive paste layers that would serve as the internal electrode layers.
[0088] Subsequently, 201 green sheets, each with a conductive paste layer formed on its surface, were stacked so that the sides with the conductive paste layer extended were staggered. Then, layers of green sheets without a conductive paste layer were placed above and below them, and the entire assembly was pressed together to create a laminated block.
[0089] The resulting multilayer blocks were cut into green multilayer chips. The cutting was done so that the length × width of the manufactured multilayer ceramic capacitors would be 3.2 mm × 1.6 mm.
[0090] The obtained green multilayer chips are N ２ The binder was removed by heat treatment at 280°C in an airflow. Subsequently, N ２ -H ２ -H ２ O-flow at 1260°C, oxygen partial pressure 1.6 × 10⁻⁶ －９ The firing process was carried out for two hours under MPa conditions.
[0091] In the fired laminated chip, a conductive paste mainly composed of Cu was applied to the end face portion where the internal electrode layer was drawn out, and the external electrode was formed by baking at 800°C. Furthermore, a Ni plating layer and an Sn plating layer were formed on the surface of the external electrode.
[0092] In this manner, a multilayer ceramic capacitor was fabricated. The resulting multilayer ceramic capacitor had external dimensions of 3.2 mm in length, 1.6 mm in width, and 1.6 mm in thickness. The number of dielectric ceramic layers sandwiched between the internal electrode layers was 200, and the thickness of each dielectric ceramic layer was 1.7 μm.
[0093] <IR Life Test> The fabricated multilayer ceramic capacitors were subjected to an accelerated lifetime test (HALT) to determine the mean time to failure (MTTF). In the HALT test, a load of 160°C and 60V was applied to the samples. For each sample, the time at which the insulation resistance (IR) fell below 200kΩ was defined as the failure time. The failure times were measured for 72 samples fabricated under the same conditions.
[0094] Next, the obtained data was plotted on Weibull probability paper to obtain a Weibull distribution. The relationship between failure time and cumulative failure rate was linearly regressed on the obtained Weibull distribution, and its slope was determined as the shape parameter m. The failure time at which the cumulative failure rate reached 63.2% was also read, and the mean time to failure (MTTF) was determined using this failure time and the shape parameter m corresponding to the slope of the regression line. Samples with an MTF of 50 hours or more were judged as acceptable.
[0095] <STEM-EDS Analysis> The dielectric ceramic layer located at approximately half the length, width, and height of the multilayer ceramic capacitor was observed using a scanning transmission electron microscope (STEM). The observation sample was prepared by thinning the dielectric ceramic layer using the focused ion beam (FIB) lift-out method. The observation and analysis were performed under the following conditions: - Apparatus: JEOL Ltd., JEM-2200FS / Noran System 7 - Field of view: n=1 - Acceleration voltage: 200kV - Magnification: 60000x - Spot diameter: 1nmφ - Pixel size: 9.2nm / 1 pixel - Number of image pixels: 256×256 - Measurement: 100 EDS cumulative measurements - EDS analysis software: Thermo Fisher Scientific K.K., NSS
[0096] Following the procedure shown in Figures 5 to 8, the central region of the grain surrounded by grain boundaries was defined for the crystal grain to be analyzed.
[0097] Figure 5 is an explanatory diagram of the crystal grains to be analyzed. As shown in Figure 5, grains (crystal particles) surrounded by grain boundaries GB are identified from the bright-field image of the STEM.
[0098] Figure 6 is an explanatory diagram of a quadrilateral circumscribing a grain. As shown in Figure 6, a quadrilateral GS is drawn circumscribing the grain surrounded by the grain boundary GB.
[0099] Figure 7 is an explanatory diagram of the center point of a grain. As shown in Figure 7, in a quadrilateral GS that circumscribes a grain enclosed by grain boundaries GB, the center point CP of the grain is defined as the intersection of lines connecting the midpoints of two pairs of opposite sides in the vertical (T) and horizontal (W) directions.
[0100] Figure 8 is an explanatory diagram of the central region of the grain. As shown in Figure 8, the central region GC of the grain is defined as the region enclosed by a rectangle with a width of 1 / 3 of the width W of rectangle GS and a height of 1 / 3 of the height T of rectangle GS, with the center point CP of the grain as the center.
[0101] At three arbitrary points within the central GC region of the grain, the concentrations of Re, Ti, and Zr were analyzed in atom percent using energy-dispersive X-ray spectroscopy (EDS) by point analysis, and the elemental concentration ratio expressed as Re / (Ti+Zr) was calculated. The electron beam spot diameter for point analysis was 1 nm, and the integration time was 30 seconds.
[0102] The average of the above elemental concentration ratio Re / (Ti+Zr) at any three points within the central region (GC) of the grain was defined as the rare earth element concentration in the central region of that crystal grain.
[0103] The rare earth concentrations in the central region described above were calculated for any 10 crystal grains included in the STEM bright-field image, and the proportion of crystal grains whose rare earth concentrations in the central region were greater than 0.03 and less than 0.10 was determined.
[0104] <Crystal Particle Size Analysis> The multilayer ceramic capacitor fractured at approximately half its length, N ２ / H ２ Thermal etching was performed in an airflow at a temperature of 1000°C for 5 minutes.
[0105] A dielectric ceramic layer located at approximately half the width and half the height of the thermally etched fracture surface was imaged at 30,000x magnification using an FE-SEM (Hitachi High-Technologies Corporation, S-4800).
[0106] Using the captured SEM images, the boundaries of approximately 200 crystal grains were drawn with a stylus. The resulting boundary image data was analyzed using image analysis software (Mitani Corporation, WINROOF) to determine the area of each crystal grain.
[0107] Furthermore, the total area of the analyzed crystal grains was set to 100 (100%), and the area of each crystal grain was accumulated in ascending order to determine the area of the crystal grain when the total area reached 10% or more (cumulative 10% area). Similarly, the area of each crystal grain was accumulated in ascending order to determine the area of the crystal grain when the total area reached 50% or more (cumulative 50% area).
[0108] Using the cumulative 10% area and the cumulative 50% area, the equivalent circular diameters D10 and D50 were calculated according to equations (1) and (2) below.
[0109]
[0110]
[0111] From the values of the equivalent circular diameters D10 and D50 obtained by the above procedure, the particle size ratio D10 / D50 was determined.
[0112] <Results> The multilayer ceramic capacitor obtained by the above procedure had the following characteristics.
[0113] In bright-field STEM images, nine out of ten arbitrary crystal grains had an elemental concentration ratio expressed as Re / (Ti+Zr) in the central region that was greater than 0.03 and less than 0.10.
[0114] In the SEM image, the particle size ratio, expressed as D10 / D50, of the crystal grains was 0.56.
[0115] In the IR life test, the MTTF was 125 hours.
[0116] 1 Multilayer ceramic capacitor 10 Base body 10a First main surface 10b Second main surface 10c First side surface 10d Second side surface 10e First end surface 10f Second end surface 11, 12 External electrodes 20 Dielectric ceramic layer 30 Internal electrode layer 31 First internal electrode layer 32 Second internal electrode layer 40 Inner layer 45 Outer layer CP Center point of grain GB Grain boundary GC Central region of grain GS Rectangle circumscribing the grain L Length direction W Width direction T Stacking direction
Claims
1. A substrate comprising a plurality of dielectric ceramic layers and a plurality of internal electrode layers stacked in the stacking direction, and an external electrode provided on the surface of the substrate and electrically connected to the internal electrode layer, wherein the dielectric ceramic layer mainly contains a perovskite-type oxide, the perovskite-type oxide contains at least one of barium (Ba), calcium (Ca), and strontium (Sr), at least one of titanium (Ti) and zirconium (Zr), and at least one of rare earth elements (Re), and in the central region of the grain surrounded by grain boundaries analyzed based on a bright-field image taken by STEM (scanning transmission electron microscope) of the dielectric ceramic layer, when the elemental concentration ratio expressed as Re / (Ti+Zr) converted to atom%, is determined by point analysis using a STEM-EDS (scanning transmission electron microscope-energy dispersive X-ray spectroscopy) instrument, there are multiple crystal grains that satisfy 0.03 < Re / (Ti+Zr) < 0.
10. A multilayer ceramic capacitor in which, when the particle diameter of the crystal particles analyzed based on images taken by an SEM (scanning electron microscope) is defined as follows: D10 is the equivalent circle diameter calculated from the area representing 10% of the cumulative area distribution of the crystal particles present in the dielectric ceramic layer in the SEM image, and D50 is the equivalent circle diameter calculated from the area representing 50% of the cumulative area; the particle diameter ratio expressed as D10 / D50 satisfies 0.4 < D10 / D50 < 1.
0.
2. The multilayer ceramic capacitor according to claim 1, wherein the dielectric ceramic layer in the observation field of the STEM contains 90% or more of the crystalline particles satisfying 0.03 < Re / (Ti + Zr) < 0.10 in number proportion.
3. The multilayer ceramic capacitor according to claim 1 or 2, wherein the equivalent circular diameter D50 of the crystal grain is 180 nm or more and 270 nm or less.
4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein the particle size ratio of the crystal particles satisfies 0.5 < D10 / D50 < 1.
0.
5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein the particle size ratio of the crystal particles satisfies D10 / D50 < 0.
9.
6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein the rare earth element (Re) includes dysprosium (Dy).
7. The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein the perovskite-type oxide comprises Ba, Ca, and Ti.
8. The multilayer ceramic capacitor according to any one of claims 1 to 7, wherein the dielectric ceramic layer includes at least one of magnesium (Mg), manganese (Mn), silicon (Si), and vanadium (V) as a minor component.
9. The multilayer ceramic capacitor according to any one of claims 1 to 8, wherein the thickness of each dielectric ceramic layer is 2.0 μm or less.