Transmitting and receiving system, and data transmitting and receiving method

WO2026203270A1PCT designated stage Publication Date: 2026-10-01ASTEMO LTD
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Patent Information

Application Number
PCT/JP2025/012732
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-03-28
Publication Date
2026-10-01

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Abstract

This transmitting and receiving system includes a transmission side device for transmitting data, and a reception side device for storing received data in a memory, wherein: the transmission side device generates transmission data obtained by replacing some data with high-priority data to which a code indicating high priority is attached, and correction data which are the original data that have been replaced with the high-priority data, and transmits the generated transmission data and correction data to the reception side device; and upon receiving the data including the code indicating high priority, the reception side device stores the high priority data in a separate memory area and stores the correction data in the position of the high-priority data.
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Description

Transmission / reception system and data transmission / reception method

[0001] The present invention relates to a transmission / reception system that transmits and receives data.

[0002] A vehicle control system is configured with ECUs that operate electronic vehicle control devices, that is, Electronic Control Units. A plurality of ECUs operate in cooperation with each other while communicating via CAN, Ethernet, or the like to control a vehicle.

[0003] In recent years, autonomous driving ECUs have come to handle large-capacity data such as images. For a connection to a camera, connection via MIPI-CSI2 or the like may be used, and for a connection between ECUs, connection via PCI Express or the like may be used.

[0004] Communication devices in an ECU frequently access memory and require high speed, so instead of processing by a CPU, a DMA controller, which is a dedicated data transfer device, is used to transfer data from memory to the communication device.

[0005] On the other hand, reducing the number of wires is also an issue in vehicle systems, and there are cases where high-priority control data other than image data is transmitted through high-speed lines. As described above, as a technology for transmitting data of a plurality of priorities through a single line, there are technologies described in the following prior art documents.

[0006] As background art in this technical field, there is the following prior art. Patent Document 1 (Japanese Unexamined Patent Publication No. 2021-145182) describes a communication device comprising a reception queue, wherein one reception queue includes: a priority determination unit that determines the priority of reception data received from a network; a buffer that stores the reception data; a transfer unit that transfers the reception data stored in the buffer to a main memory; and a transfer arbitration unit that, when the transfer unit is transferring first-priority reception data to the main memory and the buffer receives second-priority reception data having a higher priority than the first priority, causes the transfer unit to stop transferring the first-priority reception data and starts transferring the second-priority reception data to the main memory.

[0007] Patent Document 2 (Japanese Patent Application Publication No. 2011-193242) describes a communication control device comprising: a main memory unit that has multiple received data areas and records a descriptor chain that associates the multiple received data areas with multiple descriptors; a communication control unit that, when write received data received via a network is accumulated in a packet buffer, refers to the descriptor chain and records the write received data in the write received data area when the descriptor corresponding to the write received data area among the multiple descriptors indicates that it is recordable, and outputs an interrupt signal when the descriptor indicates that it is not recordable; and a CPU that, when the interrupt signal is output, reads received data from the read received data area among the multiple received data areas and updates the descriptor chain so that the descriptor corresponding to the read received data area among the multiple descriptors indicates that it is recordable.

[0008] Patent Document 3 (Japanese Patent Publication No. 2000-224208) describes a packet forwarding control device for dividing data into a plurality of blocks and continuously forwarding a continuous packet containing each block between two devices, the forwarding control device comprising: a memory for storing the plurality of blocks; a buffer for storing the blocks stored in the continuous forwarding packet; and direct memory access control means for controlling the direct transfer of data between the memory and the buffer, wherein the packet forwarding control device further comprises: a packet identification means for determining whether the packet is a continuous forwarding packet or a non-continuous packet other than the continuous packet, storing the blocks stored in the continuous forwarding packet in the buffer, and storing the header information of the non-continuous packet in the header storage means; and a transmission means for transmitting a response packet to the non-continuous packet based on the header information in the header storage means.

[0009] Japanese Patent Publication No. 2021-145182, Japanese Patent Publication No. 2011-193242, Japanese Patent Publication No. 2000-224208

[0010] When image data is divided into packets and transferred in a situation where data with different priorities are mixed, it is necessary to reconstruct the image data from the packets. In prior art, dedicated hardware is used for the reconstruction process, but if the reconstruction process is performed on a general-purpose CPU, the CPU needs to copy the image data from the receive buffer to the image processing area. In recent CPUs with high-speed processing capabilities, memory access can become a bottleneck, and the increase in data copying between memory locations degrades processing performance. Furthermore, transferring data with information such as packet priority reduces the efficiency of communication path utilization and increases the number of times communication devices are activated, thus increasing overhead.

[0011] This invention was made to solve the above-mentioned problems, and aims to improve the processing performance of the ECU by suppressing a decrease in data transfer speed even in situations where high-priority data is mixed.

[0012] A typical example of the invention disclosed in this application is as follows: a transmission and reception system comprising a transmitting device for transmitting data and a receiving device for storing received data in memory, wherein the transmitting device generates transmission data in which a portion of the data is replaced with high-priority data that has been assigned a code indicating high priority, and correction data which is the original data that has been replaced with the high-priority data, transmits the generated transmission data and correction data to the receiving device, and when the receiving device receives data including the code indicating high priority, stores the high-priority data in a separate memory area and stores the correction data in the same location as the high-priority data.

[0013] According to one aspect of the present invention, high-priority data can be transferred without reducing the transfer speed of large amounts of data, such as image data. Problems, configurations, and effects other than those described above will be clarified by the following description of the embodiments.

[0014] This is a diagram of the transmission and reception system of Embodiment 1. This is a diagram showing the relationship between processing data and transmission data in the prior art. This is a diagram showing the configuration in the prior art where the processing memory and transmission buffer area are used together. This is a diagram showing the changes in the transmission buffer area during the data transmission process of Embodiment 1. This is a diagram showing the relationship between received data and high-priority data in Embodiment 1. This is a diagram showing the data structure of high-priority data within the received data in Embodiment 1. This is a diagram showing the transmission data management method of Embodiment 2. This is a diagram showing the configuration of the transmission buffer area in Embodiment 3. This is a diagram showing the configuration of the reception buffer area in Embodiment 3.

[0015] Embodiments of the present invention will be described below with reference to the drawings.

[0016] <Embodiment 1> Figure 1 is a diagram showing the configuration of a transmitting and receiving system according to Embodiment 1 of the present invention.

[0017] The transmission and reception system includes a transmitting device 1 that transmits data to other in-vehicle electronic devices and a receiving device 2 that receives data transmitted from other in-vehicle electronic devices. The transmitting device 1 and the receiving device 2 are connected by a communication channel 3. The transmitting device 1 and the receiving device 2 may be electronic control units (ECUs) that control the vehicle, but the transmitting device 1 may be a sensor such as a camera, and the transmitted data 112 may be, for example, image data captured by the camera.

[0018] The transmitting device 1 includes a main memory 11, a DMA controller 12, a communication device 13, and a processing unit (CPU) 14. The main memory 11 is provided with a transmit buffer area 111 and a high-priority data area 114. The transmit buffer area 111 stores the transmit data 112 and high-priority data 113 transmitted from the transmitting device 1, and the high-priority data area 114 stores the high-priority data 113. The transmitting device 1 transmits the transmit data 112 stored in the transmit buffer area 111, which is provided in a part of the main memory 11. The DMA controller 12 transfers the data in the transmit buffer area 111 to the communication device 13, and the communication device 13 sends it to the communication path 3.

[0019] The receiving device 2 includes a main memory 21, a DMA controller 22, a communication device 23, and a processing unit (CPU) 24. The receiving device 2 stores the data received by the communication device 23 in the receive buffer area 211 of the main memory 21 via the DMA controller 22. In the above case, the received data 212 stored in the receive buffer area 211 is image data, which is data that is the target of recognition processing, etc.

[0020] When transmitting information requiring urgency, such as the occurrence of some kind of abnormality, the transmitting device 1 stores high-priority data that should be transmitted with priority in the high-priority data area 114. The high-priority data stored in the high-priority data area 114 is stored in the transmission buffer area 111 as high-priority data 113 and transmitted to the receiving device 2.

[0021] In the receiving device 2, the CPU 24 determines whether high-priority data 213 is stored in the receive buffer area 211, and stores the high-priority data 213 stored in the receive buffer area 211 in the high-priority data area 214.

[0022] In the transmitting device 1, data transfer between the communication device 13 and the main memory 11 may be handled by the CPU 14 instead of the DMA controller 12. Similarly, in the receiving device 2, data transfer between the communication device 23 and the main memory 21 may be handled by the CPU 24 instead of the DMA controller 22. The reason why the transmitting device 1 includes the DMA controller 12 and the receiving device 2 includes the DMA controller 22 is that data transfer between memories using DMA is high-speed, making it easier to obtain the effects of the present invention.

[0023] Figures 2A to 2C show the relationship between the transmitted data 112 and the high-priority data 113. Figure 2A shows the relationship between the processed data 41 and the transmitted data 112 in the prior art, Figure 2B shows a configuration in which the processing memory and the transmit buffer area 111 are used together, and Figure 2C shows the changes in the transmit buffer area 111 during data transmission processing.

[0024] In the prior art, as shown in Figure 2A, when transmitting data that has undergone some processing (for example, an image captured by camera 4), it is necessary to copy the processing result, processing data 41, as transmission data 112 to the transmission buffer area 111 of the main memory 11 before executing the transmission process. In today's high-speed computing capabilities, memory copy processing is a factor that reduces efficiency. Reducing memory copying is effective in improving efficiency. For this reason, as shown in Figure 2B, the processing memory and the transmission buffer area 111 can be used interchangeably, and the transmission data 112 can be stored directly. For example, image data acquired from camera 4 can be stored in the transmission buffer area 111 as processing data and transmission data 42, and the data can be transferred to the communication device 13 using the DMA controller 12. Similarly, in the receiving device 2, the processing can be made more efficient by executing image processing directly without copying the received data 212 in the receiving buffer area 211.

[0025] In this prior art configuration, while the DMA controller 12 is transferring the transmission data 112, the communication device 13 is occupied, making it impossible to transmit the urgent, high-priority data 113.

[0026] In this embodiment, as shown in Figure 2C, the transmit buffer area 111 during DMA transfer is divided into transmitted data 115 and untransmitted data 116. A portion of the untransmitted data 116 is copied as correction data 117 to the end of the transmit buffer (preferably immediately after the transmit data 112), and high-priority data 113 is copied to the original data portion and transmitted as part of the transmit data 112. At this time, the amount of data transmitted increases by the size of the correction data 117, so the settings of the DMA controller 12 may be changed, or the amount of data to be transmitted may be increased in advance in anticipation of the occurrence of correction data 117.

[0027] In the transmitting device, when storing high-priority data 113 within unsent data 116, the DMA controller 12 may be temporarily stopped, or the high-priority data 113 may be stored in the area of ​​unsent data 116 where DMA transfer is incomplete, after the beginning of the unsent data 116, taking into consideration the processing time for storing the high-priority data 113.

[0028] The DMA transfer may be divided at each timing when high-priority data 113 should be transmitted, and the presence or absence of high-priority data 113 may be determined at the completion timing of each divided DMA transfer, and processing such as data copying or creation of correction data 117 may be performed. By dividing the DMA transfer at the insertion position of high-priority data 113, it is possible to suppress the interruption of the DMA transfer due to high-priority data 113.

[0029] Figure 3 shows the relationship between received data 212 and high-priority data 213, illustrating the changes in the received buffer area 211 during data reception processing.

[0030] In the receiving device 2, data including high-priority data 213 is transferred from the transmitting device 1 and written to the receive buffer area 211. The received data 212 written to the receive buffer is not in the correct state as is, so correction is required.

[0031] The CPU 24 then searches the receive buffer area 211 for the presence of high-priority data 213 and copies any detected high-priority data 213 to the high-priority data area 214. After receiving the correction data 215, the CPU 24 copies the correction data 215 to the original position 216 of the received data 212, thereby correcting the received data 212 to its correct state.

[0032] Figure 4 shows the data structure of the high-priority data 213 in the received data.

[0033] High-priority data 213 consists of an identification code 2131 and the high-priority data body 2132. The receiving device 2 identifies the high-priority data 213 by the identification code 2131 in the received data 212. The identification code 2131 may be any fixed value, but it is preferable that it is not included in the data. For example, if all the identification codes 2131 are zero, it is difficult to distinguish them from a white image, so it is preferable to search the transmitted data 112 and select a code that does not overlap as the identification code 2131. The selected identification code 2131 is best declared at the beginning of the transmitted data 112. The identification code 2131 may be changed each time communication is performed, and the identification code 2131 may be declared at the beginning of the transmitted data 112.

[0034] The high-priority data body 2132 may be of a fixed size, or it may be of a variable size by storing the data size at the beginning of the data, or it may include data such as CRC or checksum for consistency determination.

[0035] The receiving device 2 searches for the identification code 2131 in the received data 212, and if it finds the identification code 2131, it determines that it is high-priority data 213. Since the process of searching for the identification code 2131 involves a large processing load of reading data from memory, it is preferable to store it not at an arbitrary location, but in units of the page size of 4K bytes or in sizes that match the transmission period of high-priority data 213 (for example, 1MB).

[0036] If the receiving device 2 constantly checks the received data 212, the CPU processing load will increase. Therefore, it may determine the presence or absence of high-priority data 213 by using periodic interrupts.

[0037] Alternatively, the DMA transfer may be divided, and the presence or absence of high-priority data 213 may be determined each time a divided DMA transfer is completed.

[0038] If the receiving device 2 is configured with an FPGA or the like, the DMA controller 22 may be given a function to determine the identification code 2131 each time data is transferred by the DMA controller 22 and switch the data transfer destination to the high-priority data area 214, thereby reducing the copying process of high-priority data 213 by the CPU 24.

[0039] If the identification code 2131 is a fixed value, there is a possibility that data matching the identification code 2131 exists in the transmitted data. Therefore, the transmitting device 1 should search for the identification code 2131 in the transmitted data, and when it finds data with the same pattern as the identification code 2131, it should copy the original data as correction data 117 and set an invalid value as the high-priority data body 2132. To indicate an invalid value, the data size may be set to 0, or it may be set to result in a consistency error.

[0040] As explained above, according to the first embodiment of the transmission / reception system of the present invention, high-priority data 113 can be transmitted while suppressing performance degradation of an in-vehicle electronic device without reducing the transfer speed of large-capacity data such as image data.

[0041] <Embodiment 2> Next, a second embodiment of the present invention will be described. In the second embodiment, differences from the first embodiment will be mainly described, and descriptions of configurations and processes that are the same as those in the first embodiment will be omitted.

[0042] FIG. 5 is a diagram showing a management method for transmission data 112 according to the second embodiment, and shows changes in a transmission buffer area 111 in the second embodiment.

[0043] In the first embodiment, when it is necessary to transmit the high-priority data 113, the original data is copied to the correction data section 52 and the high-priority data 113 is written, so time for the copying process is required.

[0044] In the second embodiment, a high-priority reservation section 51 is provided at any position in the transmission buffer area 111, and transmission data in the area of the high-priority reservation section 51 is copied to the correction data section 52 in advance. In an initial state, an identification code 2131 for identifying the high-priority data 113 and invalid high-priority data 113 (a meaningless value determined to be abnormal data) are stored in the high-priority reservation section 51. A plurality of high-priority reservation sections 51 may be provided at predetermined time intervals shorter than the allowable value of the transfer time lag of the high-priority data 113.

[0045] When transmitting the high-priority data 113, the high-priority data 113 is written into the high-priority reservation section 51. Unlike the first embodiment, the second embodiment does not require copying of the original data in the high-priority reservation section 51, so the suspension time of the DMA controller 22 for copying a part of the transmission data 112 to the correction data section 52 can be shortened.

[0046] Furthermore, by writing data into all the reserved high-priority reservation sections 51 without distinguishing between transmitted data 115 and untransmitted data 116, data can be transmitted without stopping the DMA controller 22.

[0047] <Embodiment 3> Next, Embodiment 3 of the present invention will be described. In Embodiment 3, differences from Embodiments 1 and 2 will be mainly described, and descriptions of the same configurations and processes as those in Embodiments 1 and 2 will be omitted.

[0048] FIGS. 6A and 6B are diagrams showing a management method for transmission data 112 according to Embodiment 3 of the present invention, where FIG. 6A shows the configuration of a transmission buffer area 111, and FIG. 6B shows the configuration of a reception buffer area 211.

[0049] In Embodiments 1 and 2, after correction data 215 is received in the reception buffer area 211, reception data 212 is completed, and the reception data 212 can be constructed by the correction data 215. However, by providing a correction data section 52 at the head of the transmission buffer area 111 (for example, immediately after a data header) and transmitting correction data 117 before transmission data 112, even when only a part of the transmission data 112 has been received, the reception data 212 can be partially constructed by the correction data 215, and data consistency can be maintained. Accordingly, for example, in the case of image data, even if a part of the reception data 212 has not been received, image processing can be performed on the already received portion. Furthermore, when transmitting a plurality of images simultaneously, image processing can be executed on an image transmitted earlier in advance.

[0050] It should be noted that the present invention is not limited to the above-described embodiments, and includes various modified examples and equivalent configurations within the scope of the appended claims. For example, the above-described embodiments have been described in detail for the purpose of explaining the present invention in an easy-to-understand manner, and the present invention is not necessarily limited to those having all the configurations described above. Furthermore, a part of the configuration of one embodiment may be replaced with the configuration of another embodiment. Moreover, the configuration of another embodiment may be added to the configuration of one embodiment. In addition, additions, deletions, or replacements of other configurations may be made to a part of the configuration of each embodiment.

[0051] Furthermore, part or all of each of the above-described configurations, functions, processing units, processing means, and the like may be implemented by hardware, for example, by designing them as an integrated circuit, or may be implemented by software, by causing a processor to interpret and execute a program that implements each respective function.

[0052] Information such as programs, tables, and files that implement each function can be stored in memory, hard disks, SSDs (Solid State Drives), or recording media such as IC cards, SD cards, and DVDs.

[0053] Furthermore, the control lines and information lines shown are those deemed necessary for explanation purposes and do not necessarily represent all control lines and information lines required for implementation. In reality, it can be assumed that almost all components are interconnected.

Claims

1. A transmission and reception system comprising a transmitting device for transmitting data and a receiving device for storing received data in memory, wherein the transmitting device generates transmission data in which a portion of the data is replaced with high-priority data that has been assigned a code indicating high priority, and correction data which is the original data that has been replaced with the high-priority data, transmits the generated transmission data and correction data to the receiving device, and when the receiving device receives data including the code indicating high priority, stores the high-priority data in a separate memory area and stores the correction data in the location of the high-priority data.

2. A transmitting and receiving system according to claim 1, wherein the transmitting device pre-reserves a high-priority data area in which the high-priority data is stored and a correction data area in which the correction data is stored, stores data of the position of the high-priority data area in the correction data area, and stores the high-priority data in the high-priority data area.

3. A transmission and reception system according to claim 2, wherein the transmitting device is characterized in that it arranges the correction data area such that the correction data is transmitted before the transmission data.

4. A transmitting and receiving system according to claim 1, characterized in that the code indicating high priority is a fixed value.

5. A transmission and reception system according to claim 1, characterized in that the code indicating high priority is a value that does not overlap with a part of the transmitted data.

6. A transmission and reception system according to claim 1, characterized in that the code indicating high priority is changed for each set of transmission data.

7. A data transmission and reception method in a transmission and reception system, wherein the transmission and reception system comprises a transmitting device that transmits data and a receiving device that stores received data in memory, and the data transmission and reception method is characterized in that the transmitting device generates transmission data in which a part of the data is replaced with high-priority data that has been assigned a code indicating high priority, and correction data which is the original data that has been replaced with the high-priority data, the transmitting device transmits the generated transmission data and correction data to the receiving device, and when the receiving device receives data including the code indicating high priority, it stores the high-priority data in a separate memory area and stores the correction data in the location of the high-priority data.