Optical element substrate, method for manufacturing optical element substrate, and method for manufacturing optical communication substrate

Abstract

This optical element substrate comprises: a main substrate; a first seed portion located above the main substrate and having a first direction as the short direction; a first semiconductor layer including a nitride semiconductor and having a base portion extending upward from the first seed portion and a first wing portion and a second wing portion extending from the base portion in opposite directions along the first direction; a first light-emitting element layer located on the first wing portion; and a first light-receiving element layer located on the second wing portion.

Description

Optical element substrate, method for producing optical element substrate, method for producing optical communication substrate

[0001] The present disclosure relates to an optical element substrate and the like.

[0002] Patent Document 1 discloses a communication device using a GaN-based micro LED.

[0003] Japanese Unexamined Patent Application Publication No. 2024-141946

[0004] An optical element substrate according to the present disclosure comprises: a main substrate; a first seed portion located above the main substrate, the first seed portion having a first direction as its widthwise direction; a first semiconductor layer comprising a nitride semiconductor, the first semiconductor layer having a base portion extending upward from the first seed portion, and a first wing portion and a second wing portion extending from the base portion along the first direction in mutually opposite directions; a first light-emitting element layer located on the first wing portion; and a first light-receiving element layer located on the second wing portion.

[0005] This is a plan view showing an example of the manufacturing method for this optical communication substrate. This is a flowchart showing an example of the manufacturing method for this optical communication substrate. This is a flowchart showing an example of the manufacturing method for this optical communication substrate. This is a flowchart showing an example of the manufacturing method for this optical communication substrate. This is a cross-sectional view showing an example of the manufacturing method for this optical communication substrate. This is a cross-sectional view showing an example of the manufacturing method for this optical communication substrate. This is a cross-sectional view showing an example of the manufacturing method for this semiconductor substrate. This is a block diagram showing an example of the configuration of the manufacturing apparatus for this optical communication substrate. This is a plan view showing an example of the manufacturing method for this optical communication substrate. This is a flowchart showing an example of the manufacturing method for this optical communication substrate. This is a plan view showing an example of the manufacturing method for this optical communication substrate. This is a plan view showing an example of the manufacturing method for this optical communication substrate. This is a plan view showing an example of the manufacturing method for this optical communication substrate. This is a plan view showing an example of the manufacturing method for this optical communication substrate. This is a plan view showing an example of the manufacturing method for this optical communication substrate. This is a cross-sectional view showing an example of the manufacturing method for this optical communication substrate. This is a flowchart showing an example of the manufacturing method for this optical communication substrate. This is a cross-sectional view showing an example of the manufacturing method for this optical communication substrate. This is a plan view showing an example of the configuration of the light-emitting element layer and the photodetector layer. This is a plan view showing an example of the configuration of the light-emitting element layer and the photodetector layer. This is a plan view showing an example of the configuration of the light-emitting element layer and the photodetector layer. This is a plan view showing an example of the configuration of the light-emitting layer and the photodetector layer. This is a plan view showing an example of the configuration of the light-emitting layer and the photodetector layer. This is a plan view showing an example of the configuration of the light-emitting layer and the photodetector layer. This is a flowchart showing an example of the manufacturing method of this semiconductor substrate. This is a cross-sectional view optical communication substrate. This is a cross-sectional view showing an example of the manufacturing method of this optical communication substrate. This is a flowchart showing an example of the manufacturing method of this optical communication substrate. This is a cross-sectional view showing an example of the manufacturing method of this optical communication substrate. This is a flowchart showing an example of the manufacturing method of an optical communication device. This is a cross-sectional view showing an example of the configuration of this information processing device. This is a flowchart showing an example of the manufacturing method of an optical communication substrate.This is a cross-sectional view showing an example of a method for manufacturing an optical communication substrate. This is a cross-sectional view showing an example of a method for manufacturing an optical communication substrate. This is a block diagram showing an example of the configuration of the manufacturing apparatus for this optical communication substrate. This is a block diagram showing an example of the configuration of the manufacturing apparatus for this optical element substrate. This is a block diagram showing an example of the configuration of the manufacturing apparatus for this optical communication device.

[0006] Figure 1 is a plan view showing an example of the manufacturing method of this optical communication substrate. Figures 2 and 3 are flowcharts showing an example of the manufacturing method of this optical communication substrate. Figures 4 to 6 are cross-sectional views showing an example of the manufacturing method of this optical communication substrate. In the following, the notation "numerical value A to numerical value B" with respect to physical quantities means that the physical quantity is greater than or equal to A and less than or equal to B.

[0007] As shown in Figures 1 to 6, the method for manufacturing an optical communication substrate according to this embodiment includes the steps of: preparing an optical element substrate DK comprising a first semiconductor layer L1, a first light-emitting layer H1, and a first photodetector layer J1 (S20); and transferring the first light-emitting layer H1 and the first photodetector layer J1 from the optical element substrate DK to the same mounting substrate MK, either simultaneously or at different timings (S25). These steps enable the more efficient acquisition of an optical communication substrate EK (light-emitting and light-receiving substrate). For example, compared to preparing a substrate comprising the first light-emitting layer H1 and a substrate comprising the first photodetector layer J1 separately and transferring them to the same mounting substrate MK, the effort required to obtain the optical communication substrate EK can be reduced.

[0008] The optical element substrate DK comprises a main substrate 1 and a first seed portion S1 located above the main substrate 1, with the first direction D1 being the shorter direction. The first semiconductor layer L1 has a base portion X1 extending upward from the first seed portion S1, and a first wing portion FA and a second wing portion FB extending in opposite directions along the first direction D1 from the base portion X1. The first wing portion FA extends from the base portion X1 in one direction along the first direction D1. The second wing portion FB extends from the base portion X1 in the opposite direction to the direction in which the first wing portion FA extends. The first wing portion FA extends in the negative direction of the first direction D1 (reverse direction of the arrow). The second wing portion FB extends in the positive direction of the first direction D1 (direction of the arrow).

[0009] The optical element substrate DK comprises a first light-emitting layer H1 located on the first wing portion FA and a first photodetector layer J1 located on the second wing portion FB. That is, the first light-emitting layer H1 and the first photodetector layer J1 are adjacent to each other on the same first semiconductor layer L1, with the base portion X1 in between. By using an optical element substrate DK having these configurations, the effort required to manufacture an optical communication substrate EK having both the first light-emitting layer H1 and the first photodetector layer J1 can be reduced. For example, by directly transferring the first light-emitting layer H1 located on the first wing portion FA and the first photodetector layer J1 located on the second wing portion FB to the mounting substrate MK, an optical communication substrate EK in which the first light-emitting layer H1 and the first photodetector layer J1 are adjacent can be easily manufactured.

[0010] The first semiconductor layer L1 may be a nitride semiconductor crystal. The first light-emitting layer H1 is located on the first wing portion FA. The first photodetector layer J1 is located on the second wing portion FB. The first light-emitting layer H1 and the first photodetector layer J1 may contain a nitride semiconductor. The first light-emitting layer H1 and the first photodetector layer J1 may contain electrodes. For example, the electrodes are a metal layer or a metal oxide layer. The first light-emitting layer H1 and the first photodetector layer J1 may contain an insulating film IS.

[0011] According to the present optical communication substrate manufacturing method, an optical communication substrate EK can be easily manufactured in which a light-emitting body HY (nitride semiconductor light-emitting body) including at least a part of the first wing portion FA and the first light-emitting element layer H1 and a photodetector JY (nitride semiconductor photodetector) including at least a part of the second wing portion FB and the first photodetector layer J1 are arranged in a planar configuration. For example, the first light-emitting element layer H1 may be a light-emitting diode (LED) layer. For example, the first photodetector layer J1 may be a photodiode (PD) layer. The first light-emitting element layer H1 and the first photodetector layer J1 may have the same (common) nitride semiconductor layer configuration (layer structure and composition).

[0012] The first and semiconductor layers L1 and L2 contain semiconductors containing nitrogen and gallium. The first and semiconductor layers L1 and L2 contain nitride semiconductors. The first and semiconductor layers L1 and L2 are mainly composed of nitride semiconductors. Nitride semiconductors can be represented, for example, as AlxGayInzN (0≦x≦1; 0≦y≦1; 0≦z≦1; x+y+z=1). Specific examples of nitride semiconductors include GaN-based semiconductors, AlN (aluminum nitride), InAlN (indium aluminum nitride), or InN (indium nitride). GaN-based semiconductors are semiconductors containing gallium atoms (Ga) and nitrogen atoms (N). Typical examples of GaN-based semiconductors include GaN, AlGaN, AlGaInN, or InGaN. The first and semiconductor layers L1 and L2 may be doped or undoped. For example, the doped type is n-type, which contains a donor.

[0013] The first direction D1 may be the a-axis direction (<11-20> direction) of the nitride semiconductor contained in the first and semiconductor layers L1 and L2. The second direction D2, which is orthogonal to the first direction D1, may be the m-axis direction (<1-100> direction) of the nitride semiconductor. The third direction D3, which is orthogonal to the first and second directions D1 and D2, may be the c-axis direction (<0001> direction) of the nitride semiconductor.

[0014] As shown in Figure 3, step S20 may include step S5 of preparing a semiconductor substrate 10 comprising a main substrate 1, a first seed portion S1, and a first semiconductor layer L1 containing a nitride semiconductor having a first wing portion FA and a second wing portion FB, and step S15 of forming a first light-emitting element layer H1 on the first wing portion FA and a first photodetector layer J1 on the second wing portion FB. In step S25, at least a portion of the first wing portion FA and the first light-emitting element layer H1, and at least a portion of the second wing portion FB and the first photodetector layer J1 may be simultaneously transferred to the same mounting substrate. When transferred simultaneously, the positional relationship between the first light-emitting element layer H1 and the first photodetector layer J1 on the semiconductor substrate 10 can be accurately maintained while transferring them to the same mounting substrate. In step S25, at least a portion of the first wing portion FA and the first light-emitting element layer H1, and at least a portion of the second wing portion FB and the first photodetector layer J1 may be transferred to the same mounting substrate at different timings. When transferred at different timings, the positional relationship between the first light-emitting element layer H1 and the first photodetector layer J1 after transfer can be adjusted, not just the positional relationship between the first light-emitting element layer H1 and the first photodetector layer J1 on the semiconductor substrate 10.

[0015] The main substrate 1 may be a self-supporting, heterogeneous substrate with a different lattice constant from the first semiconductor layer L1. For example, the main substrate 1 may be a silicon substrate, a sapphire substrate, a silicon carbide substrate, a nitride substrate, or a ScMgAlO substrate. For example, a silicon carbide substrate may be a 4H-SiC substrate or a 6H-SiC substrate. For example, a nitride substrate may be a GaN substrate or an AlN substrate. The semiconductor substrate 10 means a substrate containing a semiconductor. The main substrate 1 may or may not contain a semiconductor. For example, the semiconductor is silicon or silicon carbide. An example of a main substrate 1 that does not contain a semiconductor is a sapphire substrate.

[0016] As shown in Figures 4 to 6, at least a portion of the first wing portion FA and the first light-emitting element layer H1 are separated from the crystal growth substrate TK, which includes the main substrate 1 and the first seed portion S1, and transferred to the mounting substrate MK. As shown in Figures 4 to 6, at least a portion of the second wing portion FB and the first photodetector layer J1 are separated from the crystal growth substrate TK and transferred to the mounting substrate MK. This results in an optical communication substrate EK comprising the first light-emitting element layer H1, the first photodetector layer J1, and the mounting substrate MK.

[0017] The base portion X1 is coupled to the first seed portion S1. The first light-emitting layer H1 is located on the first wing portion FA. The first photodetector layer J1 is located on the second wing portion FB. When the first semiconductor layer L1 has the above configuration, as shown in Figures 4, 5, and 6, the transfer of the first light-emitting layer H1 and the first photodetector layer J1 to the mounting substrate MK becomes easy.

[0018] Because the first wing portion FA and the second wing portion FB have a lower through-dislocation density compared to the base portion X1, the quality (crystallinity) of the first light-emitting layer H1 and the first photodetector layer J1 is improved, and the light emission characteristics and light detection characteristics can be enhanced. In particular, in the first photodetector layer J1, which extracts electrons generated in the active layer from the n-type semiconductor layer, the dark current is reduced as the crystallinity of the n-type semiconductor layer on the wing portion FB is increased. This makes it possible to improve the detection accuracy of the first photodetector layer J1.

[0019] As shown in Figure 1, the optical element substrate DK includes a second light-emitting layer H2 and a second photodetector layer J2 located on a first semiconductor layer L1. In the optical element substrate DK, the first light-emitting layer H1 and the first photodetector layer J1 are arranged on the first semiconductor layer L1 in a first direction D1 (the a-axis direction of the first semiconductor layer L1). In the optical element substrate DK, a plurality of light-emitting layers H (including H1 and H2) are arranged on the first wing portion FA in a second direction D2 (the m-axis direction of the first semiconductor layer L1). In the optical element substrate DK, a plurality of photodetector layers J (including J1 and J2) are arranged on the second wing portion FB in a second direction D2.

[0020] As shown in Figure 1, in the optical communication substrate EK, the first light-emitting layer H1 and the first light-receiving layer J1 are aligned in the first direction D1 (the a-axis direction of the first and second wing portions FA and FB). In the optical communication substrate EK, a plurality of light-emitting layers H are aligned in the second direction D2 (the m-axis direction of the first wing portion FA). In the optical communication substrate EK, a plurality of light-receiving layer J are aligned in the second direction D2 (the m-axis direction of the second wing portion FB). The plurality of light-emitting layers H include the first light-emitting layer H1 and the second light-emitting layer H2. The plurality of light-receiving layer J include the first light-receiving layer J1 and the second light-receiving layer J2.

[0021] The optical element substrate DK comprises a main substrate 1, a crystal growth substrate TK (template substrate) having a seed pattern 4, and a mask pattern 6. The seed pattern 4 includes first and second seed portions S1 and S2. The mask pattern 6 includes a mask portion 5. The mask pattern 6 can also be called a non-seed pattern or a growth suppression pattern.

[0022] In the crystal growth substrate TK, the seed pattern 4 is a pattern of the region where the semiconductor crystal is grown. The seed pattern 4 may be a GaN layer, AlN layer, AlGaN layer, AlInN layer, AlGaInN layer, or Al layer, etc. The seed pattern 4 may be a layer formed at a low temperature. The seed pattern 4 may be a layer formed at 500°C or below. The thickness of the first and second seed portions S1 and S2 is, for example, 10 nm to 500 nm. The first seed portion S1 is a region connected to the first semiconductor layer L1. The first seed portion S1 is a region that serves as the starting point for the growth of the first semiconductor layer L1.

[0023] The optical element substrate DK may have a buffer layer between the main substrate 1 and the seed pattern 4. The buffer layer improves the crystallinity and flatness of the seed pattern 4. The buffer layer may be planar or have a shape that matches the seed pattern 4. For example, a shape that matches the seed pattern 4 is stripe-shaped. The buffer layer may be made of a different material from the seed pattern 4. The buffer layer may be a GaN layer, AlN layer, AlGaN layer, AlInN layer, AlGaInN layer, or Al layer, etc. The buffer layer may be a layer formed at a low temperature. The buffer layer may be a layer formed at 500°C or below. The thickness of the buffer layer is, for example, about 10 nm to 500 nm.

[0024] The mask pattern 6 is formed using a material that suppresses the longitudinal growth of the nitride semiconductor. The mask pattern 6 is configured to enable the lateral growth of the nitride semiconductor. For example, the material of the mask pattern 6 may be silicon nitride, silicon carbide, silicon carbonitride, diamond-like carbon, silicon oxide, or silicon oxynitride. For example, the material of the mask pattern 6 does not have to contain silicon. For example, the material of the mask pattern 6 may be titanium nitride, molybdenum nitride, tungsten nitride, or tantalum carbide. For example, the material of the mask pattern 6 may be a high-melting-point metal. For example, high-melting-point metals may be molybdenum, tungsten, or platinum. The mask pattern 6 may be a single layer film made of one of these materials. The mask pattern 6 may be a multilayer film made by combining multiple of these materials. The thickness of the mask portion 5 is, for example, 5 nm to 2 μm.

[0025] As shown in Figures 1 to 6, the first wing portion FA and the first light-emitting element layer H1 are separated from the crystal growth substrate TK and transferred to the mounting substrate MK. The second wing portion FB and the first photodetector layer J1 are separated from the crystal growth substrate TK and transferred to the mounting substrate MK. The first wing portion FA may be fractured to separate it from the crystal growth substrate TK. The second wing portion FB may be fractured to separate it from the crystal growth substrate TK.

[0026] The crystal growth substrate TK may have a ridge portion R. The upper part of the ridge portion R may be the first seed portion S1. The ridge portion R may have a convex portion Q located on the upper surface of the main substrate. The seed pattern 4 may contain a nitride semiconductor. The first seed portion S1 is the growth starting point for the first semiconductor layer L1. The mask portion 5 functions as a selective growth mask. The first wing portion FA and the second wing portion FB may be floating above the mask portion 5. The first wing portion FA and the mask portion 5 may face each other with a gap GD in between. The second wing portion FB and the mask portion 5 may face each other with a gap GD in between.

[0027] Seed pattern 4 is an inverted pattern of mask pattern 6. In plan view, the first and second seed portions S1 and S2 are located at the openings of mask pattern 6. Plan view means viewing the object (optical element substrate DK, or crystal growth substrate TK, etc.) in the direction normal to the main substrate 1 (including perspective view). In the cross-sectional view of the object, the plan view can be described as viewing from top to bottom or bottom to top (perspective view). The first and second seed portions S1 and S2 are longitudinal. The first and second seed portions S1 and S2 have their short side in the first direction D1 (the a-axis direction of the first semiconductor L1). The first and second seed portions S1 and S2 have their longitudinal side in the second direction D2 (the m-axis direction of the first semiconductor L1), which is perpendicular to the first direction D1. The first and second seed portions S1 and S2 are aligned in the first direction D1.

[0028] The optical element substrate DK comprises a semiconductor substrate 10 (Figure 4). The semiconductor substrate 10 includes a crystal growth substrate TK and first and second semiconductor layers L1 and L2. The first semiconductor layer L1 is connected to a first seed portion S1. The first semiconductor layer L1 is located on the first seed portion S1. The second semiconductor layer L2 is connected to a second seed portion S2. The second semiconductor layer L2 is located on the second seed portion S2. The second seed portion S2 is the region that serves as the starting point for the growth of the second semiconductor layer L2. The first semiconductor layer L1 and the second semiconductor layer L2 are separated. The first semiconductor layer L1 coupled to the first seed portion S1 and the second semiconductor layer L2 coupled to the second seed portion S2 are aligned in the first direction D1 with a gap GP between them.

[0029] The second semiconductor layer L2 has a base X2 extending upward from the second seed portion S2, and a third wing portion FC and a fourth wing portion FD extending in opposite directions from the base X2 along the first direction D1. The third wing portion FC extends from the base X2 in the negative direction of the first direction D1 (in the opposite direction of the arrow). The fourth wing portion FD extends from the base X2 in the positive direction of the first direction D1 (in the direction of the arrow). The fourth wing portion FD extends from the base X2 in the opposite direction to the third wing portion FC. The optical element substrate DK includes a third light-emitting element layer H3 located on the third wing portion FC and a third photodetector layer J3 located on the fourth wing portion FD.

[0030] As shown in Figure 1, in the optical communication substrate EK, the third light-emitting layer H3 and the third photodetector layer J3 are aligned in the first direction D1 (the a-axis direction of the third and fourth wing portions FC and FD). In the optical communication substrate EK, multiple light-emitting layers H (including H3) are aligned in the second direction D2 (the m-axis direction of the third wing portion FC). Multiple photodetector layers J (including J3) are aligned in the second direction D2 (the m-axis direction of the fourth wing portion FD).

[0031] As shown in Figure 5, the first light-emitting element layer H1 may include a first lower layer HS containing an n-type semiconductor layer, a first active layer HM, a first upper layer HT containing a p-type semiconductor layer, and an electrode HP (e.g., a p-electrode, an anode). The first photodetector layer J1 may include a second lower layer JS containing an n-type semiconductor layer, a second active layer JM, a second upper layer JT containing a p-type semiconductor layer, and an electrode JP. For example, the n-type semiconductor layer is an n-type nitride semiconductor layer. For example, the p-type semiconductor layer is a p-type nitride semiconductor layer. For example, the electrode HP is a p-electrode or an anode.

[0032] In step S25, the first wing portion FA may be separated from the crystal growth substrate TK by breaking it. In step S25, the second wing portion FB may be separated from the crystal growth substrate TK by breaking it. For example, the first and second wing portions FA and FB of the first semiconductor layer L1 may each include a tether portion TZ. The tether portion TZ is a portion adjacent to the base portion X1. The tether portion TZ is a portion of the first or second wing portion FA or FB in which the length in the second direction D2 is smaller than that of other portions. For example, the tether portion TZ is a portion in which the length in the second direction D2 is smaller than that of the central portion of the first or second wing portion FA or FB in the second direction D2. For example, the length in the second direction D2 of the tether portion TZ is smaller than that of the base portion X1. The tether portion TZ may be broken during the transfer of the first light-emitting layer H1 and the first light-receiving layer J1.

[0033] During the transfer of the first light-emitting layer H1, the first light-emitting layer H1 may be connected to the pad HV of the mounting substrate MK via the solder layer 17. During the transfer of the first photodetector layer J1, the first photodetector layer J1 may be connected to the pad JV of the mounting substrate MK via the solder layer 18. The first light-emitting layer H1 may be fixed by the solder layer 17 connected to the pad HV covering at least a portion of the first light-emitting layer H1. The first photodetector layer J1 may be fixed by the solder layer 18 connected to the pad JV covering at least a portion of the first photodetector layer J1. Instead of the solder layer 17, an anisotropic conductive layer 17 that is conductive only in the third direction D3 may be applied.

[0034] Figure 7 is a cross-sectional view showing an example of a method for manufacturing this semiconductor substrate. As shown in Figure 7, the first and second semiconductor layers L1 and L2 can be formed by the ELO (Epitaxial Lateral Overgrowth) method, starting from the first and second seed portions S1 and S2. For example, in the first semiconductor layer L1, the base portion X1 located above the first seed portion S1 becomes a dislocation inheritance portion with many through-dislocations. For example, in the first semiconductor layer L1, the first and second wing portions FA and FB become low-defect portions with a smaller through-dislocation density compared to the dislocation inheritance portion. The second wing portion FB grows laterally above the mask portion 5. For example, the second wing portion FB grows in the positive direction along the first direction D1. The growth of the second wing portion FB is stopped before it meets the third wing portion FC, which grows in the opposite direction to the growth direction of the second wing portion FB (the negative direction along the first direction D1). As a result, a gap GD is formed between the mask portion 5 and the second wing portion FB, and a gap GP is formed between the second and third wing portions FB and FC. The penetration dislocation density of the first and second wing portions FA and FB may be 1 / 5 or less or 1 / 10 or less of the penetration dislocation density of the base portion X1.

[0035] Figure 8 is a block diagram showing an example configuration of the optical communication substrate manufacturing apparatus. As shown in Figure 8, the optical communication substrate manufacturing apparatus 50 comprises an apparatus M20 that performs process S20 in Figure 2, an apparatus M25 that performs process S25, and a control device MC that controls apparatus M20 and apparatus M25. Apparatus M25 may include a wing peeling apparatus.

[0036] Figure 9 is a plan view showing an example of a method for manufacturing this optical communication substrate. As shown in Figure 9, the first semiconductor layer L1 may be patterned before step S25 (transfer step). For example, the first and second wing portions FA and FB may each be divided into multiple portions (divided layers P) aligned in a second direction D2 perpendicular to the first direction D1. In this case, the first light-emitting element layer H1 may be located on the divided layer PA, and the first photodetector layer J1 may be located on the divided layer PB.

[0037] Figure 10 is a flowchart showing an example of a method for manufacturing this optical communication substrate. Figures 11 to 13 are plan views showing an example of a method for manufacturing this optical communication substrate. As shown in Figures 10 and 11, in step S25, at least a portion of the first wing portion FA and the first light-emitting layer H1, and at least a portion of the second wing portion FB and the first light-receiving layer J1 may be simultaneously transferred from the optical element substrate DK to the same mounting substrate MK. In this case, the first light-emitting layer H1, the first light-receiving layer J1, the second light-emitting layer H2, the second light-receiving layer J2, the third light-emitting layer H3, and the third light-receiving layer J3 are transferred simultaneously.

[0038] As shown in Figures 10 and 12, in step S25, after step S21 in which at least a portion of the first wing portion FA and the first light-emitting layer H1 are transferred from the optical element substrate DK, step S22 may be performed in which at least a portion of the second wing portion FB and the first light-receiving element layer J1 are transferred to the same mounting substrate MK. In this case, the first to third light-emitting layers H1 to H3 are transferred first, followed by the first to third light-receiving element layers J1 to J3.

[0039] As shown in Figures 10 and 13, in step S25, after step S23 in which at least a portion of the second wing portion FB and the first photodetector layer J1 are transferred from the optical element substrate DK, step S24 may be performed in which at least a portion of the first wing portion FA and the first light-emitting layer H1 are transferred to the same mounting substrate MK. In this case, the first to third photodetector layers J1 to J3 are transferred first, followed by the first to third light-emitting layers H1 to H3.

[0040] Figures 14 and 15 are plan views showing an example of a method for manufacturing this optical communication substrate. As shown in Figure 14, in the optical element substrate DK, the first light-emitting layer H1 and the first photodetector layer J1 on the first semiconductor layer L1 may be positioned diagonally opposite each other with respect to the first direction D1. In this case, the light-emitting layer H (including H1) and the photodetector layer J (including J2) are alternately arranged in the second direction D2 on the first wing portion FA, and the light-emitting layer H (including H2) and the photodetector layer J (including J1) are alternately arranged in the second direction D2 on the second wing portion FB. In the optical communication substrate EK as well, the light-emitting layer H (including H1) and the photodetector layer J (including J2) are alternately arranged in the second direction D2 on the first wing portion FA, and the light-emitting layer H (including H2) and the photodetector layer J (including J1) are alternately arranged in the second direction D2 on the second wing portion FB.

[0041] As shown in Figure 15, in the optical element substrate DK, the first light-emitting layer H1 and the second light-emitting layer H2 on the first semiconductor layer L1 are positioned diagonally opposite each other with respect to the first direction D1, and the first photodetector layer J1 and the second photodetector layer J2 on the first semiconductor layer L1 are also positioned diagonally opposite each other with respect to the first direction D1. In this case, the light-emitting layer H (including H1) and the photodetector layer J (including J2) are alternately arranged in the second direction D2 on the first wing portion FA, and the photodetector layer J (including J1) and the light-emitting layer H (including H2) are alternately arranged in the second direction D2 on the second wing portion FB. In the optical communication substrate EK as well, the light-emitting layer H (including H1) and the photodetector layer J (including J2) are alternately arranged in the second direction D2 on the first wing portion FA, and the photodetector layer J (including J1) and the light-emitting layer H (including H2) are alternately arranged in the second direction D2 on the second wing portion FB.

[0042] FIG. 16 is a plan view showing an example of the method for manufacturing the present optical communication substrate. FIG. 17 is a cross-sectional view showing an example of the method for manufacturing the present optical communication substrate. As shown in FIG. 16 and FIG. 17, in the optical element substrate DK, the areas of the first wing portion FA and the second wing portion FB may be different from each other. For example, the first wing portion FA may have a larger area than the second wing portion FB. The first light-emitting element layer H1 may be positioned on the first wing portion FA, and the first light-receiving element layer J1 may be positioned on the second wing portion FB. The lengths of the first wing portion FA and the second wing portion FB in the first direction D1 may be different from each other.

[0043] For example, the first wing portion FA may have a larger length in the first direction D1 than the second wing portion FB. The first light-emitting element layer H1 may be positioned on the first wing portion FA, and the first light-receiving element layer J1 may be positioned on the second wing portion FB. With this configuration, the first light-receiving element layer J1 can be formed with a smaller area than the first light-emitting element layer H1. When the first light-receiving element layer J1 is formed with a smaller area than the first light-emitting element layer H1, the indium concentration of the first light-receiving element layer J1 is higher than the indium concentration of the first light-emitting element layer H1. Compared with light-emitting elements, the operating wavelength band of light-receiving elements tends to be shorter. Therefore, by setting the indium concentration of the first light-receiving element layer J1 to be higher than the indium concentration of the first light-emitting element layer H1, the emission wavelength band of the first light-emitting element layer H1 and the light-receiving wavelength band of the first light-receiving element layer J1 can be easily brought close to each other.

[0044] FIGS. 18 and 19 are flowcharts illustrating an example of a method for manufacturing the present optical communication substrate. FIG. 20 is a cross-sectional view illustrating an example of the method for manufacturing the present optical communication substrate. FIG. 21 is a plan view illustrating an example of the method for manufacturing the present optical communication substrate. In step S15 of FIG. 3, steps S11 to S14 shown in FIGS. 18 to 21 may be performed. That is, in step S11, a first lower layer HS including an n-type layer is formed on a first wing portion FA, and a second lower layer JS including an n-type layer is formed on a second wing portion FB. In step S12, a first active layer HM is formed on the first lower layer HS, and a second active layer JM is formed on the second lower layer JS. For example, the n-type layer is an n-type nitride semiconductor layer. In step S13, a first upper layer HT including a p-type layer is formed on the first active layer HM, and a second upper layer JT including a p-type layer is formed on the second active layer JM. For example, the p-type layer is a p-type nitride semiconductor layer. In step S14, a p-electrode HP on the first upper layer HT, an n-electrode HN on the first lower layer HS, a p-electrode JP on the second upper layer JT, and an n-electrode JN on the second lower layer JS are formed.

[0045] Accordingly, a first light-emitting element layer H1 including the first lower layer HS containing an n-type semiconductor layer, the first active layer HM, the first upper layer HT, the p-electrode HP, and the n-electrode HN is formed. Accordingly, a first light-receiving element layer J1 including the second lower layer JS containing an n-type semiconductor layer, the second active layer JM, the second upper layer JT, the p-electrode JP, and the n-electrode JN is formed.

[0046] As shown in FIG. 19, step S11 may include a step SE of forming a layer common to the first lower layer HS and the second lower layer JS using the same material under the same conditions. All layers included in the first lower layer HS and all layers included in the second lower layer JS may be common. After step SE, a predetermined process may be performed on the common layer of the first lower layer HS or the common layer of the second lower layer JS. For example, the predetermined process may be impurity doping, annealing, plasma treatment, or the like.

[0047] Step S12 may include step SF for forming a layer common to the first active layer HM and the second active layer JM using the same material and under the same conditions. All layers in the first active layer HM and all layers in the second active layer JM may be common. After step SF, a predetermined treatment may be applied to the common layer of the first active layer HM or the common layer of the second active layer JM. For example, the predetermined treatment may be impurity doping, annealing, or plasma treatment.

[0048] Step S13 may include step SG for forming a layer common to the first upper layer HT and the second upper layer JT using the same material and under the same conditions. All layers included in the first upper layer HT and all layers included in the second upper layer JT may be common. After step SG, a predetermined treatment may be applied to the common layer of the first upper layer HT or the common layer of the second upper layer JT. For example, the predetermined treatment may be impurity doping, annealing, or plasma treatment.

[0049] As shown in Figure 19, a step of forming a layer specific to the first lower layer HS may be performed before step SE. A step of forming a layer specific to the second lower layer JS may be performed before step SE. Between step SE and step SF, a step of forming a layer specific to the first lower layer HS or a layer specific to the first active layer HM may be performed. Between step SE and step SF, a step of forming a layer specific to the second lower layer JS or a layer specific to the second active layer JM may be performed.

[0050] Between steps SF and SG, a step may be performed to form a layer specific to the first active layer HM or a layer specific to the first upper layer HT. Between steps SF and SG, a step may be performed to form a layer specific to the second active layer JM or a layer specific to the second upper layer JT. After step SG, a step may be performed to form a layer specific to the first upper layer HS. After step SG, a step may be performed to form a layer specific to the second upper layer JS.

[0051] As shown in Figure 21, in the first light-emitting element layer H1, the first lower layer HS and the n electrode HN (cathode) may be in contact, and the first upper layer HT and the p electrode HP (anode) may be in contact. In the first photodetector layer J1, the second lower layer JS and the n electrode JN may be in contact. In the first photodetector layer J1, the second upper layer JT and the p electrode JP may be in contact. The first photodetector layer J1 may be a photodiode in which electrons generated in the second active layer JM by light detection are extracted to the outside via the second lower layer JS and the n electrode JN. The mounting substrate MK of the optical communication substrate EK may include a sensing circuit that detects the flow of electrons from the n electrode JN of the photodetector layer J to the mounting substrate MK.

[0052] The emission wavelength range of the first light-emitting layer H1 and the light-receiving wavelength range of the first photodetector layer J1 may be 420 nm to 480 nm. In this way, even if the layer configuration (layer structure and composition) of the nitride semiconductor is common to the first light-emitting layer H1 and the first photodetector layer, the emission wavelength of the first light-emitting layer H1 and the light-receiving wavelength of the first photodetector layer J1 can be matched.

[0053] In Figures 18 to 21, the first active layer HM and the second active layer JM may contain quantum well layers (MQW). The number of quantum wells in the first active layer HM and the second active layer JM may be equal. The second active layer JM may have more quantum wells than the first active layer HM. The second active layer JM may have a higher indium (In) content than the first active layer HM. The second active layer JM may have a higher indium (In) composition ratio than the first active layer HM. The p electrode JP of the first photodetector layer J1 may have a larger area than the p electrode HP of the first light-emitting layer H1. The n electrode JN of the first photodetector layer J1 may have a larger area than the n electrode HN of the first light-emitting layer H1.

[0054] If the emission wavelength range of the first light-emitting element layer H1 is longer wavelength than the light-receiving wavelength range of the first photodetector layer J1, the emission wavelength range and the light-receiving wavelength range can be superimposed by, for example, making the indium content of the second active layer JM greater than the indium content of the first active layer HM. For example, the indium content of the second active layer JM may be made higher than that of the first active layer HM by making the area of ​​the second active layer JM smaller than that of the first active layer HM. For example, the area of ​​the second active layer JM may be made smaller than that of the first active layer HM by making the width of the second active layer JM in the first direction smaller than the width of the first active layer HM in the first direction. For this purpose, the width of the second wing portion FB (length in the first direction D1) may be made smaller than that of the first wing portion FA.

[0055] Figures 22 to 27 are plan views showing examples of the configuration of the light-emitting layer and the light-receiving layer. As shown in Figures 22 and 23 and Figures 25 and 26, in the first light-emitting layer H1, the p electrode HP (anode) and the n electrode HN (cathode) may be arranged in the second direction D2 (the m-axis direction of the first wing portion FA). In the first light-receiving layer J1, the p electrode JP and the n electrode JN may be arranged in the second direction D2 (the m-axis direction of the second wing portion FB). In this case, as shown in Figures 22 and 25, the p electrode HP of the light-emitting layer H and the p electrode JP of the light-receiving layer J may be arranged in the first direction D1, and the n electrode HN of the light-emitting layer H and the n electrode JN of the light-receiving layer J may also be arranged in the first direction D1.

[0056] As shown in Figures 23 and 26, the p electrode HP of the light-emitting layer H and the p electrode JP of the photodetector layer J may be aligned in an oblique direction with respect to the first direction D1, and the n electrode HN of the light-emitting layer H and the n electrode JN of the photodetector layer J may also be aligned in an oblique direction with respect to the first direction D1. As shown in Figures 24 and 27, in the first light-emitting layer H1, the p electrode HP (anode) and the n electrode HN (cathode) may be aligned in the first direction D1 (a-axis direction of the first wing portion FA), and in the first photodetector layer J1, the p electrode JP and the n electrode JN may be aligned in the first direction D1 (a-axis direction of the second wing portion FB).

[0057] As shown in Figures 22 to 24, the p electrodes HP and JP and the n electrodes HN and JN may be rectangular. As shown in Figures 25 to 27, the p electrodes HP and JP and the n electrodes HN and JN may be circular. The light-emitting region of the light-emitting element layer H may be circular. The light-receiving region of the light-receiving element layer J may be circular.

[0058] Figure 28 is a flowchart showing an example of a method for manufacturing this semiconductor substrate. Figures 29 to 31 are cross-sectional views showing an example of a method for manufacturing this semiconductor substrate. As shown in Figures 28 to 31, the method for manufacturing this semiconductor substrate includes a step S3 of preparing a template substrate TK having a main substrate 1 and a first seed portion S1 with the first direction D1 as the shorter direction, and a step S4 of forming a base portion X1 extending upward from the first seed portion S1 and first and second wing portions FA and FB extending in opposite directions along the first direction D1 from the base portion X1, such that their lengths (widths) in the first direction D1 are different. For example, the length of the first wing portion FA in the first direction D1 is formed to be greater than the length of the second wing portion FB in the first direction D1. By these steps, a semiconductor substrate 10 can be obtained.

[0059] As shown in Figure 29, the growth of one of the two crystal layers GL and GR extending in opposite directions from the base X1 along the first direction D1 may be stopped by a stop wall WS to form a first wing FA that is longer than the second wing portion FB. For example, the growth of the crystal layer GR may be stopped by a stop wall WS to form a second wing FB that is shorter than the first wing portion FA.

[0060] As shown in Figures 30 to 31, a crosslinking layer GK may be formed by associating two crystal layers extending toward each other along the first direction D1 from above the first seed portion S1 and above the second seed portion S2. Then, a first wing portion FA and a second wing portion FB with different lengths (widths) in the first direction D1 may be formed by etching a predetermined portion UG of the crosslinking layer GK. For example, a first wing FA that is longer than the second wing portion FB may be formed. In this case, the predetermined portion UG to be removed may include the association portion KP of the two crystal layers.

[0061] Figure 32 is a cross-sectional view showing an example of a method for manufacturing the optical communication substrate. As shown in Figure 32, the method may include a step of forming a texture structure TS including protrusions 33 on the lower surface of at least one of the first wing portion FA and the second wing portion FB. In the optical element substrate DK, the lower surface of the first wing portion FA may have a plurality of protrusions 33. In the optical element substrate DK, the lower surface of the second wing portion FB may not have protrusions. In the optical communication substrate EK obtained after transfer, the lower surface of the light-emitting element HY may have a plurality of protrusions 33. In the optical communication substrate EK obtained after transfer, the lower surface of the photodetector JY may not have protrusions.

[0062] Figure 33 is a cross-sectional view showing an example of a method for manufacturing the optical communication substrate. In Figure 4 and other figures, a gap GD is located between the first and second wing portions FA and FB and the mask portion 5 (the first and second wing portions FA and FB are floating from the crystal growth substrate TK), but the method is not limited to this. As shown in Figure 33, the first and second wing portions FA and FB may be in contact with the mask portion 5. Even in this case, since there is no crystalline bond between the first and second wing portions FA and FB and the mask portion 5, the first and second wing portions FA and FB can be easily peeled off.

[0063] Figure 34 is a cross-sectional view showing an example of a method for manufacturing this optical communication substrate. In Figure 4 and other figures, the crystal growth substrate TK includes a mask pattern 6, but is not limited to this. As shown in Figure 34, by modifying the pattern of the underlayer 3, a modified region DA (growth suppression region, or non-seed pattern) and a non-modified region SA (seed pattern including the first and second seed portions S1 and S2) can be formed. In Figure 34, a coating 7 (growth suppression film) may be formed on the side surface of the lower part (raised portion) of the base X1. An encapsulation film (growth suppression film) may be formed inside the lower part (raised portion) of the base X1.

[0064] For example, a resist film deposited on the seed layer 3 can be patterned, and the exposed seed material can be surface-modified in the irradiated area by, for example, plasma, thereby forming a modified region DA. Specific examples of plasma include argon plasma, oxygen plasma, nitrogen plasma, hydrogen plasma, or a mixture thereof. In Figure 34, the unmodified region SA (seed pattern) may be aluminum nitride, and the modified region DA (unseed pattern) may be aluminum oxynitride.

[0065] Figure 35 is a flowchart showing an example of a method for manufacturing an optical element substrate. As shown in Figure 35, the method for manufacturing this optical element substrate includes a step S5 of preparing a semiconductor substrate 10 comprising a main substrate 1, a first seed portion S1, and a first semiconductor layer L1 having first and second wing portions FA and FB and containing a nitride semiconductor, and a step S15 of forming a first light-emitting element layer H1 on the first wing portion FA and a first light-receiving element layer J1 on the second wing portion FB.

[0066] Figure 36 is a flowchart showing an example of a method for manufacturing an optical communication device. Figure 37 is a cross-sectional view showing an example of a method for manufacturing an optical communication device. As shown in Figures 36 and 37, the method for manufacturing this optical communication device includes a step S35 of preparing a first optical communication substrate 11 (EK) and a second optical communication substrate 12 (EK), and a step S45 of connecting the first optical communication substrate 11 and the second optical communication substrate 12 to an optical waveguide DL. Through these steps, an optical communication device 30 including the first and second optical communication substrates 11 and 12 and the optical waveguide DL can be obtained. The optical waveguide DL transmits light from the first light-emitting element layer H1 of the first optical communication substrate 11 to the first photo-receiving element layer J1 of the second optical communication substrate 12.

[0067] Figure 38 is a cross-sectional view showing an example of the configuration of this information processing device. As shown in Figure 38, the information processing device 40 can be configured by connecting the first optical communication board 11 of the optical communication device 30 to the processor unit 31 via the interface board IF, and connecting the second optical communication board 12 to the processor unit 32 via the interface board IS.

[0068] The information processing device 40 converts the output data of the processor unit 31 into a light-emitting pattern on the first optical communication board 11, transmits the light-emitting pattern to the second optical communication board 12 via the optical waveguide group LF and converts it back into data, thereby enabling input of the output data of the processor unit 31 to the processor unit 32. Similarly, the output data of the processor unit 32 is converted into a light-emitting pattern on the second optical communication board 12, transmits the light-emitting pattern to the first optical communication board 11 via the optical waveguide group LF and converts it back into data, thereby enabling input of the output data of the processor unit 32 to the processor unit 31. This makes high-speed bidirectional communication between the processor units 31 and 32 possible.

[0069] Figure 39 is a flowchart showing an example of a method for manufacturing an optical communication substrate. Figures 40 and 41 are cross-sectional views showing an example of a method for manufacturing an optical communication substrate. As shown in Figures 39 to 41, the method for manufacturing this optical communication substrate includes a step S5 of preparing a semiconductor substrate 10 having a main substrate 1, a first seed portion S1, and a first semiconductor layer L1 containing a nitride semiconductor and having first and second wing portions FA and FB; a step S15 of forming a first light-emitting element layer H1 on the first wing portion FA and a first light-receiving element layer J1 on the second wing portion FB; and a step S23 of connecting the optical element substrate DK to the mounting substrate MK. Through these steps, an optical communication substrate EK can be obtained, comprising the semiconductor substrate 10, an element substrate DK including the first light-emitting element layer H1 and the first light-receiving element layer J1, and a mounting substrate MK connected to the element substrate DK.

[0070] A translucent substrate can be used for the main substrate 1 in Figure 40. A translucent substrate is, for example, a sapphire substrate. In Figure 41, a hole UH that overlaps with the light-emitting element layer H in a plan view and a hole UJ that overlaps with the light-receiving element layer J in a plan view are formed on the main substrate 1. In this case, since the holes UH and UJ become light-transmitting holes, the main substrate 1 may be a non-translucent substrate. A non-translucent substrate is, for example, a silicon substrate.

[0071] Figure 42 is a block diagram showing an example configuration of the optical communication substrate manufacturing apparatus. As shown in Figure 42, the optical communication substrate manufacturing apparatus 70 comprises an apparatus M5 that performs process S5 in Figure 3, an apparatus M15 that performs process S15, an apparatus M25 that performs process S25, and a control device MX that controls apparatus M5, apparatus M15, and apparatus M25. Apparatus M15 may include a MOCVD apparatus.

[0072] Figure 43 is a block diagram showing an example configuration of the optical element substrate manufacturing apparatus. As shown in Figure 43, the optical communication substrate manufacturing apparatus 80 comprises an apparatus M5 that performs process S5 in Figure 35, an apparatus M15 that performs process S15, and a control device MY that controls apparatus M5 and apparatus M15. Apparatus M15 may include a MOCVD apparatus.

[0073] Figure 44 is a block diagram showing an example configuration of a manufacturing apparatus for the optical communication device. As shown in Figure 44, the manufacturing apparatus 90 for the optical communication substrate comprises an apparatus M35 that performs process S35 in Figure 36, an apparatus M45 that performs process S45, and a control device MZ that controls apparatus M35 and apparatus M45.

[0074] [Examples] In Example 1, a seed layer was deposited on top of the main substrate using the sputtering method. The main substrate is a sapphire substrate or a silicon substrate. The seed layer is AlN. By using a sputtering method such as parallel plate sputtering, magnetron sputtering, or pulsed sputtering, low-temperature and low-cost film deposition is possible. Alternatively, a highly crystalline AlN film may be formed using the MOCVD method.

[0075] The first and second semiconductor layers L1 and L2 (collectively referred to as semiconductor layer L as appropriate) are formed on a crystal growth substrate TK using a MOCVD apparatus. In Example 1, the semiconductor layer L is a GaN layer, the growth temperature is 1000°C to 1200°C, the V / III ratio is 500 to 20000, and the growth pressure is 50 kPa. To make the semiconductor layer L n-type, SiH ４ You can dope by flushing it. SiH ４ Even without introducing the necessary components, Si doping can be performed using Si evaporated from a Si-containing material in the mask pattern 6. For example, a Si-containing material is SiO ２ Alternatively, it may be SiN, etc.

[0076] It is preferable to set the film deposition conditions in at least two stages. In the first stage, the film deposition temperature is set to about 1030°C and V / III is set to about 2000 to form growth nuclei (vertical growth sections) of the first semiconductor layer L1 on the first seed section S1 and growth nuclei (vertical growth sections) of the second semiconductor layer L2 on the second seed section S2 (see Figure 7). The thickness (height) of the growth nuclei may be about 0.2 to 3.0 [μm]. The width of the growth nuclei may be about the same as the width of the ridge section R (width of the first seed section S1) or slightly exceeding the size in the a-axis direction (second direction). In the second stage, the film deposition temperature is raised to about 100°C to grow (stretch) the first and second wing sections FA and FB (GaN layers) from the growth nuclei in the lateral direction (a-axis direction). Then, when the width of the gap GP between the second and third wing portions FB and FC, which grow in opposite directions on the void GD, reaches a specified value, growth is stopped to obtain the semiconductor substrate 10. For example, the specified value is 10 μm or less.

[0077] A GaN-based semiconductor layer (first lower layer HS, first active layer HM, and first upper layer HT) of the first light-emitting element layer H1 and a GaN-based semiconductor layer (second lower layer JS, second active layer JM, and second upper layer JT) of the first photodetector layer J1 were deposited on the semiconductor substrate 10 using the same process, and each of the resulting GaN-based semiconductor layers was patterned.

[0078] Specifically, the first and second lower layers HS and JS were formed in the following order: an n-type GaN layer, an n-type AlGaN layer, a superlattice layer of GaN and InGaN layers, and a non-doped GaN layer (all layers of the first and second lower layers were common). The first and second active layers HM and JM were formed as a multi-quantum well layer of InGaN layers (well layer) and GaN layers (barrier layer) (all layers of the first and second active layers were common). The first and second upper layers HT and JT were formed in the following order: a p-type AlGaN layer, a p-type GaN layer (low-concentration Mg doped), and a p-type GaN layer (high-concentration Mg doped) (all layers of the first and second upper layers were common). As a result, the emission wavelength range of the first light-emitting element layer H1 and the light-receiving wavelength range of the first photodetector layer J1 could be superimposed (for example, 420 to 480 nm).

[0079] After forming an insulating film IS covering the sides of the GaN-based semiconductor layers of the first light-emitting layer H1 and the second photodetector layer J1, the p-electrode HP and n-electrode HN of the first light-emitting layer H1 and the p-electrode JP and n-electrode JN of the first photodetector layer J1 were formed using a metal film to obtain an optical element substrate DK. For example, the metal film contains at least one of Al, Ti, Sn, Au, Ag, Cu, Mg, Mo, and Pt. For example, the metal film is a single element or an alloy. For example, the metal film is a multilayer film.

[0080] Metal oxides may be used as electrode materials. For example, the metal oxide may be indium tin oxide or indium zinc oxide. The materials for p-electrode HP, n-electrode HN, p-electrode JP, and n-electrode JN can be common, but are not limited to this. p-electrode HP and p-electrode JP may be made of different materials. n-electrode HN and n-electrode JN may be made of different materials. p-electrode HP and n-electrode HN may be made of different materials. p-electrode JP and n-electrode JN may be made of different materials.

[0081] Furthermore, multiple light-emitting layers H and multiple first light-receiving layers J were transferred from the optical element substrate DK to the same mounting substrate MK to obtain an optical communication substrate EK (light-emitting and light-receiving substrate). For example, by rupturing the bases (tether portions TZ) of the first and second wing portions FA and FB while the first light-emitting layer H1 and the first light-receiving layer J are connected to the mounting substrate via a conductive layer, the light-emitting body HY, which includes a part of the first wing portion FA and the first light-emitting layer H1, and the light-receiving body JY, which includes a part of the second wing portion FB and the first light-receiving layer J1, can be transferred to the mounting substrate MK. For example, the mounting substrate MK is an ASIC. For example, the conductive layer is a solder layer or an anisotropic conductive layer, etc. When rupturing the tether portion TZ, ultrasonic vibration may be applied to at least one of the optical element substrate DK and the mounting substrate MK.

[0082] (Note) The above disclosure is for illustrative and explanatory purposes only, and not for limitation. Based on these examples and descriptions, many variations will be obvious to those skilled in the art, and these variations are also included in the embodiments.

[0083] Disclosure 1: An optical element substrate comprising: a main substrate; a first seed portion located above the main substrate with its first direction being the shorter direction; a base portion extending upward from the first seed portion; and a first wing portion and a second wing portion extending in opposite directions from the base portion along the first direction, the first semiconductor layer containing a nitride semiconductor; a first light-emitting element layer located on the first wing portion; and a first photodetector layer located on the second wing portion.

[0084] Disclosure Item 2: The optical element substrate according to Disclosure Item 1, wherein the first light-emitting layer and the first photodetector layer each include an active layer, and the first photodetector layer has a higher indium content in the active layer than the first light-emitting layer.

[0085] Disclosure 3: The optical element substrate according to Disclosure 1 or 2, wherein the first light-emitting layer and the first photodetector layer each include electrodes, and the area of ​​the electrodes in the first photodetector layer is larger than that of the first light-emitting layer.

[0086] Disclosure Item 4: An optical element substrate according to any one of Disclosure Items 1 to 3, wherein the first light-emitting element layer is a light-emitting diode layer and the first light-receiving element layer is a photodiode layer.

[0087] Disclosure Item 5: The optical element substrate according to any one of Disclosure Items 1 to 4, wherein the first seed portion has a second direction perpendicular to the first direction as its longitudinal direction, and the second direction is the m-axis direction of the nitride semiconductor.

[0088] Disclosure Item 6: The first light-emitting layer and the first light-receiving layer are arranged in the first direction in the optical element substrate according to any one of Disclosure Items 1 to 5.

[0089] Disclosure Item 7: The optical element substrate according to any one of Disclosure Items 1 to 6, wherein the first light-emitting layer and the first light-receiving layer are located diagonally opposite each other with respect to the first direction.

[0090] Disclosure Item 8: An optical element substrate according to any one of Disclosure Items 1 to 7, wherein the areas of the first wing portion and the second wing portion are different.

[0091] Disclosure Item 9: The optical element substrate according to Disclosure Item 8, wherein the second wing portion has a larger area than the first wing portion, the first light-emitting element layer is located on the first wing portion, and the first light-receiving element layer is located on the second wing portion.

[0092] Disclosure Item 10: The optical element substrate according to any one of Disclosure Items 1 to 9, wherein the first wing portion and the second wing portion have different lengths in the first direction.

[0093] Disclosure Item 11: An optical element substrate according to any one of disclosure items 1 to 10, wherein a gap is located between each of the first wing portion and the second wing portion and the main substrate.

[0094] Disclosure Item 12: The optical element substrate according to any one of Disclosure Items 1 to 11, wherein the lower surface of the first wing portion has a plurality of protrusions, and the lower surface of the second wing portion does not have protrusions.

[0095] Disclosure Item 13: The optical element substrate according to any one of disclosure items 1 to 12, comprising a second light-emitting layer and a second photodetector layer located on the first semiconductor layer.

[0096] Disclosure Item 14: An optical element substrate according to any one of disclosure items 1 to 13, comprising: a second seed portion located above the main substrate and having the first direction as the short side; a second semiconductor layer having a base portion extending upward from the second seed portion and a third wing portion and a fourth wing portion extending in opposite directions from the base portion, and containing a nitride semiconductor; a third light-emitting element layer located on the third wing portion; and a third photodetector layer located on the fourth wing portion, wherein the first seed portion and the second seed portion are aligned in the first direction, and the first semiconductor layer and the second semiconductor layer are aligned in the first direction with a gap between them.

[0097] Disclosure Item 15: A method for manufacturing an optical element substrate, comprising the steps of: preparing a semiconductor substrate comprising a main substrate; a first seed portion located above the main substrate and having a first direction as the short side; a base portion extending upward from the first seed portion; and a first wing portion and a second wing portion extending in opposite directions from the base portion along the first direction, the first semiconductor layer comprising a nitride semiconductor; and forming a first light-emitting element layer located on the first wing portion and a first photodetector layer located on the second wing portion.

[0098] Disclosure Item 16: A method for manufacturing an optical communication substrate, comprising the steps of: preparing an optical element substrate comprising a main substrate; a first seed portion located above the main substrate with its first direction being the short side; a base portion extending upward from the first seed portion; and a first wing portion and a second wing portion extending in opposite directions from the base portion along the first direction, the first semiconductor layer containing a nitride semiconductor; a first light-emitting layer located on the first wing portion; and a first photodetector layer located on the second wing portion; and transferring the first light-emitting layer and the first photodetector layer from the optical element substrate to the same mounting substrate.

[0099] Disclosure Item 17: A method for manufacturing an optical communication substrate according to Disclosure Item 16, wherein the first light-emitting layer and the first light-receiving element layer are transferred simultaneously.

[0100] Disclosure Item 18: A method for manufacturing an optical communication substrate according to Disclosure Item 16, wherein the first photodetector layer is transferred before or after the transfer of the first light-emitting element layer.

[0101] Disclosure Item 19: A method for manufacturing an optical communication substrate according to any one of disclosure items 16 to 18, comprising transferring at least a portion of the first wing portion and the first light-emitting layer to the mounting substrate while separating them from the main substrate and the crystal growth substrate including the first seed portion, and transferring at least a portion of the second wing portion and the first light-receiving element layer to the mounting substrate while separating them from the crystal growth substrate.

[0102] Disclosure Item 20: A method for manufacturing an optical communication substrate as described in Disclosure Item 19, wherein the first wing portion is separated from the crystal growth substrate by breaking it, and the second wing portion is separated from the crystal growth substrate by breaking it.

[0103] Disclosure Item 21: A method for manufacturing an optical communication substrate according to Disclosure Item 17, wherein the optical element substrate comprises a second light-emitting layer and a second photodetector layer located on the first semiconductor layer, and the first light-emitting layer, the first photodetector layer, the second light-emitting layer, and the second photodetector layer are transferred simultaneously.

[0104] Disclosure Item 22: A method for manufacturing an optical communication substrate according to any one of Disclosure Items 16 to 21, wherein the optical element substrate is located above the main substrate and comprises a second seed portion having the first direction as the short side, a base portion extending upward from the second seed portion, and a third wing portion and a fourth wing portion extending in opposite directions from the base portion, and includes a second semiconductor layer containing a nitride semiconductor, a third light-emitting layer located on the third wing portion, and a third photodetector layer located on the fourth wing portion, wherein the first seed portion and the second seed portion are aligned in the first direction, and the first semiconductor layer and the second semiconductor layer are aligned in the first direction with a gap between them.

[0105] Disclosure Item 23: A method for manufacturing an optical communication substrate according to Disclosure Item 22, comprising simultaneously transferring the first light-emitting layer, the first photodetector layer, the third light-emitting layer, and the third photodetector layer.

[0106] 1 Main substrate 4 Seed pattern 5 Mask section 6 Mask pattern 10 Semiconductor substrate 30 Optical communication device 40 Information processing device 50 Optical communication substrate manufacturing device 70 Optical communication substrate manufacturing device 80 Optical element substrate manufacturing device 90 Optical communication device manufacturing device FA First wing section FB Second wing section S1 First seed section S2 Second seed section DK Optical element substrate EK Optical communication substrate MK Mounting substrate H1 First light-emitting layer J1 First light-receiving layer L1 First semiconductor layer L2 Second semiconductor layer TK Crystal growth substrate

Claims

1. An optical element substrate comprising: a main substrate; a first seed portion located above the main substrate with its first direction being the shorter direction; a base portion extending upward from the first seed portion; and a first wing portion and a second wing portion extending in opposite directions from the base portion along the first direction, the first semiconductor layer containing a nitride semiconductor; a first light-emitting element layer located on the first wing portion; and a first photodetector layer located on the second wing portion.

2. The optical element substrate according to claim 1, wherein each of the first light-emitting layer and the first photodetector layer includes an active layer, and the indium concentration of the active layer in the first photodetector layer is greater than that of the first light-emitting layer.

3. The optical element substrate according to claim 1 or 2, wherein each of the first light-emitting layer and the first photodetector layer includes electrodes, and the area of ​​the electrodes in the first photodetector layer is larger than that of the first light-emitting layer.

4. The optical element substrate according to any one of claims 1 to 3, wherein the first light-emitting element layer is a light-emitting diode layer and the first light-receiving element layer is a photodiode layer.

5. The optical element substrate according to any one of claims 1 to 4, wherein the first seed portion has a second direction perpendicular to the first direction as its longitudinal direction, and the second direction is the m-axis direction of the nitride semiconductor.

6. The optical element substrate according to any one of claims 1 to 5, wherein the first light-emitting layer and the first light-receiving layer are arranged in the first direction.

7. The optical element substrate according to any one of claims 1 to 6, wherein the first light-emitting layer and the first light-receiving layer are located diagonally opposite each other with reference to the first direction.

8. The optical element substrate according to any one of claims 1 to 7, wherein the areas of the first wing portion and the second wing portion are different.

9. The optical element substrate according to claim 8, wherein the second wing portion has a larger area than the first wing portion, the first light-emitting layer is located on the first wing portion, and the first light-receiving element layer is located on the second wing portion.

10. The optical element substrate according to any one of claims 1 to 9, wherein the first wing portion and the second wing portion have different lengths in the first direction.

11. The optical element substrate according to any one of claims 1 to 10, wherein a gap is located between each of the first wing portion and the second wing portion and the main substrate.

12. The optical element substrate according to any one of claims 1 to 11, wherein the lower surface of the first wing portion has a plurality of protrusions, and the lower surface of the second wing portion does not have protrusions.

13. The optical element substrate according to any one of claims 1 to 12, wherein the optical element substrate comprises a second light-emitting layer and a second photodetector layer located on the first semiconductor layer.

14. The optical element substrate according to any one of claims 1 to 13, comprising: a second seed portion located above the main substrate and having the first direction as the short side; a second semiconductor layer having a base portion extending upward from the second seed portion and a third wing portion and a fourth wing portion extending in opposite directions from the base portion, and containing a nitride semiconductor; a third light-emitting element layer located on the third wing portion; and a third photodetector layer located on the fourth wing portion, wherein the first seed portion and the second seed portion are aligned in the first direction, and the first semiconductor layer and the second semiconductor layer are aligned in the first direction with a gap between them.

15. A method for manufacturing an optical element substrate, comprising the steps of: preparing a semiconductor substrate comprising a main substrate; a first seed portion located above the main substrate with its first direction being the short side; a base portion extending upward from the first seed portion; and a first wing portion and a second wing portion extending in opposite directions from the base portion along the first direction, the first semiconductor layer comprising a nitride semiconductor; and forming a first light-emitting element layer located on the first wing portion and a first photodetector layer located on the second wing portion.

16. A method for manufacturing an optical communication substrate, comprising the steps of: preparing an optical element substrate comprising a main substrate; a first seed portion located above the main substrate with its first direction being the short side; a base portion extending upward from the first seed portion; and a first wing portion and a second wing portion extending in opposite directions from the base portion along the first direction, the first semiconductor layer containing a nitride semiconductor; a first light-emitting layer located on the first wing portion; and a first photodetector layer located on the second wing portion; and transferring the first light-emitting layer and the first photodetector layer from the optical element substrate to the same mounting substrate.

17. The method for manufacturing an optical communication substrate according to claim 16, wherein the first light-emitting layer and the first light-receiving element layer are transferred simultaneously.

18. The method for manufacturing an optical communication substrate according to claim 16, wherein the first light-receiving element layer is transferred before or after the transfer of the first light-emitting element layer.

19. A method for manufacturing an optical communication substrate according to any one of claims 16 to 18, wherein at least a portion of the first wing portion and the first light-emitting layer are transferred to the mounting substrate, separated from the main substrate and the crystal growth substrate including the first seed portion, and at least a portion of the second wing portion and the first light-receiving element layer are transferred to the mounting substrate, separated from the crystal growth substrate.

20. A method for manufacturing an optical communication substrate according to claim 19, wherein the first wing portion is separated from the crystal growth substrate by breaking it, and the second wing portion is separated from the crystal growth substrate by breaking it.

21. The method for manufacturing an optical communication substrate according to claim 17, wherein the optical element substrate comprises a second light-emitting layer and a second photodetector layer located on the first semiconductor layer, and the first light-emitting layer, the first photodetector layer, the second light-emitting layer, and the second photodetector layer are transferred simultaneously.

22. The optical element substrate comprises a second seed portion located above the main substrate and having the first direction as the short side, a base portion extending upward from the second seed portion, and a third wing portion and a fourth wing portion extending in opposite directions from the base portion, and a second semiconductor layer containing a nitride semiconductor, a third light-emitting layer located on the third wing portion, and a third light-receiving element layer located on the fourth wing portion, wherein the first seed portion and the second seed portion are aligned in the first direction, and the first semiconductor layer and the second semiconductor layer are aligned in the first direction with a gap between them, the method for manufacturing an optical communication substrate according to any one of claims 16 to 21.

23. The method for manufacturing an optical communication substrate according to claim 22, wherein the first light-emitting layer, the first photodetector layer, the third light-emitting layer, and the third photodetector layer are transferred simultaneously.

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