Optical reception device and high-speed signal reception method
Patent Information
- Application Number
- PCT/JP2025/012935
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2025-03-28
- Publication Date
- 2026-10-01
Smart Images
Figure JP2025012935_01102026_PF_FP_ABST
Abstract
Description
Optical receiving device and high-speed signal receiving method
[0001] The present invention relates to an optical receiving device and a high-speed signal receiving method.
[0002] In recent years, frequency division reception (FDI) systems have attracted attention for their ability to generate and receive high-speed modulated signals by dividing ultra-wideband signals into narrowband signals and then recombining the divided narrowband signals (see, for example, Patent Document 1 and Non-Patent Document 1). Figure 12 shows an example of the configuration of a conventional optical receiver. The optical receiver shown in Figure 12 is a receiver that performs the above-described frequency division reception system. The optical receiver comprises a photodetector, a wideband signal division unit, a mixer, a delay adjustment unit, a plurality of ADCs #1 and #2, a clock source, and a digital signal processing unit.
[0003] The photodetector receives an optically modulated signal transmitted from the optical transmitter and outputs a broadband signal obtained from the received optically modulated signal. The broadband signal splitter divides the broadband signal into multiple signal bands. For example, the broadband signal splitter shown in Figure 12 splits the broadband signal and divides it into a low-frequency signal and a high-frequency signal using a filter. The broadband signal splitter outputs the low-frequency signal to the delay adjustment unit and the high-frequency signal to the mixer. The mixer shifts the frequency of the high-frequency signal obtained by the filter of the broadband signal splitter to a lower frequency by a predetermined frequency. In other words, the mixer down-converts (frequency shifts) the high-frequency signal. ADC#1 converts the low-frequency signal output from the broadband signal splitter into a first digital signal by performing analog-to-digital conversion on the low-frequency signal. ADC#2 converts the high-frequency signal, which has been down-converted by the mixer, into a second digital signal by performing analog-to-digital conversion on the high-frequency signal. Here, the timing of the high-frequency signal input to ADC#2 is delayed by the processing time of the mixer. Therefore, the delay adjustment unit adds a delay to the incoming low-frequency signal by the amount of processing time required by the mixer. This allows for adjustment of the timing at which the low-frequency signal is input to ADC#1 and the timing at which the high-frequency signal is input to ADC#2.
[0004] The digital signal processing unit performs digital signal processing on the first digital signal output from ADC#1 and the second digital signal output from ADC#2. The digital signal processing unit comprises a DUC, an adder, and an equalizer. The DUC is a digital upconverter that shifts the frequency of the second digital signal to a higher frequency by a predetermined frequency. In other words, the DUC upconverts (frequency shifts) the second digital signal. More specifically, since the DUC performs upconversion on the second digital signal (the sampled signal), in configurations where the sampling rate of ADC#2 is low, upconversion is performed after upsampling (+ anti-aliasing filter). Note that if the sampling rate of ADC#2 is high, upsampling is unnecessary. Unwanted image components (negative frequency components that have been upconverted) resulting from upconversion can be removed by performing a Hilbert transform before upconversion or by using a high-pass filter. The adder adds the first digital signal and the upconverted second digital signal. The equalizer performs equalization using the digital signals added by the adder.
[0005] International Publication No. 2019 / 031447
[0006] F. Hamaoka, M. Nakamura, M. Nagatani, H. Wakita, T. Kobayashi, H. Yamazaki, H. Nosaka and Y. Miyamoto, “Ultra-wideband Optical Receiver Using Electrical Spectrum Decomposition Technique”, 2020 European Conference on Optical Communications (ECOC).
[0007] However, in conventional optical receivers, low-frequency and high-frequency signals pass through different devices and paths and are converted into first and second digital signals by ADC#1 and ADC#2, respectively. Therefore, a circuit design is required to reduce the difference in transfer functions, including the delay difference between the low-frequency and high-frequency signals. Furthermore, a delay adjustment unit is also required to eliminate the delay difference between the low-frequency and high-frequency signals, as shown in Figure 12. Moreover, if clock synchronization is not performed between the mixer's drive clock (clock source) and the drive clocks (clock sources) of each ADC#1 and #2, the phase difference between the low-frequency and high-frequency signals will fluctuate, thus requiring clock synchronization. However, clock synchronization requires the addition of a synchronization circuit composed of analog circuits, which leads to problems such as increased mounting area and power consumption.
[0008] In view of the above circumstances, the present invention aims to provide a technology that can reduce the mounting area and power consumption of an optical receiving device that performs reception using a frequency division reception method, which is a method for receiving ultra-high-speed signals, while also improving signal quality.
[0009] One aspect of the present invention is an optical receiving device comprising: a splitting unit that splits a broadband signal transmitted from an optical transmitting device into signals of at least a first frequency band and signals of a second frequency band; a mixer that frequency-shifts the frequency of the signals of the second frequency band to a lower frequency; a plurality of analog-to-digital conversion units that generate a first digital signal and a second digital signal by performing analog-to-digital conversion on the signals of the first frequency band and the frequency-shifted signals of the second frequency band; and a digital signal processing unit that performs compensation using a transfer function on the first digital signal and the second digital signal, respectively, and dynamically updates the transfer function.
[0010] One aspect of the present invention is a high-speed signal receiving method that divides a broadband signal transmitted from an optical transmitting device into signals of at least a first frequency band and signals of a second frequency band, shifts the frequency of the signal of the second frequency band to a lower frequency, generates a first digital signal and a second digital signal by performing analog-to-digital conversion on the signal of the first frequency band and the frequency-shifted signal of the second frequency band, performs compensation using a transfer function on each of the first digital signal and the second digital signal, and dynamically updates the transfer function.
[0011] The present invention makes it possible to reduce the mounting area and power consumption of an optical receiving device that performs reception using a frequency division reception method, which is a method for receiving ultra-high-speed signals.
[0012] This figure shows an example configuration of an optical receiver in the first embodiment. This figure shows an example configuration of an optical receiver in the second embodiment. This figure illustrates the processing of the update unit included in the optical receiver in the second embodiment. This figure illustrates the processing of the frequency domain downsample unit included in the optical receiver in the second embodiment. This figure shows an example configuration of an optical receiver in the third embodiment. This figure illustrates the processing of the BPF in the third embodiment. This figure shows an example configuration of an optical receiver in the fourth embodiment. This figure shows an example configuration of an optical receiver in the fifth embodiment. This figure shows an example configuration of an optical receiver in the sixth embodiment. This figure shows an example configuration of an optical receiver in the seventh embodiment. This figure shows an example configuration of an optical receiver in the eighth embodiment. This figure shows an example configuration of a conventional optical receiver.
[0013] One embodiment of the present invention will be described below with reference to the drawings.
[0014] (First Embodiment) Figure 1 shows an example of the configuration of the optical receiver 10 in the first embodiment. The optical receiver 10 is a receiver that receives optically modulated signals transmitted from an optical transmitter (not shown) using a frequency division receiving method, which is an ultra-high-speed signal receiving method. The optical receiver 10 comprises a photodetector 50 and a high-speed signal receiving unit 60. The high-speed signal receiving unit 60 comprises a broadband signal division unit 11, a clock source 13, a mixer 14, a clock source 15, ADCs 16-1 and 16-2, and a digital signal processing unit 17.
[0015] The photodetector 50 receives an optically modulated signal transmitted from an optical transmitter (not shown) and outputs a broadband signal obtained from the received optically modulated signal to the broadband signal splitting unit 11. The broadband signal splitting unit 11 splits the bandwidth of the broadband signal output from the photodetector 50. For example, the broadband signal splitting unit 11 splits the broadband signal into two using filters 12-1 and 12-2. Here, filter 12-1 is a low-pass filter (LPF), and filter 12-2 is a high-pass filter (HPF). These filters 12 have overlap between their bandwidths. The LPF of filter 12-1 may also be the analog bandwidth characteristic of the ADC 16-1. In this case, filter 12-1 is unnecessary. As a result, the broadband signal splitting unit 11 generates two narrowband signals.
[0016] The two narrowband signals are signals in different frequency bands. Here, we refer to them as a first narrowband signal (low-frequency signal) and a second narrowband signal (high-frequency signal) to distinguish between the two narrowband signals. The first narrowband signal generated by the broadband signal splitting unit 11 is input to the ADC 16-1 via the first path, and the second narrowband signal is input to the mixer 14 via the second path. The number of divisions by the broadband signal splitting unit 11 should be two or more. If the number of divisions is three or more, the number of filters 12 increases according to the number of divisions. When the number of divisions is N, filter 12-1 is an LPF, filter 12-N is an HPF, and filters 12-2 to 12-(N-1) are each composed of band-pass filters (BPFs) with adjacent band overlaps in different center bands. As a result, the broadband signal splitting unit 11 generates N narrowband signals from the first narrowband signal to the Nth narrowband signal.
[0017] Furthermore, when N is 3 or greater, the second to the Nth narrowband signal are converted into narrowband digital signals by the mixer and ADC described below. The following explanation will focus on the case where the number of divisions N=2, but the processing relationships between each band can be extended to N=3 or greater by processing them in the same way as the first and second narrowband signals.
[0018] The clock source 13 outputs a drive clock to drive the mixer 14. The mixer 14 operates based on the drive clock output from the clock source 13 and shifts the frequency of the second narrowband signal down by a predetermined frequency. In other words, the mixer 14 downconverts (frequency shifts) the second narrowband signal.
[0019] The clock source 15 outputs a drive clock to drive the ADCs 16-1 and 16-2. The ADCs 16-1 and 16-2 operate based on the drive clock output from the clock source 15. The ADC 16-1 converts the first narrowband signal into a first digital signal by performing analog-to-digital conversion on the first narrowband signal branched by the wideband signal splitter 11. The ADC 16-2 converts the second narrowband signal into a second digital signal by performing analog-to-digital conversion on the second narrowband signal down-converted by the mixer 14.
[0020] The digital signal processing unit 17 performs digital signal processing on the first digital signal output from ADC 16-1 and the second digital signal output from ADC 16-2. The digital signal processing unit 17 comprises a DUC 40, a branching unit 41-1, a branching unit 41-2, an equalizer 20-1, an equalizer 20-2, an adder 19, a branching unit 42, and an update unit 37. The DUC 40 upconverts the second digital signal as described in Figure 12. The branching unit 41-1 branches the first digital signal and inputs it to the equalizer 20-1 and the update unit 37. The branching unit 41-2 branches the upconverted second digital signal and inputs it to the equalizer 20-2 and the update unit 37. The outputs from the equalizer 20-1 and the equalizer 20-2 are added by the adder 19 to reconstruct a wideband received signal. Here, equalizers 20-1 and 20-2 are composed of Finite Impulse Response (FIR) filters, etc. The reconstructed broadband received signal is branched in the branching section 42. The branched broadband received signal is input to the update section 37 and output from the digital signal processing section 17.
[0021] In the updating unit 37, an error between the wideband received signal branched by the branching unit 42 and a target signal is calculated. Here, as the target signal, a known signal inserted by an unillustrated optical transmission apparatus, or a tentatively-decision symbol signal obtained by tentatively deciding the wideband received signal can be used. In the updating unit 37, the filter coefficients of the equalizer 20-1 and the equalizer 20-2 are updated based on the error with respect to the equalizer input signals from the branching unit 41-1 and the branching unit 41-2 by using a Least Mean Square (LMS) algorithm or the like so as to reduce the error. Other than the LMS algorithm, a Recursive Least Squares (RLS) algorithm or the like may also be used as the updating algorithm.
[0022] According to the optical receiver 10 configured as described above, a photodetector 50 receives a wideband signal transmitted from an optical transmission apparatus (not illustrated), and the wideband signal is divided into narrowband signals of different frequency bands (at least a first frequency band signal and a second frequency band signal), namely a first narrowband signal and a second narrowband signal. The optical receiver 10 includes: a wideband signal dividing unit 11; a mixer 14 configured to frequency-shift the frequency of the second narrowband signal to a lower frequency band; a plurality of ADCs 16-1 and 16-2 configured to generate a first digital signal and a second digital signal by performing analog-to-digital conversion on the first narrowband signal and the frequency-shifted second narrowband signal respectively; and a digital signal processing unit 17 including a plurality of equalizers 20-1 and 20-2 configured to dynamically compensate for the difference in transfer function between bands after band division by digital signal processing under the control of the updating unit 37, based on the first digital signal and the second digital signal.
[0023] In this way, the optical receiver 10 dynamically compensates for the difference in transfer function including the delay difference between bands after band division by digital signal processing. Variations in phase difference between the mixer 14 and the ADC 16 are compensated by dynamic updating of the equalizers 20-1 and 20-2 performed by the updating unit 37. This eliminates the need for a delay adjustment unit between the filter 12-1 and the ADC 16-1 and a clock synchronization circuit between the mixer 14 and the ADC 16, which are required in the conventional art. Therefore, it is possible to reduce the mounting area and power consumption.
[0024] In the above-described embodiment, the case where the number of divisions is 2 has been described. However, even when the number of divisions is 2 or more, it is sufficient to add a DUC and an equalizer.
[0025] (Second Embodiment) In the first embodiment, the configuration for processing the DUC and the equalizer in the time domain has been described. In the second embodiment, the configuration for performing processing in the frequency domain will be described. It is generally known that performing convolution operation in an FIR filter in the frequency domain can reduce the operation scale on the order of logarithm with respect to the number of taps. Further, up-conversion in a DUC is a frequency shift in the frequency domain and can be realized without requiring operation.
[0026] Fig. 2 is a diagram showing a configuration example of an optical receiver 10b according to the second embodiment. The optical receiver 10b is a receiver that receives an optical modulation signal transmitted from an unillustrated optical transmitter by a frequency division reception method which is a reception method for ultra-high-speed signals. The optical receiver 10b includes a photodetector 50 and a high-speed signal receiving unit 60b. The high-speed signal receiving unit 60b includes a wideband signal dividing unit 11, a clock source 13, a mixer 14, a clock source 15, ADCs 16-1 and 16-2, and a digital signal processing unit 17b. The optical receiver 10b differs in configuration from the optical receiver 10 in that it includes a digital signal processing unit 17b instead of the digital signal processing unit 17. The following description focuses on differences from the optical receiver 10.
[0027] The digital signal processing unit 17b performs digital signal processing on the first digital signal output from the ADC 16-1 and the second digital signal output from the ADC 16-2. The digital signal processing unit 17b includes an adding unit 19, an FFT unit 30, a filter 31, an FFT unit 32, a frequency shift unit 33, a filter 34, a frequency domain downsampling unit 35, an IFFT unit 36, an updating unit 37, a branching unit 41-1, a branching unit 41-2, and a branching unit 42.
[0028] The FFT unit 30 receives a first digital signal output from the ADC 16-1. The FFT unit 30 performs a Fourier transform on the input first digital signal. The Fourier transform performed by the FFT unit 30 may be a Fast Fourier Transform or a Discrete Fourier Transform. As a result, the FFT unit 30 converts the input first digital signal into a first frequency domain signal.
[0029] The first frequency domain signal converted by the FFT unit 30 is input to the branching unit 41-1. The branching unit 41-1 branches the input first frequency domain signal and inputs it to the filter 31 and the update unit 37.
[0030] The FFT unit 32 receives the second digital signal output from the ADC 16-2. The FFT unit 32 performs a Fourier transform on the input second digital signal. As a result, the FFT unit 32 converts the input second digital signal into a second frequency domain signal. The frequency shift unit 33 shifts the frequency of the second frequency domain signal to a higher frequency by a predetermined frequency.
[0031] The second frequency domain signal, frequency-shifted by the frequency shifting unit 33, is input to the branching unit 41-2. The branching unit 41-2 branches the input second frequency domain signal and inputs it to the filter 34 and the update unit 37.
[0032] Filter 31 consists of a complex multiplier that multiplies each frequency component of the first frequency domain signal by a complex coefficient. The complex coefficient multiplied by filter 31 is updated by the update unit 37. Filter 34 consists of a complex multiplier that multiplies each frequency component of the second frequency domain signal by a complex coefficient. The complex coefficient multiplied by filter 34 is updated by the update unit 37.
[0033] The summing unit 19 reconstructs the broadband received signal by adding the outputs from the filters 31 and 34. The broadband received signal reconstructed in the summing unit 19 is input to the frequency domain downsampling unit 35. In the frequency domain downsampling unit 35, the baud rate (f) of the reconstructed broadband received signal is adjusted. ｂａｕｄThe frequency domain downsampling process is performed so that the sampling rate is the same as the original signal. The IFFT unit 36 converts the reconstructed broadband received signal, which has been downsampled by the frequency domain downsampling unit 35, into a time domain signal by performing an inverse Fourier transform.
[0034] Next, the processing performed by the frequency domain downsampling unit 35 will be explained using Figure 3. First, the frequency domain downsampling unit 35 takes the wideband received signal in the frequency domain output from the summing unit 19 and adds a frequency f that is half the baud rate. ｂａｕｄ／２ It inverts around f. Then, the frequency domain downsampling unit 35 performs a complex conjugate inversion on each frequency component, f ｂａｕｄ／２ The signal components up to this point are added together and output.
[0035] Figure 4 is a diagram illustrating the control of filters 31 and 34 in the second embodiment. As shown in Figure 4, the update unit 37 controls the filter coefficients of filters 31 and 34 using the LMS algorithm so that the overlap portion becomes the maximum ratio composite. In addition, the coefficients of filters 31 and 34 are controlled in the non-overlapping portion as well, so as to minimize the error with the target signal in the update unit 37. In this way, signal quality can be maximized by performing the maximum ratio composite when adding the band junctions and compensating for the transfer function across the entire wideband received signal. Furthermore, in the frequency domain processing, as shown in Figure 4, multiplication of filter coefficients is unnecessary in regions where no signal exists.
[0036] Other components of the digital signal processing unit 17b perform the same processing as the functional unit of the same name described in the first embodiment. In such an optical receiver 10b, the difference in the transfer function, including the delay difference between bands after band division, is dynamically compensated by digital signal processing. Fluctuations in the phase difference between the mixer 14 and the ADC 16 are compensated by the dynamic updating of filters 31 and 34 by the update unit 37. As a result, the delay adjustment unit between filter 12-1 and ADC 16-1, and the clock synchronization circuit between mixer 14 and ADC 16, which were required in the conventional design, become unnecessary. Therefore, it is possible to reduce the mounting area and power consumption.
[0037] In the embodiment described above, the case where the number of divisions is 2 was explained, but even when the number of divisions is 2 or more, an FFT section, a frequency shift section, and a filter can be added.
[0038] With the optical receiver 10b configured as described above, it becomes possible to efficiently perform convolution operations in the FIR filter by using frequency domain processing. Furthermore, as shown in Figure 4, there is a bandwidth in the frequency domain that does not require calculation, so it is possible to reduce the mounting area and power consumption compared to the first embodiment.
[0039] (Third Embodiment) In the third embodiment, a configuration having a phase-locking circuit in addition to the first embodiment will be described.
[0040] Figure 5 shows an example of the configuration of the optical receiver 10c in the third embodiment. The optical receiver 10c is a receiving device that receives optically modulated signals transmitted from an optical transmitter (not shown) using a frequency division receiving method, which is an ultra-high-speed signal receiving method. The optical receiver 10c comprises a photodetector 50 and a high-speed signal receiving unit 60c. The optical receiver 10c comprises a broadband signal division unit 11, a clock source 13, a mixer 14, a clock source 15, ADCs 16-1 and 16-2, and a digital signal processing unit 17c. The optical receiver 10c differs from the optical receiver 10 in that it has a digital signal processing unit 17c instead of a digital signal processing unit 17. The differences from the optical receiver 10 will be explained below.
[0041] The digital signal processing unit 17c comprises a branching unit 18, an adder 19, equalizers 20-1 and 20-2, a multiplier 21, a branching unit 22, BPFs 23-1 and 23-2, an arithmetic unit 24, a multiplier 25, a phase detection unit 26, a loop filter 27, a numerically controlled oscillator (NCO) 28, a signal multiplication unit 29, an update unit 37, branching units 41-1 and 41-2, and a branching unit 42. The multiplication unit 21, the NCO 28, and the signal multiplication unit 29 correspond to the DUC shown in Figure 12. In other words, the combination of the multiplication unit 21, the NCO 28, and the signal multiplication unit 29 corresponds to an upconverter that performs upconversion on the signal (digital signal) output from the ADC 16-2.
[0042] Furthermore, the combination of the multiplication unit 21, the branching unit 22, the BPFs 23-1 and 23-2, the calculation unit 24, the multiplication unit 25, the phase detection unit 26, the loop filter 27, the NCO 28, and the signal multiplication unit 29 corresponds to a phase-locked circuit.
[0043] The branching unit 18 splits the first digital signal output from the ADC 16-1 into two. The first digital signal split by the branching unit 18 is input to the branching unit 41-1 via the first path and to the BPF 23-1 via the second path. The branching unit 41-1 splits the first digital signal and inputs it to the equalizer 20-1 and the update unit 37.
[0044] The multiplier unit 21 receives the second digital signal output from the ADC 16-2 and the output result from the signal multiplier unit 29. The output result from the signal multiplier unit 29 will be described later. The multiplier unit 21 multiplies the input second digital signal and the output result from the signal multiplier unit 29. As a result, the multiplier unit 21 shifts the frequency of the second digital signal to a higher frequency by a predetermined frequency. In other words, the multiplier unit 21 upconverts (frequency shifts) the second digital signal.
[0045] The branching section 22 splits the second digital signal after up-conversion into two branches. The up-converted second digital signal split into two branches by the branching section 22 is input to the branching section 41-2 via the first path, and is input to the BPF 23-2 via the second path. The branching section 41-2 branches the second digital signal after up-conversion, and inputs the branched signals to the equalizer 20-2 and the updating section 37. The adding section 19 adds the outputs from the equalizer 20-1 and the equalizer 20-2 to reconstruct the wideband reception signal.
[0046] The second digital signal after up-conversion branched by the branching section 22 is input to the BPF 23-2. The BPF 23-1 and the BPF 23-2 extract a signal in a predetermined frequency range from each digital signal based on the input first digital signal and the up-converted second digital signal. The BPF 23-1 and the BPF 23-2 are band-pass filters.
[0047] FIG. 6 is a diagram for explaining the processing of the BPF 23-1 and BPF 23-2 in the third embodiment. As shown in FIG. 6, the BPF 23-1 and BPF 23-2 generate a signal R in a region corresponding to an overlapping portion between the input first digital signal output from the branching section 18 and the up-converted second digital signal output from the branching section 22 １ (f) and R ２ (f) are extracted from each digital signal. In the present embodiment, the signal R １ (f) is a signal in a region corresponding to the overlapping portion extracted from the first digital signal, and the signal R ２ (f) is a signal in a region corresponding to the overlapping portion extracted from the second digital signal after up-conversion. The BPF 23-1 outputs the extracted signal R １ (f) to the multiplication section 25, and the BPF 23-2 outputs the extracted signal R ２ (f) to the calculation section 24.
[0048] As shown in FIG. 6, if the signal component at frequency f of the wideband signal S detected by the photodetector 50 is denoted as S(f), the signal R １ (f) is r １ exp(jθ １ )S(f), and the signal R２ (f) is r ２ exp(jθ) ２ ) is expressed as S(f). Here r １ θ １ r is the amplitude component of the transfer function for the first digital signal. １ , phase component θ １ Here, r² and θ² are the amplitude components r of the transfer function for the second digital signal. ２ , phase component θ ２ That is the case. １ θ １ r2 and θ2 may include the responses of the transmitter and transmission line.
[0049] The calculation unit 24 controls the signal R ２ The complex conjugate of (f) is taken. As a result, the arithmetic unit 24 calculates the signal R ２ The complex conjugate of (f) is the signal R. ＊ ２ (f) is output to the multiplication unit 25. The multiplication unit 25 outputs signal R １ (f) and signal R ＊ ２ Multiply (f) by the signal R, which is the result of the multiplication by the multiplication unit 25. １ (f) R ＊ ２ (f) can be expressed as shown in equation (1) below.
[0050]
[0051] The phase detection unit 26 detects the signal R obtained by the multiplication unit 25. １ (f) R ＊ ２ The phase difference between bands is detected based on (f). |S(f)| ２ Since is a real number, the phase component is always 0. Therefore, the phase difference of the transfer function between bands can be detected by finding the argument angle of the product of the complex conjugates of the low-frequency signal and the high-frequency signal. Accordingly, the phase detection unit 26 detects the phase difference between bands based on the following equation (2).
[0052]
[0053] Here, E[.] represents the expected value, which is calculated by time averaging. In a typical optical transmitter, a randomized signal is transmitted through scrambling, so |S(f)|２ The time average approaches a constant value. Therefore, by taking the phase angle after time averaging the product of the complex conjugates of the low-frequency and high-frequency signals, the influence of white noise on phase detection can be reduced. The phase difference of the transfer function between bands corresponds to the phase difference due to the initial phase and frequency error in DUC.
[0054] The loop filter 27 controls the output of the NCO 28 so that the phase difference between bands detected by the phase detection unit 26 becomes zero. The NCO 28 is a numerically controlled oscillator that generates a sine wave for synchronization according to the control of the loop filter 27. The signal multiplication unit 29 multiplies the sine wave generated by the NCO 28 by exp(j ＊ The sine wave of ) is multiplied. The result of the multiplication by the signal multiplication unit 29 is multiplied by the second digital signal output from the ADC 16-2 described above by the multiplication unit 21.
[0055] The optical receiving device 10c configured as described above includes: a broadband signal splitting unit 11 that splits a broadband signal transmitted from an optical transmitting device into a first narrowband signal and a second narrowband signal, which are narrowband signals of different frequency bands (at least a signal in a first frequency band and a signal in a second frequency band); a mixer 14 that frequency-shifts the frequency of the second narrowband signal to a lower frequency; a plurality of ADCs 16-1, 16-2 that generate a first digital signal and a second digital signal by performing analog-to-digital conversion on the first narrowband signal and the frequency-shifted second narrowband signal; and a digital signal processing unit 17c that compensates for the phase error between the bands after band splitting by digital signal processing based on the first digital signal and the second digital signal.
[0056] As described above, the optical receiver 10c detects and compensates for the phase error between bands after band division by digital signal processing. In the first and second embodiments, the equalizer and filter coefficients are updated using the LMS algorithm to track fluctuations in the clock phase between the mixer 14 and the ADC 16. However, when there is a large error in the reference frequencies of the mixer 14 and the ADC 16, there are cases where tracking cannot be achieved by updating the equalizer or filter. On the other hand, in the third embodiment, the phase is synchronized by a closed loop via the loop filter 27, so it is expected to track stably even when there is a large error in the reference frequencies of the mixer 14 and the ADC 16. As a result, a synchronization circuit is not required not only when there are fluctuations in the clock phase between the mixer 14 and the ADC 16, but also when there is an error in the reference frequency. Therefore, it becomes possible to reduce the mounting area and power consumption.
[0057] Furthermore, in the third embodiment, the digital signal processing unit 17c is equipped with equalizers 20-1 and 20-2 after the phase-locking circuit. Therefore, in the update unit 37, by reducing the update amount per step at the expense of tracking performance, the transfer function of the first digital signal and the second digital signal can be compensated with higher accuracy than in the first and second embodiments, and an improvement in signal quality can be expected.
[0058] In the embodiment described above, the case where the number of divisions is two was explained, but even when the number of divisions is two or more, the phase difference can be detected from the overlap portion between each band.
[0059] (Fourth Embodiment) In the fourth embodiment, a configuration in which the processing shown in the third embodiment is processed in the frequency domain will be described.
[0060] Figure 7 shows an example of the configuration of the optical receiver 10d in the fourth embodiment. The optical receiver 10d comprises a photodetector 50 and a high-speed signal receiving unit 60d. The optical receiver 10d differs from the optical receiver 10c in that the high-speed signal receiving unit 60d comprises a digital signal processing unit 17d instead of the digital signal processing unit 17c. In the following description, we will focus on the difference between the digital signal processing unit 17c in the third embodiment and the digital signal processing unit 17d in the fourth embodiment.
[0061] The digital signal processing unit 17d performs digital signal processing on the first digital signal output from ADC 16-1 and the second digital signal output from ADC 16-2. The digital signal processing unit 17d includes a branching unit 18, an adding unit 19, a multiplier unit 21, a branching unit 22, an arithmetic unit 24, a multiplier unit 25, a phase detection unit 26, a loop filter 27, an NCO 28, a signal multiplication unit 29, an FFT unit 30, a filter 31, an FFT unit 32, a frequency shift unit 33, a filter 34, a frequency domain downsample unit 35, an IFFT unit 36, an update unit 37, branching units 41-1, 41-2, branching unit 42, and frequency selection units 70-1, 70-2.
[0062] The FFT unit 30 receives a first digital signal output from the ADC 16-1. The FFT unit 30 performs a Fourier transform on the input first digital signal. The Fourier transform performed by the FFT unit 30 may be a Fast Fourier Transform or a Discrete Fourier Transform. As a result, the FFT unit 30 converts the input first digital signal into a first frequency domain signal.
[0063] The branching unit 18 splits the first frequency domain signal output from the FFT unit 30 into two branches. The first frequency domain signal branched by the branching unit 18 is input to the branching unit 41-1 via the first path and to the frequency selection unit 70-1 via the second path. The branching unit 41-1 branches the first frequency domain signal and inputs it to the filter 31 and the update unit 37.
[0064] The filter 31 multiplies each frequency component of the first frequency domain signal, which has been branched by the branching unit 41-1, by a complex coefficient. The complex coefficient multiplied by the filter 31 is updated by the update unit 37.
[0065] The FFT unit 32 receives the second digital signal after upconversion. The FFT unit 32 performs a Fourier transform on the input second digital signal after upconversion. The Fourier transform performed by the FFT unit 32 may be a Fast Fourier Transform or a Discrete Fourier Transform. As a result, the FFT unit 32 converts the input second digital signal after upconversion into a second frequency domain signal.
[0066] The frequency shifting unit 33 shifts the frequency of the second frequency domain signal to a higher frequency by a predetermined frequency. The branching unit 22 splits the frequency-shifted second frequency domain signal into two. The frequency-shifted second frequency domain signal split by the branching unit 22 is input to the branching unit 41-2 via the first path and to the frequency selection unit 70-2 via the second path. The branching unit 41-2 splits the second frequency domain signal split by the branching unit 22 and inputs it to the filter 34 and the update unit 37.
[0067] The filter 34 multiplies each frequency component of the second frequency domain signal, which has been branched by the branching unit 41-2, by a complex coefficient. The complex coefficient multiplied by the filter 34 is updated by the update unit 37.
[0068] The frequency selection unit 70-2 has the same function as the BPF 23-2 in the third embodiment, but in frequency domain processing, it is only necessary to select and extract the signal band of interest, eliminating the need for the convolution operation required in time domain processing. Similarly, the first frequency domain signal branched by the branching unit 18 is input to the frequency selection unit 70-1.
[0069] The frequency selection units 70-1 and 70-2 extract signals within a predetermined frequency range from each frequency domain signal based on the input first frequency domain signal and the frequency-shifted second frequency domain signal. The signal R corresponds to the overlap portion between the input first frequency domain signal and the frequency-shifted second frequency domain signal. １(f) and R ２ (f) is extracted from each digital signal. In this embodiment, signal R １ (f) is the signal in the region corresponding to the overlap portion extracted from the first frequency domain signal, and the signal R ２ (f) is the signal of the region corresponding to the overlap portion extracted from the frequency-shifted second frequency domain signal. Frequency selection units 70-1 and 70-2 select the extracted signal R １ (f) is output to the multiplication unit 25, and the signal R ２ (f) is output to the calculation unit 24. The processing of the multiplication unit 25, phase detection unit 26, loop filter 27, NCO 28 and signal multiplication unit 29 is the same as in the third embodiment.
[0070] The multiplier unit 21 receives the second digital signal output from the ADC 16-2 and the output result from the signal multiplication unit 29 as input. The multiplier unit 21 multiplies the input second digital signal and the output result from the signal multiplication unit 29. As a result, the multiplier unit 21 shifts the frequency of the second digital signal to a higher frequency by a predetermined frequency. In other words, the multiplier unit 21 upconverts (frequency shifts) the second digital signal. The multiplier unit 21 outputs the upconverted second digital signal to the FFT unit 32.
[0071] The summing unit 19 adds the first frequency domain signal, which has been filtered by the filter 31, and the second frequency domain signal, which has been filtered by the filter 34. This allows the summing unit 19 to reconstruct the broadband received signal. The broadband received signal reconstructed by the summing unit 19 is input to the frequency domain downsampling unit 35. The processing of the frequency domain downsampling unit 35, the IFFT unit 36, the update unit 37, and the branching unit 42 is the same as that of the functional units of the same name in the second embodiment.
[0072] With the optical receiver 10d configured as described above, by processing in the frequency domain, it becomes necessary to filter only the vicinity of the frequency bin where the signal exists in the phase-locked circuit. Therefore, it is possible to achieve lower computational load compared to the third embodiment. In other words, the same effects as the third embodiment can be obtained with lower computational load.
[0073] (Embodiments 5 to 8) In the first and second embodiments, configurations for updating the equalizer using time-domain processing and configurations for configuring a filter in the frequency domain were described for the first and second digital signals. Furthermore, in the third and fourth embodiments, configurations for including a phase-locking circuit using time-domain processing and configurations using the frequency domain were described. In the fifth to eighth embodiments, configurations including a frequency crosstalk compensation unit in the optical transmitter (broadband bandwidth combining transmitter) of the first to fourth embodiments will be described.
[0074] Figure 8 shows an example of the configuration of the optical receiver 10e in the fifth embodiment. The optical receiver 10e includes a digital signal processing unit 17e, which has a transmitter distortion compensation unit 75 added to the digital signal processing unit 17 in the first embodiment. The transmitter distortion compensation unit 75 includes a plurality of frequency shift units 80-1 to 80-M (where M is an integer of 1 or more), a plurality of branch units 41-3 to 41-(M+2), and a plurality of equalizers 20-3 to 20-(M+2). The first digital signal output from the ADC 16-1 is input to the frequency shift units 80-1 to 80-2. The second digital signal after upconversion output from the DUC 40 is input to the frequency shift units 80-3 to 80-M. Each frequency shift unit 80-1 to 80-M cyclically shifts the spectrum of the input digital signal by frequency.
[0075] In the example above, the transmitter distortion compensation unit 75 is shown to receive both the first digital signal and the up-converted second digital signal. However, it is also possible to receive only one of the signals. For example, when M=1, the frequency shift unit 80, branching unit 41, and equalizer 20 will be added to either the branch from the first digital signal (low-frequency signal) or the branch from the second digital signal (high-frequency signal).
[0076] The outputs from each frequency shift unit 80-1 to 80-M are branched by branching units 41-3 to 41-(M+2) and input to the update unit 37 and equalizers 20-3 to 20-(M+2). For example, branching unit 41-3 branches the output from frequency shift unit 80-1 and outputs it to the update unit 37 and equalizer 20-3. Branching unit 41-(M+2) branches the output from frequency shift unit 80-M and outputs it to the update unit 37 and equalizer 20-(M+2).
[0077] Each equalizer 20-3 to 20-(M+2) is composed of an FIR filter or the like and performs filtering on the input signal. The filter coefficients in each equalizer 20-3 to 20-(M+2) are updated in the update unit 37 by an LMS algorithm or the like, as in the first or third embodiment. The adder 19 adds the outputs from each equalizer 20-1 to 20-(M+2).
[0078] Waveform distortion resulting from the imperfections of a broadband bandwidth combining transmitter occurs as frequency crosstalk, as described, for example, in Japanese Patent Application Publication Nos. 2019-197983, 2020-546707, and 2020-96264. Therefore, it can be compensated for on the receiving side by a transmitter distortion compensation unit 75, which consists of frequency shift units 80-1 to 80-M and equalizers 20-3 to 20-(M+2).
[0079] Figure 9 shows an example of the configuration of the optical receiver 10f in the sixth embodiment. The optical receiver 10f includes a digital signal processing unit 17f, which has a transmitter distortion compensation unit 75 added to the digital signal processing unit 17b in the second embodiment. In Figure 9, the functional unit preceding the digital signal processing unit 17f is omitted for space reasons, but the optical receiver 10f includes a photodetector 50, a broadband signal division unit 11, a clock source 13, a mixer 14, a clock source 15, and ADCs 16-1 and 16-2, as shown in Figure 2, preceding the digital signal processing unit 17f.
[0080] The transmitter distortion compensation unit 75 of the digital signal processing unit 17f comprises a plurality of frequency shift units 80-1 to 80-M, a plurality of branch units 41-3 to 41-(M+2), and a plurality of equalizers 20-3 to 20-(M+2). The transmitter distortion compensation unit 75 of the digital signal processing unit 17f is configured to operate in the frequency domain. Therefore, the frequency shift units 80-1 to 80-2 are input to a second frequency domain signal that has been frequency shifted by the frequency shift unit 33. The frequency shift units 80-3 to 80-M are input to a first frequency domain signal that has been converted by the FFT unit 30. Each frequency shift unit 80-1 to 80-M cyclically shifts the spectrum of the input frequency domain signal by frequency.
[0081] Figure 10 shows an example of the configuration of the optical receiver 10g in the seventh embodiment. The optical receiver 10g includes a digital signal processing unit 17g, which has a transmitter distortion compensation unit 75 added to the digital signal processing unit 17c in the third embodiment. In Figure 10, the functional unit preceding the digital signal processing unit 17g is omitted for space reasons, but the optical receiver 10g includes a photodetector 50, a broadband signal division unit 11, a clock source 13, a mixer 14, a clock source 15, and ADCs 16-1 and 16-2, as shown in Figure 5, preceding the digital signal processing unit 17g.
[0082] The transmitter distortion compensation unit 75 in the digital signal processing unit 17g performs the same processing as the transmitter distortion compensation unit 75 in the fifth embodiment.
[0083] Figure 11 shows an example of the configuration of the optical receiver 10h in the eighth embodiment. The optical receiver 10h includes a digital signal processing unit 17h which has a transmitter distortion compensation unit 75 added to the digital signal processing unit 17d in the fourth embodiment. In Figure 11, the functional unit preceding the digital signal processing unit 17h is omitted for space reasons, but the optical receiver 10h includes a photodetector 50 as shown in Figure 7, a broadband signal division unit 11, a clock source 13, a mixer 14, a clock source 15, and ADCs 16-1 and 16-2 preceding the digital signal processing unit 17h.
[0084] The transmitter distortion compensation unit 75 provided in the digital signal processing unit 17h performs the same processing as the transmitter distortion compensation unit 75 in the sixth embodiment.
[0085] While embodiments of this invention have been described in detail above with reference to the drawings, the specific configuration is not limited to these embodiments and includes designs and the like that do not depart from the spirit of this invention.
[0086] This invention can be applied to an optical receiving device that performs reception using a frequency division reception method, which is a method for receiving ultra-high-speed signals.
[0087] 10, 10b, 10c, 10d, 10e, 10f, 10g, 10h... Optical receiver, 11... Broadband signal splitter, 12-1, 12-2... Filter, 13, 15... Clock source, 14... Mixer, 16-1, 16-2... ADC, 17, 17b, 17c, 17d, 17e, 17f, 17g, 17h... Digital signal processing unit, 18, 22, 41-1 to 41-(M+2), 42... Branching unit, 19... Adder, 20-1 to 20-(M+2)... Equalizer, 21, 25... Multiplier, 23-1, 23-2... BPF, 24... Calculation unit, 26... Phase detection unit, 27... Loop filter, 28... NCO, 29... Signal multiplication unit, 30, 32...FFT section, 31, 34...Filter, 33, 80-1 to 80-M...Frequency shift section, 35...Frequency domain downsampling section, 36...IFFT section, 37...Update section, 40...DUC, 50...Photodetector, 60, 60b, 60c, 60d, 60e, 60f, 60g, 60h...High-speed signal receiving section, 70-1, 70-2...Frequency selection section, 75...Transmitter distortion compensation section
Claims
1. An optical receiving device comprising: a splitting unit that splits a broadband signal transmitted from an optical transmitting device into signals of at least a first frequency band and signals of a second frequency band; a mixer that frequency-shifts the frequency of the signals of the second frequency band to a lower frequency; a plurality of analog-to-digital conversion units that generate a first digital signal and a second digital signal by performing analog-to-digital conversion on the signals of the first frequency band and the frequency-shifted signals of the second frequency band; and a digital signal processing unit that performs compensation using a transfer function on each of the first digital signal and the second digital signal and dynamically updates the transfer function.
2. The optical receiving device according to claim 1, wherein the digital signal processing unit includes a phase synchronization circuit that adjusts the phase difference between the first digital signal and the second digital signal.
3. The optical receiving device according to claim 1 or 2, wherein the digital signal processing unit comprises a transmitter distortion compensation unit for compensating frequency crosstalk in the optical transmitting device.
4. A high-speed signal receiving method comprising: dividing a broadband signal transmitted from an optical transmitter into at least a signal in a first frequency band and a signal in a second frequency band; frequency shifting the frequency of the signal in the second frequency band to a lower frequency; generating a first digital signal and a second digital signal by performing analog-to-digital conversion on the signal in the first frequency band and the frequency-shifted signal in the second frequency band; and performing compensation using a transfer function for each of the first digital signal and the second digital signal, and dynamically updating the transfer function.