Trench schottky barrier diode

Abstract

[Problem] The present invention addresses the problem of achieving relaxation of an electric field inside a termination part of a trench Schottky barrier diode, thereby suppressing a decrease in breakdown voltage. [Solution] The present invention is a trench Schottky barrier diode having: a plurality of first trenches 21 of a rectification part 61; one or more second trenches 22 of a termination part 62 outside the rectification part 61; one or more third trenches 23 outside the second trenches 22 of the termination part 62; insulating films 32 formed on the inner walls of the first to third trenches 21-23; conductive layers 31 formed inside the insulating films; and a metal electrode 41 in Schottky contact with an N-type semiconductor layer 11 in the rectification part. The conductive layers 31 inside the first and second trenches 21, 22 are electrically connected to the metal electrode 41, and the conductive layers 31 inside the third trenches 23 are floating with respect to the metal electrode 41.

Description

Trench Schottky Barrier Diode

[0001] The present invention relates to a trench Schottky barrier diode.

[0002] A conventional trench Schottky barrier diode (hereinafter also referred to as "trench SBD") achieves electric field relaxation by forming a wide trench at the terminal portion and forming a metal field plate extending to the inside of the wide trench (see, for example, Patent Document 1). However, when a wide trench is provided, the depth of the wide trench becomes greater than that of the trenches in the cell (rectifying portion) during manufacturing. The increased depth of the terminal trench raises the electric field intensity at the bottom corner of the terminal trench, causing a decrease in breakdown voltage.

[0003] In addition, black silicon generated when forming wide trenches by dry etching easily causes particles. On the other hand, under conditions where black silicon is less likely to be generated, the width of the trenches in the cell (rectifying portion) becomes large, making it difficult to miniaturize the cell trenches.

[0004] Therefore, the present invention is required to achieve electric field relaxation inside the terminal portion of a trench SBD and suppress a decrease in breakdown voltage.

[0005] Japanese Patent No. 6185504

[0006] Various aspects of the present invention aim to achieve electric field relaxation inside the terminal portion of a trench Schottky barrier diode and suppress a decrease in breakdown voltage.

[0007] Various aspects of the present invention are described below.

[0008] [1] An N-type semiconductor layer; a plurality of first trenches formed on the upper surface side of the N-type semiconductor layer in the rectifier section; at least one second trench formed on the upper surface side of the N-type semiconductor layer in the termination section located outside the rectifier section; at least one third trench formed on the upper surface side of the N-type semiconductor layer in the termination section and located outside the at least one second trench; an insulating film formed on the inner walls of each of the plurality of first trenches, the at least one second trench and the at least one third trench; a conductive layer formed inside the insulating film and disposed inside each of the plurality of first trenches, the at least one second trench and the at least one third trench; and a metal electrode disposed on the upper surface of the N-type semiconductor layer and Schottky connected to the N-type semiconductor layer in the rectifier section, wherein the conductive layer inside each of the at least one second trench and the plurality of first trenches is electrically connected to the metal electrode. A trench Schottky barrier diode characterized in that the conductive layer inside at least one third trench is made floating by being insulated from the metal electrode.

[0009] According to the trench Schottky barrier diode described in [1] above in one aspect of the present invention, at least one second trench is formed on the upper surface side of the N-type semiconductor layer at the termination portion, and the conductive layer inside the at least one second trench is electrically connected to the metal electrode to reduce the electric field inside the termination portion. Furthermore, at least one third trench is formed located outside the at least one second trench, and the conductive layer inside the at least one third trench is insulated from the metal electrode to make it floating, thereby reducing the electric field in the trench outside the termination portion. This suppresses a decrease in breakdown voltage.

[0010] [2] The trench Schottky barrier diode in which the metal electrode comprises at least a laminated structure portion of a barrier metal layer and a pad metal layer, as in [1] above.

[0011] [3] The trench Schottky barrier diode in which, in the above [1], the metal electrode is arranged on the at least one second trench of the termination portion and on at least a portion of the conductive layer inside the at least one third trench of the termination portion.

[0012] According to the trench Schottky barrier diode [3] described above in one aspect of the present invention, by arranging the metal electrode on at least a portion of the conductive layer inside at least one second trench at the termination and at least one third trench, the depletion layer can be made to extend laterally, thereby mitigating the electric field and suppressing a decrease in breakdown voltage.

[0013] [4] In any one of the above claims [1] to [3], the trench Schottky barrier diode is characterized in that, in claim 1 or 2, the at least one third trench in the termination portion has a width less than or equal to the width of each of the plurality of first trenches in the rectifier portion.

[0014] [5] A trench Schottky barrier diode characterized in that, in any one of the above items [1] to [3], the at least one third trench at the termination portion has a width less than or equal to the width of the at least one second trench.

[0015] [6] The trench Schottky barrier diode, wherein, in any one of the above items [1] to [3], the at least one second trench in the termination portion has a width greater than or equal to the width of each of the plurality of first trenches in the rectifier portion.

[0016] [7] A trench Schottky barrier diode characterized in that, in any one of the above items [1] to [3], when there are multiple second trenches and multiple third trenches in the termination portion, the spacing between adjacent second trenches and the spacing between adjacent third trenches are 1 / 2 or less of the spacing between the multiple first trenches in the rectifier portion.

[0017] [8] A trench Schottky barrier diode characterized in that, in any one of the above items [1] to [3], the depth of the at least one third trench is less than or equal to the depth of the at least one second trench.

[0018] According to the trench Schottky barrier diode [8] described in one aspect of the present invention, by making the depth of the third trench shallower than the depth of the second trench, the electric field strength can be dispersed throughout the first to third trenches.

[0019] [9] A trench Schottky barrier diode characterized in that, in any one of the above items [1] to [3], the N-type semiconductor layer at the termination portion is insulated from the metal electrode. For example, by arranging insulating films 33 and 34 on the third trench at the termination portion, the conductive layer inside the third trench can be insulated from the metal electrode.

[0020]

[10] The trench Schottky barrier diode, wherein, in any one of the above items [1] to [3], the at least one second trench and the at least one third trench of the termination portion are arranged to surround the rectifier portion in a plan view.

[0021] According to various aspects of the present invention, the electric field inside the termination portion of the trench Schottky barrier diode can be relaxed, thereby suppressing a decrease in breakdown voltage.

[0022] This is a cross-sectional view showing a trench Schottky barrier diode according to one aspect of the present invention. This is an enlarged cross-sectional view of the termination portion and the rectifier portion near the termination portion of the trench Schottky barrier diode shown in Figure 1. This is a plan view showing the first to third trenches 21 to 23 of the trench Schottky barrier diode shown in Figure 1. This is a schematic diagram showing the electric field strength distribution of the termination portion and the rectifier portion near the termination portion of the trench Schottky barrier diode shown in Figure 1.

[0023] Embodiments of the present invention will be described in detail below with reference to the drawings. However, it will be readily apparent to those skilled in the art that the present invention is not limited to the following description, and that its form and details can be modified in various ways without departing from the spirit and scope of the present invention. Accordingly, the present invention shall not be interpreted as being limited to the descriptions of the embodiments shown below.

[0024] Figure 1 is a cross-sectional view showing a trench Schottky barrier diode according to one aspect of the present invention. Figure 2 is an enlarged cross-sectional view of the termination and the rectifier portion near the termination of the trench Schottky barrier diode shown in Figure 1. Figure 3 is a plan view showing the first to third trenches 21 to 23 of the trench Schottky barrier diode shown in Figure 1. Figure 4 is a schematic diagram showing the electric field strength distribution of the termination and the rectifier portion near the termination of the trench Schottky barrier diode shown in Figure 1, and shows the termination on the opposite side from the termination shown in Figure 2.

[0025] The trench Schottky barrier diode shown in Figures 1 and 2 has an N-type semiconductor layer 11. This N-type semiconductor layer 11 is formed by epitaxial growth on the surface of a silicon substrate (Sub) 10, and may be an N-type silicon layer. The trench Schottky barrier diode has a rectifier section 61 and a termination section 62 located outside of it. Multiple first trenches 21 are formed on the upper surface side of the N-type semiconductor layer 11 in the rectifier section 61. In addition, at least one second trench 22 is formed on the upper surface side of the N-type semiconductor layer 11 in the termination section 62 located outside the rectifier section 61. In this embodiment, four second trenches 22 are formed on the upper surface side of the N-type semiconductor layer 11. Furthermore, at least one third trench 23 is formed on the upper surface side of the N-type semiconductor layer 11 in the termination section 62, and the third trench 23 is located outside the four second trenches 22. In this embodiment, at least one third trench 23 is formed, and three third trenches 23 are formed on the upper surface of the N-type semiconductor layer 11. The first to third trenches 21 to 23 are formed in the N-type semiconductor layer 11 by forming a resist pattern (not shown) on the N-type semiconductor layer 11 and etching using this resist pattern as a mask.

[0026] As shown in Figure 3, the four second trenches 22 and three third trenches 23 of the terminal section 62 are arranged in a plan view to surround the multiple first trenches 21 of the rectifying section 61.

[0027] An insulating film 32 is formed on the inner wall of each of the multiple first trenches 21, four second trenches 22, and three third trenches 23, and a conductive layer 31 is formed inside this insulating film 32. For example, a polysilicon layer doped with impurities can be used as the conductive layer 31. For example, an oxide film can be used for the insulating film 32. The conductive layer 31 is embedded and arranged inside each of the multiple first trenches 21, four second trenches 22, and three third trenches 23.

[0028] A metal electrode 41 is placed on the upper surface of the N-type semiconductor layer 11, and the metal electrode 41 is Schottky connected to the N-type semiconductor layer 11 in the rectifier section 61.

[0029] The metal electrode 41 may include at least a laminated structure portion consisting of a barrier metal layer and a pad metal layer. More specifically, as shown in Figure 2, the metal electrode 41 may consist of a barrier metal layer 41a as the lower layer and a pad metal layer 41b as the upper layer, with the barrier metal layer 41a in contact with at least the N-type semiconductor layer (e.g., silicon layer) 11 in the rectifier portion 61. In the metal electrode 41, the barrier metal layer 41a may be formed over the entire lower layer and the pad metal layer 41b may be formed over the entire upper layer (see Figure 2), or the barrier metal layer may be formed not over the entire lower layer but in the portion in contact with the N-type semiconductor layer 11 in the rectifier portion 61, with the pad metal layer formed as the upper layer over the entire surface above it. The pad metal layer may be composed of a metal layer such as aluminum (Al), nickel (Ni), titanium (Ti), or a combination thereof. The barrier metal layer may be composed of, for example, molybdenum (Mo), titanium (Ti), platinum (Pt), palladium (Pd), or nickel (Ni).

[0030] The conductive layers 31 inside each of the four second trenches 22 and the multiple first trenches 21 are electrically connected to the metal electrodes 41. The conductive layers 31 inside the three third trenches 23 are made floating by being insulated from the metal electrodes 41. In addition, the N-type semiconductor layer 11 at the termination 62 is insulated from the metal electrodes 41.

[0031] In detail, silicon oxide films 33, 33a are formed on the three third trenches 23 and on the N-type semiconductor layers 11 between the three third trenches 23 and the four second trenches 22. Silicon nitride films 34, 34a are formed on the silicon oxide films 33, 33a, and metal electrodes 41 are formed on the silicon nitride films 34, 34a. With this configuration, the conductive layers 31 inside the three third trenches 23 are made floating relative to the metal electrodes 41, and the N-type semiconductor layers 11 at the termination 62 can be insulated from the metal electrodes 41.

[0032] The silicon oxide films 33, 33a and silicon nitride films 34, 34a are formed by forming a silicon oxide film on a plurality of first trenches 21, four second trenches 22, three third trenches 23 and an N-type semiconductor layer 11, forming a silicon nitride film on this silicon oxide film, and then etching the silicon oxide film and the silicon nitride film.

[0033] Furthermore, the metal electrode 41 is formed, for example, as follows: A barrier metal layer is formed on silicon oxide films 33, 33a, silicon nitride films 34, 34a, a plurality of first trenches 21, four second trenches 22, and an N-type semiconductor layer 11, and a pad metal layer is formed on this barrier metal layer. Then, by etching the pad metal layer and the barrier metal layer, a metal electrode 41 consisting of a laminated structure in which the barrier metal layer 41a and the pad metal layer 41b are stacked is formed. Alternatively, as another method of formation, a barrier metal layer is first deposited, this barrier metal layer is etched, and then a pad metal layer is deposited, and this pad metal layer is etched, thereby forming a metal electrode consisting of a laminated structure in which the barrier metal layer and the pad metal layer are stacked. In this method, the etching process is divided into two steps, but it may also be divided into three or more steps.

[0034] The metal electrode 41 is preferably positioned on the four second trenches 22 of the terminal portion 62 and on at least a portion of the conductive layer 31 inside the three third trenches 23 of the terminal portion 62 (see Figures 1 and 2).

[0035] As shown in Figure 2, the three third trenches 23 of the terminal section 62 may have a width 73 that is less than or equal to the width 71 of each of the multiple first trenches 21 of the flow straightening section 61. Also, the three third trenches 23 of the terminal section 62 may have a width 73 that is less than or equal to the width 72 of the four second trenches 22. The width 72 of the four second trenches 22 of the terminal section 62 may have a width 71 or greater than the width 71 of each of the multiple trenches 21 of the flow straightening section 61.

[0036] When there are multiple second trenches 22 and third trenches 23 in the terminal section 62, the spacing 52 between adjacent second trenches 22 and the spacing 51 between adjacent third trenches 23 should be less than or equal to half the spacing 53 between multiple first trenches 21 in adjacent rectifier sections 61.

[0037] Furthermore, the depth of each of the three third trenches 23 should be less than or equal to the depth of each of the four second trenches 22.

[0038] In this embodiment, four second trenches 22 are formed on the upper surface side of the N-type semiconductor layer 11 in the termination portion 62, and the conductive layer 31 inside the four second trenches 22 is electrically connected to the metal electrode 41 to reduce the electric field inside the termination portion 62 (see Figure 4). Furthermore, three third trenches 23 are formed outside the four second trenches 22, and the conductive layer 31 inside the three third trenches 23 is insulated from the metal electrode 41 and made floating, thereby reducing the electric field in the trenches outside the termination portion 62 (see Figure 4). This suppresses a decrease in breakdown voltage.

[0039] Furthermore, according to this embodiment, by arranging the metal electrodes 41 on at least a portion of the conductive layer 31 inside the four second trenches 22 and the three third trenches 23 of the terminal portion 62, the depletion layer can be made to extend more easily in the lateral direction, thereby mitigating the electric field and suppressing a decrease in breakdown voltage (see Figure 4).

[0040] Furthermore, in this embodiment, by making the depth of each of the three third trenches 23 shallower than the depth of each of the four second trenches 22, it is considered that the electric field strength can be dispersed throughout the first to third trenches 21 to 23.

[0041] Furthermore, in this embodiment, the trenches in the terminal portion 62 are formed by dry etching in the same manner as in the conventional method, but instead of wide trenches like in the conventional method, the terminal portion 62 is provided with at least one second trench 22 and at least one third trench 23, each having a trench width similar to that of the multiple first trenches 21 of the rectifier portion 61. This suppresses the generation of particles due to black silicon, makes it possible to narrow the width of the multiple first trenches 21 of the rectifier portion 61, and enables the miniaturization of the trenches in the rectifier portion 61.

[0042] 11 N-type semiconductor layer 21 First trench 22 Second trench 23 Third trench 31 Conductive layer 32 Insulating film 41 Metal electrode 51 Spacing between adjacent third trenches 52 Spacing between adjacent second trenches 53 Spacing between adjacent first trenches 61 Rectifier section 62 Termination section 71 Width of the first trench 72 Width of the second trench 73 Width of the third trench

Claims

1. The device comprises an N-type semiconductor layer, a plurality of first trenches formed on the upper surface side of the N-type semiconductor layer in the rectifier section, at least one second trench formed on the upper surface side of the N-type semiconductor layer in the termination section located outside the rectifier section, at least one third trench formed on the upper surface side of the N-type semiconductor layer in the termination section and located outside the plurality of second trenches, an insulating film formed on the inner walls of each of the plurality of first trenches, the at least one second trench, and the at least one third trench, a conductive layer formed inside the insulating film and disposed inside each of the plurality of first trenches, the at least one second trench, and the at least one third trench, and a metal electrode disposed on the upper surface of the N-type semiconductor layer and Schottky connected to the N-type semiconductor layer in the rectifier section, wherein the conductive layer inside each of the at least one second trench and the plurality of first trenches is electrically connected to the metal electrode. A trench Schottky barrier diode characterized in that the conductive layer inside at least one third trench is made floating by being insulated from the metal electrode.

2. The trench Schottky barrier diode according to claim 1, characterized in that the metal electrode includes at least a laminated structure portion of a barrier metal layer and a pad metal layer.

3. The trench Schottky barrier diode according to claim 1, characterized in that the metal electrode is disposed on at least one second trench in the termination portion and on at least a portion of the conductive layer inside the at least one third trench in the termination portion.

4. A trench Schottky barrier diode according to any one of claims 1 to 3, characterized in that the at least one third trench in the termination portion has a width less than or equal to the width of each of the plurality of first trenches in the rectifier portion.

5. A trench Schottky barrier diode according to any one of claims 1 to 3, characterized in that the at least one third trench at the termination portion has a width less than or equal to the width of the at least one second trench.

6. A trench Schottky barrier diode according to any one of claims 1 to 3, characterized in that the at least one second trench in the termination portion has a width greater than or equal to the width of each of the plurality of first trenches in the rectifier portion.

7. A trench Schottky barrier diode according to any one of claims 1 to 3, characterized in that, when there are multiple second trenches and multiple third trenches in the termination portion, the spacing between adjacent second trenches and the spacing between adjacent third trenches are 1 / 2 or less of the spacing between the multiple first trenches in the rectifier portion.

8. A trench Schottky barrier diode according to any one of claims 1 to 3, characterized in that the depth of the at least one third trench is less than or equal to the depth of the at least one second trench.

9. A trench Schottky barrier diode according to any one of claims 1 to 3, characterized in that the N-type semiconductor layer at the termination portion is insulated from the metal electrode.

10. A trench Schottky barrier diode according to any one of claims 1 to 3, characterized in that the at least one second trench and the at least one third trench of the termination portion are arranged to surround the rectifier portion in a plan view.

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