High frequency circuit

WO2026203569A1PCT designated stage Publication Date: 2026-10-01MURATA MFG CO LTD
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Patent Information

Application Number
PCT/JP2025/043848
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-07-18
Filing Date
2025-12-16
Publication Date
2026-10-01

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Abstract

A high frequency circuit (1) comprises: a power amplifier (11); an elastic wave filter (41) connected to the output end of the power amplifier (11); a coupler (32) connected between the elastic wave filter (41) and the power amplifier (11); a detection circuit (33) connected to a coupling port (321) of the coupler (32); an integration circuit (34) connected to the output end of the detection circuit (33); and a control circuit (35) configured to reduce input power to the elastic wave filter (41) when an output signal of the integration circuit (34) is equal to or greater than a threshold value (TH1) and to reduce the input power to the elastic wave filter (41) when an output signal of the detection circuit (33) is equal to or greater than a threshold value (TH2).
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Description

High-frequency circuit

[0001] The present invention relates to a high-frequency circuit.

[0002] Patent Document 1 discloses a clamp circuit that suppresses the amplitude of an amplified signal.

[0003] Japanese Patent Application Laid-Open No. 2021-13142

[0004] However, with the above-mentioned conventional technology, it is difficult to suppress destruction of an elastic wave filter.

[0005] Accordingly, the present invention provides a high-frequency circuit capable of suppressing destruction of an elastic wave filter.

[0006] A high-frequency circuit according to one aspect of the present invention includes: a power amplifier; an elastic wave filter connected to an output terminal of the power amplifier; a coupler connected between the elastic wave filter and the power amplifier; a detection circuit connected to a coupling port of the coupler; an integration circuit connected to an output terminal of the detection circuit; and a control circuit configured to reduce input power to the elastic wave filter when an output signal of the integration circuit is equal to or greater than a first threshold value, and to reduce input power to the elastic wave filter when an output signal of the detection circuit is equal to or greater than a second threshold value.

[0007] According to one aspect of the present invention, destruction of an elastic wave filter can be suppressed.

[0008] Figure 1 is a configuration diagram of a communication device according to Embodiment 1. Figure 2 is a graph showing an example of a high-frequency signal, an integral signal, a detected signal, and a threshold in Embodiment 1. Figure 3A is a graph showing an example of a switch control signal generated by the control circuit according to Embodiment 1. Figure 3B is a graph showing an example of a bias current controlled by the control circuit according to Embodiment 1. Figure 4 is a graph showing an example of a high-frequency signal, an integral signal, a detected signal, and a threshold in Modification 1 of Embodiment 1. Figure 5A is a graph showing an example of a switch control signal generated by the control circuit according to Modification 1 of Embodiment 1. Figure 5B is a graph showing an example of a bias current controlled by the control circuit according to Modification 1 of Embodiment 1. Figure 6 is a graph showing an example of a high-frequency signal, an integral signal, a detected signal, and a threshold in Modification 2 of Embodiment 1. Figure 7 is a graph showing an example of a bias current controlled by the control circuit according to Modification 2 of Embodiment 1. Figure 8 is a configuration diagram of a communication device according to Embodiment 2. Figure 9A is a graph showing an example of a bias current controlled by the control circuit according to Embodiment 2. Figure 9B is a graph showing an example of a switch control signal generated by the control circuit according to Embodiment 2. Figure 10A is a graph showing an example of bias current controlled by the control circuit according to Modification 1 of Embodiment 2. Figure 10B is a graph showing an example of switch control signal generated by the control circuit according to Modification 1 of Embodiment 2. Figure 11 is a graph showing an example of high-frequency signal, integrated signal, detected signal, and threshold in Modification 2 of Embodiment 2. Figure 12 is a graph showing an example of bias current controlled by the control circuit according to Modification 2 of Embodiment 2. Figure 13 is a configuration diagram of a communication device according to Embodiment 3. Figure 14 is a graph showing an example of switch control signal generated by the control circuit according to Embodiment 3. Figure 15 is a configuration diagram of a communication device according to Embodiment 4. Figure 16 is a graph showing an example of bias current controlled by the control circuit according to Embodiment 4. Figure 17 is a configuration diagram of a communication device according to Embodiment 5. Figure 18 is a graph showing an example of switch control signal generated by the control circuit according to Embodiment 5. Figure 19 is a configuration diagram of a communication device according to Embodiment 6.Figure 20 is a graph showing an example of a switch control signal generated by the control circuit according to Embodiment 6. Figure 21 is a configuration diagram of a communication device according to Embodiment 7. Figure 22 is a graph showing an example of a switch control signal generated by the control circuit according to Embodiment 7. Figure 23 is a configuration diagram of a communication device according to Embodiment 8. Figure 24A is a circuit configuration diagram of a detection circuit according to Embodiment 8. Figure 24B is a circuit configuration diagram of an integration circuit according to Embodiment 8. Figure 24C is a circuit configuration diagram of a differentiation circuit according to Embodiment 8. Figure 25 is a graph showing an example of a high-frequency signal, integration signal, detection signal, differentiation signal, and threshold in Embodiment 8. Figure 26 is a graph showing an example of a bias current controlled by the control circuit according to Embodiment 8. Figure 27 is a graph showing an example of a high-frequency signal, integration signal, detection signal, differentiation signal, and threshold in Embodiment 8. Figure 28 is a graph showing an example of input power to an elastic wave filter according to Embodiment 8. Figure 29 is a configuration diagram of a communication device according to Embodiment 9. Figure 30A is a graph showing an example of a switch control signal generated by the control circuit according to Embodiment 9. Figure 30B is a graph showing an example of bias current controlled by the control circuit according to Embodiment 9. Figure 31 is a configuration diagram of a communication device according to Embodiment 10. Figure 32 is a graph showing an example of a high-frequency signal, an integrated signal, a detected signal, and a threshold in Embodiment 10. Figure 33 is a graph showing an example of bias current controlled by the control circuit according to Embodiment 10. Figure 34 is a configuration diagram of a communication device according to Embodiment 11. Figure 35 is a graph showing an example of bias current controlled by the control circuit according to Embodiment 11.

[0009] The embodiments of the present invention will be described in detail below with reference to the drawings. Note that the embodiments described below are all general or specific examples. The numerical values, shapes, materials, components, arrangement of components, and connection configurations shown in the following embodiments are examples only and are not intended to limit the present invention.

[0010] The figures are schematic diagrams that have been appropriately emphasized, omitted, or had their proportions adjusted to illustrate the present invention, and are not necessarily strictly accurate representations. Actual shapes, positional relationships, and proportions may differ. In each figure, substantially identical components are denoted by the same reference numerals, and redundant explanations may be omitted or simplified.

[0011] In the following explanation, "connected" includes not only direct connections via terminals and / or wiring conductors, but also electrical connections via other circuit elements. "A is switchably connected to B" means that the connection and disconnection between A and B are switchable, and that A is connected to B via a switch. Note that "A is connected to B" includes "A is switchably connected to B".

[0012] "C is connected between A and B" means that one end of C is connected to A and the other end of C is connected to B, meaning that C is in series connection to the path between A and B. "C is connected between the path between A and B and ground" means that one end of C is connected to the path between A and B and the other end of C is connected to ground, meaning that C is in shunt connection to the path between A and B. "The path between A and B" means a path composed of conductors that electrically connect A to B.

[0013] A "terminal" refers to the point where a conductor within a circuit element ends. However, if the impedance of the conductors between circuit elements is sufficiently low, a terminal can be interpreted not only as a single point, but as any point on the conductor between circuit elements, or even the entire conductor.

[0014] The "passband of a filter" is the portion of the frequency spectrum transmitted by the filter, and is defined as the frequency band between two frequencies that are 3 dB greater than the minimum power insertion loss.

[0015] "Power class" is a classification of the output power of user equipment (UE) defined by its maximum output power. A lower power class value indicates a higher maximum output power that is permitted. For example, the 3GPP (registered trademark) (3rd Generation Partnership Project) defines power classes 1, 1.5, 2, and 3. Specifically, power class 1 is defined as having a maximum output power of 31 dBm. Power class 1.5 is defined as having a maximum output power of 29 dBm. Power class 2 is defined as having a maximum output power of 26 dBm. Power class 3 is defined as having a maximum output power of 23 dBm.

[0016] The maximum output power of a UE is defined as the maximum output power at the antenna terminal. The maximum output power of a UE is measured using methods defined by 3GPP, etc. For example, the maximum output power is measured by measuring the radiated power at the antenna. Alternatively, instead of measuring the radiated power, the maximum output power of the antenna can be measured by providing a terminal near the antenna and connecting a measuring instrument (such as a spectrum analyzer) to that terminal.

[0017] "Bands corresponding to a specified power class" refers to frequency bands where that power class can be used, and is defined in standards and specifications. For example, in 3GPP Release 17, n1, n3, n34, n39, n40, n41, n77, n78, n79, n95, n97, n98, and n104 are defined as bands corresponding to power class 2 for 5GNR, and n41, n77, n78, and n79 are defined as bands corresponding to power class 1.5 for 5GNR.

[0018] "Transmitting band" refers to the frequency band used for transmission in a communication device, while "receiving band" refers to the frequency band used for reception in a communication device. For example, in an FDD (Frequency Division Duplex) band, different frequency bands (uplink band and downlink band) are used as the transmitting and receiving bands. In contrast, in a TDD band, the same frequency band is used for both the transmitting and receiving bands.

[0019] Terms indicating the relationship between elements, such as "parallel" and "perpendicular," and terms indicating the shape of elements, such as "straight line," as well as numerical ranges, do not represent only the strict meaning but also include a substantially equivalent range, such as an error of a few percent. Furthermore, "constant" means not only being strictly constant but also fluctuating within a range that can be considered substantially the same as being strictly constant (a range of ±10%).

[0020] (Embodiment 1) Embodiment 1 will be described below.

[0021] [1.1. Configuration of the Communication Device 5] First, the configuration of the communication device 5 according to this embodiment will be described with reference to Figure 1. Figure 1 is a configuration diagram of the communication device 5 according to this embodiment.

[0022] Figure 1 shows an exemplary configuration, and the communication device 5 can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the communication device 5 provided below should not be interpreted as restrictive.

[0023] The communication device 5 can be used to provide wireless connectivity. For example, the communication device 5 can be implemented in a UE (User Equipment) on a cellular network (also called a mobile network) such as a mobile phone, smartphone, tablet computer, or wearable device. In another example, by implementing the communication device 5, wireless connectivity can be provided to IoT (Internet of Things) sensor devices, medical / healthcare devices, cars, unmanned aerial vehicles (UAVs) (so-called drones), and automated guided vehicles (AGVs). In yet another example, by implementing the communication device 5, wireless connectivity can also be provided in a wireless access point or wireless hotspot.

[0024] The communication device 5 comprises a high-frequency circuit 1, an antenna 2, an RFIC (Radio Frequency Integrated Circuit) 3, and a BBIC (Baseband Integrated Circuit) 4.

[0025] The high-frequency circuit 1 can transmit high-frequency signals between the antenna 2 and the RFIC 3. The circuit configuration of the high-frequency circuit 1 will be described later.

[0026] Antenna 2 is connected to the high-frequency circuit 1. Antenna 2 can receive high-frequency signals from the high-frequency circuit 1 and transmit them to the outside of the communication device 5. Furthermore, antenna 2 may receive high-frequency signals from outside the communication device 5 and supply them to the high-frequency circuit 1. Note that antenna 2 does not have to be included in the communication device 5. In addition, the communication device 5 may have one or more antennas in addition to antenna 2.

[0027] RFIC3 is an example of a signal processing circuit that processes high-frequency signals. Specifically, RFIC3 processes the transmission signal input from BBIC4 by upconversion or the like, and outputs the high-frequency transmission signal generated by this signal processing to high-frequency circuit 1. Furthermore, RFIC3 may process the high-frequency reception signal input via high-frequency circuit 1 by downconversion or the like, and output the received signal generated by this signal processing to BBIC4. RFIC3 may also have a control unit that controls switches and amplifiers in high-frequency circuit 1. Note that some or all of the control unit functions of RFIC3 may be included outside of RFIC3, for example, in BBIC4 or high-frequency circuit 1.

[0028] BBIC4 is a baseband signal processing circuit that processes signals using a frequency band lower than the high-frequency signal transmitted by the high-frequency circuit 1. Examples of signals processed by BBIC4 include image signals for image display and / or voice signals for communication via a speaker. Note that BBIC4 does not necessarily have to be included in the communication device 5.

[0029] [1.2. Circuit Configuration of High-Frequency Circuit 1] Next, the circuit configuration of the high-frequency circuit 1 according to this embodiment will be described with reference to Figure 1. Note that Figure 1 shows an exemplary circuit configuration, and the high-frequency circuit 1 can be implemented using any of the many different circuit implementations and circuit technologies. Therefore, the description of the high-frequency circuit 1 provided below should not be interpreted as restrictive.

[0030] The high-frequency circuit 1 includes a power amplifier 11, a bias circuit 21, switches 31, 36 and 51, a coupler 32, a detection circuit 33, an integrating circuit 34, a control circuit 35, a temperature sensor 37, elastic wave filters 41, 42 and 43, an antenna connection terminal 100, a high-frequency input terminal 110, and a control terminal 120.

[0031] The antenna connection terminal 100 is an external connection terminal of the high-frequency circuit 1 and is a terminal for supplying high-frequency signals to the antenna 2. The antenna connection terminal 100 is connected to the antenna 2 outside the high-frequency circuit 1 and to the switch 51 inside the high-frequency circuit 1.

[0032] The high-frequency input terminal 110 is an external connection terminal of the high-frequency circuit 1 and is a terminal for receiving high-frequency signals from the RFIC 3. The high-frequency input terminal 110 is connected to the RFIC 3 outside the high-frequency circuit 1 and to the input terminal of the power amplifier 11 inside the high-frequency circuit 1.

[0033] The control terminal 120 is an external connection terminal of the high-frequency circuit 1 and is a terminal for receiving control signals from the RFIC 3. The control terminal 120 is connected to the RFIC 3 outside the high-frequency circuit 1 and to the bias circuit 21 inside the high-frequency circuit 1.

[0034] The power amplifier 11 is connected between the high-frequency input terminal 110 and the elastic wave filters 41 to 43. Specifically, the input terminal of the power amplifier 11 is connected to the high-frequency input terminal 110, and the output terminal of the power amplifier 11 is switchably connected to the elastic wave filters 41 to 43 via a coupler 32 and a switch 31.

[0035] The configuration of the power amplifier 11 is not particularly limited. For example, the power amplifier 11 may be a multi-stage amplifier. Also, for example, the power amplifier 11 may be a differential amplifier, a balanced amplifier, or a Doherty amplifier.

[0036] The bias circuit 21 is included in the semiconductor component 72 and can supply bias current to the power amplifier 11.

[0037] Switch 31 is included in semiconductor component 73 and is connected between the power amplifier 11 and the elastic wave filters 41-43. Specifically, switch 31 includes a common terminal 310 and select terminals 311, 312, and 313. The common terminal 310 is connected to the output terminal of the power amplifier 11 via a coupler 32. Select terminal 311 is connected to the elastic wave filter 41. Select terminal 312 is connected to the elastic wave filter 42. Select terminal 313 is connected to the elastic wave filter 43. In this connection configuration, switch 31 can selectively connect the common terminal 310 to the select terminals 311-313, for example, based on a control signal from RFIC 3. Switch 31 is composed of, for example, an SP3T (Single-Pole Triple-Throw) type switch circuit. Note that switch 31 does not necessarily have to be included in the high-frequency circuit 1.

[0038] The coupler 32 is included in the semiconductor component 73 and is connected between the power amplifier 11 and the switch 31. Specifically, the input port of the coupler 32 is connected to the output terminal of the power amplifier 11. The output port of the coupler 32 is connected to the common terminal 310 of the switch 31. The coupled port 321 of the coupler 32 is connected to the detection circuit 33. The coupler 32 can supply a portion of the high-frequency signal flowing from the output terminal of the power amplifier 11 to the common terminal 310 of the switch 31 to the detection circuit 33 via the coupled port 321.

[0039] The detection circuit 33 is included in the semiconductor component 73 and is connected between the coupler 32 and the integrating circuit 34. Specifically, the input terminal of the detection circuit 33 is connected to the coupling port 321 of the coupler 32. The output terminal of the detection circuit 33 is connected to the input terminal of the integrating circuit 34, and further connected to the control circuit 35. The detection circuit 33 can detect the envelope of the output signal of the coupler 32 and supply the detected envelope signal as a detection signal to the integrating circuit 34 and the control circuit 35.

[0040] The integrating circuit 34 is an example of a first integrating circuit and is included in the semiconductor component 73. The integrating circuit 34 is connected between the detection circuit 33 and the control circuit 35. Specifically, the input terminal of the integrating circuit 34 is connected to the output terminal of the detection circuit 33. The output terminal of the integrating circuit 34 is connected to the control circuit 35. The integrating circuit 34 can convert the output signal (detection signal) of the detection circuit 33 into an integral signal (moving average signal) per unit time and supply the integral signal to the control circuit 35.

[0041] The control circuit 35 is included in the semiconductor component 73 and is connected to the output terminals of the detection circuit 33 and the integration circuit 34. The control circuit 35 can limit the input signal to the elastic wave filters 41-43 (input limiting) when the output signal (integrated signal) of the integration circuit 34 is greater than or equal to the threshold TH1. Furthermore, the control circuit 35 can limit the input signal to the elastic wave filters 41-43 (input limiting) when the output signal (detection signal) of the detection circuit 33 is greater than or equal to the threshold TH2. Limiting the input signal to the filter means reducing the power of the input signal to the filter (input power) compared to when it is not limited. The control circuit 35 includes a bias control circuit 351 and a switch control circuit 352.

[0042] The bias control circuit 351 can limit the bias of the bias circuit 21 when the integrated signal is greater than or equal to the threshold TH1. Conversely, if the integrated signal is less than the threshold TH1, the bias control circuit 351 does not need to limit the bias of the bias circuit 21. Bias refers to the bias current or bias voltage supplied to the power amplifier. Limiting the bias means reducing the absolute value of the bias current or bias voltage compared to when it is unlimited. For example, the bias control circuit 351 can reduce the bias by supplying a control signal to the bias circuit 21. Alternatively, the bias control circuit 351 may reduce the bias by supplying a control current to the bias circuit 21. In the following explanation, the case where the bias is a bias current will be mainly described, but the bias is not limited to a bias current.

[0043] The switch control circuit 352 can close the switch 36 when the detected signal is equal to or greater than the threshold TH2. Conversely, the switch control circuit 352 may open the switch 36 when the detected signal is less than the threshold TH2.

[0044] The thresholds TH1 and TH2 are examples of a first threshold and a second threshold, respectively. As the thresholds TH1 and TH2, empirically and / or experimentally predetermined thresholds can be used.

[0045] It should be noted that the thresholds TH1 and TH2 may be changed according to the temperature detected by the temperature sensor 37. For example, the thresholds TH1 and TH2 may be changed such that the thresholds decrease as the detected temperature increases. Further, for example, when the detected temperature is higher than a threshold temperature, smaller thresholds may be used as the thresholds TH1 and TH2, and when the detected temperature is lower than the threshold temperature, larger thresholds may be used as the thresholds TH1 and TH2.

[0046] Furthermore, the thresholds TH1 and TH2 may be changed according to the power class. For example, the thresholds TH1 and TH2 may be changed such that the thresholds are smaller for a second power class defined by a second maximum output power lower than a first maximum output power (e.g., power class 3) than for a first power class defined by the first maximum output power (e.g., power class 2, power class 1.5, power class 1, etc.).

[0047] Furthermore, the thresholds TH1 and TH2 may be changed according to the elastic wave filter connected to the power amplifier 11 via the switch 31. For example, when the common terminal 310 is connected to the selection terminal 311, thresholds TH1 and TH2 suitable for the elastic wave filter 41 may be used. Further, for example, when the common terminal 310 is connected to the selection terminal 312, thresholds TH1 and TH2 suitable for the elastic wave filter 42 may be used. Further, for example, when the common terminal 310 is connected to the selection terminal 313, thresholds TH1 and TH2 suitable for the elastic wave filter 43 may be used.

[0048] The switch 36 is included in the semiconductor component 73, and is connected between the ground and a path connecting the power amplifier 11 and the acoustic wave filters 41 to 43. Specifically, one end of the switch 36 is connected to a path connecting the coupler 32 and the common terminal 310 of the switch 31. The other end of the switch 36 is connected to ground. In such a connection configuration, the switch 36 can switch between opening and closing based on a control signal from the switch control circuit 352. The switch 36 is configured by, for example, an SPST (Single-Pole Single-Throw) type switch circuit. Note that the switch 36 may be incorporated in the switch 31. In this case, the switch 31 may further include a selection terminal connected to ground. Alternatively, the switch 36 may be connected between the ground and a path connecting the power amplifier 11 and the coupler 32. Alternatively, the switch 36 may be connected between the ground and a path connecting the switch 31 and the acoustic wave filter 41, 42 or 43.

[0049] The temperature sensor 37 is included in the semiconductor component 73 and can detect temperature. Note that the temperature sensor 37 does not need to be included in the high-frequency circuit 1.

[0050] The acoustic wave filter 41 is a band-pass filter having a passband including the transmission band of band A. The acoustic wave filter 41 is connected between the switches 31 and 51. Specifically, one end of the acoustic wave filter 41 is connected to the selection terminal 311 of the switch 31. The other end of the acoustic wave filter 41 is connected to the selection terminal 511 of the switch 51. The acoustic wave filter 41 may have power durability corresponding to the first power class.

[0051] The elastic wave filter 42 is a bandpass filter having a passband that includes the transmission bandwidth of band B. The elastic wave filter 42 is connected between switches 31 and 51. Specifically, one end of the elastic wave filter 42 is connected to the selection terminal 312 of switch 31. The other end of the elastic wave filter 42 is connected to the selection terminal 512 of switch 51. The elastic wave filter 42 may have the power withstand capability corresponding to the second power class, or it may not have the power withstand capability corresponding to the first power class. Note that the elastic wave filter 42 does not have to be included in the high-frequency circuit 1.

[0052] The elastic wave filter 43 is a bandpass filter having a passband that includes the transmission bandwidth of band C. The elastic wave filter 43 is connected between switches 31 and 51. Specifically, one end of the elastic wave filter 43 is connected to the select terminal 313 of switch 31. The other end of the elastic wave filter 43 is connected to the select terminal 513 of switch 51. The elastic wave filter 43 may have power withstand capability corresponding to the first power class. Note that the elastic wave filter 43 does not necessarily have to be included in the high-frequency circuit 1.

[0053] Bands A to C are frequency bands for communication systems built using Radio Access Technology (RAT). Bands A to C are predefined by standardization bodies (e.g., 3GPP and IEEE (Institute of Electrical and Electronics Engineers)). Examples of communication systems include 5GNR (5th Generation New Radio) systems, 4GLTE (4th Generation Long Term Evolution) systems, and 2GGSM (2nd Generation Global System for Mobile communications). In this embodiment, bands A and C may correspond to power class 2, and band B corresponds to power class 3 but does not necessarily have to correspond to power class 2.

[0054] Switch 51 is included in semiconductor component 75 and is connected between elastic wave filters 41-43 and antenna connection terminal 100. Specifically, switch 51 includes a common terminal 510 and select terminals 511, 512, and 513. The common terminal 510 is connected to the antenna connection terminal 100. Select terminal 511 is connected to elastic wave filter 41. Select terminal 512 is connected to elastic wave filter 42. Select terminal 513 is connected to elastic wave filter 43. In this connection configuration, switch 51 can selectively connect the common terminal 510 to select terminals 511-513, for example, based on a control signal from RFIC 3. Switch 51 is composed of, for example, an SP3T type switch circuit. Note that switch 51 does not necessarily have to be included in the high-frequency circuit 1.

[0055] Semiconductor component 72 is a semiconductor integrated circuit including a bias circuit 21. Semiconductor component 73 is a semiconductor integrated circuit including a switch 31, a coupler 32, a detection circuit 33, an integrating circuit 34, a control circuit 35, a switch 36, and a temperature sensor 37. Semiconductor component 75 is a semiconductor integrated circuit including a switch 51. As the semiconductor material for semiconductor components 72, 73, and 75, for example, silicon single crystal (Si), gallium nitride (GaN), or silicon carbide (SiC) can be used, but are not limited to these.

[0056] Furthermore, semiconductor components 72 and 73 may be integrated into a single semiconductor component. In this case, the single semiconductor component includes a bias circuit 21, a switch 31, a coupler 32, a detection circuit 33, an integrating circuit 34, a control circuit 35, a switch 36, and a temperature sensor 37. Also, semiconductor component 73 may be divided into multiple semiconductor components.

[0057] [1.3. Operation of the Control Circuit 35] Next, a specific example of the operation of the control circuit 35 configured as described above will be explained with reference to Figures 2, 3A, and 3B. Figure 2 is a graph showing an example of a high-frequency signal, an integrated signal, a detected signal, and a threshold in this embodiment. Figure 3A is a graph showing an example of a switch control signal generated by the control circuit 35 according to this embodiment. Figure 3B is a graph showing an example of a bias current controlled by the control circuit 35 according to this embodiment. In Figures 2, 3A, and 3B, the vertical axis represents voltage, signal level, and bias current, respectively, and the horizontal axis represents time. Note that if the signal level is ON, the switch 36 is closed, and if the signal level is OFF, the switch 36 is opened.

[0058] In Figure 2, the detected signal exceeds the threshold TH2 at time t1 and falls below the threshold TH2 at time t2. Therefore, the switch control circuit 352 closes switch 36 from time t1 to time t2 to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 3A, the switch control circuit 352 sets the signal level of the switch control signal to the ON level from time t1 to time t2. More specifically, at time t1, when the detected signal transitions from a state where it is less than the threshold TH2 to a state where it is greater than or equal to the threshold TH2, the switch control circuit 352 switches the signal level of the switch control signal from the OFF level to the ON level. This closes switch 36 and starts limiting the input to the elastic wave filters 41-43 based on the detected signal. Subsequently, at time t2, when the detected signal transitions from a state where it is greater than or equal to the threshold TH2 to a state where it is less than the threshold TH2, the switch control circuit 352 switches the signal level of the switch control signal from the ON level to the OFF level. This opens switch 36, ending the input limiting of elastic wave filters 41-43 based on the detected signal.

[0059] In Figure 2, the integrated signal exceeds the threshold TH1 at time t3 and falls below the threshold TH1 at time t4. Therefore, the bias control circuit 351 reduces the bias between time t3 and time t4 to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 3B, the bias control circuit 351 reduces the bias current to current value I1 between time t3 and time t4. More specifically, at time t3, when the integrated signal transitions from a state where it is less than the threshold TH1 to a state where it is greater than or equal to the threshold TH1, the bias control circuit 351 reduces the bias current from current value I0 to current value I1, initiating bias reduction control. This initiates input limiting of the elastic wave filters 41-43 based on the integrated signal. Subsequently, at time t4, when the integrated signal transitions from a state where it is greater than or equal to the threshold TH1 to a state where it is less than the threshold TH1, the bias control circuit 351 increases the bias current from current value I1 to current value I0, ending the bias reduction control. This terminates the input limiting of the elastic wave filters 41-43 based on the integrated signal.

[0060] Current value I0 is the current value when the bias current is unlimited. Current value I1 is the current value when the bias current is limited, and is smaller than current value I0. Current values ​​I0 and I1 can be empirically and / or experimentally predetermined current values. Note that current values ​​I0 and I1 do not have to be constant and may change over time. For example, current value I1 may change according to the difference between the integral value and the threshold value TH1.

[0061] [1.4. Summary of Embodiment 1] As described above, the high-frequency circuit 1 according to this embodiment comprises a power amplifier 11, an elastic wave filter 41 connected to the output terminal of the power amplifier 11, a coupler 32 connected between the elastic wave filter 41 and the power amplifier 11, a detection circuit 33 connected to the coupling port 321 of the coupler 32, an integrating circuit 34 connected to the output terminal of the detection circuit 33, and a control circuit 35 configured to reduce the input power to the elastic wave filter 41 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to reduce the input power to the elastic wave filter 41 when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0062] According to this, when the output signal of the integrating circuit 34 is greater than or equal to the threshold TH1, the input power to the elastic wave filter 41 decreases, effectively suppressing the destruction of the elastic wave filter 41 due to continuous excessive input power. Furthermore, when the output signal of the detection circuit 33 is greater than or equal to the threshold TH2, the input power to the elastic wave filter 41 decreases, effectively suppressing the destruction of the elastic wave filter 41 due to instantaneous excessive input power. For example, if only threshold TH2 is used, the threshold for continuous excessive input power is too high, and the destruction of the elastic wave filter 41 cannot be suppressed. Conversely, if only threshold TH1 is used, the threshold for instantaneous excessive input power is too low, and the distortion of the high-frequency signal increases. Therefore, by using threshold TH1 for the output signal of the integrating circuit 34 and threshold TH2 for the output signal of the detection circuit 33, it is possible to suppress the destruction of the elastic wave filter 41 while suppressing the distortion of the high-frequency signal.

[0063] For example, the high-frequency circuit 1 according to this embodiment may further include a bias circuit 21 configured to supply bias current to the power amplifier 11, and a switch 36 connected between the path between the power amplifier 11 and the elastic wave filter 41 and ground. The control circuit 35 may be configured to reduce the bias when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to close the switch 36 when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0064] According to this, by closing the switch 36 when the output signal of the detection circuit 33 is above the threshold TH2, instantaneous excess power input can be quickly shut off. Therefore, the destruction of the elastic wave filter 41 due to instantaneous excess input power can be effectively suppressed. On the other hand, by reducing the bias when the output signal of the integrating circuit 34 is above the threshold TH1, continuous excess input power can be gradually reduced. Therefore, while suppressing distortion of the high-frequency signal, the destruction of the elastic wave filter 41 due to continuous excess input power can be effectively suppressed. Furthermore, since the switch 36 is connected between the path connecting the power amplifier 11 and the elastic wave filter 41 and ground, the loss of high-frequency signals can be suppressed.

[0065] Furthermore, for example, the high-frequency circuit 1 according to this embodiment may also include a temperature sensor 37, and the threshold values ​​TH1 and TH2 may be changed according to the temperature detected by the temperature sensor 37.

[0066] According to this, threshold values ​​TH1 and TH2 can be changed according to the temperature of the elastic wave filter 41, and changes in the breakdown characteristics of the elastic wave filter 41 due to temperature changes can be accommodated.

[0067] (Modification 1 of Embodiment 1) Next, Modification 1 of Embodiment 1 will be described. In this modification, the threshold for starting the input limiting of the elastic wave filter and the threshold for ending the input limiting are different from each other, that is, control hysteresis is provided for the input limiting, which is the main difference from Embodiment 1. Below, this modification will be described with reference to the drawings, focusing on the differences from Embodiment 1.

[0068] The circuit configuration of the communication device 5 and the high-frequency circuit 1 in this modified example is the same as that of the first embodiment described above, so their illustration and description are omitted.

[0069] In this modified example, when bias reduction control is not being performed, the bias control circuit 351 can start bias reduction control when the integrated signal transitions from a first state where it is less than the threshold TH1 to a second state where it is greater than or equal to the threshold TH1. Furthermore, when bias reduction control is being performed, the bias control circuit 351 can terminate bias reduction control when the integrated signal transitions from a third state where it is greater than or equal to the threshold TH3 to a fourth state where it is less than the threshold TH3.

[0070] In this modified example, when switch 36 is open, the switch control circuit 352 can close switch 36 when the detected signal transitions from a fifth state (less than threshold TH2) to a sixth state (greater than or equal to threshold TH2). Also, when switch 36 is closed, the switch control circuit 352 can open switch 36 when the detected signal transitions from a seventh state (greater than or equal to threshold TH4) to an eighth state (less than threshold TH4).

[0071] Thresholds TH3 and TH4 are examples of a third and fourth threshold, respectively. Threshold TH3 is smaller than threshold TH1, and threshold TH4 is smaller than threshold TH2. Thresholds TH3 and TH4 can be predetermined empirically and / or experimentally.

[0072] The thresholds TH3 and TH4 may be changed, similar to the thresholds TH1 and TH2, according to the temperature detected by the temperature sensor 37, the power class, the elastic wave filter, or any combination thereof.

[0073] [1.5. Operation of the Control Circuit 35 in Modified Example 1] A specific example of the operation of the control circuit 35 in this modified example will be explained with reference to Figures 4, 5A, and 5B. Figure 4 is a graph showing an example of a high-frequency signal, an integrated signal, a detected signal, and a threshold in this modified example. Figure 5A is a graph showing an example of a switch control signal generated by the control circuit 35 in this modified example. Figure 5B is a graph showing an example of a bias current controlled by the control circuit 35 in this modified example. In Figures 4, 5A, and 5B, the vertical axis represents voltage, signal level, and bias current, respectively, and the horizontal axis represents time in all cases.

[0074] In Figure 4, the detected signal exceeds the threshold TH2 at time t1 and falls below the threshold TH4 at time t2a. Therefore, the switch control circuit 352 closes switch 36 from time t1 to time t2a to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 5A, the switch control circuit 352 sets the signal level of the switch control signal to the ON level from time t1 to time t2a. More specifically, at time t1, when the state transitions from the state where the detected signal is less than the threshold TH2 (fifth state) to the state where the detected signal is greater than or equal to the threshold TH2 (sixth state), the switch control circuit 352 switches the signal level of the switch control signal from the OFF level to the ON level. As a result, switch 36 is closed and the input limiting of the elastic wave filters 41-43 based on the detected signal begins. Subsequently, at time t2a, when the detected signal transitions from a state where the detected signal is greater than or equal to the threshold TH4 (seventh state) to a state where the detected signal is less than the threshold TH4 (eighth state), the switch control circuit 352 switches the signal level of the switch control signal from the on level to the off level. As a result, the switch 36 opens, and the input limiting of the elastic wave filters 41-43 based on the detected signal ends.

[0075] In Figure 4, the integrated signal exceeds the threshold TH1 at time t3 and falls below the threshold TH3 at time t4a. Therefore, the bias control circuit 351 reduces the bias from time t3 to time t4a in order to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 5B, the bias control circuit 351 reduces the bias current to current value I1 from time t3 to time t4a. More specifically, at time t3, when the integrated signal transitions from a state where the integrated signal is less than the threshold TH1 (first state) to a state where the integrated signal is greater than or equal to the threshold TH1 (second state), the bias control circuit 351 reduces the bias current from current value I0 to current value I1, and starts bias reduction control. This initiates the input limiting of the elastic wave filters 41-43 based on the integrated signal. Subsequently, at time t4a, when the integrated signal transitions from a state where it is greater than or equal to the threshold TH3 (third state) to a state where it is less than the threshold TH3 (fourth state), the bias control circuit 351 increases the bias current from current value I1 to current value I0, thereby ending the bias reduction control. This terminates the input limiting of the elastic wave filters 41-43 based on the integrated signal.

[0076] [1.6. Summary of Modification 1] As described above, in the high-frequency circuit 1 according to this modification, the control circuit 35 may be configured to start bias reduction control when the output signal of the integrating circuit 34 transitions from a first state where it is less than the threshold TH1 to a second state where it is greater than or equal to the threshold TH1, and may be configured to end bias reduction control when the output signal of the integrating circuit 34 transitions from a third state where it is greater than or equal to the threshold TH3, which is less than the threshold TH1, to a fourth state where it is less than the threshold TH3.

[0077] According to this, different thresholds TH1 and TH3 are used for the start and end of bias reduction control. Therefore, the number of switching cycles for bias reduction and increase can be reduced compared to when a single threshold is used, and the stability of the high-frequency circuit 1 can be improved.

[0078] Furthermore, for example, in the high-frequency circuit 1 according to this modified example, the control circuit 35 may be configured to close the switch 36 when the output signal of the detection circuit 33 transitions from a fifth state where it is less than the threshold TH2 to a sixth state where it is greater than or equal to the threshold TH2, and the control circuit 35 may be configured to open the switch 36 when the output signal of the detection circuit 33 transitions from a seventh state where it is greater than or equal to the threshold TH4, which is less than the threshold TH2, to an eighth state where it is less than the threshold TH4.

[0079] According to this, different threshold values ​​TH2 and TH4 are used when closing and opening the switch 36. Therefore, the number of times the switch 36 is opened and closed can be reduced compared to when a single threshold value is used, and the stability of the high-frequency circuit 1 can be improved.

[0080] (Modification 2 of Embodiment 1) Next, Modification 2 of Embodiment 1 will be described. This modification mainly differs from Embodiment 1 in that multiple thresholds are used for bias reduction control. Below, this modification will be described with reference to the drawings, focusing on the differences from Embodiment 1.

[0081] The circuit configuration of the communication device 5 and the high-frequency circuit 1 in this modified example is the same as that of the first embodiment described above, so their illustration and description are omitted.

[0082] Similar to Embodiment 1 above, the bias control circuit 351 can reduce the bias current to a current value I1 when the integrated signal is greater than or equal to the threshold TH1. However, in this modified example, when the integrated signal is greater than or equal to the threshold TH5, the bias control circuit 351 can reduce the bias current to a current value I2 that is smaller than the current value I1.

[0083] Threshold TH5 is an example of a fifth threshold, and is greater than threshold TH1. A threshold predetermined empirically and / or experimentally can be used as threshold TH5.

[0084] The threshold TH5 may be changed, similar to the threshold TH1, according to the temperature detected by the temperature sensor 37, the power class, the elastic wave filter, or any combination thereof.

[0085] [1.7. Operation of the Control Circuit 35 in Modified Example 2] A specific example of the operation of the control circuit 35 in this modified example will be explained with reference to Figures 6 and 7. Figure 6 is a graph showing an example of a high-frequency signal, an integrated signal, a detected signal, and a threshold in this modified example. Figure 7 is a graph showing an example of a bias current controlled by the control circuit 35 in this modified example. In Figures 6 and 7, the vertical axis represents voltage and bias current, respectively, and the horizontal axis represents time in both cases.

[0086] In Figure 6, the integrated signal exceeds threshold TH1 at time t3, and further exceeds threshold TH5 at time t5. Then, the integrated signal falls below threshold TH5 at time t6, and further falls below threshold TH1 at time t4. Therefore, the bias control circuit 351 reduces the bias current between time t3 and time t4 to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 7, the bias control circuit 351 reduces the bias current to current value I1 between time t3 and time t5. Furthermore, the bias control circuit 351 reduces the bias current to current value I2 between time t5 and time t6. Then, the bias control circuit 351 reduces the bias current to current value I1 between time t6 and time t4. More specifically, at time t3, when the integrated signal transitions from a state where it is less than threshold TH1 to a state where it is greater than or equal to threshold TH1, the bias control circuit 351 reduces the bias current from current value I0 to current value I1, initiating bias reduction control. This initiates input limiting of elastic wave filters 41-43 based on the integrated signal. Subsequently, at time t5, when the integrated signal transitions from a state where it is less than threshold TH5 to a state where it is greater than or equal to threshold TH5, the bias control circuit 351 further reduces the bias current from current value I1 to current value I2. Then, at time t6, when the integrated signal transitions from a state where it is greater than or equal to threshold TH5 to a state where it is less than threshold TH5, the bias control circuit 351 increases the bias current from current value I2 to current value I1. Finally, at time t4, when the integrated signal transitions from a state where it is greater than or equal to the threshold TH1 to a state where it is less than the threshold TH1, the bias control circuit 351 increases the bias current from current value I1 to current value I0, thereby ending the bias reduction control. This terminates the input limiting of the elastic wave filters 41-43 based on the integrated signal.

[0087] Current values ​​I1 and I2 are examples of the first and second values, respectively. Current value I1 is smaller than current value I0, and current value I2 is smaller than current value I1. In other words, the relationship I0 > I1 > I2 holds. Current value I0 is the current value when the bias current is unrestricted, and current values ​​I1 and I2 are the current values ​​when the bias current is restricted. Current values ​​I0, I1, and I2 can be current values ​​that have been predetermined empirically and / or experimentally. Note that current values ​​I0, I1, and I2 do not have to be constant values ​​and may change over time.

[0088] [1.8. Summary of Modification 2] As described above, in the high-frequency circuit 1 according to this modification, the control circuit 35 may be configured to reduce the bias to a first value (e.g., current value I1) when the output signal of the integrating circuit 34 is greater than or equal to the threshold TH1, and may be configured to reduce the bias to a second value (e.g., current value I2) which is smaller than the first value (e.g., current value I1) when the output signal of the integrating circuit 34 is greater than or equal to the threshold TH5 which is greater than the threshold TH1.

[0089] According to this, as the output signal of the integrating circuit 34 increases, the bias value decreases in steps. Therefore, the bias can be reduced in steps, and a balance can be struck between suppressing distortion of the high-frequency signal and suppressing the destruction of the elastic wave filter 41.

[0090] (Embodiment 2) Next, Embodiment 2 will be described. This embodiment differs from Embodiment 1 in that the switch is controlled based on the integral signal and the bias current is controlled based on the detection signal. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiment 1.

[0091] The communication device 5A according to this embodiment is the same as the communication device 5 according to Embodiment 1, except that it is equipped with a high-frequency circuit 1A instead of the high-frequency circuit 1, so its description will be omitted.

[0092] [2.1. Circuit Configuration of High-Frequency Circuit 1A] The circuit configuration of the high-frequency circuit 1A according to this embodiment will be described with reference to Figure 8. Figure 8 is a configuration diagram of the communication device 5A according to this embodiment.

[0093] Figure 8 shows an exemplary circuit configuration, and the high-frequency circuit 1A can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the high-frequency circuit 1A provided below should not be interpreted as restrictive.

[0094] The high-frequency circuit 1A includes a power amplifier 11, a bias circuit 21, switches 31, 36 and 51, a coupler 32, a detection circuit 33, an integrating circuit 34, a control circuit 35A, a temperature sensor 37, elastic wave filters 41, 42 and 43, an antenna connection terminal 100, a high-frequency input terminal 110, and a control terminal 120.

[0095] The control circuit 35A is included in the semiconductor component 73 and is connected to the output terminals of the detection circuit 33 and the integration circuit 34. The control circuit 35A can reduce the input power to the elastic wave filters 41-43 when the output signal (integrated signal) of the integration circuit 34 is greater than or equal to the threshold TH1. Furthermore, the control circuit 35A can reduce the input power to the elastic wave filters 41-43 when the output signal (detected signal) of the detection circuit 33 is greater than or equal to the threshold TH2. Specifically, the control circuit 35A includes a bias control circuit 351A and a switch control circuit 352A.

[0096] The bias control circuit 351A can reduce the bias when the detected signal is greater than or equal to the threshold TH2. Conversely, if the detected signal is less than the threshold TH2, the bias control circuit 351A does not need to reduce the bias.

[0097] The switch control circuit 352A can close switch 36 when the integrated signal is greater than or equal to the threshold TH1. Conversely, the switch control circuit 352A may open switch 36 when the integrated signal is less than the threshold TH1.

[0098] [2.2. Operation of Control Circuit 35A] Next, a specific example of the operation of the control circuit 35A configured as described above will be explained with reference to Figures 2, 9A, and 9B. Figure 9A is a graph showing an example of a bias current controlled by the control circuit 35A according to this embodiment. Figure 9B is a graph showing an example of a switch control signal generated by the control circuit 35A according to this embodiment. In Figures 9A and 9B, the vertical axis represents the bias current and signal level, respectively, and the horizontal axis represents time in both cases.

[0099] In Figure 2, the detected signal exceeds the threshold TH2 at time t1 and falls below the threshold TH2 at time t2. Therefore, the bias control circuit 351A reduces the bias current between time t1 and time t2 to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 9A, the bias control circuit 351A reduces the bias current to current value I1 between time t1 and time t2. More specifically, at time t1, when the detected signal transitions from a state where it is less than the threshold TH1 to a state where it is greater than or equal to the threshold TH1, the bias control circuit 351A reduces the bias current from current value I0 to current value I1, and starts bias reduction control. This initiates the input limiting of the elastic wave filters 41-43 based on the detected signal. Subsequently, at time t2, when the detected signal transitions from a state where it is greater than or equal to threshold TH1 to a state where it is less than threshold TH1, the bias control circuit 351A increases the bias current from current value I1 to current value I0, thereby ending the bias reduction control. This terminates the input limiting of the elastic wave filters 41-43 based on the detected signal.

[0100] In Figure 2, the integrated signal exceeds the threshold TH1 at time t3 and falls below the threshold TH1 at time t4. Therefore, the switch control circuit 352A closes switch 36 between time t3 and time t4 to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 9B, the switch control circuit 352A sets the signal level of the switch control signal to the ON level between time t3 and time t4. More specifically, at time t3, when the integrated signal transitions from a state where it is less than the threshold TH1 to a state where it is greater than or equal to the threshold TH1, the switch control circuit 352A switches the signal level of the switch control signal from the OFF level to the ON level. This closes switch 36 and starts limiting the input to the elastic wave filters 41-43 based on the integrated signal. Subsequently, at time t4, when the integrated signal transitions from a state where it is greater than or equal to the threshold TH1 to a state where it is less than the threshold TH1, the switch control circuit 352A switches the signal level of the switch control signal from the ON level to the OFF level. This opens switch 36, ending the input limiting of elastic wave filters 41-43 based on the integrated signal.

[0101] [2.3. Summary of Embodiment 2] As described above, the high-frequency circuit 1A according to this embodiment comprises a power amplifier 11, an elastic wave filter 41 connected to the output terminal of the power amplifier 11, a coupler 32 connected between the elastic wave filter 41 and the power amplifier 11, a detection circuit 33 connected to the coupling port 321 of the coupler 32, an integrating circuit 34 connected to the output terminal of the detection circuit 33, and a control circuit 35A configured to reduce the input power to the elastic wave filter 41 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to reduce the input power to the elastic wave filter 41 when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0102] According to this, in this embodiment as well, similar to Embodiment 1, by using threshold TH1 for the output signal of the integrating circuit 34 and threshold TH2 for the output signal of the detection circuit 33, it is possible to suppress distortion of the high-frequency signal while suppressing the destruction of the elastic wave filter 41.

[0103] For example, the high-frequency circuit 1A according to this embodiment may further include a bias circuit 21 configured to supply bias current to the power amplifier 11, and a switch 36 connected between the path between the power amplifier 11 and the elastic wave filter 41 and ground. The control circuit 35A may be configured to close the switch 36 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to reduce the bias when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0104] According to this, by controlling the bias circuit 21 and the switch 36, the breakdown of the elastic wave filter 41 can be effectively suppressed.

[0105] For example, the high-frequency circuit 1A according to this embodiment may further include a temperature sensor 37, and the threshold values ​​TH1 and TH2 may be changed according to the temperature detected by the temperature sensor 37.

[0106] According to this, threshold values ​​TH1 and TH2 can be changed according to the temperature of the elastic wave filter 41, and changes in the breakdown characteristics of the elastic wave filter 41 due to temperature changes can be accommodated.

[0107] (Modification 1 of Embodiment 2) Next, Modification 1 of Embodiment 2 will be described. In this modification, the threshold for starting the input limiting of the elastic wave filter and the threshold for ending the input limiting are different from each other, that is, control hysteresis is provided for the input limiting, which is the main difference from Embodiment 2 described above. Below, this modification will be described with reference to the drawings, focusing on the differences from Embodiment 2 described above.

[0108] The circuit configuration of the communication device 5A and the high-frequency circuit 1A in this modified example is the same as that of the second embodiment described above, so their illustration and description are omitted.

[0109] In this modified example, when switch 36 is open, the switch control circuit 352A can close switch 36 when the integrated signal transitions from a first state where it is less than the threshold TH1 to a second state where it is greater than or equal to the threshold TH1. Also, when switch 36 is closed, the switch control circuit 352A can open switch 36 when the integrated signal transitions from a third state where it is greater than or equal to the threshold TH3 to a fourth state where it is less than the threshold TH3.

[0110] In this modified example, when bias reduction control is not being performed, the bias control circuit 351A can start bias reduction control when the detected signal transitions from a fifth state where it is less than the threshold TH2 to a sixth state where it is greater than or equal to the threshold TH2. Also, when bias reduction control is being performed, the bias control circuit 351A can terminate bias reduction control when the detected signal transitions from a seventh state where it is greater than or equal to the threshold TH4 to an eighth state where it is less than the threshold TH4.

[0111] [2.4. Operation of Control Circuit 35A in Modification 1] A specific example of the operation of the control circuit 35A in this modification will be explained with reference to Figures 4, 10A, and 10B. Figure 10A is a graph showing an example of the bias current controlled by the control circuit 35A in this modification. Figure 10B is a graph showing an example of the switch control signal generated by the control circuit 35A in this modification. In Figures 10A and 10B, the vertical axis represents the bias current and signal level, respectively, and the horizontal axis represents time in both cases.

[0112] In Figure 4, the detected signal exceeds the threshold TH2 at time t1 and falls below the threshold TH4 at time t2a. Therefore, the bias control circuit 351A reduces the bias current from time t1 to time t2a in order to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 10A, the bias control circuit 351A reduces the bias current to current value I1 from time t1 to time t2a. More specifically, at time t1, when the state transitions from the state where the detected signal is less than the threshold TH2 (fifth state) to the state where the detected signal is greater than or equal to the threshold TH2 (sixth state), the bias control circuit 351A reduces the bias current from current value I0 to current value I1, and starts bias reduction control. This initiates the input limiting of the elastic wave filters 41-43 based on the detected signal. Subsequently, at time t2a, when the detected signal transitions from a state where the detected signal is greater than or equal to the threshold TH4 (seventh state) to a state where the detected signal is less than the threshold TH4 (eighth state), the bias control circuit 351A increases the bias current from current value I1 to current value I0, ending the bias reduction control. This terminates the input limiting of the elastic wave filters 41-43 based on the detected signal.

[0113] In Figure 4, the integrated signal exceeds the threshold TH1 at time t3 and falls below the threshold TH3 at time t4a. Therefore, the switch control circuit 352A closes switch 36 from time t3 to time t4a to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 10B, the switch control circuit 352A sets the signal level of the switch control signal to the ON level from time t3 to time t4a. More specifically, at time t3, when the integrated signal transitions from a state where it is less than the threshold TH1 (first state) to a state where it is greater than or equal to the threshold TH1 (second state), the switch control circuit 352A switches the signal level of the switch control signal from the OFF level to the ON level. As a result, switch 36 is closed and the input limiting of the elastic wave filters 41-43 based on the integrated signal begins. Subsequently, at time t4a, when the integrated signal transitions from a state where it is greater than or equal to the threshold TH3 (third state) to a state where it is less than the threshold TH3 (fourth state), the switch control circuit 352A switches the signal level of the switch control signal from the on level to the off level. As a result, the switch 36 opens, and the input limiting of the elastic wave filters 41-43 based on the integrated signal ends.

[0114] [2.5. Summary of Modification 1] As described above, in the high-frequency circuit 1A according to this modification, the control circuit 35A may be configured to close the switch 36 when the output signal of the integrating circuit 34 transitions from a first state where it is less than the threshold TH1 to a second state where it is greater than or equal to the threshold TH1, and may be configured to open the switch 36 when the output signal of the integrating circuit 34 transitions from a third state where it is greater than or equal to the threshold TH3, which is less than the threshold TH1, to a fourth state where it is less than the threshold TH3.

[0115] According to this, different threshold values ​​TH1 and TH3 are used when closing and opening the switch 36. Therefore, the number of times the switch 36 is switched on and off can be reduced compared to when a single threshold value is used, and the stability of the high-frequency circuit 1A can be improved.

[0116] Furthermore, for example, in the high-frequency circuit 1A according to this modified example, the control circuit 35A may be configured to start bias reduction control when the output signal of the detection circuit 33 transitions from a fifth state where it is less than the threshold TH2 to a sixth state where it is greater than or equal to the threshold TH2, and may be configured to end bias reduction control when the output signal of the detection circuit 33 transitions from a seventh state where it is greater than or equal to the threshold TH4, which is less than the threshold TH2, to an eighth state where it is less than the threshold TH4.

[0117] According to this, different thresholds TH2 and TH4 are used for the start and end of bias reduction control. Therefore, the number of switching cycles for bias reduction and increase can be reduced compared to when a single threshold is used, thereby improving the stability of the high-frequency circuit 1A.

[0118] (Modification 2 of Embodiment 2) Next, Modification 2 of Embodiment 2 will be described. This modification mainly differs from Embodiment 2 in that multiple thresholds are used for bias reduction control. Below, this modification will be described with reference to the drawings, focusing on the differences from Embodiment 2.

[0119] The circuit configuration of the communication device 5A and the high-frequency circuit 1A in this modified example is the same as that of the second embodiment described above, so their illustration and description are omitted.

[0120] Similar to Embodiment 2 described above, the bias control circuit 351A can reduce the bias current to a current value I1 when the detected signal is greater than or equal to the threshold TH2. However, in this modified example, when the integrated signal is greater than or equal to the threshold TH6, the bias control circuit 351A can reduce the bias current to a current value I2 that is smaller than the current value I1.

[0121] Threshold TH6 is an example of a sixth threshold and is greater than threshold TH2. A threshold predetermined empirically and / or experimentally can be used as threshold TH6.

[0122] The threshold TH6 may be changed, like the threshold TH2, according to the temperature detected by the temperature sensor 37, the power class, the elastic wave filter, or any combination thereof.

[0123] [2.6. Operation of Control Circuit 35A in Modified Example 2] A specific example of the operation of the control circuit 35A in this modified example will be explained with reference to Figures 11 and 12. Figure 11 is a graph showing an example of a high-frequency signal, an integrated signal, a detected signal, and a threshold in this modified example. Figure 12 is a graph showing an example of a bias current controlled by the control circuit 35A in this modified example. In Figures 11 and 12, the vertical axis represents voltage and bias current, respectively, and the horizontal axis represents time in both cases. Note that in Figure 12, the vicinity of time t1 to t2 is shown in an enlarged view.

[0124] In Figure 11, the detected signal exceeds the threshold TH2 at time t1, and further exceeds the threshold TH6 at time t7. Then, the detected signal falls below the threshold TH6 at time t8, and further falls below the threshold TH2 at time t2. Therefore, the bias control circuit 351A reduces the bias current from time t1 to time t2 in order to limit the input of the elastic wave filters 41-43. For example, as shown in Figure 12, the bias control circuit 351A reduces the bias current to current value I1 from time t1 to time t7. Furthermore, the bias control circuit 351A reduces the bias current to current value I2 from time t7 to time t8. Then, the bias control circuit 351A reduces the bias current to current value I1 from time t8 to time t2. More specifically, at time t1, when the detected signal transitions from a state where it is less than threshold TH2 to a state where it is greater than or equal to threshold TH2, the bias control circuit 351A reduces the bias current from current value I0 to current value I1, initiating bias reduction control. This initiates input limiting of elastic wave filters 41-43 based on the detected signal. Subsequently, at time t7, when the detected signal transitions from a state where it is less than threshold TH6 to a state where it is greater than or equal to threshold TH6, the bias control circuit 351A further reduces the bias current from current value I1 to current value I2. Then, at time t8, when the detected signal transitions from a state where it is greater than or equal to threshold TH6 to a state where it is less than threshold TH6, the bias control circuit 351A increases the bias current from current value I2 to current value I1. Finally, at time t2, when the detected signal transitions from a state where it is greater than or equal to threshold TH2 to a state where it is less than threshold TH2, the bias control circuit 351A increases the bias current from current value I1 to current value I0, thereby ending the bias reduction control. This terminates the input limiting of the elastic wave filters 41-43 based on the detected signal.

[0125] [2.7. Summary of Modification 2] As described above, in the high-frequency circuit 1A according to this modification, the control circuit 35A may be configured to reduce the bias to a first value (e.g., current value I1) when the output signal of the detection circuit 33 is greater than or equal to the threshold TH2, and the control circuit 35A may be configured to reduce the bias to a second value (e.g., current value I2) which is smaller than the first value (e.g., current value I1) when the output signal of the integrating circuit 34 is greater than or equal to the threshold TH6 which is greater than the threshold TH2.

[0126] According to this, as the output signal of the detection circuit 33 increases, the bias value decreases in steps. Therefore, the bias can be reduced in steps, and a balance can be struck between suppressing distortion of the high-frequency signal and suppressing damage to the elastic wave filter 41.

[0127] (Embodiment 3) Next, Embodiment 3 will be described. In this embodiment, the switch is controlled based on the integrated signal and the detected signal, but the bias current is not controlled, which is the main difference from Embodiments 1 and 2 described above. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiments 1 and 2 described above.

[0128] The communication device 5B according to this embodiment is the same as the communication device 5 according to Embodiment 1, except that it is equipped with a high-frequency circuit 1B instead of the high-frequency circuit 1, so its description will be omitted.

[0129] [3.1. Circuit Configuration of High-Frequency Circuit 1B] The circuit configuration of the high-frequency circuit 1B according to this embodiment will be described with reference to Figure 13. Figure 13 is a configuration diagram of the communication device 5B according to this embodiment.

[0130] Note that Figure 13 shows an exemplary circuit configuration, and the high-frequency circuit 1B can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the high-frequency circuit 1B provided below should not be interpreted as restrictive.

[0131] The high-frequency circuit 1B includes a power amplifier 11, a bias circuit 21, switches 31, 36 and 51, a coupler 32, a detection circuit 33, an integrating circuit 34, a control circuit 35B, a temperature sensor 37, elastic wave filters 41, 42 and 43, an antenna connection terminal 100, a high-frequency input terminal 110, and a control terminal 120.

[0132] The control circuit 35B is included in the semiconductor component 73 and is connected to the output terminals of the detection circuit 33 and the integration circuit 34. The control circuit 35B can limit the input signals to the elastic wave filters 41-43 when the output signal (integrated signal) of the integration circuit 34 is greater than or equal to the threshold TH1. Furthermore, the control circuit 35B can limit the input signals to the elastic wave filters 41-43 when the output signal (detected signal) of the detection circuit 33 is greater than or equal to the threshold TH2. Specifically, the control circuit 35B includes a switch control circuit 352B.

[0133] The switch control circuit 352B can close switch 36 if the integrated signal is greater than or equal to the threshold TH1. Furthermore, the switch control circuit 352B can close switch 36 if the detected signal is greater than or equal to the threshold TH2. Conversely, if the integrated signal is less than the threshold TH1 and the detected signal is less than the threshold TH2, the switch control circuit 352B may open switch 36.

[0134] [3.2. Operation of Control Circuit 35B] Next, a specific example of the operation of the control circuit 35B configured as described above will be explained with reference to Figures 2 and 14. Figure 14 is a graph showing an example of a switch control signal generated by the control circuit 35B according to this embodiment. In Figure 14, the vertical axis represents the signal level, and the horizontal axis represents time.

[0135] In Figure 2, the detected signal exceeds the threshold TH2 at time t1 and falls below the threshold TH2 at time t2. Therefore, the switch control circuit 352B closes switch 36 from time t1 to time t2 to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 14, the switch control circuit 352B sets the signal level of the switch control signal to the ON level from time t1 to time t2. More specifically, at time t1, when the detected signal transitions from a state where it is less than the threshold TH2 to a state where it is greater than or equal to the threshold TH2, the switch control circuit 352B switches the signal level of the switch control signal from the OFF level to the ON level. This closes switch 36 and starts limiting the input to the elastic wave filters 41-43 based on the detected signal. Subsequently, at time t2, when the detected signal transitions from a state where it is greater than or equal to the threshold TH2 to a state where it is less than the threshold TH2, the switch control circuit 352B switches the signal level of the switch control signal from the ON level to the OFF level. This opens switch 36, ending the input limiting of elastic wave filters 41-43 based on the detected signal.

[0136] In Figure 2, the integrated signal exceeds the threshold TH1 at time t3 and falls below the threshold TH1 at time t4. Therefore, the switch control circuit 352B closes switch 36 from time t3 to time t4 to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 14, the switch control circuit 352B sets the signal level of the switch control signal to the ON level from time t3 to time t4. More specifically, at time t3, when the state transitions from the state where the integrated signal is less than the threshold TH1 to the state where the detected signal is greater than or equal to the threshold TH1, the switch control circuit 352B switches the signal level of the switch control signal from the OFF level to the ON level. This closes switch 36 and starts limiting the input to the elastic wave filters 41-43 based on the integrated signal. Subsequently, at time t4, when the state transitions from the state where the integrated signal is greater than or equal to the threshold TH1 to the state where the integrated signal is less than the threshold TH1, the switch control circuit 352B switches the signal level of the switch control signal from the ON level to the OFF level. This opens switch 36, ending the input limiting of elastic wave filters 41-43 based on the integrated signal.

[0137] [3.3. Summary of Embodiment 3] As described above, the high-frequency circuit 1B according to this embodiment comprises a power amplifier 11, an elastic wave filter 41 connected to the output terminal of the power amplifier 11, a coupler 32 connected between the elastic wave filter 41 and the power amplifier 11, a detection circuit 33 connected to the coupling port 321 of the coupler 32, an integrating circuit 34 connected to the output terminal of the detection circuit 33, and a control circuit 35B configured to reduce the input power to the elastic wave filter 41 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to reduce the input power to the elastic wave filter 41 when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0138] According to this, in this embodiment as well, similar to Embodiment 1, by using threshold TH1 for the output signal of the integrating circuit 34 and threshold TH2 for the output signal of the detection circuit 33, it is possible to suppress distortion of the high-frequency signal while suppressing the destruction of the elastic wave filter 41.

[0139] For example, the high-frequency circuit 1B according to this embodiment may further include a switch 36 connected between the path between the power amplifier 11 and the elastic wave filter 41 and the ground. The control circuit 35B may be configured to close the switch 36 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, or to close the switch 36 when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0140] According to this, by controlling the switch 36, the destruction of the elastic wave filter 41 can be effectively suppressed.

[0141] Furthermore, for example, the high-frequency circuit 1B according to this embodiment may also include a temperature sensor 37, and the threshold values ​​TH1 and TH2 may be changed according to the temperature detected by the temperature sensor 37.

[0142] According to this, threshold values ​​TH1 and TH2 can be changed according to the temperature of the elastic wave filter 41, and changes in the breakdown characteristics of the elastic wave filter 41 due to temperature changes can be accommodated.

[0143] (Embodiment 4) Next, Embodiment 4 will be described. This embodiment differs from Embodiments 1 and 2 in that a switch is not used to limit the input of the elastic wave filter. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiments 1 and 2.

[0144] The communication device 5C according to this embodiment is the same as the communication device 5 according to Embodiment 1, except that it is equipped with a high-frequency circuit 1C instead of the high-frequency circuit 1, so its description will be omitted.

[0145] [4.1. Circuit Configuration of High-Frequency Circuit 1C] The circuit configuration of the high-frequency circuit 1C according to this embodiment will be described with reference to Figure 15. Figure 15 is a configuration diagram of the communication device 5C according to this embodiment.

[0146] Figure 15 shows an exemplary circuit configuration, and the high-frequency circuit 1C can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the high-frequency circuit 1C provided below should not be interpreted as restrictive.

[0147] The high-frequency circuit 1C includes a power amplifier 11, a bias circuit 21, switches 31 and 51, a coupler 32, a detection circuit 33, an integrating circuit 34, a control circuit 35C, a temperature sensor 37, elastic wave filters 41, 42 and 43, an antenna connection terminal 100, a high-frequency input terminal 110, and a control terminal 120.

[0148] The control circuit 35C is included in the semiconductor component 73 and is connected to the output terminals of the detection circuit 33 and the integration circuit 34. The control circuit 35C can reduce the input power to the elastic wave filters 41-43 when the output signal (integrated signal) of the integration circuit 34 is greater than or equal to the threshold TH1. Furthermore, the control circuit 35C can reduce the input power to the elastic wave filters 41-43 when the output signal (detected signal) of the detection circuit 33 is greater than or equal to the threshold TH2. Specifically, the control circuit 35C includes a bias control circuit 351C.

[0149] The bias control circuit 351C can reduce the bias when the integrated signal is greater than or equal to the threshold TH1. Furthermore, the bias control circuit 351C can reduce the bias when the detected signal is greater than or equal to the threshold TH2. Conversely, if the integrated signal is less than the threshold TH1 and the detected signal is less than the threshold TH2, it is not necessary to reduce the bias.

[0150] [4.2. Operation of Control Circuit 35C] Next, a specific example of the operation of the control circuit 35C configured as described above will be explained with reference to Figures 2 and 16. Figure 16 is a graph showing an example of bias current controlled by the control circuit 35C according to this embodiment. In Figure 16, the vertical axis represents bias current, and the horizontal axis represents time.

[0151] In Figure 2, the detected signal exceeds the threshold TH2 at time t1 and falls below the threshold TH2 at time t2. Therefore, the bias control circuit 351C reduces the bias current from time t1 to time t2 in order to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 16, the bias control circuit 351C reduces the bias current to current value I1 from time t1 to time t2. More specifically, at time t1, when the detected signal transitions from a state where it is less than the threshold TH2 to a state where it is greater than or equal to the threshold TH2, the bias control circuit 351C reduces the bias current from current value I0 to current value I1, and starts bias reduction control. This initiates the input limiting of the elastic wave filters 41-43 based on the detected signal. Subsequently, at time t2, when the detected signal transitions from a state where it is greater than or equal to threshold TH2 to a state where it is less than threshold TH2, the bias control circuit 351C increases the bias current from current value I1 to current value I0, thereby ending the bias reduction control. This terminates the input limiting of elastic wave filters 41-43 based on the detected signal.

[0152] In Figure 2, the integrated signal exceeds the threshold TH1 at time t3 and falls below the threshold TH1 at time t4. Therefore, the bias control circuit 351C reduces the bias current from time t3 to time t4 in order to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 16, the bias control circuit 351C reduces the bias current to current value I1 from time t3 to time t4. More specifically, at time t3, when the integrated signal transitions from a state where it is less than the threshold TH1 to a state where it is greater than or equal to the threshold TH1, the bias control circuit 351C reduces the bias current from current value I0 to current value I1, initiating bias reduction control. This initiates input limiting of the elastic wave filters 41-43 based on the integrated signal. Subsequently, at time t4, when the integrated signal transitions from a state where it is greater than or equal to the threshold TH1 to a state where it is less than the threshold TH1, the bias control circuit 351C increases the bias current from current value I1 to current value I0, ending the bias reduction control. This terminates the input limiting of the elastic wave filters 41-43 based on the integrated signal.

[0153] [4.3. Summary of Embodiment 4] As described above, the high-frequency circuit 1C according to this embodiment comprises a power amplifier 11, an elastic wave filter 41 connected to the output terminal of the power amplifier 11, a coupler 32 connected between the elastic wave filter 41 and the power amplifier 11, a detection circuit 33 connected to the coupling port 321 of the coupler 32, an integrating circuit 34 connected to the output terminal of the detection circuit 33, and a control circuit 35C configured to reduce the input power to the elastic wave filter 41 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to reduce the input power to the elastic wave filter 41 when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0154] According to this, in this embodiment as well, similar to Embodiment 1, by using threshold TH1 for the output signal of the integrating circuit 34 and threshold TH2 for the output signal of the detection circuit 33, it is possible to suppress distortion of the high-frequency signal while suppressing the destruction of the elastic wave filter 41.

[0155] For example, the high-frequency circuit 1C according to this embodiment may further include a bias circuit 21 configured to supply bias current to the power amplifier 11, and the control circuit 35C may be configured to reduce the bias when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and may be configured to reduce the bias when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0156] According to this, by controlling the bias circuit 21, the destruction of the elastic wave filter 41 can be effectively suppressed.

[0157] For example, the high-frequency circuit 1C according to this embodiment may further include a temperature sensor 37, and the threshold values ​​TH1 and TH2 may be changed according to the temperature detected by the temperature sensor 37.

[0158] According to this, threshold values ​​TH1 and TH2 can be changed according to the temperature of the elastic wave filter 41, and changes in the breakdown characteristics of the elastic wave filter 41 due to temperature changes can be accommodated.

[0159] (Embodiment 5) Next, Embodiment 5 will be described. This embodiment differs from Embodiment 1 in that a series switch is used instead of a shunt switch to limit the input of the elastic wave filter. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiment 1.

[0160] [5.1. Circuit Configuration of High-Frequency Circuit 1D] The circuit configuration of the high-frequency circuit 1D according to this embodiment will be described with reference to Figure 17. Figure 17 is a configuration diagram of the communication device 5D according to this embodiment.

[0161] Figure 17 shows an exemplary circuit configuration, and the high-frequency circuit 1D can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the high-frequency circuit 1D provided below should not be interpreted as restrictive.

[0162] The high-frequency circuit 1D includes a power amplifier 11, a bias circuit 21, switches 31 and 51, a coupler 32, a detection circuit 33, an integrating circuit 34, a control circuit 35D, a temperature sensor 37, elastic wave filters 41, 42 and 43, an antenna connection terminal 100, a high-frequency input terminal 110, and a control terminal 120.

[0163] The control circuit 35D is included in the semiconductor component 73 and is connected to the output terminals of the detection circuit 33 and the integration circuit 34. The control circuit 35D can limit the input signals to the elastic wave filters 41-43 when the output signal (integrated signal) of the integration circuit 34 is greater than or equal to the threshold TH1. Furthermore, the control circuit 35D can limit the input signals to the elastic wave filters 41-43 when the output signal (detected signal) of the detection circuit 33 is greater than or equal to the threshold TH2. Specifically, the control circuit 35D includes a bias control circuit 351 and a switch control circuit 352D.

[0164] The switch control circuit 352D does not connect the common terminal 310 of the switch 31 to any of the selection terminals 311 to 313 when the detected signal is greater than or equal to the threshold TH2. Conversely, the switch control circuit 352D may connect the common terminal 310 of the switch 31 to any of the selection terminals 311 to 313 when the detected signal is less than the threshold TH2.

[0165] [5.2. Operation of Control Circuit 35D] Next, a specific example of the operation of the control circuit 35D configured as described above will be explained with reference to Figures 2 and 18. Figure 18 is a graph showing an example of a switch control signal generated by the control circuit 35D according to this embodiment. In Figure 18, the vertical axis represents the signal level, and the horizontal axis represents time.

[0166] In Figure 2, the detected signal exceeds the threshold TH2 at time t1. Therefore, the switch control circuit 352D does not connect the common terminal 310 of the switch 31 to any of the selection terminals 311 to 313 for a predetermined time from time t1 in order to limit the input to the elastic wave filters 41 to 43. For example, as shown in Figure 18, the switch control circuit 352D sets the signal level of the switch control signal to the off level for a predetermined time from time t1. More specifically, at time t1, when the detected signal transitions from a state where it is less than the threshold TH2 to a state where it is greater than or equal to the threshold TH2, the switch control circuit 352D switches the signal level of the switch control signal from the on level to the off level. This disconnects the connection between the common terminal 310 of the switch 31 and the selection terminals 311 to 313, and the input limiting of the elastic wave filters 41 to 43 based on the detected signal begins. After a predetermined time has elapsed from time t1, the switch control circuit 352D switches the signal level of the switch control signal from the off level to the on level. As a result, the common terminal 310 of switch 31 is connected to one of the selection terminals 311 to 313, and the input limiting of the elastic wave filters 41 to 43 based on the detection signal is terminated.

[0167] The operation of the bias control circuit 351 is the same as in Embodiment 1, or its modified form 1 or 2, so its explanation will be omitted.

[0168] [5.3. Summary of Embodiment 5] As described above, the high-frequency circuit 1D according to this embodiment comprises a power amplifier 11, an elastic wave filter 41 connected to the output terminal of the power amplifier 11, a coupler 32 connected between the elastic wave filter 41 and the power amplifier 11, a detection circuit 33 connected to the coupling port 321 of the coupler 32, an integrating circuit 34 connected to the output terminal of the detection circuit 33, and a control circuit 35D configured to reduce the input power to the elastic wave filter 41 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to reduce the input power to the elastic wave filter 41 when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0169] According to this, in this embodiment as well, similar to Embodiment 1, by using threshold TH1 for the output signal of the integrating circuit 34 and threshold TH2 for the output signal of the detection circuit 33, it is possible to suppress distortion of the high-frequency signal while suppressing the destruction of the elastic wave filter 41.

[0170] For example, the high-frequency circuit 1D according to this embodiment may further include a bias circuit 21 configured to supply bias to the power amplifier 11, and a switch 31 connected between the power amplifier 11 and the elastic wave filter 41. The control circuit 35D may be configured to reduce the bias when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to open the switch 31 when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0171] According to this, by opening switch 31 when the output signal of detection circuit 33 is above threshold TH2, instantaneous excess power input can be quickly shut off. Therefore, the destruction of the elastic wave filter 41 due to instantaneous excess power input can be effectively suppressed. On the other hand, by reducing the bias when the output signal of integrating circuit 34 is above threshold TH1, continuous excess power input can be gradually limited. Therefore, while suppressing distortion of the high-frequency signal, the destruction of the elastic wave filter 41 due to continuous excess power input can be effectively suppressed. Furthermore, if the high-frequency circuit 1D includes multiple elastic wave filters, switch 31 can be repurposed as a selection switch for elastic wave filters 41 to 43, thereby suppressing an increase in the number of components.

[0172] For example, in the high-frequency circuit 1D according to this embodiment, the control circuit 35D may be configured to start bias reduction control when the output signal of the integrating circuit 34 transitions from a first state where it is less than the threshold TH1 to a second state where it is greater than or equal to the threshold TH1, and may be configured to end bias reduction control when the output signal of the integrating circuit 34 transitions from a third state where it is greater than or equal to the threshold TH3, which is less than the threshold TH1, to a fourth state where it is less than the threshold TH3.

[0173] According to this, different thresholds TH1 and TH3 are used for the start and end of bias current limiting. Therefore, the number of switching cycles between limiting and not limiting the bias current can be reduced compared to when a single threshold is used, and the stability of the high-frequency circuit 1D can be improved.

[0174] Furthermore, for example, in the high-frequency circuit 1D according to this embodiment, the control circuit 35D may be configured to reduce the bias to a first value (e.g., current value I1) when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, or to reduce the bias to a second value (e.g., current value I2) which is smaller than the first value (e.g., current value I1) when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH5 which is greater than the threshold TH1.

[0175] According to this, as the output signal of the integrating circuit 34 increases, the bias value decreases in steps. Therefore, the bias can be reduced in steps, and a balance can be struck between suppressing distortion of the high-frequency signal and suppressing the destruction of the elastic wave filter 41.

[0176] Furthermore, for example, the high-frequency circuit 1D according to this embodiment may also include a temperature sensor 37, and the threshold values ​​TH1 and TH2 may be changed according to the temperature detected by the temperature sensor 37.

[0177] According to this, threshold values ​​TH1 and TH2 can be changed according to the temperature of the elastic wave filter 41, and changes in the breakdown characteristics of the elastic wave filter 41 due to temperature changes can be accommodated.

[0178] (Embodiment 6) Next, Embodiment 6 will be described. This embodiment differs from Embodiment 5 in that the switch is controlled based on the integral signal and the bias current is controlled based on the detection signal. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiment 5.

[0179] The communication device 5E according to this embodiment is the same as the communication device 5 according to Embodiment 1, except that it is equipped with a high-frequency circuit 1E instead of the high-frequency circuit 1, so its description will be omitted.

[0180] [6.1. Circuit Configuration of High-Frequency Circuit 1E] The circuit configuration of the high-frequency circuit 1E according to this embodiment will be described with reference to Figure 19. Figure 19 is a configuration diagram of the communication device 5E according to this embodiment.

[0181] Figure 19 shows an exemplary circuit configuration, and the high-frequency circuit 1E can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the high-frequency circuit 1E provided below should not be interpreted as restrictive.

[0182] The high-frequency circuit 1E includes a power amplifier 11, a bias circuit 21, switches 31 and 51, a coupler 32, a detection circuit 33, an integrating circuit 34, a control circuit 35E, a temperature sensor 37, elastic wave filters 41, 42 and 43, an antenna connection terminal 100, a high-frequency input terminal 110, and a control terminal 120.

[0183] The control circuit 35E is included in the semiconductor component 73 and is connected to the output terminals of the detection circuit 33 and the integration circuit 34. The control circuit 35E can limit the input signals to the elastic wave filters 41-43 when the output signal (integrated signal) of the integration circuit 34 is greater than or equal to the threshold TH1. Furthermore, the control circuit 35E can limit the input signals to the elastic wave filters 41-43 when the output signal (detected signal) of the detection circuit 33 is greater than or equal to the threshold TH2. Specifically, the control circuit 35E includes a bias control circuit 351A and a switch control circuit 352E.

[0184] The switch control circuit 352E does not connect the common terminal 310 of the switch 31 to any of the selection terminals 311 to 313 when the integrated signal is greater than or equal to the threshold TH1. Conversely, the switch control circuit 352E may connect the common terminal 310 of the switch 31 to any of the selection terminals 311 to 313 when the integrated signal is less than the threshold TH1.

[0185] [6.2. Operation of Control Circuit 35E] Next, a specific example of the operation of the control circuit 35E configured as described above will be explained with reference to Figures 2 and 20. Figure 20 is a graph showing an example of a switch control signal generated by the control circuit 35E according to this embodiment. In Figure 20, the vertical axis represents the signal level, and the horizontal axis represents time.

[0186] In Figure 2, the integrated signal exceeds the threshold TH1 at time t3. Therefore, the switch control circuit 352E does not connect the common terminal 310 of the switch 31 to any of the selection terminals 311 to 313 for a predetermined time from time t3 in order to limit the input to the elastic wave filters 41 to 43. For example, as shown in Figure 20, the switch control circuit 352E sets the signal level of the switch control signal to the off level for a predetermined time from time t3. More specifically, at time t3, when the integrated signal transitions from a state where it is less than the threshold TH1 to a state where it is greater than or equal to the threshold TH1, the switch control circuit 352E switches the signal level of the switch control signal from the on level to the off level. This disconnects the connection between the common terminal 310 of the switch 31 and the selection terminals 311 to 313, and the input limiting of the elastic wave filters 41 to 43 based on the integrated signal begins. After a predetermined time has elapsed from time t3, the switch control circuit 352E switches the signal level of the switch control signal from the off level to the on level. As a result, the common terminal 310 of switch 31 is connected to one of the selection terminals 311 to 313, and the input limiting of the elastic wave filters 41 to 43 based on the integral signal is terminated.

[0187] The operation of the bias control circuit 351A is the same as in Embodiment 2, or its modified form 1 or 2, so its explanation will be omitted.

[0188] [6.3. Summary of Embodiment 6] As described above, the high-frequency circuit 1E according to this embodiment comprises a power amplifier 11, an elastic wave filter 41 connected to the output terminal of the power amplifier 11, a coupler 32 connected between the elastic wave filter 41 and the power amplifier 11, a detection circuit 33 connected to the coupling port 321 of the coupler 32, an integrating circuit 34 connected to the output terminal of the detection circuit 33, and a control circuit 35E configured to limit the input signal to the elastic wave filter 41 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to limit the input signal to the elastic wave filter 41 when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0189] According to this, in this embodiment as well, similar to Embodiment 1, by using threshold TH1 for the output signal of the integrating circuit 34 and threshold TH2 for the output signal of the detection circuit 33, it is possible to suppress distortion of the high-frequency signal while suppressing the destruction of the elastic wave filter 41.

[0190] For example, the high-frequency circuit 1E according to this embodiment may further include a bias circuit 21 configured to supply bias current to the power amplifier 11, and a switch 31 connected between the power amplifier 11 and the elastic wave filter 41. The control circuit 35E may be configured to open the switch 31 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to reduce the bias when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0191] According to this, by controlling the bias circuit 21 and the switch 31, the breakdown of the elastic wave filter 41 can be effectively suppressed.

[0192] Furthermore, for example, in the high-frequency circuit 1E according to this embodiment, the control circuit 35E may be configured to start bias reduction control when the output signal of the detection circuit 33 transitions from a fifth state where it is less than the threshold TH2 to a sixth state where it is greater than or equal to the threshold TH2, and may be configured to end bias reduction control when the output signal of the detection circuit 33 transitions from a seventh state where it is greater than or equal to the threshold TH4, which is less than the threshold TH2, to an eighth state where it is less than the threshold TH4.

[0193] According to this, different thresholds TH2 and TH4 are used for the start and end of bias current limiting. Therefore, the number of switching cycles between limiting and not limiting the bias current can be reduced compared to when a single threshold is used, and the stability of the high-frequency circuit 1E can be improved.

[0194] Furthermore, for example, in the high-frequency circuit 1E according to this embodiment, the control circuit 35E may be configured to reduce the bias to a first value (e.g., current value I1) when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2, and may be configured to reduce the bias to a second value (e.g., current value I2) which is smaller than the first value (e.g., current value I1) when the output signal of the detection circuit 33 is greater than or equal to a threshold TH5 which is greater than the threshold TH2.

[0195] According to this, as the output signal of the detection circuit 33 increases, the bias value decreases in steps. Therefore, the bias can be reduced in steps, and a balance can be struck between suppressing distortion of the high-frequency signal and suppressing damage to the elastic wave filter 41.

[0196] Furthermore, for example, the high-frequency circuit 1E according to this embodiment may also include a temperature sensor 37, and the threshold values ​​TH1 and TH2 may be changed according to the temperature detected by the temperature sensor 37.

[0197] According to this, threshold values ​​TH1 and TH2 can be changed according to the temperature of the elastic wave filter 41, and changes in the breakdown characteristics of the elastic wave filter 41 due to temperature changes can be accommodated.

[0198] (Embodiment 7) Next, Embodiment 7 will be described. In this embodiment, the switch is controlled based on the integral signal and the detection signal, but the bias current is not limited, which is the main difference from Embodiments 5 and 6 described above. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiments 5 and 6 described above.

[0199] The communication device 5F according to this embodiment is the same as the communication device 5 according to Embodiment 1, except that it is equipped with a high-frequency circuit 1F instead of the high-frequency circuit 1, so its description will be omitted.

[0200] [7.1. Circuit Configuration of High-Frequency Circuit 1F] The circuit configuration of the high-frequency circuit 1F according to this embodiment will be described with reference to Figure 21. Figure 21 is a configuration diagram of the communication device 5F according to this embodiment.

[0201] Figure 21 shows an exemplary circuit configuration, and the high-frequency circuit 1F can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the high-frequency circuit 1F provided below should not be interpreted as restrictive.

[0202] The high-frequency circuit 1F includes a power amplifier 11, a bias circuit 21, switches 31 and 51, a coupler 32, a detection circuit 33, an integrating circuit 34, a control circuit 35F, a temperature sensor 37, elastic wave filters 41, 42 and 43, an antenna connection terminal 100, a high-frequency input terminal 110, and a control terminal 120.

[0203] The control circuit 35F is included in the semiconductor component 73 and is connected to the output terminals of the detection circuit 33 and the integration circuit 34. The control circuit 35F can limit the input signals to the elastic wave filters 41-43 when the output signal (integrated signal) of the integration circuit 34 is greater than or equal to threshold TH1. Furthermore, the control circuit 35F can limit the input signals to the elastic wave filters 41-43 when the output signal (detected signal) of the detection circuit 33 is greater than or equal to threshold TH2. Specifically, the control circuit 35F includes a switch control circuit 352F.

[0204] The switch control circuit 352F does not connect the common terminal 310 of the switch 31 to any of the selection terminals 311 to 313 when the integrated signal is greater than or equal to the threshold TH1. Furthermore, the switch control circuit 352F does not connect the common terminal 310 of the switch 31 to any of the selection terminals 311 to 313 when the detected signal is greater than or equal to the threshold TH2. Conversely, if the integrated signal is less than the threshold TH1 and the detected signal is less than the threshold TH2, the switch control circuit 352F may connect the common terminal 310 of the switch 31 to any of the selection terminals 311 to 313.

[0205] [7.2. Operation of Control Circuit 35F] Next, a specific example of the operation of the control circuit 35F configured as described above will be explained with reference to Figures 2 and 22. Figure 22 is a graph showing an example of a switch control signal generated by the control circuit 35F according to this embodiment. In Figure 22, the vertical axis represents the signal level, and the horizontal axis represents time.

[0206] In Figure 2, the detected signal exceeds the threshold TH2 at time t1. Therefore, the switch control circuit 352F does not connect the common terminal 310 of the switch 31 to any of the selection terminals 311 to 313 for a predetermined time from time t1 in order to limit the input to the elastic wave filters 41 to 43. For example, as shown in Figure 22, the switch control circuit 352F sets the signal level of the switch control signal to the off level for a predetermined time from time t1. More specifically, at time t1, when the detected signal transitions from a state where it is less than the threshold TH2 to a state where it is greater than or equal to the threshold TH2, the switch control circuit 352F switches the signal level of the switch control signal from the on level to the off level. This disconnects the connection between the common terminal 310 of the switch 31 and the selection terminals 311 to 313, and the input limiting of the elastic wave filters 41 to 43 based on the detected signal begins. After a predetermined time has elapsed from time t1, the switch control circuit 352F switches the signal level of the switch control signal from the off level to the on level. As a result, the common terminal 310 of switch 31 is connected to one of the selection terminals 311 to 313, and the input limiting of the elastic wave filters 41 to 43 based on the detection signal is terminated.

[0207] In Figure 2, the integrated signal exceeds the threshold TH1 at time t3. Therefore, the switch control circuit 352F does not connect the common terminal 310 of the switch 31 to any of the selection terminals 311 to 313 for a predetermined time from time t3 in order to limit the input of the elastic wave filters 41 to 43. For example, as shown in Figure 22, the switch control circuit 352F sets the signal level of the switch control signal to the off level for a predetermined time from time t3. More specifically, at time t3, when the integrated signal transitions from a state where it is less than the threshold TH1 to a state where it is greater than or equal to the threshold TH1, the switch control circuit 352F switches the signal level of the switch control signal from the on level to the off level. This disconnects the connection between the common terminal 310 of the switch 31 and the selection terminals 311 to 313, and the input limiting of the elastic wave filters 41 to 43 based on the integrated signal begins. After a predetermined time has elapsed from time t3, the switch control circuit 352F switches the signal level of the switch control signal from the off level to the on level. As a result, the common terminal 310 of switch 31 is connected to one of the selection terminals 311 to 313, and the input limiting of the elastic wave filters 41 to 43 based on the integral signal is terminated.

[0208] [7.3. Summary of Embodiment 7] As described above, the high-frequency circuit 1F according to this embodiment comprises a power amplifier 11, an elastic wave filter 41 connected to the output terminal of the power amplifier 11, a coupler 32 connected between the elastic wave filter 41 and the power amplifier 11, a detection circuit 33 connected to the coupling port 321 of the coupler 32, an integrating circuit 34 connected to the output terminal of the detection circuit 33, and a control circuit 35F configured to limit the input signal to the elastic wave filter 41 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to limit the input signal to the elastic wave filter 41 when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0209] According to this, in this embodiment as well, similar to Embodiment 1, by using threshold TH1 for the output signal of the integrating circuit 34 and threshold TH2 for the output signal of the detection circuit 33, it is possible to suppress distortion of the high-frequency signal while suppressing the destruction of the elastic wave filter 41.

[0210] For example, the high-frequency circuit 1F according to this embodiment may further include a switch 31 connected between the power amplifier 11 and the elastic wave filter 41, and the control circuit 35F may be configured to open the switch 31 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, or to open the switch 31 when the output signal of the detection circuit 33 is greater than or equal to a threshold TH2.

[0211] According to this, by controlling the switch 31, the destruction of the elastic wave filter 41 can be effectively suppressed.

[0212] Furthermore, for example, the high-frequency circuit 1F according to this embodiment may also include a temperature sensor 37, and the threshold values ​​TH1 and TH2 may be changed according to the temperature detected by the temperature sensor 37.

[0213] According to this, threshold values ​​TH1 and TH2 can be changed according to the temperature of the elastic wave filter 41, and changes in the breakdown characteristics of the elastic wave filter 41 due to temperature changes can be accommodated.

[0214] (Embodiment 8) Next, Embodiment 8 will be described. This embodiment differs from Embodiment 4 in that the bias is controlled based on a differential signal in addition to the integral signal and detection signal. This embodiment will be described below with reference to the drawings, focusing on the differences from Embodiment 4.

[0215] The communication device 5G according to this embodiment is the same as the communication device 5 according to Embodiment 1, except that it is equipped with a high-frequency circuit 1G instead of the high-frequency circuit 1, so its description will be omitted.

[0216] [8.1. Circuit Configuration of High-Frequency Circuit 1G] The circuit configuration of the high-frequency circuit 1G according to this embodiment will be described with reference to Figure 23. Figure 23 is a configuration diagram of the communication device 5G according to this embodiment.

[0217] Figure 23 shows an exemplary circuit configuration, and the high-frequency circuit 1G can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the high-frequency circuit 1G provided below should not be interpreted as restrictive.

[0218] The high-frequency circuit 1G includes a power amplifier 11, a bias circuit 21, switches 31 and 51, a coupler 32, a detection circuit 33, an integrating circuit 34, a control circuit 35G, a temperature sensor 37, a differential circuit 38, elastic wave filters 41, 42 and 43, an antenna connection terminal 100, a high-frequency input terminal 110, and a control terminal 120.

[0219] The differential circuit 38 is included in the semiconductor component 73 and is connected between the detection circuit 33 and the control circuit 35G. Specifically, the input terminal of the differential circuit 38 is connected to the output terminal of the detection circuit 33. The output terminal of the differential circuit 38 is connected to the control circuit 35G. The differential circuit 38 can convert the output signal (detection signal) of the detection circuit 33 into a differential signal and supply the differential signal to the control circuit 35G.

[0220] The control circuit 35G is included in the semiconductor component 73 and is connected to the output terminals of the detection circuit 33, the integration circuit 34, and the differentiation circuit 38. The control circuit 35G can limit the input signals to the elastic wave filters 41-43 when the output signal (integration signal) of the integration circuit 34 is greater than or equal to the threshold TH1. Furthermore, the control circuit 35G can limit the input signals to the elastic wave filters 41-43 when the output signal (differentiation signal) of the differentiation circuit 38 is greater than or equal to the threshold TH7. In addition, the control circuit 35G may limit the input signals to the elastic wave filters 41-43 when the output signal (detection signal) of the detection circuit 33 is greater than or equal to the threshold TH2. Note that the control circuit 35G does not need to limit the input signals to the elastic wave filters 41-43 when the detection signal is greater than or equal to the threshold TH2. In this case, the control circuit 35G does not need to be connected to the output terminal of the detection circuit 33.

[0221] The control circuit 35G includes a bias control circuit 351G. The bias control circuit 351G can reduce the bias current when the integral signal is greater than or equal to the threshold TH1. The bias control circuit 351G can also reduce the bias current when the differential signal is greater than or equal to the threshold TH7. Furthermore, the bias control circuit 351G may reduce the bias current when the detected signal is greater than or equal to the threshold TH2. Conversely, if the integral signal is less than the threshold TH1, the detected signal is less than the threshold TH2, and the differential signal is less than the threshold TH7, the bias current does not need to be reduced.

[0222] Threshold TH7 is an example of a seventh threshold. A threshold predetermined empirically and / or experimentally can be used as threshold TH7. Note that, like threshold TH1, threshold TH7 may be changed according to the temperature detected by the temperature sensor 37, the power class, the elastic wave filter, or any combination thereof.

[0223] [8.2. Circuit Configuration of Detection Circuit 33] Next, the circuit configuration of the detection circuit 33 will be explained with reference to Figure 24A. Figure 24A is a circuit diagram of the detection circuit 33 according to this embodiment.

[0224] Note that Figure 24A shows an exemplary circuit configuration, and the detection circuit 33 can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the detection circuit 33 provided below should not be interpreted as restrictive.

[0225] The detection circuit 33 includes a diode D31 and a capacitor C31. Diode D31 is connected between the input terminal and the output terminal of the detection circuit 33. Capacitor C31 is connected between the path connecting diode D31 and the output terminal of the detection circuit 33 and ground.

[0226] This circuit configuration of the detection circuit 33 can also be applied to the detection circuit 33 according to Embodiments 1 to 7.

[0227] [8.3. Circuit Configuration of Integrating Circuit 34] Next, the circuit configuration of the integrating circuit 34 will be explained with reference to Figure 24B. Figure 24B is a circuit diagram of the integrating circuit 34 according to this embodiment.

[0228] Figure 24B shows an exemplary circuit configuration, and the integrating circuit 34 can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the integrating circuit 34 provided below should not be interpreted as restrictive.

[0229] The integrating circuit 34 includes a resistor R41 and a capacitor C41. The resistor R41 is connected between the input terminal and the output terminal of the integrating circuit 34. The capacitor C41 is connected between the path connecting the resistor R41 and the output terminal of the integrating circuit 34 and ground.

[0230] Furthermore, the integrating circuit 34 may also include a capacitor connected between the path between resistor R41 and the input terminal of the integrating circuit 34 and ground. Additionally, the integrating circuit 34 may also include a resistor connected between resistor R41 and the output terminal of the integrating circuit 34.

[0231] This circuit configuration of the integrating circuit 34 can also be applied to the integrating circuit 34 according to embodiments 1 to 7.

[0232] [8.4. Circuit Configuration of Differential Circuit 38] Next, the circuit configuration of the differential circuit 38 will be explained with reference to Figure 24C. Figure 24C is a circuit diagram of the differential circuit 38 according to this embodiment.

[0233] Note that Figure 24C shows an exemplary circuit configuration, and the differentiating circuit 38 can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the differentiating circuit 38 provided below should not be interpreted as restrictive.

[0234] The differentiating circuit 38 includes a capacitor C81 and a resistor R81. Capacitor C81 is connected between the input terminal and the output terminal of the differentiating circuit 38. Resistor R81 is connected between the path connecting capacitor C81 and the output terminal of the differentiating circuit 38 and ground.

[0235] Furthermore, the differentiating circuit 38 may include a resistor connected between the path between the capacitor C81 and the input terminal of the differentiating circuit 38 and ground. Also, the differentiating circuit 38 may include a capacitor connected between the capacitor C81 and the output terminal of the differentiating circuit 38.

[0236] [8.5. Operation of Control Circuit 35G] Next, a specific example of the operation of the control circuit 35G configured as described above will be explained with reference to Figures 25 and 26. Figure 25 is a graph showing an example of a high-frequency signal, integral signal, detection signal, differential signal, and threshold in this embodiment. In Figure 25, the vertical axis represents voltage and the horizontal axis represents time. Figure 26 is a graph showing an example of a bias current controlled by the control circuit 35G according to this embodiment. In Figure 26, the vertical axis represents bias current and the horizontal axis represents time.

[0237] In Figure 25, the differential signal exceeds the threshold TH7 at time t1 and falls below the threshold TH7 at time t2. Therefore, the bias control circuit 351G reduces the bias current from time t1 to time t2 in order to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 26, the bias control circuit 351G reduces the bias current from current value I0 to current value I1 from time t1 to time t2. More specifically, at time t1, when the differential signal transitions from a state where it is less than the threshold TH7 to a state where it is greater than or equal to the threshold TH7, the bias control circuit 351G reduces the bias current from current value I0 to current value I1, and starts bias reduction control. This initiates the input limiting of the elastic wave filters 41-43 based on the differential signal. Subsequently, at time t2, when the differential signal transitions from a state where it is greater than or equal to the threshold TH7 to a state where it is less than the threshold TH7, the bias control circuit 351G increases the bias current from current value I1 to current value I0, thereby ending the bias reduction control. This terminates the input limiting of the elastic wave filters 41-43 based on the detected signal.

[0238] In Figure 25, the integrated signal exceeds the threshold TH1 at time t3. Therefore, the bias control circuit 351G reduces the bias current from time t3 to limit the input of the elastic wave filters 41-43. For example, as shown in Figure 26, the bias control circuit 351G reduces the bias current from current value I0 to current value I1 from time t3. More specifically, at time t3, when the integrated signal transitions from a state where it is less than the threshold TH1 to a state where it is greater than or equal to the threshold TH1, the bias control circuit 351G reduces the bias current from current value I0 to current value I1.

[0239] Next, a specific example of the operation of the control circuit 35G with respect to a high-frequency signal having a rectangular envelope, used in performance tests of the high-frequency circuit 1G, will be described with reference to Figures 27 and 28. Figure 27 is a graph showing an example of a high-frequency signal, integral signal, detected signal, differential signal, and threshold in this embodiment. In Figure 27, the vertical axis represents voltage and the horizontal axis represents time. Figure 28 is a graph showing an example of input power to elastic wave filters 41 to 43 according to this embodiment. In Figure 28, the vertical axis represents input power and the horizontal axis represents time.

[0240] In Figure 27, the differential signal exceeds the threshold TH7 at time t1 and falls below the threshold TH7 at time t2. Therefore, the bias control circuit 351G limits the input to the elastic wave filters 41-43 from time t1 to time t2. As a result, as shown in Figure 28, the input power to the elastic wave filters 41-43 is reduced compared to when no input limiting is performed.

[0241] In Figure 27, the integral signal exceeds the threshold TH1 at time t3. Therefore, the bias control circuit 351G limits the input to the elastic wave filters 41-43 from time t3. As a result, as shown in Figure 28, the input power to the elastic wave filters 41-43 is reduced compared to when no input limiting is performed. Note that control using the differential and integral signals may be performed continuously.

[0242] [8.6. Summary of Embodiment 8] As described above, the high-frequency circuit 1G according to this embodiment comprises a power amplifier 11, an elastic wave filter 41 connected to the output terminal of the power amplifier 11, a coupler 32 connected between the elastic wave filter 41 and the power amplifier 11, a detection circuit 33 connected to the coupling port 321 of the coupler 32, an integrating circuit 34 and a differentiating circuit 38 connected to the output terminal of the detection circuit 33, and a control circuit 35G configured to reduce the input power to the elastic wave filter 41 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to reduce the input power to the elastic wave filter 41 when the output signal of the differentiating circuit 38 is greater than or equal to a threshold TH7.

[0243] According to this, when the output signal of the integrating circuit 34 is greater than or equal to the threshold TH1, the input power to the elastic wave filter 41 decreases, effectively suppressing the destruction of the elastic wave filter 41 due to continuous excessive input power. Furthermore, when the output signal of the differentiating circuit 38 is greater than or equal to the threshold TH7, the input power to the elastic wave filter 41 decreases, effectively suppressing the destruction of the elastic wave filter 41 due to a sudden increase in input power. For example, if only the threshold TH7 is used, the threshold for continuous excessive input power is too high, and the destruction of the elastic wave filter 41 cannot be suppressed. Conversely, if only the threshold TH1 is used, the threshold for a sudden increase in input power is too low, and the distortion of the high-frequency signal increases. Therefore, by using the threshold TH1 for the output signal of the integrating circuit 34 and the threshold TH7 for the output signal of the differentiating circuit 38, it is possible to suppress the destruction of the elastic wave filter 41 while suppressing the distortion of the high-frequency signal.

[0244] Furthermore, for example, the high-frequency circuit 1G according to this embodiment may include a bias circuit 21 configured to supply bias to the power amplifier 11, and the control circuit 35G may be configured to reduce the bias when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and may be configured to reduce the bias when the output signal of the differentiating circuit 38 is greater than or equal to a threshold TH7.

[0245] According to this, by controlling the bias circuit 21, the destruction of the elastic wave filter 41 can be effectively suppressed.

[0246] For example, in the high-frequency circuit 1G according to this embodiment, the control circuit 35G may be further configured to reduce the input power to the elastic wave filter 41 when the output signal of the detection circuit 33 is greater than or equal to the threshold TH2.

[0247] According to this, the input power of the elastic wave filter 41 can be controlled using the output signal of the integrating circuit 34, the output signal of the differentiating circuit 38, and the output signal of the detection circuit 33, thereby effectively suppressing the breakdown of the elastic wave filter 41 while suppressing distortion of the high-frequency signal.

[0248] (Embodiment 9) Next, Embodiment 9 will be described. This embodiment differs from Embodiment 8 in that the integrated signal is used to control the switch 36. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiment 8.

[0249] The communication device 5H according to this embodiment is the same as the communication device 5 according to Embodiment 1, except that it is equipped with a high-frequency circuit 1H instead of the high-frequency circuit 1, so its description will be omitted.

[0250] [9.1. Circuit Configuration of High-Frequency Circuit 1H] The circuit configuration of the high-frequency circuit 1H according to this embodiment will be described with reference to Figure 29. Figure 29 is a configuration diagram of the communication device 5H according to this embodiment.

[0251] Figure 29 shows an exemplary circuit configuration, and the high-frequency circuit 1H can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the high-frequency circuit 1H provided below should not be interpreted as restrictive.

[0252] The high-frequency circuit 1H includes a power amplifier 11, a bias circuit 21, switches 31, 36 and 51, a coupler 32, a detection circuit 33, an integrating circuit 34, a control circuit 35H, a temperature sensor 37, a differentiating circuit 38, elastic wave filters 41, 42 and 43, an antenna connection terminal 100, a high-frequency input terminal 110, and a control terminal 120.

[0253] The control circuit 35H is included in the semiconductor component 73 and is connected to the output terminals of the detection circuit 33, the integration circuit 34, and the differentiation circuit 38. The control circuit 35H can limit the input signals to the elastic wave filters 41-43 when the output signal (integration signal) of the integration circuit 34 is greater than or equal to the threshold TH1. Furthermore, the control circuit 35H can limit the input signals to the elastic wave filters 41-43 when the output signal (differentiation signal) of the differentiation circuit 38 is greater than or equal to the threshold TH7. In addition, the control circuit 35H may limit the input signals to the elastic wave filters 41-43 when the output signal (detection signal) of the detection circuit 33 is greater than or equal to the threshold TH2. Note that the control circuit 35H does not need to limit the input signals to the elastic wave filters 41-43 when the detection signal is greater than or equal to the threshold TH2. In this case, the control circuit 35H does not need to be connected to the output terminal of the detection circuit 33.

[0254] The control circuit 35H includes a bias control circuit 351H and a switch control circuit 352H.

[0255] The bias control circuit 351H can reduce the bias when the integrated signal is greater than or equal to the threshold TH1. Conversely, if the integrated signal is less than the threshold TH1, it is not necessary to reduce the bias.

[0256] The switch control circuit 352H can close switch 36 when the differential signal is greater than or equal to the threshold TH7. Alternatively, the switch control circuit 352H may close switch 36 when the detected signal is greater than or equal to the threshold TH2. Conversely, the switch control circuit 352H may open switch 36 when the differential signal is less than the threshold TH7 and the detected signal is less than the threshold TH2.

[0257] [9.2. Operation of Control Circuit 35H] Next, a specific example of the operation of the control circuit 35H configured as described above will be explained with reference to Figures 25, 30A, and 30B. Figure 30A is a graph showing an example of a switch control signal generated by the control circuit 35H according to this embodiment. In Figure 30A, the vertical axis represents the signal level, and the horizontal axis represents time. Figure 30B is a graph showing an example of a bias current controlled by the control circuit 35H according to this embodiment. In Figure 30B, the vertical axis represents the bias current, and the horizontal axis represents time.

[0258] In Figure 25, the differential signal exceeds the threshold TH7 at time t1 and falls below the threshold TH7 at time t2. Therefore, the switch control circuit 352H closes switch 36 from time t1 to time t2 to limit the input to the elastic wave filters 41-43. For example, as shown in Figure 30A, the switch control circuit 352H sets the signal level of the switch control signal to the ON level from time t1 to time t2.

[0259] In Figure 25, the integrated signal exceeds the threshold TH1 at time t3. Therefore, the bias control circuit 351H reduces the bias current from time t3 to limit the input of the elastic wave filters 41-43. For example, as shown in Figure 30B, the bias control circuit 351H reduces the bias current from current value I0 to current value I1 from time t3.

[0260] [9.3. Summary of Embodiment 9] As described above, the high-frequency circuit 1H according to this embodiment comprises a power amplifier 11, an elastic wave filter 41 connected to the output terminal of the power amplifier 11, a coupler 32 connected between the elastic wave filter 41 and the power amplifier 11, a detection circuit 33 connected to the coupling port 321 of the coupler 32, an integrating circuit 34 and a differentiating circuit 38 connected to the output terminal of the detection circuit 33, and a control circuit 35H configured to reduce the input power to the elastic wave filter 41 when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to reduce the input power to the elastic wave filter 41 when the output signal of the differentiating circuit 38 is greater than or equal to a threshold TH7.

[0261] According to this, in this embodiment as well, similar to embodiment 8, by using threshold TH1 for the output signal of the integrating circuit 34 and threshold TH7 for the output signal of the differentiating circuit 38, it is possible to suppress distortion of the high-frequency signal while suppressing the destruction of the elastic wave filter 41.

[0262] For example, the high-frequency circuit 1H according to this embodiment may also include a bias circuit 21 configured to supply bias to the power amplifier 11, and a switch 36 connected between the path between the power amplifier 11 and the elastic wave filter 41 and ground. The control circuit 35H may be configured to reduce the bias when the output signal of the integrating circuit 34 is greater than or equal to a threshold TH1, and to close the switch 36 when the output signal of the differentiating circuit 38 is greater than or equal to a threshold TH7.

[0263] According to this, by closing switch 36 when the output signal of the differentiating circuit 38 is above the threshold TH7, a rapid increase in input power can be suppressed quickly. Therefore, the destruction of the elastic wave filter 41 due to a rapid increase in input power can be effectively suppressed. On the other hand, by reducing the bias when the output signal of the integrating circuit 34 is above the threshold TH1, the continuous excessive input power can be gradually reduced. Therefore, while suppressing distortion of the high-frequency signal, the destruction of the elastic wave filter 41 due to continuous excessive input power can be effectively suppressed. Furthermore, since switch 36 is connected between the path connecting the power amplifier 11 and the elastic wave filter 41 and ground, the loss of high-frequency signals can be suppressed.

[0264] For example, in the high-frequency circuit 1H according to this embodiment, the control circuit 35H may be further configured to reduce the input power to the elastic wave filter 41 when the output signal of the detection circuit 33 is greater than or equal to the threshold TH2.

[0265] According to this, the input power of the elastic wave filter 41 can be controlled using the output signal of the integrating circuit 34, the output signal of the differentiating circuit 38, and the output signal of the detection circuit 33, thereby effectively suppressing the breakdown of the elastic wave filter 41 while suppressing distortion of the high-frequency signal.

[0266] (Embodiment 10) Next, Embodiment 10 will be described. This embodiment differs from Embodiment 8 in that it uses two integrating circuits. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiment 8.

[0267] The communication device 5I according to this embodiment is the same as the communication device 5 according to Embodiment 1, except that it is equipped with a high-frequency circuit 1I instead of the high-frequency circuit 1, so its description will be omitted.

[0268] [10.1. Circuit Configuration of High-Frequency Circuit 1I] The circuit configuration of the high-frequency circuit 1I according to this embodiment will be described with reference to Figure 31. Figure 31 is a configuration diagram of the communication device 5I according to this embodiment.

[0269] Figure 31 shows an exemplary circuit configuration, and the high-frequency circuit 1I can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the high-frequency circuit 1I provided below should not be interpreted as restrictive.

[0270] The high-frequency circuit 1I includes a power amplifier 11, a bias circuit 21, switches 31 and 51, a coupler 32, a detection circuit 33, integrating circuits 341 and 342, a control circuit 35I, a temperature sensor 37, elastic wave filters 41, 42 and 43, an antenna connection terminal 100, a high-frequency input terminal 110, and a control terminal 120.

[0271] The integrating circuit 341 is an example of a first integrating circuit and is included in semiconductor component 73. The integrating circuit 341 is connected between the detection circuit 33 and the control circuit 35I. Specifically, the input terminal of the integrating circuit 341 is connected to the output terminal of the detection circuit 33. The output terminal of the integrating circuit 341 is connected to the control circuit 35I. The integrating circuit 341 can convert the output signal (detection signal) of the detection circuit 33 into an integral signal (moving average signal) per unit time and supply the integral signal to the control circuit 35I. Note that the circuit configuration of the integrating circuit 341 is the same as the circuit configuration of the integrating circuit 34 in Figure 24B, so its explanation is omitted.

[0272] The integrating circuit 342 is an example of a second integrating circuit and is included in semiconductor component 73. The integrating circuit 342 is connected between the detection circuit 33 and the control circuit 35I. Specifically, the input terminal of the integrating circuit 342 is connected to the output terminal of the detection circuit 33. The output terminal of the integrating circuit 342 is connected to the control circuit 35I. The integrating circuit 342 can convert the output signal (detection signal) of the detection circuit 33 into an integral signal (moving average signal) per unit time and supply the integral signal to the control circuit 35I. Note that the circuit configuration of the integrating circuit 342 is the same as the circuit configuration of the integrating circuit 34 in Figure 24B, so its explanation is omitted.

[0273] The control circuit 35I is included in the semiconductor component 73 and includes a bias control circuit 351I, and is connected to the output terminals of the detection circuit 33, the integrating circuits 341 and 342. The control circuit 35I can limit the input signals to the elastic wave filters 41 to 43 when the output signal (integrated signal) of the integrating circuit 341 is greater than or equal to the threshold TH1. Furthermore, the control circuit 35I can limit the input signals to the elastic wave filters 41 to 43 when the output signal (integrated signal) of the integrating circuit 342 is greater than or equal to the threshold TH8. In addition, the control circuit 35I may limit the input signals to the elastic wave filters 41 to 43 when the output signal (detected signal) of the detection circuit 33 is greater than or equal to the threshold TH2. Note that the control circuit 35I does not need to limit the input signals to the elastic wave filters 41 to 43 when the detected signal is greater than or equal to the threshold TH2. In this case, the control circuit 35I does not need to be connected to the output terminal of the detection circuit 33.

[0274] Threshold TH8 is an example of an eighth threshold. A threshold predetermined empirically and / or experimentally can be used as threshold TH8. Note that, like threshold TH1, threshold TH8 may be changed according to the temperature detected by the temperature sensor 37, the power class, the elastic wave filter, or any combination thereof.

[0275] Note that the time constant of the integrating circuit 341 (first time constant) may be greater than the time constant of the integrating circuit 342 (second time constant). In this case, the threshold value TH8 may be greater than the threshold value TH1.

[0276] [10.2. Operation of Control Circuit 35I] Next, a specific example of the operation of the control circuit 35I configured as described above will be explained with reference to Figures 32 and 33. Figure 32 is a graph showing an example of a high-frequency signal, an integrated signal, a detected signal, and a threshold in this embodiment. In Figure 32, the vertical axis represents voltage and the horizontal axis represents time. Figure 33 is a graph showing an example of a bias current controlled by the control circuit 35I according to this embodiment. In Figure 33, the vertical axis represents bias current and the horizontal axis represents time.

[0277] In Figure 32, the detected signal exceeds the threshold TH2 at time t1. Therefore, the bias control circuit 351I reduces the bias at time t1 to limit the input of the elastic wave filters 41-43. For example, as shown in Figure 33, the bias control circuit 351I reduces the bias current from current value I0 to current value I1 at time t1. Subsequently, the integrated signal (integrated signal S2) from the integrating circuit 342 exceeds the threshold TH8 at time t2. Therefore, the bias control circuit 351I further reduces the bias current at time t2 to limit the input of the elastic wave filters 41-43. For example, as shown in Figure 33, the bias control circuit 351I reduces the bias current from current value I1 to current value I2 at time t2. Subsequently, the integrated signal (integrated signal S1) from the integrating circuit 341 exceeds the threshold TH1 at time t3. Therefore, the bias control circuit 351I further reduces the bias at time t3 to limit the input of the elastic wave filters 41-43. For example, as shown in Figure 33, the bias control circuit 351I reduces the bias current from current value I2 to current value I3 at time t3.

[0278] [10.3. Summary of Embodiment 10] As described above, the high-frequency circuit 1I according to this embodiment comprises a power amplifier 11, an elastic wave filter 41 connected to the output terminal of the power amplifier 11, a coupler 32 connected between the elastic wave filter 41 and the power amplifier 11, a detection circuit 33 connected to the coupling port 321 of the coupler 32, an integrating circuit 341 connected to the output terminal of the detection circuit 33 and having a first time constant, an integrating circuit 342 connected to the output terminal of the detection circuit 33 and having a second time constant smaller than the first time constant, and a control circuit 35I configured to reduce the input power to the elastic wave filter 41 when the output signal of the integrating circuit 341 is greater than or equal to a threshold TH1, and to reduce the input power to the elastic wave filter 41 when the output signal of the integrating circuit 342 is greater than or equal to a threshold TH8.

[0279] According to this, when the output signal of the integrating circuit 341, which has a larger first time constant, is greater than or equal to the threshold TH1, the input power to the elastic wave filter 41 decreases, effectively suppressing the destruction of the elastic wave filter 41 by longer-term excessive input power. Furthermore, when the output signal of the integrating circuit 342, which has a smaller second time constant, is greater than or equal to the threshold TH8, the input power to the elastic wave filter 41 decreases, effectively suppressing the destruction of the elastic wave filter 41 by shorter-term excessive input power. For example, if only threshold TH8 is used, the threshold for longer-term excessive input power is too high, and the destruction of the elastic wave filter 41 cannot be suppressed. Conversely, if only threshold TH1 is used, the threshold for shorter-term excessive input power is too low, and the distortion of the high-frequency signal increases. Therefore, by using threshold TH1 for the output signal of the integrating circuit 341 and threshold TH8 for the output signal of the integrating circuit 342, it is possible to suppress the destruction of the elastic wave filter 41 while suppressing the distortion of the high-frequency signal.

[0280] For example, the high-frequency circuit 1I according to this embodiment may also include a bias circuit 21 configured to supply bias to the power amplifier 11, and the control circuit 35I may be configured to reduce the bias when the output signal of the integrating circuit 341 is greater than or equal to a threshold TH1, and may be configured to reduce the bias when the output signal of the integrating circuit 342 is greater than or equal to a threshold TH8.

[0281] According to this, by controlling the bias circuit 21, the destruction of the elastic wave filter 41 can be effectively suppressed.

[0282] Furthermore, for example, in the high-frequency circuit 1I according to this embodiment, the threshold value TH1 may be smaller than the threshold value TH8.

[0283] According to this, by using a larger threshold TH8 for the output signal of the integrating circuit 342 which has a smaller second time constant, it is possible to suppress excessive limiting of the input power in response to shorter-term changes in input power. On the other hand, by using a smaller threshold TH1 for the output signal of the integrating circuit 341 which has a larger first time constant, it is possible to use a threshold TH1 that is suitable for the characteristics of the elastic wave filter 41 (e.g., thermal characteristics) for longer-term input power, and thus effectively suppress the breakdown of the elastic wave filter 41.

[0284] (Embodiment 11) Next, Embodiment 11 will be described. This embodiment differs from Embodiment 10 in that the detected signal and the integrated signal S2 are used to control the switch 36. Below, this embodiment will be described with reference to the drawings, focusing on the differences from Embodiment 10.

[0285] The communication device 5J according to this embodiment is the same as the communication device 5 according to Embodiment 1, except that it is equipped with a high-frequency circuit 1J instead of the high-frequency circuit 1, so its description will be omitted.

[0286] [11.1. Circuit Configuration of High-Frequency Circuit 1J] The circuit configuration of the high-frequency circuit 1J according to this embodiment will be described with reference to Figure 34. Figure 34 is a configuration diagram of the communication device 5J according to this embodiment.

[0287] Figure 34 shows an exemplary circuit configuration, and the high-frequency circuit 1J can be implemented using a wide variety of circuit implementations and circuit technologies. Therefore, the description of the high-frequency circuit 1J provided below should not be interpreted as restrictive.

[0288] The high-frequency circuit 1J includes a power amplifier 11, a bias circuit 21, switches 31, 36 and 51, a coupler 32, a detection circuit 33, integrating circuits 341 and 342, a control circuit 35J, a temperature sensor 37, elastic wave filters 41, 42 and 43, an antenna connection terminal 100, a high-frequency input terminal 110, and a control terminal 120.

[0289] The control circuit 35J is included in the semiconductor component 73 and is connected to the output terminals of the detection circuit 33, the integrating circuits 341 and 342. The control circuit 35J can limit the input signal to the elastic wave filters 41 to 43 when the output signal (integrated signal S1) of the integrating circuit 341 is greater than or equal to the threshold TH1. Furthermore, the control circuit 35J can limit the input signal to the elastic wave filters 41 to 43 when the output signal (integrated signal S2) of the integrating circuit 342 is greater than or equal to the threshold TH8. In addition, the control circuit 35J may limit the input signal to the elastic wave filters 41 to 43 when the output signal (detected signal) of the detection circuit 33 is greater than or equal to the threshold TH2. Note that the control circuit 35J does not need to limit the input signal to the elastic wave filters 41 to 43 when the detected signal is greater than or equal to the threshold TH2. In this case, the control circuit 35J does not need to be connected to the output terminal of the detection circuit 33.

[0290] The control circuit 35J includes a bias control circuit 351J and a switch control circuit 352J.

[0291] The bias control circuit 351J can reduce the bias when the integrated signal S1 is greater than or equal to the threshold TH1. Conversely, if the integrated signal is less than the threshold TH1, it is not necessary to reduce the bias.

[0292] The switch control circuit 352J can close the switch 36 when the integral signal S2 is greater than or equal to the threshold TH8. Alternatively, the switch control circuit 352J may close the switch 36 when the integral signal S1 is greater than or equal to the threshold TH2. Conversely, the switch control circuit 352J may open the switch 36 when the integral signal S2 is less than the threshold TH8 and the integral signal S1 is less than the threshold TH2.

[0293] [11.2. Operation of Control Circuit 35J] Next, a specific example of the operation of the control circuit 35J configured as described above will be explained with reference to Figures 32 and 35. Figure 35 is a graph showing an example of bias current controlled by the control circuit 35J according to this embodiment. In Figure 35, the vertical axis represents bias current, and the horizontal axis represents time.

[0294] In Figure 32, the detected signal exceeds the threshold TH2 at time t1. Therefore, the switch control circuit 352J periodically closes switch 36 at time t1 to limit the input to elastic wave filters 41-43.

[0295] In Figure 32, the integrated signal S2 exceeds the threshold TH8 at time t2. Therefore, the switch control circuit 352J periodically closes switch 36 at time t2 to limit the input to the elastic wave filters 41-43.

[0296] In Figure 32, the integrated signal S1 exceeds the threshold TH1 at time t3. Therefore, the bias control circuit 351J reduces the bias from time t3 to limit the input of the elastic wave filters 41-43. For example, as shown in Figure 35, the bias control circuit 351J reduces the bias current from current value I0 to current value I1 from time t3.

[0297] [11.3. Summary of Embodiment 11] As described above, the high-frequency circuit 1J according to this embodiment comprises a power amplifier 11, an elastic wave filter 41 connected to the output terminal of the power amplifier 11, a coupler 32 connected between the elastic wave filter 41 and the power amplifier 11, a detection circuit 33 connected to the coupling port 321 of the coupler 32, an integrating circuit 341 connected to the output terminal of the detection circuit 33 and having a first time constant, an integrating circuit 342 connected to the output terminal of the detection circuit 33 and having a second time constant smaller than the first time constant, and a control circuit 35J configured to reduce the input power to the elastic wave filter 41 when the output signal of the integrating circuit 341 is greater than or equal to a threshold TH1, and to reduce the input power to the elastic wave filter 41 when the output signal of the integrating circuit 342 is greater than or equal to a threshold TH8.

[0298] According to this, in this embodiment as well, similar to embodiment 10, by using threshold TH1 for the output signal of the integrating circuit 341 and threshold TH8 for the output signal of the integrating circuit 342, it is possible to suppress distortion of the high-frequency signal while suppressing the destruction of the elastic wave filter 41.

[0299] For example, the high-frequency circuit 1J according to this embodiment may also include a bias circuit 21 configured to supply bias to the power amplifier 11, and a switch 36 connected between the path between the power amplifier 11 and the elastic wave filter 41 and ground. The control circuit 35J may be configured to reduce the bias when the output signal of the integrating circuit 341 is greater than or equal to a threshold TH1, and to close the switch 36 when the output signal of the integrating circuit 342 is greater than or equal to a threshold TH8.

[0300] According to this, by closing switch 36 when the output signal of the integrating circuit 342 is above the threshold TH8, the short-term excess input power can be reduced rapidly. Therefore, the destruction of the elastic wave filter 41 due to the short-term excess input power can be effectively suppressed. On the other hand, by reducing the bias when the output signal of the integrating circuit 341 is above the threshold TH1, the long-term excess input power can be reduced gradually. Therefore, while suppressing distortion of the high-frequency signal, the destruction of the elastic wave filter 41 due to continuous excess input power can be effectively suppressed. Furthermore, since switch 36 is connected between the path between the power amplifier 11 and the elastic wave filter 41 and ground, the loss of high-frequency signals can be suppressed.

[0301] Furthermore, for example, in the high-frequency circuit 1J according to this embodiment, the threshold value TH1 may be smaller than the threshold value TH8.

[0302] According to this, by using a larger threshold TH8 for the output signal of the integrating circuit 342 which has a smaller second time constant, it is possible to suppress excessive limiting of the input power in response to shorter-term changes in input power. On the other hand, by using a smaller threshold TH1 for the output signal of the integrating circuit 341 which has a larger first time constant, it is possible to use a threshold TH1 that is suitable for the characteristics of the elastic wave filter 41 (e.g., thermal characteristics) for longer-term input power, and thus effectively suppress the breakdown of the elastic wave filter 41.

[0303] (Other Embodiments) The high-frequency circuit according to the present invention has been described above based on embodiments, but the high-frequency circuit according to the present invention is not limited to the above embodiments. Other embodiments realized by combining any of the components in the above embodiments, modified versions obtained by applying various modifications to the above embodiments that a person skilled in the art can conceive of without departing from the spirit of the present invention, and various devices incorporating the above high-frequency circuit are also included in the present invention.

[0304] For example, in the circuit configuration of the high-frequency circuit according to each of the above embodiments, other circuit elements and wiring may be inserted between the paths connecting each circuit element and signal path disclosed in the drawings. For example, a coupler different from the coupler 32 may be connected between the switch 51 and the antenna connection terminal 100. Also, for example, an impedance matching circuit may be connected between the power amplifier 11 and the coupler 32. Also, for example, an impedance matching circuit may be connected between the switch 31 and the elastic wave filters 41-43, and / or between the elastic wave filters 41-43 and the switch 51.

[0305] In the embodiments described above, the bias current value changed instantaneously, but it may also change gradually. For example, in Figure 3B, the current value may gradually decrease from I0 to I1 from time t3, and the current value may gradually increase from I1 to I0 from time t4. In Figures 5B, 7, 9A, 10A, 12, 16, 26, 30B, 33, and 35, the bias current value may also change gradually, similar to Figure 3B.

[0306] Furthermore, modified example 1 or 2 of embodiment 1 or 2 may be applied to embodiments 9 and 11 described above.

[0307] This invention can be widely used in communication devices such as mobile phones as a high-frequency circuit placed in the front end.

[0308] 1, 1A, 1B, 1C, 1D, 1E, 1F, 1G, 1H, 1I, 1J High-frequency circuits 2 Antennas 3 RFIC 4 BBIC 5, 5A, 5B, 5C, 5D, 5E, 5F, 5G, 5H, 5I, 5J Communication devices 11 Power amplifiers 21 Bias circuits 31, 36, 51 Switches 32 Couplers 33 Detection circuits 34, 341, 342 Integrating circuits 35, 35A, 35B, 35C, 35D, 35E, 35F, 35G, 35H, 35I, 35J Control circuits 37 Temperature sensors 38 Differentiating circuits 41, 42, 43 Elastic wave filters 72, 73, 75 Semiconductor components 100 Antenna connection terminals 110 High-frequency input terminals 120 Control terminals 310, 510 Common terminals 311, 312, 313, 511, 512, 513 Select terminals 321 Coupling port 351, 351A, 351C, 351G, 351H, 351I, 351J Bias control circuit 352, 352A, 352B, 352D, 352E, 352F, 352H, 352J Switch control circuit A, B, C Bands C31, C41, C81 Capacitor D31 Diode S1, S2 Integral signal TH1, TH2, TH3, TH4, TH5, TH6, TH7, TH8 Threshold t1, t2, t2a, t3, t4, t4a, t5, t6, t7, t8 Time I0, I1, I2, I3 Current value R41, R81 resistors

Claims

1. A high-frequency circuit comprising: a power amplifier; an elastic wave filter connected to the output terminal of the power amplifier; a coupler connected between the elastic wave filter and the power amplifier; a detection circuit connected to the coupling port of the coupler; a first integrating circuit connected to the output terminal of the detection circuit; and a control circuit configured to reduce the input power to the elastic wave filter when the output signal of the first integrating circuit is greater than or equal to a first threshold, and to reduce the input power to the elastic wave filter when the output signal of the detection circuit is greater than or equal to a second threshold.

2. The high-frequency circuit according to claim 1, further comprising: a bias circuit configured to supply bias to the power amplifier; and a switch connected between the path between the power amplifier and the elastic wave filter and ground, wherein the control circuit is configured to reduce the bias when the output signal of the first integrating circuit is greater than or equal to a first threshold, and to close the switch when the output signal of the detection circuit is greater than or equal to a second threshold.

3. The high-frequency circuit according to claim 2, wherein the control circuit is configured to start the bias reduction control when the output signal of the first integrating circuit transitions from a first state where it is less than the first threshold to a second state where it is greater than or equal to the first threshold, and to end the bias reduction control when the output signal of the first integrating circuit transitions from a third state where it is greater than or equal to a third threshold smaller than the first threshold to a fourth state where it is less than the third threshold.

4. The high-frequency circuit according to claim 2 or 3, wherein the control circuit is configured to close the switch when the output signal of the detection circuit transitions from a fifth state where it is less than the second threshold to a sixth state where it is greater than or equal to the second threshold, and the control circuit is configured to open the switch when the output signal of the detection circuit transitions from a seventh state where it is greater than or equal to a fourth threshold less than the second threshold to an eighth state where it is less than the fourth threshold.

5. The high-frequency circuit according to any one of claims 2 to 4, wherein the control circuit is configured to reduce the bias to a first value when the output signal of the first integrating circuit is greater than or equal to a first threshold, and to reduce the bias to a second value less than the first value when the output signal of the first integrating circuit is greater than or equal to a fifth threshold greater than the first threshold.

6. The high-frequency circuit according to claim 1, further comprising: a bias circuit configured to supply bias to the power amplifier; and a switch connected between the path between the power amplifier and the elastic wave filter and ground, wherein the control circuit is configured to close the switch when the output signal of the first integrating circuit is greater than or equal to a first threshold, and to reduce the bias when the output signal of the detection circuit is greater than or equal to a second threshold.

7. The high-frequency circuit according to claim 6, wherein the control circuit is configured to close the switch when the output signal of the first integrating circuit transitions from a first state where it is less than the first threshold to a second state where it is greater than or equal to the first threshold, and to open the switch when the output signal of the first integrating circuit transitions from a third state where it is greater than or equal to a third threshold smaller than the first threshold to a fourth state where it is less than the third threshold.

8. The high-frequency circuit according to claim 6 or 7, wherein the control circuit is configured to start the bias reduction control when the output signal of the detection circuit transitions from a fifth state where it is less than the second threshold to a sixth state where it is greater than or equal to the second threshold, and to end the bias reduction control when the output signal of the detection circuit transitions from a seventh state where it is greater than or equal to a fourth threshold which is less than the second threshold to an eighth state where it is less than the fourth threshold.

9. The high-frequency circuit according to any one of claims 6 to 8, wherein the control circuit is configured to reduce the bias to a first value when the output signal of the detection circuit is greater than or equal to the second threshold, and is configured to reduce the bias to a second value less than the first value when the output signal of the first integrating circuit is greater than or equal to a sixth threshold greater than the second threshold.

10. The high-frequency circuit according to claim 1, further comprising a switch connected between the path between the power amplifier and the elastic wave filter and ground, wherein the control circuit is configured to close the switch when the output signal of the first integrating circuit is greater than or equal to the first threshold, and to close the switch when the output signal of the detection circuit is greater than or equal to the second threshold.

11. The high-frequency circuit further comprises a bias circuit configured to supply a bias to the power amplifier, wherein the control circuit is configured to reduce the bias when the output signal of the first integrating circuit is greater than or equal to a first threshold, and to reduce the bias when the output signal of the detection circuit is greater than or equal to a second threshold, as described in claim 1.

12. The high-frequency circuit according to any one of claims 1 to 11, further comprising a temperature sensor, wherein the first threshold and the second threshold are changed according to the temperature detected by the temperature sensor.

13. A high-frequency circuit comprising: a power amplifier; an elastic wave filter connected to the output terminal of the power amplifier; a coupler connected between the elastic wave filter and the power amplifier; a detection circuit connected to the coupling port of the coupler; a first integrating circuit and a differentiating circuit connected to the output terminal of the detection circuit; and a control circuit configured to reduce the input power to the elastic wave filter when the output signal of the first integrating circuit is greater than or equal to a first threshold, and to reduce the input power to the elastic wave filter when the output signal of the differentiating circuit is greater than or equal to a seventh threshold.

14. The high-frequency circuit further comprises a bias circuit configured to supply a bias to the power amplifier, wherein the control circuit is configured to reduce the bias when the output signal of the first integrating circuit is greater than or equal to the first threshold, and to reduce the bias when the output signal of the differentiating circuit is greater than or equal to the seventh threshold, as described in claim 13.

15. The high-frequency circuit according to claim 13, further comprising: a bias circuit configured to supply bias to the power amplifier; and a switch connected between the path between the power amplifier and the elastic wave filter and ground, wherein the control circuit is configured to reduce the bias when the output signal of the first integrating circuit is greater than or equal to the first threshold, and to close the switch when the output signal of the differentiating circuit is greater than or equal to the seventh threshold.

16. The high-frequency circuit according to any one of claims 13 to 15, wherein the control circuit is further configured to reduce the input power to the elastic wave filter when the output signal of the detection circuit is equal to or greater than a second threshold.

17. A high-frequency circuit comprising: a power amplifier; an elastic wave filter connected to the output terminal of the power amplifier; a coupler connected between the elastic wave filter and the power amplifier; a detection circuit connected to the coupling port of the coupler; a first integrating circuit connected to the output terminal of the detection circuit and having a first time constant; a second integrating circuit connected to the output terminal of the detection circuit and having a second time constant smaller than the first time constant; and a control circuit configured to reduce the input power to the elastic wave filter when the output signal of the first integrating circuit is greater than or equal to a first threshold, and to reduce the input power to the elastic wave filter when the output signal of the second integrating circuit is greater than or equal to an eighth threshold.

18. The high-frequency circuit according to claim 17, further comprising a bias circuit configured to supply a bias to the power amplifier, wherein the control circuit is configured to reduce the bias when the output signal of the first integrating circuit is greater than or equal to a first threshold, and to reduce the bias when the output signal of the second integrating circuit is greater than or equal to an eighth threshold.

19. The high-frequency circuit according to claim 17, further comprising: a bias circuit configured to supply bias to the power amplifier; and a switch connected between a path between the power amplifier and the elastic wave filter and ground, wherein the control circuit is configured to reduce the bias when the output signal of the first integrating circuit is greater than or equal to the first threshold, and to close the switch when the output signal of the second integrating circuit is greater than or equal to the eighth threshold.

20. The high-frequency circuit according to any one of claims 17 to 19, wherein the first threshold is smaller than the eighth threshold.