Semiconductor device and sensor device

WO2026203739A1PCT designated stage Publication Date: 2026-10-01MITSUMI ELECTRIC CO LTD +3
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Patent Information

Application Number
PCT/JP2026/002116
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2025-03-28
Filing Date
2026-01-23
Publication Date
2026-10-01

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Abstract

Provided are a semiconductor device and a sensor device with which it is possible to reduce electric power consumption. This semiconductor device includes: a monitoring circuit that outputs a first signal when an electric power supply voltage becomes lower than a first threshold value, and outputs a second signal when the electric power supply voltage becomes lower than a second threshold value that is lower than the first threshold value; a processing circuit that performs a predetermined processing operation; and a control circuit that can control the monitoring circuit and the processing circuit, wherein the control unit performs control processing in a first mode in which the monitoring circuit is operated when the processing circuit is performing the processing operation and the monitoring circuit is stopped when the processing circuit is not performing the processing operation in a case in which the electric power supply voltage is equal to or higher than the first threshold value, and performs control processing in a second mode in which the monitoring circuit is operated when the processing circuit is performing the processing operation and when the processing circuit is not performing the processing operation in a case in which the electric power supply voltage is lower than the first threshold value.
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Description

Semiconductor device and sensor device

[0001] The present disclosure relates to a semiconductor device and a sensor device.

[0002] Conventionally, there has been known a microcomputer including: a microcomputer unit; a device performance detection means that detects an operating voltage of a device; and a voltage monitoring means that determines, based on a detection result of the device performance detection means, whether a power supply voltage during backup at the time of a power outage is higher than an operation limit of the device, returns the microcomputer unit from a power outage mode without resetting the microcomputer unit when the power supply voltage is higher, and resets the microcomputer unit when the power supply voltage is lower (see, for example, Patent Document 1).

[0003] Japanese Unexamined Patent Publication No. 06-223208

[0004] However, conventional microcomputers do not consider reducing power consumption when the power supply voltage is high, and there is room for improvement in terms of power consumption reduction.

[0005] Accordingly, an object of the present invention is to provide a semiconductor device and a sensor device capable of reducing power consumption.

[0006] A semiconductor device according to an embodiment of the present disclosure includes: a monitoring circuit that outputs a first signal when a power supply voltage becomes lower than a first threshold, and outputs a second signal when the power supply voltage becomes lower than a second threshold that is lower than the first threshold; a processing circuit that performs predetermined processing operations; and a control circuit capable of controlling the monitoring circuit and the processing circuit. The control circuit performs control processing in a first mode in which, when the power supply voltage is equal to or higher than the first threshold, the monitoring circuit is operated while the processing circuit is performing the processing operation, and the monitoring circuit is stopped while the processing circuit is not performing the processing operation; and when the power supply voltage is lower than the first threshold, the control circuit performs control processing in a second mode in which the monitoring circuit is operated both when the processing circuit is performing the processing operation and when the processing circuit is not performing the processing operation.

[0007] A semiconductor device and a sensor device capable of reducing power consumption can be provided.

[0008] This is a diagram showing an example of the configuration of the semiconductor device 100 of the embodiment. This is a block diagram showing an example of the configuration of the semiconductor device 100. This is a diagram showing an example of a detailed circuit configuration of the reset circuit 120. This is a diagram showing an example of a detailed circuit configuration of the reset circuit 120. This is a diagram illustrating an example of high-precision flow rate measurement and low-precision flow rate measurement. This is a diagram showing an example of the operation mode transition of the control circuit 140. This is a diagram showing an example of the processing performed by the semiconductor device 100.

[0009] The following describes embodiments to which the semiconductor device and sensor device of this disclosure are applied.

[0010] <Embodiment> Figure 1 shows an example of the configuration of a sensor device 10 using the semiconductor device 100 of the embodiment. The sensor device 10 is, for example, a flow sensor and includes a flow path 20 through which fluid flows, a sensor body 101 including a mounting board on which MEMS (Micro Electro Mechanical Systems) elements 30 and the semiconductor device 100 are mounted, and a gas meter body 50. The flow path 20 and the gas meter body 50 may be located separately or may be integrated. The MEMS element 30 is an example of an external device and an example of a sensor. The sensor device 10 can measure the flow rate of fluid in the flow path 20 with the sensor body 101 and output the measurement result to the gas meter body 50. The gas meter body 50 is equipped with a secondary battery 40, and the semiconductor device 100 provided in the flow path 20 operates using the secondary battery 40 as a power source. Power is supplied to the MEMS element 30 from the secondary battery 40 via the semiconductor device 100.

[0011] The sensor device 10 is, for example, a sensor that operates using a secondary battery 40 as a power source. The overall configuration of the semiconductor device 100 is shown at the far left of Figure 1, and the MEMS element 30, secondary battery 40, gas meter body 50, and semiconductor device 100 are shown as blocks in the center and right parts of Figure 1.

[0012] The sensor device 10 is a sensor that measures the flow rate of gas flowing inside the cylindrical channel 20 using a MEMS element 30 and a semiconductor device 100. However, the sensor device 10 does not only measure the flow rate of gas, but may also measure the flow rate of other objects or physical quantities other than flow rate.

[0013] The MEMS element 30 is mounted, for example, on the back side (the side opposite to the front side visible in Figure 1) of the mounting substrate of the sensor body 101. The MEMS element 30 and the semiconductor device 100 are SoC (System on Chip). The MEMS element 30 can perform high-precision flow rate measurement using a thermal flow method, for example.

[0014] The secondary battery 40 is a rechargeable power source (battery) that can be used repeatedly, and is built into the gas meter body 50, for example. The secondary battery 40 supplies power to the MEMS element 30 and the semiconductor device 100. In Figure 1, the power supply lines from the secondary battery 40 to the MEMS element 30 and the semiconductor device 100 are shown by dashed arrows.

[0015] <Semiconductor device 100> Figure 2 is a block diagram showing an example of the configuration of the semiconductor device 100. The semiconductor device 100 includes an I2C (Inter-Integrated Circuit) 110, a reset circuit 120, an ADC (Analog to Digital Converter) 130, and a control circuit 140. The reset circuit 120 is an example of a monitoring circuit, and the ADC 130 is an example of a processing circuit that performs a predetermined processing operation. Figure 2 also shows the control unit 50A of the gas meter body 50 and the MEMS element 30.

[0016] The semiconductor device 100 digitally converts the flow rate measurement input from the MEMS element 30 and outputs it to the control unit 50A. The semiconductor device 100 also controls the operating mode according to the remaining power of the secondary battery 40. Note that in Figure 2, the path for outputting the digitally converted measurement value to the control unit 50A is omitted.

[0017] <I2C110> The I2C110 is an interface circuit connected to the control unit 50A, and receives measurement commands from the control unit 50A. Inside the semiconductor device 100, the I2C110 is connected to the control circuit 140, and when a measurement command is input from the control unit 50A, it outputs the measurement command to the control circuit 140. A reset circuit 120 is also connected to the I2C110, and a reset signal is input from the reset circuit 120 when the I2C110 is reset. The I2C110 is composed of semiconductor circuits such as an MCU (Micro Controller Unit).

[0018] <Reset Circuit 120> The reset circuit 120 monitors the power supply voltage VDD supplied from the secondary battery 40, outputs a VDD monitoring signal when the power supply voltage VDD falls below V1, and outputs a second signal (reset signal) when the power supply voltage VDD falls below V2, which is lower than V1. V1 is an example of a first threshold. The VDD monitoring signal is an example of a first signal. V2 is an example of a second threshold. The reset signal is an example of a second signal. The reset circuit 120 is composed of semiconductor circuits including transistors and operational amplifiers. Details of the reset circuit 120 will be described later using Figures 3A and 3B.

[0019] <ADC130> The ADC130 is connected to the MEMS element 30 and uses the MEMS element 30 to measure flow rate. Inside the semiconductor device 100, the ADC130 is connected to the control circuit 140. When a measurement command is input from the control circuit 140, the ADC130 outputs measurement data, which is a digital conversion of the flow rate measurement value input from the MEMS element 30, to the control circuit 140. In addition, a reset circuit 120 is connected to the ADC130, and a reset signal is input from the reset circuit 120 when the ADC130 is to be reset.

[0020] The ADC130 is composed of semiconductor circuits. While the ADC130 is typically composed of an MCU, it is not limited to an MCU; it may also be composed of an FPGA (Field Programmable Gate Array), an MCU and an AFE (Analog Front End), or an ASIC (Application Specific Integrated Circuit), etc.

[0021] <Control circuit 140> The control circuit 140 is connected to the I2C 110 and the ADC 130. When a measurement command is input from the I2C 110, the control circuit 140 outputs a measurement command to the ADC 130 and acquires measurement data from the ADC 130. The control circuit 140 is also connected to the reset circuit 120, and receives the VDD monitoring signal and the reset signal, as well as outputting an ACTIVE signal to the reset circuit 120. The ACTIVE signal is a signal used to switch the operating state of the reset circuit 120.

[0022] Figure 2 shows the measurement command, measurement instruction, measurement data, VDD monitoring signal, reset signal, and ACTIVE signal between the I2C 110, reset circuit 120, ADC 130, and control circuit 140. However, the control circuit 140 can transmit other signals, etc., in order to control the I2C 110, reset circuit 120, and ADC 130.

[0023] The control circuit 140 controls the operating mode of the semiconductor device 100 in order to reduce the power consumption of the semiconductor device 100. The operating modes of the semiconductor device 100 include a Quick mode and a continuous monitoring mode. The relationship between the Quick mode, the continuous monitoring mode, and the first and second modes will be described later with reference to Figure 5.

[0024] The Quick Mode has two modes: a measurement mode for acquiring measurement data and a standby mode for turning off the reset circuit 120. The control circuit 140 normally selects the Quick Mode.

[0025] When a measurement command is input from the I2C 110 in Quick mode, the control circuit 140 selects a measurement mode from within Quick mode and acquires measurement data. In measurement mode, the control circuit 140 turns on the reset circuit 120. When the reset circuit 120 is on, it is in an operational state.

[0026] In Quick mode, when no measurement data is being acquired, the control circuit 140 selects standby mode and turns off the reset circuit 120 to reduce power consumption. When the reset circuit 120 is off, it is in a state where the reset circuit 120 is not operating.

[0027] Furthermore, when the control circuit 140 receives a VDD monitoring signal from the reset circuit 120, it transitions from Quick mode to continuous monitoring mode, and during continuous monitoring mode, it keeps the reset circuit 120 constantly on to monitor the power supply voltage.

[0028] Details of the Quick mode and continuous monitoring mode will be described later with reference to Figures 3A to 5. The ACTIVE signal will also be described later with reference to Figures 3A and 3B.

[0029] The control circuit 140 is composed of semiconductor circuits. While the control circuit 140 is composed of an FPGA as an example, it is not limited to an FPGA and may be composed of an ASIC or MCU, etc.

[0030] <Detailed Configuration of Reset Circuit 120> Figure 3A shows an example of the detailed circuit configuration of the reset circuit 120. Figure 3A shows an example of the operating state of the reset circuit 120 in standby mode of Quick mode. First, the circuit configuration of the reset circuit 120 will be explained.

[0031] The reset circuit 120 includes input terminals 121A and 121B, output terminals 122A and 122B, a reset comparator (hereinafter referred to as reset COMP) 123, and a VDD monitoring comparator (hereinafter referred to as VDD monitoring COMP) 124. The reset circuit 120 also includes a VREF circuit 125, inverters 126A and 126B, transistors P1, P2, P3, and P4, transistors N1, N2, N3, and N4, and resistors R1, R2, and R3.

[0032] Here, as an example, we will describe a configuration in which transistors P1, P2, P3, and P4 are P-channel MOSFETs (Metal Oxide Semiconductor Field Effect Transistors), and transistors N1, N2, N3, and N4 are N-channel MOSFETs. A MOSFET has a drain, a source, and a gate.

[0033] Furthermore, insulated-gate bipolar transistors (IGBTs) having a collector, emitter, and gate may be used as transistors P1, P2, P3, and P4, and transistors N1, N2, N3, and N4. Gate-driven switching elements having a first main electrode, a second main electrode, and a gate electrode can be used as transistors P1, P2, P3, and P4, and transistors N1, N2, N3, and N4. The drain or collector is an example of the first main electrode. The source or emitter is an example of the second main electrode.

[0034] <Input terminals 121A and 121B> Input terminals 121A and 121B are input terminals to which the power supply voltage VDD and the ACTIVE signal are input, respectively. Input terminal 121A is connected to the secondary battery 40 to receive the power supply voltage VDD. Input terminal 121B is connected to the control circuit 140 to receive the ACTIVE signal.

[0035] Input terminal 121A is connected to the sources of transistors P1, P2, P3, and P4 inside the reset circuit 120. Input terminal 121B is connected to inverter 126A and the gates of transistors P1, P2, and P3 inside the reset circuit 120.

[0036] <Output terminals 122A, 122B> Output terminals 122A and 122B are terminals that output a VDD monitoring signal and a reset signal, respectively, and are connected to the control circuit 140 (see Figure 2). Output terminal 122A is connected to the output terminal of the VDD monitoring COMP 124 inside the reset circuit 120. Output terminal 122B is connected to the drain of transistor P4 and the drain of transistor N4 inside the reset circuit 120.

[0037] <Reset COMP 123> The reset COMP 123 has a non-inverting input terminal (+) connected to the output terminal (right terminal) of the VREF circuit 125, an inverting input terminal (-) connected to the connection point of resistors R2 and R3, and output terminals connected to the drain of transistor N2 and the gates of transistors P4, N3, and N4.

[0038] <VDD monitoring COMP 124> The VDD monitoring COMP 124 has a non-inverting input terminal (+) connected to the output terminal of the VREF circuit 125, an inverting input terminal (-) connected to the connection point of resistors R1 and R2, and an output terminal connected to the output terminal 122A.

[0039] <VREF Circuit 125> The VREF circuit 125 has an input terminal (upper terminal) connected to the drain of transistor P1, a GND terminal (lower terminal) connected to ground (GND), and an output terminal (right terminal). The VREF circuit 125 converts the voltage input from the drain of transistor P1 into VREF (reference voltage) and outputs it from the output terminal. The VREF circuit 125 is a voltage conversion circuit, and as an example, it is a regulator. The output terminal of the VREF circuit 125 is connected to the non-inverting input terminal (+) of reset COMP 123 and the non-inverting input terminal (+) of VDD monitoring COMP 124.

[0040] <Inverters 126A and 126B> The inverter 126A has an input terminal connected to the input terminal 121B, and an output terminal connected to the gate of the transistor N1 and the input terminal of the inverter 126B. The output terminal of the inverter 126B is connected to the gate of the transistor N2.

[0041] <Transistors P1, P2, P3, and P4> The sources of the transistors P1, P2, P3, and P4 are connected to the input terminal 121A. The gates of the transistors P1, P2, and P3 are connected to the input terminal 121B. The gate of the transistor P4 is connected to the output terminal of the reset COMP 123. The drain of the transistor P1 is connected to the input terminal (upper terminal) of the VREF circuit 125. The drain of the transistor P2 is connected to the power supply terminal of the reset COMP 123. The drain of the transistor P3 is connected to the power supply terminal of the VDD monitoring COMP 124. The drain of the transistor P4 is connected to the output terminal 122B and the drain of the transistor N4.

[0042] <Transistors N1, N2, N3, and N4> The drain of the transistor N1 is connected to the resistor R1, the source of the transistor N1 is connected to GND, and the gate of the transistor N1 is connected to the output terminal of the inverter 126A.

[0043] The drain of the transistor N2 is connected to the output terminal of the reset COMP 123, the gate of the transistor P4, the gate of the transistor N3, and the gate of the transistor N4. The source of the transistor N2 is connected to GND. The gate of the transistor N2 is connected to the output terminal of the inverter 126B.

[0044] The drain of the transistor N3 is connected to the connection point between the resistors R1 and R2. The source of the transistor N3 is connected to GND. The gate of the transistor N3 is connected to the output terminal of the reset COMP 123, the gate of the transistor P4, the drain of the transistor N2, and the gate of the transistor N4.

[0045] The drain of transistor N4 is connected to output terminal 122B and the drain of transistor P4. The source of transistor N4 is connected to GND. The gate of transistor N4 is connected to the output terminal of reset COMP 123, the gate of transistor P4, the drain of transistor N2, and the gate of transistor N3.

[0046] <Resistors R1, R2, and R3> Resistors R1, R2, and R3 are connected between the input terminal (+) and the drain of transistor N1. The connection point of resistors R1 and R2 is connected to the inverting input terminal (-) of the VDD monitoring COMP124 and the drain of transistor N3. The connection point of resistors R2 and R3 is connected to the inverting input terminal (-) of the reset COMP123. Therefore, when the power supply voltage VDD drops, the output of the VDD monitoring COMP124 inverts first, and when the power supply voltage VDD drops further, the output of the reset COMP123 inverts.

[0047] <Operation of Reset Circuit 120 in Standby Mode> Figure 3A shows an example of the operation of the reset circuit 120 in the standby mode of the Quick mode. When the power supply voltage VDD is high, the semiconductor device 100 selects Quick mode to reduce power consumption. When a measurement command is input from the control unit 50A, it enters the measurement mode of the Quick mode and outputs a measurement command to the ADC 130 to acquire measurement data. Also, when the semiconductor device 100 is not performing measurement processing in Quick mode, it transitions to a standby mode in which the reset circuit 120 is turned off. Turning off the reset circuit 120 reduces power consumption.

[0048] The control circuit 140 sets the ACTIVE signal to H level to turn off the reset circuit 120. This turns off transistors P1, P2, and P3, turns off transistor N1, and turns on transistor N2. In addition, turning on transistor N2 turns off transistors P4, N3, and N4. Therefore, the VDD monitoring signal is off, and the reset signal is off. The state where the reset circuit 120 is off refers to the state where reset COMP 123 and VDD monitoring COMP 124 are turned off due to transistors P1, P2, and P3 being turned off.

[0049] <Operation of Reset Circuit 120 in Measurement Mode> FIG. 3B is a diagram showing an example of a detailed circuit configuration of the reset circuit 120, and is a diagram showing a state where the reset circuit 120 is turned on. The reset circuit 120 is turned on in the measurement mode among Quick modes and in the constant monitoring mode. Here, the operation in the measurement mode will be described, and the operation in the constant monitoring mode will be described using the flowchart in FIG. 5.

[0050] When a measurement command is input from the control unit 50A, the semiconductor device 100 transitions to the measurement mode.

[0051] The control circuit 140 sets the ACTIVE signal to L level to turn on the reset circuit 120. This turns on transistors P1, P2, and P3, turns on transistor N1, and turns off transistor N2. When the power supply voltage VDD is supplied to reset COMP 123 and VDD monitoring COMP 124 through transistors P2 and P3, reset COMP 123 and VDD monitoring COMP 124 enter an operable state.

[0052] When the power supply voltage VDD is equal to or higher than V1 (a first threshold) and sufficiently high, the output of the reset COMP 123 becomes L level, and the VDD monitoring signal, which is the output of the VDD monitoring COMP 124, also becomes L level. When the output of the reset COMP 123 becomes L level, transistor P4 is turned on, and transistors N3 and N4 are turned off. Therefore, the reset signal becomes H level.

[0053] When the power supply voltage VDD drops below V1, the output of the reset COMP 123 is held at a low level, but the VDD monitoring signal, which is the output of the VDD monitoring COMP 124, is inverted to a high level. As a result, the control circuit 140 detects that the power supply voltage VDD has dropped below V1. The VDD monitoring signal becoming high level corresponds to the reset circuit 120 outputting a VDD monitoring signal indicating that the power supply voltage VDD has dropped below V1.

[0054] When the power supply voltage VDD drops further to below V2, the output of the reset COMP 123 inverts to a high level, and the VDD monitoring signal, which is the output of the VDD monitoring COMP 124, is held at a high level. When the output of the reset COMP 123 becomes high, transistor P4 turns off, and transistors N3 and N4 turn on. As a result, the reset signal switches to a low level. When the reset signal becomes low, the control circuit 140 detects that the power supply voltage VDD has dropped below V2. The reset signal becoming low corresponds to the reset circuit 120 outputting a reset signal indicating that the power supply voltage VDD has dropped below V2.

[0055] <High-Precision Flow Measurement and Low-Precision Flow Measurement> Figure 4A illustrates an example of high-precision and low-precision flow measurement. In Figure 4A, the horizontal axis represents time, and the vertical axis represents flow rate (analog value). As an example, Figure 4A shows 12 measurements from (1) to (12). The two white circles (1) and (12) represent the measured values ​​obtained by high-precision flow measurement, and the nine black circles (2) to (6) and (8) to (11) represent the measured values ​​obtained by low-precision flow measurement. In addition, the black and white circles in (7) indicate that after obtaining a measured value (black circle) by low-precision flow measurement, a measured value (white circle) was automatically obtained by high-precision flow measurement. High-precision flow measurement is an example of high-precision operation, and low-precision flow measurement is an example of low-precision operation.

[0056] High-precision flow rate measurement refers to measuring the gas flow rate using the MEMS element 30. Low-precision flow rate measurement refers to measuring only the change in gas flow rate using the MEMS element 30. High-precision flow rate measurement requires more power than low-precision flow rate measurement. Therefore, instead of performing high-precision flow rate measurement every time, low-precision flow rate measurement is also performed to reduce power consumption.

[0057] When the semiconductor device 100 transitions to measurement mode, the control circuit 140 outputs a measurement command to the ADC 130 in order to perform either high-precision flow measurement or low-precision flow measurement. Figure 4A shows an example of the measurement process when the control circuit 140 outputs a measurement command every two seconds.

[0058] The control circuit 140, for example, causes the ADC 130 to perform high-precision flow rate measurements at predetermined time intervals (for example, every 22 seconds). In Figure 4A, the high-precision flow rate measurements in (1) and (12) correspond to the high-precision flow rate measurements performed at predetermined time intervals. When the control circuit 140 does not perform high-precision flow rate measurements, it performs low-precision flow rate measurements. Alternatively, instead of causing the ADC 130 to perform high-precision flow rate measurements at predetermined time intervals (for example, every 22 seconds), the control circuit 140 may be caused to perform high-precision flow rate measurements at predetermined intervals of flow rate measurements.

[0059] Furthermore, when the change in gas flow rate measured by the low-precision flow rate measurement exceeds a threshold, the control circuit 140 causes the ADC 130 to perform a high-precision flow rate measurement separately from the high-precision flow rate measurement performed at predetermined time intervals. This threshold is an example of a third threshold. In Figure 4A, when the change in gas flow rate measured by the low-precision flow rate measurement in (7) exceeds the threshold, the high-precision flow rate measurement in (7) is automatically performed immediately after the low-precision flow rate measurement in (7).

[0060] <Operating Modes> Figure 4B shows an example of the transition of the operating modes of the control circuit 140. In Figure 4B, the horizontal axis represents time, and it shows an example of the time change of the operating mode of the control circuit 140, the power supply voltage VDD, and the operating state of the reset circuit 120. The operating mode of the control circuit 140 is the operating mode of the semiconductor device 100. In Figure 4B, the power supply voltage VDD decreases as time progresses. The power supply voltage VDD is shown by a solid line, and V1 is shown by a dashed line.

[0061] The control circuit 140 alternates between standby mode and measurement mode. For example, it is set to standby mode for about 2 seconds, and then switches to measurement mode, repeating this cycle.

[0062] In standby mode, the reset circuit 120 is turned off, and in measurement mode, it is turned on. Therefore, the reset circuit 120 switches between off and on according to the operating mode of the control circuit 140.

[0063] Then, at time t1, when the power supply voltage VDD falls below V1, the VDD monitoring signal becomes H level, the control circuit 140 switches to continuous monitoring mode, and the reset circuit 120 remains ON after time t1.

[0064] <Flowchart> Figure 5 shows an example of a process performed by the semiconductor device 100. Of the processes in steps S1 to S9 shown in Figure 5, steps S3 to S7 are processes performed in Quick mode, and steps S8 and S9 are processes performed in continuous monitoring mode.

[0065] Furthermore, the process of proceeding in the order of steps S3 to S7 in Quick mode and performing flow rate measurement in step S5 is an example of the process in the first mode. Also, the process of performing steps S8 and S9 in continuous monitoring mode and then returning to step S5 to perform flow rate measurement is an example of the process in the second mode.

[0066] In step S1, the reset circuit 120 outputs a reset signal, which resets the I2C 110, ADC 130, and control circuit 140 that have received the reset signal (step S1). Once reset, the I2C 110, ADC 130, and control circuit 140 stop operating and wait until the power supply voltage VDD exceeds a predetermined value. When the power supply voltage VDD exceeds a predetermined value, the reset of the I2C 110, ADC 130, and control circuit 140 is released, and each circuit starts up.

[0067] The control circuit 140 performs the initial setup of the semiconductor device 100 (step S2). Specifically, the control circuit 140 performs the initial setup of the I2C 110, the reset circuit 120, and the ADC 130, as well as performing its own initial setup.

[0068] The control circuit 140 outputs an H-level ACTIVE signal to the reset circuit 120 in order to transition to the Quick mode standby mode (step S3). As a result, power is not supplied to the reset COMP 123 and the VDD monitoring COMP 124, the reset circuit 120 turns off, and the control circuit 140 enters standby mode.

[0069] The control circuit 140 determines whether a measurement command has been input from the I2C 110 (step S4).

[0070] If the control circuit 140 determines that no measurement command has been input from the I2C 110 (S4: NO), it enters a standby state where it repeatedly executes the process in step S4.

[0071] In step S4, when the control circuit 140 determines that a measurement command has been input from the I2C 110 (S4: YES), it outputs an ACTIVE signal at an L level to the reset circuit 120 and outputs a measurement command to the ADC 130 (step S5). As a result, power is supplied to the reset COMP 123 and the VDD monitoring COMP 124, the reset circuit 120 turns on, and the control circuit 140 exits standby mode and transitions to measurement mode. The ADC 130 then performs flow rate measurement using the MEMS element 30. In measurement mode, either high-precision flow rate measurement or low-precision flow rate measurement is performed.

[0072] The control circuit 140 determines whether the flow rate measurement has been completed (step S6).

[0073] If the control circuit 140 determines that the flow rate measurement is not yet complete, it enters a standby state where it repeatedly executes the process in step S6.

[0074] In step S6, if the control circuit 140 determines that the flow rate measurement is complete (S6: YES), it determines whether a VDD monitoring signal has been input from the reset circuit 120 (step S7). The VDD monitoring signal is input from the reset circuit 120 when the power supply voltage VDD falls below V1.

[0075] When the control circuit 140 determines that no VDD monitoring signal has been input from the reset circuit 120 (S7: NO), it returns the flow to step S3. The process from step S3 to S7 is repeated, causing the ADC 130 to perform high-precision flow rate measurement at predetermined time intervals (for example, every 22 seconds).

[0076] In step S7, when the control circuit 140 determines that a VDD monitoring signal has been input from the reset circuit 120 (S7: YES), it outputs an ACTIVE signal at an L level to the reset circuit 120 in order to transition to the continuous monitoring mode (step S8). As a result, the reset circuit 120 is kept in the ON state, and the control circuit 140 switches to the continuous monitoring mode.

[0077] The control circuit 140 determines whether a measurement command has been input from the I2C 110 (step S9).

[0078] If the control circuit 140 determines that no measurement command has been input from the I2C 110 (S9: NO), it enters a standby state where it repeatedly executes the process in step S9.

[0079] In step S9, if the control circuit 140 determines that a measurement command has been input from the I2C 110 (S9: YES), it returns the flow to step S5. As a result, an ACTIVE signal at L level is output to the reset circuit 120, which turns on, and the control circuit 140 cancels the continuous monitoring mode and transitions to the measurement mode. In the measurement mode, either high-precision flow measurement or low-precision flow measurement is performed.

[0080] Furthermore, if the power supply voltage VDD falls below V2 and the reset circuit 120 outputs a reset signal while any of the processes in steps S5 to S7, or either step S8 or S9, the flow is forcibly returned to step S1.

[0081] If the flow is forcibly returned to step S1, the flow returns to step S1 according to the arrows shown to the right of steps S6 and S9 in Figure 5. By forcibly resetting I2C110, ADC130, and control circuit 140, it is possible to prevent the sensor body 101 from outputting an incorrect measurement value to the gas meter body 50 when the power supply voltage VDD drops.

[0082] This completes the series of processes.

[0083] <Effects> The semiconductor device 100 of this disclosure includes a monitoring circuit (reset circuit 120) that outputs a first signal (VDD monitoring signal) when the power supply voltage VDD falls below a first threshold (V1) and outputs a second signal (reset signal) when the power supply voltage VDD falls below a second threshold (V2) which is lower than the first threshold; a processing circuit (ADC 130) that performs predetermined processing operations; and a control circuit 140 that can control the monitoring circuit (reset circuit 120) and the processing circuit (ADC 130). The control circuit 140 performs control processing in a first mode in which, when the power supply voltage VDD is equal to or greater than the first threshold (V1), it operates the monitoring circuit (reset circuit 120) when the processing circuit (ADC 130) is performing a processing operation (flow rate measurement), and stops the monitoring circuit (reset circuit 120) when the processing circuit (ADC 130) is not performing a processing operation (flow rate measurement). When the power supply voltage VDD is below the first threshold (V1), control processing is performed in a second mode in which the monitoring circuit (reset circuit 120) is activated when the processing circuit (ADC 130) is performing a processing operation (flow rate measurement) and when the processing circuit (ADC 130) is not performing a processing operation (flow rate measurement). Therefore, power consumption can be reduced in both cases, when the power supply voltage VDD is high and when the power supply voltage VDD is low.

[0084] Therefore, it is possible to provide a semiconductor device 100 that can reduce power consumption.

[0085] Furthermore, the processing operation includes a high-precision operation in which voltage is acquired from an external device with a precision higher than a predetermined precision, and a low-precision operation in which voltage is acquired from an external device with a precision lower than a predetermined precision. When the control circuit 140 causes the processing circuit (ADC 130) to perform a processing operation (flow rate measurement), it may perform a high-precision operation if the voltage acquired from the external device in the low-precision operation becomes equal to or greater than a third threshold.

[0086] Therefore, by performing high-precision operation when necessary and low-precision operation when not needed, power consumption can be further reduced.

[0087] Furthermore, the control circuit 140 may cause the processing circuit (ADC 130) to perform a processing operation (flow rate measurement) by executing a high-precision operation at predetermined time intervals or at predetermined intervals.

[0088] Therefore, by performing high-precision operations at predetermined time intervals, measurement accuracy can be improved.

[0089] Furthermore, the control circuit 140 may perform control processing in the second mode after the processing operation in the first mode (flow rate measurement) is completed, if a first signal (VDD monitoring signal) is input from the monitoring circuit (reset circuit 120).

[0090] Therefore, when the processing operation (flow rate measurement) of the first mode is completed, the monitoring circuit (reset circuit 120) is in an operating state. At that time, by determining whether a VDD monitoring signal has been input (step S7), it is not necessary to start the monitoring circuit when the device is in standby mode in the first mode and does not need to monitor the VDD. As a result, power consumption is reduced and the processing performed by the semiconductor device 100 can be simplified.

[0091] Furthermore, the control circuit 140 may monitor whether the power supply voltage VDD falls below the second threshold (V2) when the monitoring circuit (reset circuit 120) is operating in the first mode and the second mode.

[0092] Therefore, by determining whether a reset is necessary, the semiconductor device 100 can be protected from malfunctions caused by noise, etc., when the power supply voltage VDD drops.

[0093] Furthermore, when the power supply voltage VDD falls below the second threshold (V2) and a second signal (reset signal) is output from the monitoring circuit (reset circuit 120), the operation of the processing circuit (ADC 130) and the control circuit 140 may be initialized.

[0094] Therefore, when the power supply voltage VDD falls below the second threshold (V2) and the second signal (reset signal) is output, the processing circuit (ADC 130) and the control circuit 140 can be protected from malfunctions caused by noise, etc. Furthermore, it can be guaranteed that such a reset operation will be performed when the power supply voltage VDD falls below the second threshold (V2).

[0095] Furthermore, the power supply voltage VDD may be supplied from the secondary battery 40. In order for the power supply voltage VDD to be supplied from the secondary battery 40, it is necessary to reduce power consumption, and by reducing the power consumption of the semiconductor device 100, the power supply voltage VDD supplied from the secondary battery 40 can be used effectively.

[0096] The sensor device 10 of this disclosure includes a MEMS element 30 that outputs a measurement voltage representing a measured value, and the semiconductor device 100, wherein the measurement voltage is input to the semiconductor device 100, and the processing circuit may be an ADC 130 that performs analog-to-digital conversion as a processing operation for the measurement voltage output from the MEMS element 30.

[0097] Therefore, in a sensor device 10 that includes a semiconductor device 100 that performs AD conversion of the measurement voltage of the MEMS element 30, power consumption can be reduced even when the power supply voltage VDD is high.

[0098] Therefore, a sensor device 10 capable of reducing power consumption can be provided.

[0099] Although exemplary embodiments of semiconductor devices and sensor devices of this disclosure have been described above, this disclosure is not limited to the specifically disclosed embodiments, and various modifications and changes are possible without departing from the scope of the claims.

[0100] This international application claims priority based on Japanese Patent Application No. 2025-055066, filed on 28 March 2025, the entire contents of which are incorporated herein by reference.

[0101] 10 Sensor device, 20 Flow path, 30 MEMS element, 40 Secondary battery, Gas 50 Meter body, 50A Control unit, 100 Semiconductor device, 110 I2C, 120 Reset circuit (example of monitoring circuit), 121A, 121B Input terminals, 122A, 122B Output terminals, 123 Reset COMP, 124 VDD monitoring COMP, 125 VREF circuit, 126A, 126B Inverter, P1, P2, P3, P4 Transistors, N1, N2, N3, N4 Transistors, R1, R2, R3 Resistors, 130 ADC (example of processing circuit), 140 Control circuit

Claims

1. A semiconductor device comprising: a monitoring circuit that outputs a first signal when the power supply voltage falls below a first threshold and outputs a second signal when the power supply voltage falls below a second threshold lower than the first threshold; a processing circuit that performs a predetermined processing operation; and a control circuit capable of controlling the monitoring circuit and the processing circuit, wherein the control circuit performs control processing in a first mode in which, when the power supply voltage is equal to or greater than the first threshold, it operates the monitoring circuit when the processing circuit is performing the processing operation and stops the monitoring circuit when the processing circuit is not performing the processing operation; and when the power supply voltage is less than the first threshold, it performs control processing in a second mode in which it operates the monitoring circuit when the processing circuit is performing the processing operation and when the processing circuit is not performing the processing operation.

2. The semiconductor device according to claim 1, wherein the processing operation includes a high-precision operation for acquiring a voltage from an external device with a precision higher than a predetermined precision, and a low-precision operation for acquiring a voltage from the external device with a precision lower than the predetermined precision, and the control circuit, when causing the processing circuit to perform the processing operation, causes the high-precision operation to be performed when the voltage acquired from the external device by the low-precision operation becomes equal to or greater than a third threshold.

3. The semiconductor device according to claim 2, wherein the control circuit causes the processing circuit to perform the processing operation, by executing the high-precision operation at predetermined time intervals or at predetermined intervals.

4. The semiconductor device according to claim 1, wherein the control circuit performs the control processing in the second mode when the first signal is input from the monitoring circuit after the processing operation in the first mode.

5. The semiconductor device according to claim 1, wherein the control circuit monitors whether the power supply voltage falls below a second threshold when the monitoring circuit is operating in the first mode and the second mode.

6. The semiconductor device according to claim 5, wherein when the power supply voltage falls below a second threshold and the monitoring circuit outputs the second signal, the operation of the processing circuit and the control circuit are initialized.

7. The semiconductor device according to any one of claims 1 to 6, wherein the power supply voltage is supplied from a secondary battery.

8. A sensor device comprising: a sensor that outputs a measurement voltage representing a measured value; and a semiconductor device according to claim 1, wherein the measurement voltage is input to the semiconductor device, and the processing circuit is an analog-to-digital converter that performs analog-to-digital conversion as the processing operation for the measurement voltage output from the sensor.