Electronic module
Patent Information
- Application Number
- PCT/JP2026/007642
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-03-27
- Filing Date
- 2026-03-02
- Publication Date
- 2026-10-01
Smart Images

Figure JP2026007642_01102026_PF_FP_ABST
Abstract
Description
Electronic Module
[0001] The present disclosure relates to an electronic module.
[0002] Conventionally, a technique of sealing electronic components with resin is known (see, for example, Patent Document 1).
[0003] Japanese Unexamined Patent Application Publication No. 2022-142212
[0004] An electronic module according to one aspect of the present disclosure includes an electronic component and a resin covering the electronic component. The electronic component has a ridge, and the electronic component and the resin are in close contact with each other at the ridge via a chemical bond or the like.
[0005] FIG. 1 is a perspective view showing a configuration example of the electronic module according to the embodiment. FIG. 2 is a perspective view showing a configuration example of the multilayer ceramic capacitor according to the embodiment. FIG. 3 is a cross-sectional view showing a configuration in the vicinity of the multilayer ceramic capacitor in the electronic module according to the embodiment. FIG. 4 is a cross-sectional view showing a configuration in the vicinity of the multilayer ceramic capacitor in the electronic module according to the embodiment.
[0006] Conventionally, in a manufacturing process of an electronic module, after an electronic component is covered with a resin, heat treatment for accelerating curing of the resin is performed. At this time, while the resin shrinks due to the heat treatment, the electronic component has a smaller amount of shrinkage than the resin, so stress is generated due to the difference in shrinkage between the resin and the electronic component, and this stress concentrates on the ridge of the electronic component. For this reason, in the conventional technique, peeling of the resin is likely to occur at the ridge of the electronic component, and there is a risk that moisture or the like may enter the gap formed by the peeling.
[0007] As described above, the above-described conventional technique has room for improvement in terms of improving the adhesion between the electronic component and the resin. The present disclosure provides a technique capable of improving the adhesion between an electronic component and a resin.
[0008] The embodiments for implementing the electronic module according to this disclosure (hereinafter referred to as "Embodiments") will be described in detail below with reference to the drawings. However, this disclosure is not limited by these embodiments. Furthermore, each embodiment can be combined as appropriate, provided that the processing content is not inconsistent. Also, the same parts are denoted by the same reference numerals in each of the following embodiments, and redundant descriptions are omitted.
[0009] Furthermore, in the embodiments described below, expressions such as "orthogonal" or "parallel" may be used, but these expressions do not require strict "orthogonal" or "parallel" alignment. In other words, each of the above expressions allows for deviations such as manufacturing accuracy and installation accuracy.
[0010] Furthermore, in the drawings referenced below, for the sake of clarity, mutually orthogonal X, Y, and Z axis directions are sometimes defined, and a Cartesian coordinate system is shown with the Z axis direction being vertically upward.
[0011] <Configuration of the Electronic Module> First, an example of the configuration of the electronic module 100 according to this embodiment will be described with reference to Figure 1. Figure 1 is a perspective view showing an example of the configuration of the electronic module 100 according to this embodiment.
[0012] As shown in Figure 1, the electronic module 100 according to this embodiment includes a substrate 10, a plurality of semiconductor elements 20, a plurality of multi-layer ceramic capacitors 30 (MLCCs), a resin layer 40 (see Figure 3), and a plurality of solder balls 50. The multi-layer ceramic capacitors 30 are an example of electronic components. Note that the resin layer 40 is not shown in Figure 1.
[0013] The substrate 10 has, for example, a rectangular plate shape in plan view. The substrate 10 has a mounting surface 11 on which a plurality of semiconductor elements 20 and a plurality of multilayer ceramic capacitors 30 are mounted, and a connection surface 12 located opposite the mounting surface 11 and facing a printed circuit board (not shown). A plurality of conductive pads 13 are also located on the mounting surface 11. The substrate 10 may be, for example, an organic substrate or a ceramic substrate. Alternatively, the substrate 10 may be a semiconductor substrate.
[0014] Multiple (in this case, two) semiconductor elements 20 are mounted on the mounting surface 11. Specifically, the multiple semiconductor elements 20 may be stacked in the Z-axis direction on the mounting surface 11. The semiconductor elements 20 have multiple terminals 21. The terminals 21 are connected to the conductor pads 13 via conductors. This electrically connects the semiconductor elements 20 and the conductor pads 13.
[0015] The multilayer ceramic capacitor 30 is attached to the conductor pad 13. The multilayer ceramic capacitor 30 has external electrodes 32. The external electrodes 32 include a first external electrode 32A and a second external electrode 32B. The first external electrode 32A and the second external electrode 32B are joined to two adjacent conductor pads 13 by a solder layer 60. This electrically connects the semiconductor element 20 and the multilayer ceramic capacitor 30. The configuration of the multilayer ceramic capacitor 30 will be described later with reference to Figures 2 to 4.
[0016] The resin layer 40 seals the semiconductor element 20 and the multilayer ceramic capacitor 30 on the mounting surface 11. The structure of the resin layer 40 will be described later.
[0017] Multiple solder balls 50 are located on the connection surface 12 of the substrate 10. The solder balls 50 may be electrically connected to the conductor pads 13 via a metal wiring layer (not shown) formed inside the substrate 10. The solder balls 50 are connected to terminals of a printed circuit board (not shown). As a result, the electronic module 100 is mounted on the printed circuit board. The electronic module 100 functions as an integrated circuit having semiconductor elements 20 and multilayer ceramic capacitors 30 on the printed circuit board.
[0018] Next, the configuration of the multilayer ceramic capacitor 30 according to this embodiment will be briefly described with reference to Figure 2. Figure 2 is a perspective view showing an example of the configuration of the multilayer ceramic capacitor 30 according to this embodiment.
[0019] As shown in Figure 2, the multilayer ceramic capacitor 30 has a laminate 31 and external electrodes 32. The external electrodes 32 include a first external electrode 32A and a second external electrode 32B. The multilayer ceramic capacitor 30 also has a first surface 33, a second surface 34 located opposite the first surface 33, and a side surface 35 located between the first surface 33 and the second surface 34.
[0020] The laminate 31 has a first end face 311a and a second end face 311b located opposite the first end face 311a. In Figure 2, the first end face 311a and the second end face 311b face each other in the Z-axis direction. Of the two end faces 311a and 311b, the first end face 311a is the end face furthest from the mounting surface 11, in other words, the top surface of the laminate 31. Of the two end faces 311b, the second end face 311b is the end face closer to the mounting surface 11, in other words, the bottom surface of the laminate 31.
[0021] The laminate 31 has a third end face 311c, a fourth end face 311d, a fifth end face 311e, and a sixth end face 311f as sides connecting the first end face 311a and the second end face 311b. In Figure 2, the third end face 311c and the fourth end face 311d face each other in the X-axis direction, and the fifth end face 311e and the sixth end face 311f face each other in the Y-axis direction.
[0022] The first external electrode 32A is provided on the third end face 311c of the laminate 31. Specifically, the first external electrode 32A may cover the entire surface of the third end face 311c. Furthermore, the first external electrode 32A may further cover the end of the first end face 311a on the negative X-axis side, the end of the second end face 311b on the negative X-axis side, the end of the fifth end face 311e on the negative X-axis side, and the end of the sixth end face 311f on the negative X-axis side.
[0023] The second external electrode 32B is provided on the fourth end face 311d of the laminate 31. Specifically, the second external electrode 32B may cover the entire surface of the fourth end face 311d. Furthermore, the second external electrode 32B may also cover the end of the first end face 311a on the positive X-axis side, the end of the second end face 311b on the positive X-axis side, the end of the fifth end face 311e on the positive X-axis side, and the end of the sixth end face 311f on the positive X-axis side.
[0024] The first surface 33 of the multilayer ceramic capacitor 30 corresponds to the portion of the first end face 311a of the laminate 31 in which the first external electrode 32A and the second external electrode 32B are not located. The second surface 34 of the multilayer ceramic capacitor 30 corresponds to the portion of the second end face 311b of the laminate 31 in which the first external electrode 32A and the second external electrode 32B are not located. The side surface 35 of the multilayer ceramic capacitor 30 corresponds to the portions of the fifth end face 311e and the sixth end face 311f of the laminate 31 in which the first external electrode 32A and the second external electrode 32B are not located.
[0025] A ridge 36 is located between the first surface 33 and the side surface 35, and between the second surface 34 and the side surface 35. In the multilayer ceramic capacitor 30, the ridge 36 refers to at least the boundary between the first surface 33 and the second surface 34 and the side surface 35.
[0026] Next, the configuration of the multilayer ceramic capacitor 30 and the configuration of the electronic module 100 in the vicinity of the multilayer ceramic capacitor 30 according to this embodiment will be described in detail with reference to Figures 3 and 4.
[0027] Figures 3 and 4 are cross-sectional views showing the configuration near the multilayer ceramic capacitor 30 in the electronic module 100 according to this embodiment. Specifically, Figure 3 corresponds to a cross-sectional view of the electronic module 100 when viewed in cross-section along the XZ plane passing through the center of the multilayer ceramic capacitor 30 in Figure 1. Figure 4 corresponds to a cross-sectional view of the electronic module 100 when viewed in cross-section along the YZ plane passing through the center of the multilayer ceramic capacitor 30 in Figure 1.
[0028] As shown in Figure 3, the laminate 31 is composed of a dielectric layer 312, an internal electrode layer 313, and a cover layer 314.
[0029] The laminate 31 is constructed by alternately stacking dielectric layers 312 and internal electrode layers 313. Specifically, the dielectric layers 312 and internal electrode layers 313 are stacked along the first end face 311 of the laminate 31, that is, in a direction perpendicular to the first surface 33 of the multilayer ceramic capacitor 30 (hereinafter referred to as the first direction).
[0030] The dielectric layer 312 is made of an insulating material. For example, the dielectric layer 312 is made of barium titanate (BaTiO2). 3 ), calcium titanate (CaTiO 3 ), strontium titanate (SrTiO 3 ), barium zirconate (BaZrO 3 The dielectric layer 312 may also be composed of ceramic materials mainly consisting of ) etc. Furthermore, the dielectric layer 312 may contain metallic elements such as magnesium (Mg), manganese (Mn), and vanadium (V), and rare earth elements such as yttrium (Y), dysprosium (Dy), holmium (Ho), terbium (Tb), and ytterbium (Yb).
[0031] The thickness of the dielectric layer 312 may be, for example, 0.1 μm or more and 10 μm or less. Alternatively, the thickness of the internal electrode layer 313 may be, for example, 1.5 μm or less.
[0032] The internal electrode layer 313 includes a first internal electrode layer 313A and a second internal electrode layer 313B. The first internal electrode layer 313A is exposed on the third end face 311c. The second internal electrode layer 313B is exposed on the fourth end face 311d. The end of the first internal electrode layer 313A exposed on the third end face 311c is covered by the first external electrode 32A and is electrically connected to the first external electrode 32A. The end of the second internal electrode layer 313B exposed on the fourth end face 311d is covered by the second external electrode 32B and is electrically connected to the second external electrode 32B. Note that the first internal electrode layer 313A and the second internal electrode layer 313B are not exposed to the outside on the fifth end face 311e and the sixth end face 311f (see Figure 4). In other words, the ends of the first internal electrode layer 313A and the second internal electrode layer 313B in the Y-axis direction are located inside the laminate 31.
[0033] The internal electrode layer 313 is made of a conductive material mainly composed of nickel (Ni), for example. The internal electrode layer 313 may also contain lithium (Li). Furthermore, the internal electrode layer 313 may also contain magnesium (Mg).
[0034] The cover layer 314 is located at both ends of the laminate 31 in the first direction. In other words, both ends of the laminate 31 in the first direction are composed of the cover layer 314. The cover layer 314 is composed of an insulating material. For example, the cover layer 314 is made of BaTiO 3 CaTiO 3 SrTiO 3 BaZrO 3 It may be composed of a ceramic material mainly composed of the above. The cover layer 314 may be composed of the same ceramic material as the ceramic material that constitutes the dielectric layer 312.
[0035] As shown in Figure 3, the external electrode 32 may be composed of multiple (in this case, three) conductive layers. Specifically, the external electrode 32 may include a first layer 321, a second layer 322, and a third layer 323. The first layer 321 directly covers the surface of the laminate 31. The first layer 321 is connected to the internal electrode layer 313 that is exposed at the third end face 311c and the fourth end face 311d. The second layer 322 is formed to cover the surface of the first layer 321. The third layer 323 is formed to cover the surface of the second layer 322. The third layer 323 is bonded to, for example, the conductor pad 13 described above by a conductive bonding material.
[0036] The first layer 321 is formed from an alloy of metals such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), and gold (Au). The first layer 321 may be formed using thin-film formation techniques such as plating, sputtering, or vapor deposition, or it may be formed using thick-film formation techniques such as dip lithography, screen printing, or gravure printing.
[0037] The second layer 322 is formed of a metal such as nickel (Ni), copper (Cu), silver (Ag), palladium (Pd), or gold (Au). The second layer 322 may be formed using thin-film formation techniques such as electroless plating or electrolytic plating.
[0038] The third layer 323 is formed of a metal such as tin (Sn), for example. The third layer 323 may be formed by using, for example, a thin film formation technique such as electroless plating or electrolytic plating.
[0039] According to the external electrode 32 including the first layer 321, adhesion to the multilayer body 31 can be enhanced. According to the external electrode 32 including the third layer 323, wettability to the conductive bonding material can be improved. According to the external electrode 32 including the second layer 322, bondability between the first layer 321 and the third layer 323 can be enhanced.
[0040] As shown in FIG. 3, in a cross-sectional view of the multilayer ceramic capacitor 30, the first surface 33 and the second surface 34 may have an arched shape curved outward of the multilayer ceramic capacitor 30. More specifically, the first end surface 311a of the multilayer body 31 forming the first surface 33 and the second end surface 311b of the multilayer body 31 forming the second surface 34 may have an arched shape curved outward of the multilayer body 31. Further, the third end surface 311c and the fourth end surface 311d of the multilayer body 31 may have an arched shape curved inward of the multilayer body 31.
[0041] As shown in FIG. 3, the multilayer ceramic capacitor 30 is encapsulated by a resin layer 40. The resin layer 40 protects the multilayer ceramic capacitor 30 (and the semiconductor element 20) from external impact, moisture and the like. The resin layer 40 is formed of a thermosetting resin. Specifically, the resin layer 40 may be formed of, for example, an epoxy resin. The resin layer 40 can be formed, for example, by covering the multilayer ceramic capacitor 30 (and the semiconductor element 20) with a resin, and then accelerating curing of the resin by heat treatment.
[0042] As shown in FIG. 4, in a cross-sectional view of the multilayer ceramic capacitor 30, the side surface 35 may have an arcuate shape curved toward the inside of the multilayer ceramic capacitor 30. More specifically, the fifth end surface 311e and the sixth end surface 311f of the multilayer body 31 forming the side surface 35 may have an arcuate shape curved toward the inside of the multilayer body 31. Since the side surface 35 has such an arcuate shape, in the cross-sectional view shown in FIG. 4, the ridges 36 of the multilayer ceramic capacitor 30 located at both ends of the side surface 35 protrude outward in the Y-axis direction, which is the outward of the multilayer ceramic capacitor 30, even compared with the central portion of the side surface 35. For this reason, the multilayer ceramic capacitor 30 and the resin layer 40 tend to easily separate at the ridges 36.
[0043] As shown in FIG. 4, the ridges 36 located between the first surface 33 and the side surface 35 and between the second surface 34 and the side surface 35 may have a rounded shape in cross-sectional view. In this case, the curvature radius of the ridge 36 may be 20 μm or more and 50 μm or less. According to this configuration, concentration of thermal stress at the ridge 36 can be alleviated. Therefore, even when the temperature of the multilayer ceramic capacitor 30 rises, cracks or the like are less likely to occur in the multilayer ceramic capacitor 30.
[0044] <Adhesion Between Multilayer Ceramic Capacitor and Resin Layer> Next, the adhesion between the multilayer ceramic capacitor 30 and the resin layer 40 will be described in detail.
[0045] In the present embodiment, the surface of the multilayer ceramic capacitor 30, specifically, the first surface 33, the second surface 34, and the side surfaces 35 of the multilayer ceramic capacitor 30 may be subjected to a hydrophilic treatment. More specifically, the surface of the multilayer body 31 forming the first surface 33, the second surface 34, and the side surfaces 35 may be subjected to a hydrophilic treatment. Note that for the multilayer ceramic capacitor 30, it is sufficient that at least the ridges 36 are subjected to the hydrophilic treatment.
[0046] In the hydrophilization treatment, for example, the chemical bonds on the surface of the laminate 31 are broken by irradiating the surface of the laminate 31 with oxygen radicals, and then highly hydrophilic functional groups such as hydroxyl groups are introduced to the surface of the laminate 31. This makes it possible to modify the surface of the laminate 31 to a highly hydrophilic state. Note that this hydrophilization treatment may be performed after the formation of the laminate 31 and before the formation of the external electrode 32.
[0047] If the first surface 33, second surface 34, and side surface 35 of the multilayer ceramic capacitor 30 are treated to be hydrophilic, the multilayer ceramic capacitor 30 and the resin layer 40 can be brought into close contact by hydrogen bonding on the first surface 33, second surface 34, and side surface 35.
[0048] As described above, the resin layer 40 is formed, for example, by covering the multilayer ceramic capacitor 30 with resin and then accelerating the hardening of the resin by heat treatment. In this heat treatment, the resin hardens while undergoing thermal shrinkage. However, in this case, since the amount of thermal shrinkage of the multilayer ceramic capacitor 30 is less than the amount of thermal shrinkage of the resin, stress is generated due to the difference in the amount of thermal shrinkage between the resin and the multilayer ceramic capacitor 30. This stress tends to concentrate on the edges 36 of the multilayer ceramic capacitor 30. For this reason, in conventional electronic modules, for example, in which the multilayer ceramic capacitor 30 and the resin layer 40 are in close contact only by the anchoring effect, peeling of the resin layer 40 is likely to occur at the edges 36, and there is a risk that moisture or the like may enter the gap created by the peeling.
[0049] On the other hand, according to the electronic module 100 of this embodiment, the multilayer ceramic capacitor 30 and the resin layer 40 are in close contact at the edge portion 36 by hydrogen bonding. Therefore, the adhesion between the multilayer ceramic capacitor 30 and the resin layer 40 at the edge portion 36 can be improved. Consequently, it is possible to make it difficult for the multilayer ceramic capacitor 30 and the resin layer 40 to peel off at the edge portion 36.
[0050] Furthermore, although this embodiment describes an example in which the multilayer ceramic capacitor 30 and the resin layer 40 are bonded by hydrogen bonds, the multilayer ceramic capacitor 30 and the resin layer 40 may be closely bonded by chemical bonds other than hydrogen bonds. The chemical bonds referred to here may be, for example, covalent bonds, ionic bonds, etc. If the multilayer ceramic capacitor 30 and the resin layer 40 are closely bonded by chemical bonds, the adhesion between the multilayer ceramic capacitor 30 and the resin layer 40 can be improved, thereby reducing the occurrence of the above-mentioned delamination at the edge portion 36.
[0051] In this embodiment, the surface roughness of the ridge portion 36 may be 50 nm or more and 80 nm or less. In such cases, the surface roughness of the ridge portion 36 may be adjusted by, for example, barrel polishing the entire multilayer ceramic capacitor 30. Alternatively, the ridge portion 36 may be locally polished by, for example, blasting.
[0052] With this configuration, the adhesion force between the multilayer ceramic capacitor 30 and the resin layer 40 at the edge portion 36 can be increased due to the anchoring effect. As a result, at the edge portion 36, the multilayer ceramic capacitor 30 and the resin layer 40 adhere more firmly due to the adhesion force due to chemical bonding and the adhesion force due to the anchoring effect. Therefore, with the electronic module 100 having the above configuration, the adhesion between the multilayer ceramic capacitor 30 and the resin layer 40 can be more effectively improved.
[0053] Although the present disclosure has been described in detail above, this disclosure is not limited to the embodiments described above, and various modifications and improvements are possible without departing from the gist of this disclosure.
[0054] The embodiments disclosed herein should be considered in all respects to be illustrative and not restrictive. Indeed, the embodiments described above can be embodied in a variety of forms. Furthermore, the embodiments described above may be omitted, replaced, or modified in various ways without departing from the scope and spirit of the appended claims.
[0055] Furthermore, this technology can also take the following configurations: (1) An electronic module having an electronic component and a resin covering the electronic component, wherein the electronic component has a ridge, and the electronic component and the resin are tightly bonded at the ridge by chemical bonding. (2) The electronic module according to (1), wherein the electronic component has a hydrophilic surface, and the chemical bond is a hydrogen bond. (3) The electronic module according to (1) or (2), wherein the resin is an epoxy resin. (4) The electronic module according to any one of (1) to (3), wherein the surface roughness of the electronic component at the ridge is 50 nm or more and 80 nm or less. (5) The electronic module according to any one of (1) to (4), wherein the ridge has an R shape in cross-section, and the curvature of the ridge is 20 μm or more and 50 μm or less. (6) The electronic module according to any one of (1) to (5), wherein the electronic component has a first surface, a second surface located opposite the first surface, and a side surface located between the first surface and the second surface, the edge portion is located between the first surface and the side surface and between the second surface and the side surface, and in a cross-sectional view of the electronic component, the side surface has an arched shape that curves inward toward the electronic component. (7) The electronic module according to (6), wherein in a cross-sectional view of the electronic component, the first surface and the second surface have an arched shape that curves outward toward the electronic component. (8) The electronic module according to (6) or (7), wherein the electronic component is a multilayer ceramic capacitor in which a dielectric layer and an internal electrode layer are stacked along a direction perpendicular to the first surface.
[0056] 30 Multilayer ceramic capacitor (an example of an electronic component) 33 First surface 34 Second surface 35 Side view 36 Edge 40 Resin layer (an example of resin) 100 Electronic module
Claims
1. An electronic module comprising an electronic component and a resin covering the electronic component, wherein the electronic component has a ridge, and the electronic component and the resin are tightly bonded together by chemical bonding at the ridge.
2. The electronic module according to claim 1, wherein the electronic component has a hydrophilic surface, and the chemical bond is a hydrogen bond.
3. The electronic module according to claim 1 or 2, wherein the resin is an epoxy resin.
4. The electronic module according to any one of claims 1 to 3, wherein the surface roughness of the electronic component at the edge is 50 nm or more and 80 nm or less.
5. The electronic module according to any one of claims 1 to 4, wherein the edge portion has an R shape in cross-sectional view, and the curvature of the edge portion is 20 μm or more and 50 μm or less.
6. The electronic module according to any one of claims 1 to 5, wherein the electronic component has a first surface, a second surface located opposite the first surface, and a side surface located between the first surface and the second surface, the edge portion is located between the first surface and the side surface and between the second surface and the side surface, and in a cross-sectional view of the electronic component, the side surface has a curved shape that curves inward toward the electronic component.
7. The electronic module according to claim 6, wherein, in a cross-sectional view of the electronic component, the first surface and the second surface have an arched shape that curves outward toward the electronic component.
8. The electronic module according to claim 6 or 7, wherein the electronic component is a multilayer ceramic capacitor in which a dielectric layer and an internal electrode layer are stacked along a direction perpendicular to the first surface.