Semiconductor device, electronic apparatus, and method for producing semiconductor device

Abstract

A semiconductor device according to an embodiment of the present invention comprises a seal ring surrounding an outer periphery. The seal ring has a mark region, and a mark is provided in the mark region.

Description

Semiconductor Device, Electronic Apparatus, and Method for Manufacturing Semiconductor Device

[0001] The present disclosure relates to a semiconductor device, an electronic apparatus, and a method for manufacturing a semiconductor device.

[0002] For example, in order to divide semiconductor devices such as SRAM (Static Random Access Memory) and CIS (CMOS Image Sensor) formed on a wafer into individual chips, dicing methods such as a scribe-break method and a blade dicing method are used (see, for example, Patent Document 1). A scribe region (dicing region) is provided on the wafer. The scribe region includes, for example, a lithography mark region containing lithography marks (such as alignment marks and overlay marks) and a seal ring region outside the lithography mark region.

[0003] Japanese Patent Laid-Open No. 2005-252078

[0004] As process nodes advance, the number of patterns that require in-line monitoring has increased, which consistently imposes constraints on the arrangement of marks in lithography mark regions. For example, in high-density products such as SRAM, it is necessary to arrange a large number of overlay marks and manage overlay by multi-point measurement. However, if there are other higher-priority marks, a required number of mounting objects such as marks may not be arranged. In other words, as process nodes advance, the number of mounting objects in the lithography mark region increases, so the degree of freedom in arranging the mounting objects decreases.

[0005] Therefore, the present disclosure provides a technique capable of improving the degree of freedom in arranging mounting objects.

[0006] A semiconductor device according to an embodiment includes a seal ring surrounding an outer periphery of the semiconductor device, the seal ring has a mark region, and a mark is provided in the mark region.

[0007] An electronic apparatus according to an embodiment includes a semiconductor device, the semiconductor device includes a seal ring surrounding an outer periphery of the semiconductor device, the seal ring has a mark region, and a mark is provided in the mark region.

[0008] The method for manufacturing a semiconductor device according to this embodiment includes providing a mark in the mark area of ​​a seal ring surrounding the outer periphery of the semiconductor device.

[0009] This figure shows an example of the wafer configuration according to the embodiment. This figure shows an example of the scribe area configuration according to the embodiment. This figure shows a mark and mark area according to the embodiment. This figure shows a seal ring of modified example 1 according to the embodiment. This figure shows a seal ring of modified example 2 according to the embodiment. This figure shows a seal ring of modified example 3 according to the embodiment. This figure shows a seal ring of modified example 4 according to the embodiment. This figure shows a seal ring of modified example 5 according to the embodiment. This figure shows a seal ring of modified example 6 according to the embodiment. This figure shows a seal ring of modified example 7 according to the embodiment. This figure shows a seal ring of modified example 8 according to the embodiment. This figure shows a mark of modified example 1 according to the embodiment. This figure shows a mark of modified example 2 according to the embodiment. This figure shows a mark of modified example 3 according to the embodiment. This figure shows a mark of modified example 4 according to the embodiment. This figure shows a mark of modified example 5 according to the embodiment. This figure shows a mark of modified example 6 according to the embodiment. This figure shows an example of the application of the semiconductor device described above. This figure shows an example of the configuration of an imaging device according to the application example. This figure shows an example of the configuration of a distance measuring device according to the application example.

[0010] Embodiments of this disclosure will be described in detail below with reference to the drawings. Embodiments include examples and modifications. However, the technology relating to this disclosure is not limited by the embodiments. In addition, in the following embodiments, the same reference numerals are used for essentially the same parts to omit redundant explanations.

[0011] This disclosure will be described in the following order of items: 1. Embodiments 1-1. Example of wafer configuration 1-2. Example of mark and mark area 1-3. Modification of seal ring 1-4. Modification of mark 1-5. Overview 2. Other embodiments 3. Application examples 3-1. Various devices 3-2. Imaging device 3-3. Distancing device 4. Notes

[0012] <1. Embodiments> <1-1. Wafer Configuration Examples> An example of the configuration of the wafer 10 according to the embodiment will be described with reference to Figures 1 and 2 (each a plan view). Figure 1 is a diagram showing an example of the configuration of the wafer 10 according to the embodiment. Figure 2 is a diagram showing an example of the configuration of the scribe region 20 according to the embodiment.

[0013] As shown in Figure 1, the wafer 10 according to this embodiment is a substrate having a plurality of semiconductor devices 11. These semiconductor devices 11 are divided into individual semiconductor devices 11, i.e., chips, by a dicing method, for example. Various dicing methods can be used, such as the scribe-break method or the blade dicing method.

[0014] The wafer 10 has scribe regions 20 between each semiconductor device 11. The scribe regions 20 are arranged on the wafer 10 in a grid pattern, for example. The scribe regions 20 include individual seal rings (seal ring regions) 21 of each semiconductor device 11 and lithographic regions 22.

[0015] The seal ring 21 is provided along the outer circumference of the semiconductor device 11, that is, surrounding the outer circumference of the semiconductor device 11. The seal ring 21 is formed, for example, in an annular shape in plan view. In the example of Figure 1, the seal ring 21 is formed in a rectangular shape in plan view. This seal ring 21 is, for example, a seal ring that prevents both or either cracks and moisture from entering the inside of the ring. The lithographic area 22 is provided, for example, in a grid pattern.

[0016] As shown in Figure 2, the scribe region 20 includes, for example, a pair of adjacent seal rings 21 and a lithographic region 22. The scribe region 20 is a region located between a pair of adjacent semiconductor devices 11.

[0017] Each of the seal rings 21 is formed, for example, in a mesh-like structure. Each of the seal rings 21 has a plurality of marks 30. Each of the marks 30 is individually provided in a plurality of mark regions 40. Each mark region 40 is provided on the seal ring 21 for each mark 30. Each of the mark regions 40 functions as a mark mounting region on which the marks 30 are mounted. In the example of Figure 2, the mark regions 40 are arranged in the Y-axis direction. Examples of marks 30 include various marks such as overlap marks. An overlap mark is, for example, a process mark (a mark for equipment manufacturing) used to measure the overlap misalignment of layers.

[0018] The frame width of the seal ring 21 (the length of the frame portion of the seal ring 21 in the X-axis direction) is, for example, about 20 μm. The width of the lithographic mark area 22 (the length of the lithographic mark area 22 in the X-axis direction) is, for example, about 60 μm. The width of the margin area between the seal ring 21 and the lithographic mark area 22 (the length of the margin area in the X-axis direction) is, for example, about 10 μm. From these, the width of the scribe area 20 (the length of the scribe area 20 in the X-axis direction) is, for example, about 120 μm. Note that the frame width of the seal ring 21 is sometimes referred to as the thickness of the seal ring 21. In recent years, smaller and more precise process marks have appeared for the mark 30. For this reason, the size (planar size) of the mark 30 is a size that can be mounted on the seal ring 21.

[0019] The aforementioned mark 30 and seal ring 21 are formed from, for example, a metal material. Furthermore, while it is desirable that the mark 30 and seal ring 21 be formed from the same material, for example, from the viewpoint of reducing the number of manufacturing steps, they may be formed from different materials. The seal ring 21 is formed in a mesh-like manner, but it may be formed in a shape other than a mesh. For example, the seal ring 21 may be formed so as to surround the outer circumference of the semiconductor device 11 with one or more lines.

[0020] The lithographic marking region 22 is sandwiched between a pair of seal rings 21. That is, the pair of seal rings 21 face each other with the lithographic marking region 22 in between. Various marks, such as alignment marks 101 and other marks 102, are provided in the lithographic marking region 22. Dicing is performed on this lithographic marking region 22. For example, grooves are formed in the lithographic marking region 22 using a diamond tool to cut the wafer 10, or the wafer 10 is cut from the lithographic marking region 22 using a blade.

[0021] <1-2. Example of Mark and Mark Area> An example of the configuration of the mark 30 and mark area 40 according to the embodiment will be described with reference to Figure 3. Figure 3 is a diagram showing the mark 30 and mark area 40 according to the embodiment. In the example of Figure 3, the upper figure is a plan view and the lower figure is a cross-sectional view.

[0022] As shown in Figure 3, the seal ring 21 is composed of multiple seal rings 25 and 26 stacked on top of each other. For example, the seal ring 21 includes a first seal ring 25 and a second seal ring 26. The first seal ring 25 is provided in the first layer (layer 1), and the second seal ring 26 is provided in the second layer (layer 2). These first seal rings 25 and second seal rings 26 are stacked on top of each other to form the seal ring 21.

[0023] In the example shown in Figure 3, the first seal ring 25 and the second seal ring 26 are each formed in a mesh-like shape, for example, but they may be formed in a shape other than a mesh. Furthermore, the first seal ring 25 and the second seal ring 26 are formed from a material such as metal. While it is desirable that the first seal ring 25 and the second seal ring 26 be formed from the same material, for example, from the viewpoint of reducing the number of manufacturing steps, they may be formed from different materials. Also, while the shapes of both the first seal ring 25 and the second seal ring 26 are the same, they may be different.

[0024] The first seal ring 25 includes a first mark region 41, and the second seal ring 26 includes a second mark region 42. The first seal ring 25 and the second seal ring 26 are stacked such that the positions of the first mark region 41 and the second mark region 42 coincide in a plan view. The first seal ring 25 and the second seal ring 26 are stacked, for example, with an insulating layer in between, but are partially or completely connected to each other in the Z-axis direction by the placement of a metal layer (metal wall) such as a via on the insulating layer. Note that other shapes and sealing methods other than those described above may be used for the ring shape and sealing method.

[0025] The first mark area 41 and the second mark area 42 are stacked, and the mark area 40 is composed of the first mark area 41 and the second mark area 42. The mark area 40 is surrounded by line material 50. Line material 50 is a line-shaped member that constitutes the seal ring 21. Line material 50 is composed of the first line material 51 and the second line material 52, which are stacked.

[0026] The first line material 51 is a line-shaped member that constitutes the first seal ring 25. The first line material 51 is formed in an annular shape, for example, so as to surround the first mark region 41. In other words, the first mark region 41 is defined by a pair of first line materials 51 extending in the X-axis direction and a pair of first line materials 51 extending in the Y-axis direction. The first mark region 41 functions as a mark mounting region on which the first mark 31 is mounted.

[0027] The second line material 52 is a line-shaped member that constitutes the second seal ring 26. The second line material 52 is formed in an annular shape, for example, so as to surround the second mark region 42. In other words, the second mark region 42 is defined by a pair of second line materials 52 extending in the X-axis direction and a pair of second line materials 52 extending in the Y-axis direction. The second mark region 42 functions as a mark mounting region on which the second mark 32 is mounted.

[0028] Mark 30 is an overlapping mark including a first mark 31 and a second mark 32. The first mark 31 is provided in the first mark area 41 of the first layer (layer 1), and the second mark 32 is provided in the second mark area 42 of the second layer (layer 2). These first mark 31 and second mark 32 are combined to form mark 30.

[0029] In the example shown in Figure 3, the planar shapes of the first mark 31 and the second mark 32 are, for example, square frame shapes, but they may be other frame shapes such as rectangles or triangles, or other shapes other than frame shapes. Furthermore, the first mark 31 and the second mark 32 are formed from, for example, a metal material. From the viewpoint of reducing the number of manufacturing steps, for example, it is desirable that the first mark 31 and the second mark 32 be formed from the same material, but they may be formed from different materials.

[0030] It is desirable that the X-axis separation distance L1 between the outer circumference of the first mark 31 and the outer circumference of the first mark region 41 (first line material 51) be 1 μm or more. It is also desirable that the Y-axis separation distance L2 between the outer circumference of the first mark 31 and the outer circumference of the first mark region 41 (first line material 51) be 1 μm or more. In other words, it is desirable that the X-axis separation distance L1 and the Y-axis separation distance L2 between the outer circumference of the mark 30 and the outer circumference of the mark region 40 be 1 μm or more. For example, if one or both of the X-axis separation distance L1 and the Y-axis separation distance L2 are shorter than 1 μm, it becomes difficult to accurately detect the mark 30. Note that the X-axis separation distance L1 and the Y-axis separation distance L2 may be the same or different.

[0031] With the configuration described above, a mark area 40 is provided on the seal ring 21, and a mark 30 is provided on the mark area 40. By utilizing a part of the seal ring 21 as the mark area 40, it becomes possible to place various marks such as lithographic marks on the seal ring 21, thereby improving the flexibility of placement of mounted objects such as the mark 30.

[0032] Furthermore, in the manufacturing method of the semiconductor device 11 with the aforementioned layered structure (for example, a wafer 10 including each semiconductor device 11), it is possible to use general methods, apparatus, and conditions for manufacturing semiconductor devices. In other words, it is possible to manufacture the semiconductor device 11 according to this embodiment using existing semiconductor device manufacturing methods. For example, various methods can be used to manufacture the semiconductor device 11, such as chemical vapor deposition, physical vapor deposition, coating methods such as spin coating, lithography, and bonding techniques for support substrates and peripheral circuit boards.

[0033] <1-3. Modified Seal Rings> Modified seal rings 21 according to the embodiment will be described with reference to Figures 4 to 11 (each plan view).

[0034] (Modification 1) Figure 4 shows the seal ring 21 of Modification 1 according to the embodiment.

[0035] As shown in Figure 4, in Modification 1, the mark area 40 is sandwiched between multiple line members 50 extending in the Y-axis direction. More specifically, the mark area 40 is defined by a pair of line members 50 extending in the Y-axis direction and facing each other with the mark 30 in between, the individual end faces of four line members 50 located above the mark 30 (+Y side) and extending in the Y-axis direction, and the individual end faces of four line members 50 located below the mark 30 (-Y side) and extending in the Y-axis direction.

[0036] According to Modification 1, as described above, the degree of freedom in arranging mounted components such as the Mark 30 can be improved.

[0037] (Modification 2) Figure 5 shows the seal ring 21 of Modification 2 according to the embodiment.

[0038] As shown in Figure 5, in the modified example 2, the mark region 40 is sandwiched between a pair of line members 50 extending in the X-axis direction. More specifically, the mark region 40 is defined by a pair of line members 50 that extend in the X-axis direction and face each other with the mark 30 in between. Therefore, the seal ring 21 is divided by the mark region 40.

[0039] According to Modification 2, similar to the above, the degree of freedom in arranging a mounted object such as the mark 30 can be improved. Furthermore, since no line member 50 extends from the mark 30 in the X-axis direction, the degree of freedom in arranging a mounted object such as a mark can be further improved.

[0040] (Modification 3) FIG. 6 is a diagram showing the seal ring 21 of Modification 3 according to the embodiment.

[0041] As shown in FIG. 6, in Modification 3, the mark region 40 is sandwiched between a plurality of line members 50 extending in the Y-axis direction. Specifically, the mark region 40 is defined by the respective end faces of six line members 50 located on the upper side (+Y side) of the mark 30 and extending in the Y-axis direction, and the respective end faces of six line members 50 located on the lower side (-Y side) of the mark 30 and extending in the Y-axis direction. Accordingly, the seal ring 21 is divided by the mark region 40.

[0042] According to Modification 3, similar to the above, the degree of freedom in arranging a mounted object such as the mark 30 can be improved. Furthermore, since no line member 50 extends from the mark 30 in the X-axis direction, the degree of freedom in arranging a mounted object such as a mark can be further improved.

[0043] (Modification 4) FIG. 7 is a diagram showing the seal ring 21 of Modification 4 according to the embodiment.

[0044] As shown in FIG. 7, in Modification 4, the mark region 40 is surrounded by the line member 50. A frame width L4 of the seal ring 21 (the length of the frame portion of the seal ring 21 in the X-axis direction) is wider than a width L3 of the mark region 40 (the length of the mark region 40 in the X-axis direction) (L4>L3).

[0045] According to Modification 4, similar to the above, the degree of freedom in arranging a mounted object such as the mark 30 can be improved. Furthermore, it is possible to increase the frame width L4 of the seal ring 21, thereby reliably suppressing intrusion of one or both of cracks and moisture to the inside of the ring.

[0046] (Modification 5) FIG. 8 is a diagram showing the seal ring 21 of Modification 5 according to the embodiment.

[0047] As shown in FIG. 8, in Modification 5, the mark region 40 is surrounded by line members 50. A frame width L4 of the seal ring 21 (the length of the frame portion of the seal ring 21 in the X-axis direction) is narrower than a width L3 of the mark region 40 (the length of the mark region 40 in the X-axis direction) (L4<L3).

[0048] According to Modification 4, similar to the above, the degree of freedom in arranging a mounted object such as the mark 30 can be improved. In addition, it is possible to narrow the frame width L4 of the seal ring 21, thereby reducing the installation area of the seal ring 21.

[0049] (Modification 6) FIG. 9 is a diagram illustrating a seal ring 21 of Modification 6 according to the embodiment.

[0050] As shown in FIG. 9, in Modification 6, the mark region 40 is sandwiched between a plurality of line members 50 extending in the Y-axis direction. Specifically, the mark region 40 is defined by individual end faces of the three line members 50 located above the mark 30 (on the +Y side) and extending in the Y-axis direction, and individual end faces of the three line members 50 located below the mark 30 (on the -Y side) and extending in the Y-axis direction. Accordingly, the seal ring 21 is divided by the mark region 40. The frame width L4 of the seal ring 21 is narrower than the width L3 of the mark region 40 (L4<L3).

[0051] According to Modification 6, similar to the above, the degree of freedom in arranging a mounted object such as the mark 30 can be improved. In addition, since no line member 50 is present from the mark 30 toward the X-axis direction, the degree of freedom in arranging a mounted object such as a mark can be further improved. In addition, it is possible to narrow the frame width L4 of the seal ring 21, thereby reducing the installation area of the seal ring 21.

[0052] (Modification 7) FIG. 10 is a diagram illustrating a seal ring 21 of Modification 7 according to the embodiment.

[0053] As shown in Figure 10, in Modification 7, the seal ring 21 has a crack-stop seal ring 21a and a moisture-stop seal ring 21b. The crack-stop seal ring 21a is an example of a first seal ring, and the moisture-stop seal ring 21b is an example of a second seal ring.

[0054] The crack-stop seal ring 21a is a ring that prevents cracks from penetrating the inside of the ring. The crack-stop seal ring 21a includes a mark 30 and a mark area 40. The moisture-stop seal ring 21b is a ring that prevents moisture from penetrating the inside of the ring. The moisture-stop seal ring 21b is located inside the crack-stop seal ring 21a. Each of the crack-stop seal ring 21a and the moisture-stop seal ring 21b is formed, for example, in a mesh-like structure.

[0055] According to modification 7, as described above, the degree of freedom in arranging mounted objects such as the mark 30 can be improved. Furthermore, by configuring the seal ring 21 with a crack-stop seal ring 21a and a moisture-stop seal ring 21b, it is possible to reliably prevent cracks and moisture from entering the inside of the ring.

[0056] In modification 7, the marks 30 and mark area 40 are provided only on the crack stop seal ring 21a, but they may also be provided on both the crack stop seal ring 21a and the moisture stop seal ring 21b. Also, the shapes of the crack stop seal ring 21a and the moisture stop seal ring 21b are the same, but they may also be different.

[0057] (Modification 8) Figure 11 shows the seal ring 21 of Modification 8 according to the embodiment.

[0058] As shown in Figure 11, in Modification 8, the seal ring 21 has the same configuration as in Modification 7. However, in Modification 8, the moisture stop seal ring 21b includes a mark 30 and a mark area 40.

[0059] According to modification 8, as described above, the degree of freedom in arranging mounted objects such as the mark 30 can be improved. Furthermore, by configuring the seal ring 21 with a crack-stop seal ring 21a and a moisture-stop seal ring 21b, it is possible to reliably prevent cracks and moisture from entering the inside of the ring.

[0060] In Modification 8, as in Modification 7, the marks 30 and mark area 40 are provided only on the moisture stop seal ring 21b, but as in Modification 7, they may be provided on both the crack stop seal ring 21a and the moisture stop seal ring 21b. Also, as in Modification 7, the shapes of both the crack stop seal ring 21a and the moisture stop seal ring 21b are the same, but they may be different.

[0061] <1-4. Modified Marks> Modified marks of the mark 30 according to the embodiment will be described with reference to Figures 12 to 17 (each plan view or each cross-sectional view).

[0062] (Modification 1) Figure 12 shows the mark 30 of Modification 1 according to the embodiment.

[0063] As shown in Figure 12, in Modification 1, mark 30 is a BIB (Bir in Bir) superimposed mark. Mark 30 is composed of a first mark 31 and a second mark 32 located in different layers. In the example in Figure 12, each of the first mark 31 and the second mark 32 is formed by four bars arranged in a ring. The size of the first mark 31 is larger than the size of the second mark 32, and the first mark 31 is provided so as to surround the second mark 32.

[0064] According to Modification 1, as described above, the degree of freedom in arranging mounted objects such as Mark 30 can be improved. In addition, superimposed marks of BIB can be used as Mark 30.

[0065] (Modification 2) Figure 13 shows the mark 30 of Modification 2 according to the embodiment.

[0066] As shown in Figure 13, in the modified example 2, the mark 30 is a fine-type superimposed mark. A fine-type superimposed mark is a superimposed mark with higher precision than, for example, a BIB (Band-In-Block) superimposed mark. The mark 30 is composed of a first mark 31 and a second mark 32 located in different layers. In the example in Figure 13, each of the first mark 31 and the second mark 32 is formed by arranging sets of six bars in the X-axis direction and sets of six bars in the Y-axis direction in a windmill-like configuration.

[0067] According to Modification 2, as described above, the degree of freedom in arranging mounted objects such as the Mark 30 can be improved. Furthermore, a fine-type overlapping mark can be used as the Mark 30.

[0068] (Modification 3) Figure 14 shows the mark 30 of Modification 3 according to the embodiment. In the example of Figure 14, the upper figure is a plan view and the lower figure is a cross-sectional view.

[0069] As shown in Figure 14, in Modification 3, mark 30 is an overlapping mark. The overlapping mark is composed of a first mark 31 and a second mark 32 located in different layers. The first mark 31 is provided in the third mark area 43 of the third layer (layer A), and the second mark 32 is provided in the fourth mark area 44 of the fourth layer (layer B). The seal ring 21 is constructed by stacking the third seal ring 27, the fourth seal ring 28, the first seal ring 25, and the second seal ring 26 in the order they are described.

[0070] According to the third modification, as described above, the degree of freedom in arranging mounted objects such as the mark 30 can be improved. Furthermore, the mark 30 can be composed of other layers besides the first and second layers, namely the first mark 31 provided in the third mark area 43 of the third layer (layer A) and the second mark 32 provided in the fourth mark area 44 of the fourth layer (layer B).

[0071] In the modified example 3, the seal ring 21 is constructed by stacking four seal rings 25 to 28: the first seal ring 25, the second seal ring 26, the third seal ring 27, and the fourth seal ring 28. However, it may also be constructed by stacking three or five seal rings.

[0072] Furthermore, in the modified example 3, the mark 30 is composed of a first mark 31 and a second mark 32, that is, two marks 31-32, but it may also be composed of three or five marks, or the like.

[0073] (Modification 4) Figure 15 shows the mark 30 of Modification 4 according to the embodiment. In the example of Figure 15, the upper figure is a plan view and the lower figure is a cross-sectional view.

[0074] As shown in Figure 15, in Modification 4, the mark 30 is an overlapping mark, and a solid pattern 33 is provided directly beneath the mark 30. The overlapping mark is composed of a first mark 31 and a second mark 32 located in different layers. The first mark 31 is provided in the first mark area 41 of the first layer (layer 1), and the second mark 32 is provided in the second mark area 42 of the second layer (layer 2). The seal ring 21 is constructed by stacking the third seal ring 27, the fourth seal ring 28, the first seal ring 25, and the second seal ring 26 in the order they are described.

[0075] The solid pattern 33 is located in the fourth mark area 44 of the fourth layer (layer B), not in the third mark area 43 of the third layer (layer A). The solid pattern 33 is a pattern (a pattern for improving visibility) that makes the mark 30 easier to detect. For example, the solid pattern 33 is a uniform pattern that makes the mark 30 stand out. By placing a uniform pattern beneath the mark 30, visibility is improved compared to when there is some kind of non-uniform pattern beneath the mark 30.

[0076] According to Modification 4, as described above, the degree of freedom in arranging mounted objects such as the mark 30 can be improved. Furthermore, by providing a solid pattern 33 in the fourth mark region 44 of a layer lower than the first and second layers (for example, layer B), reliable detection of the mark 30 can be achieved.

[0077] In Example 4, similar to Example 3, the seal ring 21 is constructed by stacking four seal rings 25 to 28: the first seal ring 25, the second seal ring 26, the third seal ring 27, and the fourth seal ring 28. However, it may also be constructed by stacking three or five seal rings.

[0078] Furthermore, in Example 4, similar to Example 3, the mark 30 is composed of a first mark 31 and a second mark 32, that is, two marks 31-32, but it may also be composed of three or five marks, etc.

[0079] (Modification 5) Figure 16 shows the mark 30 of Modification 5 according to the embodiment.

[0080] As shown in Figure 16, in Modification 5, mark 30 is a single-layer mark, not an overlapping mark. This mark 30 includes three marks 35, 36, and 37 that are in the same layer. Mark 30 is, for example, a CD (Critical Dimension) measurement pattern. The seal ring 21 is composed of a single-layer first seal ring 25.

[0081] According to Modification 5, as described above, the degree of freedom in arranging mounted objects such as the mark 30 can be improved. In addition, the mark 30 can be formed in a single layer.

[0082] (Modification 6) Figure 17 shows the mark 30 of Modification 6 according to the embodiment.

[0083] As shown in Figure 17, in Modification 6, the seal ring 21 includes a plurality of marks 30 and a plurality of mark regions 40. A mark 30 is provided for each mark region 40. The marks 30 are composed of, for example, a first mark 31 and a second mark 32 that are located in different layers. The other marks 30 are composed of, for example, three marks 35, 36, and 37 that are located in the same layer or in different layers. The seal ring 21 is composed of a first seal ring 25 and a second seal ring 26.

[0084] According to modification 5, as described above, the degree of freedom in arranging mounted objects such as the marks 30 can be improved. Furthermore, it is possible to provide multiple marks 30 on the seal ring 21, thereby reliably improving the degree of freedom in arranging mounted objects such as the marks 30.

[0085] <1-5. Overview> As described above, the semiconductor device 11 according to the embodiment is equipped with a seal ring 21 surrounding the outer circumference, and the seal ring 21 has a mark area 40, and a mark 30 is provided in the mark area 40 (see Figures 1 to 3). As a result, by utilizing a part of the seal ring 21 as the mark area 40, it becomes possible to place various marks 30 such as lithographic marks on the seal ring 21, thereby improving the degree of freedom in placing mounted objects such as marks 30.

[0086] Furthermore, the separation distance L1 (or separation distance L2) between the outer circumference of the mark 30 and the outer circumference of the mark area 40 may be 1 μm or more (see Figure 3). This reliably improves the degree of freedom in the placement of mounted objects such as the mark 30.

[0087] Furthermore, mark 30 may be a process mark (for example, an overlap mark) for measuring the overlap misalignment of the layers (see Figures 2 and 3, etc.). This improves the degree of freedom in placing the marks for measuring the overlap misalignment of the layers.

[0088] Furthermore, the process marks may also be process marks for measuring line width (for example, CD length measurement patterns) (see Figure 16). This improves the flexibility in the placement of marks for measuring line width.

[0089] Furthermore, the process marks may also be alignment marks (for example, alignment marks 101) (see Figure 2). This improves the degree of freedom in placing the alignment marks 101.

[0090] Furthermore, the seal ring 21 may include a line material 50, and the mark area 40 may be surrounded by the line material 50 (see Figures 3 and 4). This ensures that the seal ring 21 is not divided by the mark area 40, thereby reliably preventing cracks and / or moisture from entering the inside of the ring.

[0091] Furthermore, the seal ring 21 may include a line material 50, and the line material 50 may be divided by the mark area 40 (see Figures 5 and 6). This makes it possible to widen the mark area 40, further improving the degree of freedom in arranging mounted objects such as marks.

[0092] Furthermore, the frame width L4 of the seal ring 21 may be wider than the width L3 of the mark area 40 (see Figure 7). This makes it possible to widen the frame width L4 of the seal ring 21, which can reliably prevent cracks and / or moisture from entering the inside of the ring.

[0093] Furthermore, the frame width L4 of the seal ring 21 may be narrower than the width L3 of the mark area 40 (see Figures 8 and 9). This makes it possible to narrow the frame width L4 of the seal ring 21, thereby reducing the installation area of ​​the seal ring 21.

[0094] Furthermore, the seal ring 21 includes a first seal ring (e.g., a crack stop seal ring 21a) and a second seal ring located inside the first seal ring (e.g., a moisture stop seal ring 21b), and the mark area 40 may be provided on one or both of the first and second seal rings (see Figures 10 and 11). This ensures that the degree of freedom in arranging the mounted objects such as the mark 30 is improved.

[0095] Furthermore, the first seal ring may be a crack-stop seal ring 21a that prevents cracks from entering the inside of the ring, and the second seal ring may be a moisture-stop seal ring 21b that prevents moisture from entering the inside of the ring (see Figures 10 and 11). This ensures that both or either cracks and moisture can be prevented from entering the inside of the ring.

[0096] Furthermore, the seal ring 21 is composed of multiple stacked seal rings (for example, a first seal ring 25 and a second seal ring 26), each of which has a mark area (for example, a first mark area 41 and a second mark area 42), and the multiple seal rings are stacked so that the positions of the mark areas of each seal ring coincide, and the mark 30 may be composed of multiple marks (for example, a first mark 31 and a second mark 32) provided in two or more of the mark areas of each seal ring (see Figures 3, 14, and 15). This makes it possible to realize an overlapping mark as the mark 30.

[0097] Furthermore, the aforementioned plurality of seal rings may include a first seal ring 25 and a second seal ring 26, the first seal ring 25 having a first mark area 41, and the second seal ring 26 having a second mark area 42, and the aforementioned plurality of marks may include a first mark 31 provided in the first mark area 41 and a second mark 32 provided in the second mark area 42 (see Figures 3 and 15). This ensures that overlapping marks can be reliably realized as the mark 30.

[0098] Furthermore, a solid pattern 33 may be provided in mark areas located below the first mark area 41 and the second mark area 42 (for example, the fourth mark area 44) (see Figure 15). This makes the mark 30 more prominent, thereby enabling reliable detection of the mark 30.

[0099] Furthermore, the seal ring 21 may be composed of a single layer (see Figure 16). This simplifies the device configuration.

[0100] Furthermore, multiple mark regions 40 may be provided, and a mark 30 may be provided for each mark region 40 (see Figures 2 and 17). This reliably improves the degree of freedom in arranging mounted objects such as marks 30.

[0101] Furthermore, the type of each mark 30 in each mark area 40 may be the same (see Figure 2). This reliably improves the degree of freedom in arranging mounted objects such as marks 30.

[0102] Furthermore, the type of mark 30 in each mark area 40 may be different (see Figure 17). This reliably improves the degree of freedom in arranging mounted objects such as marks 30.

[0103] <2. Other Embodiments> The configurations and processes described in the above-described embodiments (including examples and modifications) may be implemented in various other forms besides those described above. For example, the configurations and processes may be in various forms, not limited to the examples described above. Also, for example, the configurations, processing procedures, specific names, and information including various data and parameters shown in the above document and drawings may be changed at will unless otherwise specified.

[0104] Furthermore, the configurations and processes described in the above-mentioned embodiments (including examples and modifications) do not necessarily have to be physically configured as shown in the figures. In other words, the specific forms of distribution and integration of each configuration and process are not limited to those shown in the figures, and all or part of them may be functionally or physically distributed and integrated in any unit depending on various loads and usage conditions.

[0105] Furthermore, the various configurations and processes described in the above-mentioned embodiments (including examples and modifications) may be combined as appropriate. For example, at least a part of one embodiment may be combined with at least a part of another embodiment as appropriate. Also, the effects described in the embodiments are merely illustrative and not limiting, and other effects may also occur.

[0106] <3. Application Examples> <3-1. Various Devices> Application examples of the semiconductor device 11 described above will be explained with reference to Figure 18. Figure 18 is a diagram showing application examples of the semiconductor device 11 described above. The semiconductor device 11 may be applied to various cases such as the following, i.e., various devices (an example of electronic equipment).

[0107] As shown in Figure 18, the semiconductor device 11 can be used in, for example, "devices that capture images for viewing purposes, such as digital cameras and portable devices with camera functions," "devices used for traffic purposes, such as in-vehicle sensors that capture images of the front, rear, surroundings, and interior of a vehicle for safe driving such as automatic stopping and recognition of the driver's condition, surveillance cameras that monitor moving vehicles and roads, and distance measuring sensors that measure distances between vehicles," "devices used in home appliances such as TVs, refrigerators, and air conditioners to capture user gestures and perform device operations according to those gestures," "devices used for medical and healthcare purposes, such as endoscopes and devices that perform angiography by receiving infrared light," "devices used for security purposes, such as surveillance cameras for crime prevention and cameras for person recognition," "devices used for beauty purposes, such as skin measuring devices that capture images of the skin and microscopes that capture images of the scalp," "devices used for sports purposes, such as action cameras and wearable cameras for sports use," and "devices used for agriculture, such as cameras for monitoring the condition of fields and crops."

[0108] Furthermore, the technology disclosed herein can be applied to a variety of products. For example, the technology disclosed herein may be implemented as electronic equipment mounted on any type of mobile device, such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, robots, construction machinery, or agricultural machinery (tractors). Alternatively, for example, the technology disclosed herein may be implemented as electronic equipment mounted on endoscopic surgical systems or microsurgical systems.

[0109] <3-2. Imaging Device> The imaging device 1000 according to the application example will be described with reference to Figure 19. Figure 19 is a diagram showing an example configuration of the imaging device 1000 according to the application example. This imaging device 1000 is an example of an electronic device to which the semiconductor device 11 described above is applied. Examples of imaging devices 1000 include digital still cameras, video cameras, smartphones and mobile phones with imaging functions, and other electronic devices.

[0110] As shown in Figure 19, the imaging device 1000 includes an optical system 1001, a shutter device 1002, an image sensor (solid-state imager) 1003, a control circuit (drive circuit) 1004, a signal processing circuit 1005, a monitor 1006, and a memory 1007. This imaging device 1000 is capable of capturing both still and moving images.

[0111] The optical system 1001 has one or more lenses. This optical system 1001 guides light from the subject (incident light) to the image sensor 1003 and forms an image on the light-receiving surface of the image sensor 1003.

[0112] The shutter device 1002 is positioned between the optical system 1001 and the image sensor 1003. The shutter device 1002 controls the light illumination period and the light shielding period for the image sensor 1003 according to the control of the control circuit 1004.

[0113] The image sensor 1003 accumulates signal charge for a certain period of time in response to light that is imaged onto the light-receiving surface via the optical system 1001 and shutter device 1002. The signal charge accumulated in the image sensor 1003 is transferred according to a drive signal (timing signal) supplied from the control circuit 1004.

[0114] The control circuit 1004 drives the image sensor 1003 and the shutter device 1002 by outputting drive signals that control the transfer operation of the image sensor 1003 and the shutter operation of the shutter device 1002.

[0115] The signal processing circuit 1005 performs various signal processing operations on the signal charge output from the image sensor 1003. The image (image data) obtained by the signal processing circuit 1005 is supplied to the monitor 1006 and also to the memory 1007.

[0116] The monitor 1006 displays a video or still image captured by the image sensor 1003 based on image data supplied from the signal processing circuit 1005. For example, the monitor 1006 may be a panel-type display device such as a liquid crystal panel or an organic EL (Electro-Luminescence) panel.

[0117] The memory 1007 stores image data supplied from the signal processing circuit 1005, that is, image data of moving or still images captured by the image sensor 1003. Various types of memory can be used as the memory 1007.

[0118] Even in an imaging device 1000 with this configuration, the same effects as in the above-described embodiment can be obtained by applying the aforementioned semiconductor device 11.

[0119] <3-3. Distance Measuring Device> The distance measuring device 2000 according to the application example will be described with reference to Figure 20. Figure 20 is a diagram showing an example configuration of the distance measuring device 2000 according to the application example. This distance measuring device 2000 is an example of an electronic device to which the semiconductor device 11 described above is applied.

[0120] As shown in Figure 20, the distance measuring device (distance image sensor) 2000 comprises a light source unit 2001, an optical system 2002, an image sensor (solid-state imager) 2003, a control circuit (drive circuit) 2004, a signal processing circuit 2005, a monitor 2006, and a memory 2007. This distance measuring device 2000 projects light from the light source unit 2001 toward the subject and receives the light (modulated light or pulsed light) reflected from the surface of the subject, thereby acquiring a distance image corresponding to the distance to the subject.

[0121] The light source unit 2001 projects light toward the subject. Examples of light sources used for the light source unit 2001 include a vertical cavity surface-emitting laser (VCSEL) array that emits laser light as a surface light source, and a laser diode array in which laser diodes are arranged in a line. The laser diode array is supported by a predetermined drive unit and scanned in a direction perpendicular to the arrangement of the laser diodes.

[0122] The optical system 2002 has one or more lenses. This optical system 2002 guides light from the subject (incident light) to the image sensor 2003 and forms an image on the light-receiving surface (sensor part) of the image sensor 2003.

[0123] The image sensor 2003 accumulates signal charge in response to light formed on the light-receiving surface via the optical system 2002. A distance signal indicating the distance, determined from the light-receiving signal (APD OUT) output from the image sensor 2003, is supplied to the signal processing circuit 2005.

[0124] The control circuit 2004 outputs drive signals (control signals) that control the operation of the light source unit 2001 and the image sensor 2003, and drives the light source unit 2001 and the image sensor 2003.

[0125] The signal processing circuit 2005 performs various signal processing operations on the distance signal supplied from the image sensor 2003. For example, the signal processing circuit 2005 performs image processing (e.g., histogram processing and peak detection processing) to construct a distance image based on the distance signal. The image (image data) obtained by the signal processing circuit 2005 is supplied to the monitor 2006 and also to the memory 2007.

[0126] The monitor 2006 displays the distance image captured by the image sensor 2003 based on the image data supplied from the signal processing circuit 2005. For example, a panel-type display device such as a liquid crystal panel or an organic EL panel can be used as the monitor 2006.

[0127] The memory 2007 stores image data supplied from the signal processing circuit 2005, that is, image data of the distance image captured by the image sensor 2003. Various types of memory can be used as the memory 2007.

[0128] Even in a distance measuring device 2000 with this configuration, the same effects as in the above-described embodiment can be obtained by applying the semiconductor device 11 described above.

[0129] As described above, the aforementioned semiconductor device 11 can be mounted on various electronic devices. For example, in addition to the imaging device 1000 and the distance measuring device 2000, the aforementioned semiconductor device 11 may be mounted on various electronic devices such as notebook PCs (Personal Computers), mobile devices (e.g., smartphones and tablet PCs), PDAs (Personal Digital Assistants), wearable devices, game consoles, and music players.

[0130] <4. Addendum> The technology can also be configured as follows: (1) A semiconductor device comprising a seal ring surrounding the outer circumference, wherein the seal ring has a mark region, and a mark is provided in the mark region. (2) The semiconductor device according to (1), wherein the distance between the outer circumference of the mark and the outer circumference of the mark region is 1 μm or more. (3) The semiconductor device according to (1), wherein the mark is a process mark for measuring the overlap misalignment of layers. (4) The semiconductor device according to (1), wherein the mark is a process mark for measuring the line width. (5) The semiconductor device according to (1), wherein the mark is a process mark for alignment. (6) The semiconductor device according to any one of (1) to (5), wherein the seal ring includes a line material, and the mark region is surrounded by the line material. (7) The semiconductor device according to any one of (1) to (5), wherein the seal ring includes a line material, and the line material is divided by the mark region. (8) The semiconductor device according to any one of (1) to (7), wherein the frame width of the seal ring is wider than the width of the mark area. (9) The semiconductor device according to any one of (1) to (7), wherein the frame width of the seal ring is narrower than the width of the mark area. (10) The semiconductor device according to any one of (1) to (9), wherein the seal ring includes a first seal ring and a second seal ring located inside the first seal ring, and the mark area is provided on one or both of the first seal ring and the second seal ring. (11) The semiconductor device according to (10), wherein the first seal ring is a crack-stop seal ring that prevents cracks from entering the inside of the ring, and the second seal ring is a moisture-stop seal ring that prevents moisture from entering the inside of the ring.(12) The semiconductor device according to any one of (1) to (11), wherein the seal ring is composed of a plurality of stacked seal rings, each of the plurality of seal rings having the mark region, and the positions of the mark regions of each seal ring are aligned, and the mark is composed of a plurality of marks provided in two or more of the mark regions of each seal ring. (13) The semiconductor device according to (12), wherein the plurality of seal rings include a first seal ring and a second seal ring, the first seal ring having a first mark region, the second seal ring having a second mark region, and the plurality of marks including a first mark provided in the first mark region and a second mark provided in the second mark region. (14) The semiconductor device according to (13), wherein a solid pattern is provided in the mark region located in a lower layer than the first mark region and the second mark region. (15) The semiconductor device according to any one of (1) to (11), wherein the seal ring is composed of a single layer. (16) A semiconductor device according to any one of (1) to (11), wherein a plurality of mark regions are provided, and a mark is provided in each of the mark regions. (17) A semiconductor device according to (16), wherein the type of each mark in each of the mark regions is the same. (18) A semiconductor device according to (16), wherein the type of each mark in each of the mark regions is different. (19) An electronic device comprising a semiconductor device, wherein the semiconductor device comprises a seal ring surrounding its outer circumference, the seal ring has a mark region, and a mark is provided in the mark region. (20) A method for manufacturing a semiconductor device, comprising providing a mark in the mark region of a seal ring surrounding the outer circumference of a semiconductor device. (21) An electronic device comprising a semiconductor device according to any one of (1) to (18). (22) A method for manufacturing a semiconductor device, comprising manufacturing a semiconductor device according to any one of (1) to (18).

[0131] 10 Wafer 11 Semiconductor device 20 Scribe area 21 Seal ring 21a Crux stop seal ring 21b Moisture stop seal ring 22 Lithomark area 25 First seal ring 26 Second seal ring 27 Third seal ring 28 Fourth seal ring 30 Mark 31 First mark 32 Second mark 33 Solid pattern 35 Mark 36 Mark 37 Mark 40 Mark area 41 First mark area 42 Second mark area 43 Third mark area 44 Fourth mark area 50 Line material 51 First line material 52 Second line material 101 Alignment mark 102 Mark L1 Separation distance L2 Separation distance L3 Width L4 Frame width

Claims

1. A semiconductor device comprising a sealing ring surrounding its outer circumference, wherein the sealing ring has a marking area, and a mark is provided in the marking area.

2. The separation distance between the outer periphery of the mark and the outer periphery of the mark region is 1 μm or more, according to claim 1.

3. The semiconductor device according to claim 1, wherein the mark is a process mark for measuring the misalignment of layers.

4. The semiconductor device according to claim 1, wherein the mark is a process mark for measuring line width.

5. The semiconductor device according to claim 1, wherein the mark is a process mark for alignment.

6. The semiconductor device according to claim 1, wherein the sealing ring includes a line material, and the mark area is surrounded by the line material.

7. The semiconductor device according to claim 1, wherein the sealing ring includes a line material, and the line material is divided by the mark region.

8. The semiconductor device according to claim 1, wherein the frame width of the seal ring is wider than the width of the mark area.

9. The semiconductor device according to claim 1, wherein the frame width of the seal ring is narrower than the width of the mark area.

10. The semiconductor device according to claim 1, wherein the seal ring includes a first seal ring and a second seal ring located inside the first seal ring, and the mark area is provided on one or both of the first seal ring and the second seal ring.

11. The semiconductor device according to claim 10, wherein the first seal ring is a crack-stop seal ring that prevents cracks from entering the inside of the ring, and the second seal ring is a moisture-stop seal ring that prevents moisture from entering the inside of the ring.

12. The semiconductor device according to claim 1, wherein the seal ring is composed of a plurality of stacked seal rings, each of the plurality of seal rings has the mark region, and the seal rings are stacked such that the positions of the mark regions of each seal ring coincide, and the mark is composed of a plurality of marks provided in two or more of the mark regions of each seal ring.

13. The semiconductor device according to claim 12, wherein the plurality of seal rings include a first seal ring and a second seal ring, the first seal ring having a first mark region, the second seal ring having a second mark region, and the plurality of marks including a first mark provided in the first mark region and a second mark provided in the second mark region.

14. The semiconductor device according to claim 13, wherein a solid pattern is provided in the mark region located below the first mark region and the second mark region.

15. The semiconductor device according to claim 1, wherein the seal ring is composed of a single layer.

16. The semiconductor device according to claim 1, wherein a plurality of mark regions are provided, and the marks are provided for each of the mark regions.

17. The semiconductor device according to claim 16, wherein each of the marks in each of the mark regions is the same.

18. The semiconductor device according to claim 16, wherein each of the marks in each of the mark regions is of a different type.

19. Electronic device comprising a semiconductor device, wherein the semiconductor device comprises a seal ring surrounding its outer circumference, the seal ring has a mark area, and a mark is provided in the mark area.

20. A method for manufacturing a semiconductor device, comprising providing a mark in the mark area of ​​a seal ring surrounding the outer periphery of the semiconductor device.

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