Board inspection method and board inspection jig

Abstract

The present invention easily identifies, through a simple configuration, abnormal internal wiring included in a printed wiring board.　This substrate inspection method includes: a first wiring step S11 for electrically connecting, in series using FPCs 21A, 21B, at least two or more internal wirings that form a through-hole extending from one surface 200A of a PCB 20 to the other surface 200B through the interior of the PCB 20 to form a first wiring pattern; a first measurement step S12 for measuring the resistance value R of the first wiring pattern; a second wiring step S14 for forming, using FPCs 21G, 21H, a second wiring pattern including at least one or more internal wirings included in the first wiring pattern; a second measurement step S15 for measuring the resistance value R of the second wiring pattern; and an identification step S18 for identifying an abnormal internal wiring on the basis of a measurement result from the first measurement step and a measurement result from the second measurement step.

Description

Substrate Inspection Method and Substrate Inspection Jig

[0001] The present invention relates to an inspection method and a substrate inspection jig for inspecting conduction and insulation of internal wiring by forming a daisy chain on a printed wiring board.

[0002] With the increase in the number of components mounted on printed wiring boards used in electrical equipment and the like, the number of internal wirings and mounting terminals provided on printed wiring boards has also increased, and the density of mounting terminals on the surface of printed wiring boards has been increasing. When inspecting internal wirings and mounting terminals, a method of checking insulation and conduction for each internal wiring using a probe is generally used.

[0003] As the density of printed wiring boards increases, the size of mounting terminals becomes smaller, making it difficult to cope with conventional probes. In contrast, in the semiconductor structure of Patent Document 1, two sets of daisy chains are formed for a test circuit, and short circuits of the two sets of daisy chains are checked simultaneously to identify the short-circuit location.

[0004] Japanese National Publication of International Patent Application No. 2015-532420

[0005] The semiconductor structure of Patent Document 1 requires a switching circuit for checking short circuits in the daisy chain, and the switch switching process is repeated until a short-circuit location is found, so it is expected that the time required to identify the short-circuit location will be prolonged.

[0006] The present invention has been made in view of the above problems, and aims to provide a substrate inspection method and a substrate inspection jig that can easily identify abnormal internal wiring included in a printed wiring board with a simple configuration.

[0007] The invention made to solve the above problems provides a printed circuit board having a plurality of internal wirings, each of which is conductive and extending from one side of the printed circuit board through the interior of the printed circuit board to the other side facing the opposite side, and comprises a first wiring step of electrically connecting at least two of the internal wirings in series with conductive first external wirings and second external wirings provided on a first wiring board covering one side of the printed circuit board and a second wiring board covering the other side, respectively, to form a first wiring pattern; a first measurement step of measuring the resistance value of the first wiring pattern; and one or more of the internal wirings included in the first wiring pattern and one or more other internal wirings. The substrate inspection method includes: a second wiring step of electrically connecting internal wiring and a third external wiring and a fourth external wiring, which are provided on a third wiring board covering one side of the printed wiring board and a fourth wiring board covering the other side, respectively, to form a second wiring pattern different from the first wiring pattern; a second measurement step of measuring the resistance value of the second wiring pattern; and a identification step of identifying an abnormal internal wiring from among the plurality of internal wirings based on the measurement results of the first measurement step and the measurement results of the second measurement step, wherein the internal wiring forms a through hole that penetrates the printed wiring board in a straight line from one side to the other side.

[0008] In the substrate inspection method of the present invention, it is preferable that the through holes are arranged in a four-fold rotationally symmetrical manner on the printed wiring board, the third wiring board is the first wiring board whose orientation relative to the printed wiring board is changed by a quarter rotation from the first wiring step, and the fourth wiring board is the second wiring board whose orientation relative to the printed wiring board is changed by a quarter rotation from the first wiring step in the same direction as the third wiring board.

[0009] In the substrate inspection method of the present invention, the printed wiring board has a plurality of through holes arranged in a grid pattern formed by a plurality of vertical columns and a plurality of horizontal rows, the first wiring pattern is formed by connecting all the through holes in series in each of the plurality of horizontal rows, the second wiring pattern is formed by connecting all the through holes in series in each of the plurality of vertical columns, and it is preferable that the spacing between the vertical columns and the spacing between the horizontal rows of the plurality of internal wirings are the same in the printed wiring board.

[0010] In the substrate inspection method of the present invention, a first conversion board is provided between the printed wiring board and the first wiring board and between the printed wiring board and the third wiring board for converting the arrangement of the ends of the internal wiring on one side of the printed wiring board, the first conversion board includes a plurality of first conversion wires that penetrate from the side of the first conversion board facing the printed wiring board to the side of the first wiring board or the side of the third wiring board, respectively, connecting the plurality of internal wiring to the plurality of first external wiring or the plurality of third external wiring, the arrangement of the ends of the plurality of first conversion wires on the side facing the printed wiring board corresponds to the plurality of internal wiring, and the arrangement of the ends of the plurality of first conversion wires on the side facing the first wiring board or the third wiring board is four-fold rotationally symmetrical. The present invention provides a second conversion board between the printed circuit board and the second wiring board and between the printed circuit board and the fourth wiring board, which converts the arrangement of the ends of the internal wirings on the other side of the printed circuit board, and the second conversion board includes a plurality of second conversion wires that penetrate from the side of the second conversion board facing the printed circuit board to the side of the second wiring board or the side of the fourth wiring board, respectively, connecting the plurality of internal wirings to the plurality of second external wirings or the plurality of fourth external wirings, and the arrangement of the ends of the plurality of second conversion wires on the side of the printed circuit board preferably corresponds to the plurality of internal wirings, and the arrangement of the ends of the plurality of second conversion wires on the side of the second wiring board or the fourth wiring board preferably has four-fold rotational symmetry.

[0011] In the substrate inspection method of the present invention, the measurement of resistance values ​​in the first measurement step and the second measurement step is preferably a measurement of resistance values ​​by two-terminal measurement, a measurement of resistance values ​​between two adjacent external wirings by pseudo-four-terminal measurement, or a measurement of resistance values ​​for each internal wiring by four-terminal measurement.

[0012] The invention made to solve the above problems is a circuit board inspection jig that includes a printed circuit board having a plurality of internal wirings, each of which is conductive, extending from one side of the printed circuit board through the interior of the printed circuit board to the other side facing the opposite side, a first wiring board and a second wiring board each having conductive first external wirings and second external wirings that cover the one side and the other side of the printed circuit board, respectively, and that form a first wiring pattern by electrically connecting at least two of the internal wirings in series, and a third wiring board and a fourth wiring board each having conductive third external wirings and fourth external wirings that cover the one side and the other side of the printed circuit board, respectively, and that form a second wiring pattern different from the first wiring pattern by electrically connecting one or more of the internal wirings included in the first wiring pattern and one or more other internal wirings in series, wherein the internal wirings form through holes that penetrate the printed circuit board linearly from one side to the other side.

[0013] In the substrate inspection jig of the present invention, the through holes are preferably arranged in a four-fold rotational symmetric arrangement on the printed circuit board, the third wiring board is the first wiring board whose orientation relative to the printed circuit board is changed by a quarter rotation from the orientation in which the first wiring pattern is formed, and the fourth wiring board is the second wiring board whose orientation relative to the printed circuit board is changed by a quarter rotation from the orientation in which the first wiring pattern is formed in the same direction as the third wiring board.

[0014] In the substrate inspection jig of the present invention, a first conversion board is provided between the printed circuit board and the first wiring board and between the printed circuit board and the third wiring board for converting the arrangement of the ends of the internal wiring on one side of the printed circuit board, the first conversion board includes a plurality of first conversion wires that penetrate from the side of the first conversion board facing the printed circuit board to the side of the first wiring board or the side of the third wiring board, connecting the plurality of internal wiring to the plurality of first external wiring or the plurality of third external wiring, the arrangement of the ends of the plurality of first conversion wires on the side facing the printed circuit board corresponds to the plurality of internal wiring, and the arrangement of the ends of the plurality of first conversion wires on the side facing the first wiring board or the third wiring board is rotationally symmetrical four times. The present invention provides a second conversion board between the printed circuit board and the second wiring board and between the printed circuit board and the fourth wiring board, which converts the arrangement of the ends of the internal wirings on the other side of the printed circuit board, and the second conversion board includes a plurality of second conversion wires that penetrate from the side of the second conversion board facing the printed circuit board to the side of the second wiring board or the side of the fourth wiring board, respectively, connecting the plurality of internal wirings to the plurality of second external wirings or the plurality of fourth external wirings, and the arrangement of the ends of the plurality of second conversion wires on the side of the printed circuit board preferably corresponds to the plurality of internal wirings, and the arrangement of the ends of the plurality of second conversion wires on the side of the second wiring board or the fourth wiring board preferably has four-fold rotational symmetry.

[0015] According to the present invention, it is possible to easily identify abnormal internal wiring contained in a printed circuit board with a simple configuration.

[0016] This is a block diagram showing a comparative example of the substrate inspection system according to the first embodiment of the present invention. This is a diagram showing an example of a printed circuit board used in the substrate inspection system. This is a block diagram showing the substrate inspection system according to the first embodiment of the present invention. This is a schematic diagram showing the structure of the first wiring pattern. This is a table showing an example of path information related to the first wiring pattern. This is a block diagram showing the substrate inspection system with a second wiring pattern formed on it. This is a schematic diagram showing the structure of the second wiring pattern. This is a table showing an example of path information related to the second wiring pattern. This is a flowchart showing the substrate inspection method according to the first embodiment of the present invention. This shows another example of a printed circuit board used in the substrate inspection system. This shows another example of a printed circuit board used in the substrate inspection system. This is a block diagram showing a pseudo-four-terminal measurement in modified example 1 of the substrate inspection system according to the first embodiment of the present invention. This is a block diagram showing a four-terminal measurement in modified example 2 of the substrate inspection system according to the first embodiment of the present invention. This is a cross-sectional view showing a printed circuit board that is the target of inspection in modified example 3 of the substrate inspection system. This is a diagram schematically showing the first wiring step of the substrate inspection method according to the second embodiment. This is a diagram showing an example of a conversion board according to the second embodiment. This is a diagram showing another example of a conversion board according to the second embodiment.

[0017] [First Embodiment] Hereinafter, the first embodiment of the present invention will be described in detail with reference to the drawings as appropriate, in comparison with examples that the applicant has previously investigated (hereinafter referred to as "comparative examples"). However, the present invention is not limited to the following first embodiment. In the drawings, the same or corresponding parts are denoted by the same reference numerals and the description will not be repeated.

[0018] [Comparative Example] Figure 1 is a block diagram showing a comparative example of the substrate inspection system 10 according to the first embodiment of the present invention. The substrate inspection system 10A, which is a comparative example of the substrate inspection system 10, comprises an inspection device 100 and a printed wiring board (PCB) 20. The inspection device 100 inspects the PCB 20. Specifically, the inspection device 100 measures the resistance value of the internal wiring formed on the PCB 20 and determines whether the internal wiring is normal or not based on the measured resistance value.

[0019] The inspection device 100 includes one or more probes 30 connected to the PCB 20 that conduct electrical signals between the inspection device 100 and the PCB 20, a resistance measuring unit 130 that measures the resistance of the internal wiring of the PCB 20 via the probes 30, a monitor 150 that displays a screen showing various data including the measurement results of the resistance measuring unit 130, a control unit 110 that controls the resistance measuring unit 130 and the monitor 150, and a storage unit 120 that stores various data including the measurement results of the resistance measuring unit 130 and a program. The number of probes 30 is provided according to the number of internal wirings of the PCB 20. In this embodiment, as an example, a case in which 30 probes 30 are provided according to 15 internal wirings will be described. Each probe 30 is provided with a switch SW11 to S15 that switches between connecting and disconnecting the internal wiring of the PCB 20 and the resistance measuring unit 130. The switches SW11 to S15 are switching elements such as transistors, and their switching is controlled by a control signal from the control unit 110.

[0020] The control unit 110 includes a calculation unit 111 that acquires the measurement results from the resistance measurement unit 130 and performs calculation processing, a switch control unit 112 that outputs control signals to control the switching of switches SW11 to SW15, and an output unit 113 that outputs the measurement results from the resistance measurement unit 130 or the calculation results from the calculation unit 111 to the monitor 150. The control unit 110 includes a processor such as a CPU (Central Processing Unit). The storage unit 120 includes a storage device such as a hard disk drive (HDD) or semiconductor memory. The control unit 110 functions as the calculation unit 111, the switch control unit 112, and the output unit 113 by reading and executing the program in the storage unit 120.

[0021] Figure 2 shows an example of a printed circuit board (PCB) used in the board inspection system 10A. The PCB 20 includes a flat substrate 200 and internal wiring formed on at least one surface 200A of the substrate 200, the interior of the substrate 200, or the other surface 200B opposite to the surface 200A. Figure 2(a) shows one surface 200A of the substrate 200. Figure 2(b) shows a cross-section from b-b in Figure 2(a). Figure 2(c) shows a cross-section from c-c in Figure 2(a).

[0022] PCB 20 includes 15 through-hole vias V11-V15, V21-V25, and V31-V35 as internal wiring. Hereinafter, through-hole vias will be simply referred to as vias, and each via will also be referred to as via V. Via V forms a circular through-hole that penetrates the substrate 200 linearly in the thickness direction from one side 200A to the other side 200B. For example, each via V is arranged in a grid pattern formed by multiple vertical columns and multiple horizontal rows on the substrate 200. Specifically, vias V11-V15, V21-V25, and V31-V35 are each arranged in a horizontal row, while vias V11-V15, vias V21-V25, and vias V31-V35 are arranged vertically to each other. PCB 20 with vias V arranged in a grid pattern is used as an "interposer substrate" placed between a mounted substrate and mounted components.

[0023] A conductive patterned wiring Pt is formed on the wall surface of each via V. For example, as shown in Figures 2(b) and 2(c), patterned wiring Pt21 is formed on the wall surface of V21, patterned wiring Pt22 is formed on the wall surface of V22, patterned wiring Pt23 is formed on the wall surface of V23, patterned wiring Pt24 is formed on the wall surface of V24, patterned wiring Pt25 is formed on the wall surface of V25, patterned wiring Pt13 is formed on the wall surface of V13, and patterned wiring Pt33 is formed on the wall surface of V33.

[0024] In the PCB inspection system 10A, the resistance measuring unit 130 of the inspection device 100 measures the resistance value of each of the 15 vias V by two-terminal measurement. The resistance measuring unit 130 includes a constant current source PS and a voltmeter Vm. One end of 15 of the 30 probes 30 is connected in parallel to the current output terminal of the constant current source PS. The other ends of the 15 probes 30 are each connected to the end of one side 200A of the 15 vias V. On the other hand, one end of the remaining 15 probes 30 is connected in parallel to the current input terminal of the constant current source PS. The other ends of the remaining 15 probes 30 are each connected to the end of the other side 200B of the 15 vias V. In this way, in the PCB inspection system 10A, 15 loops are formed by the constant current source PS, the probes 30, the internal wiring of the PCB 20, and other probes 30.

[0025] The constant current source PS supplies a constant current to the 15 loops in accordance with the control unit 110. At this time, the switch control unit 112 outputs a control signal that connects only one of the switches SW11 to SW15 and disconnects the other 14 switches, thereby allowing current to flow to only one loop.

[0026] The voltmeter Vm is connected in parallel to the constant current source PS and measures the voltage between the current output terminal and the current input terminal of the constant current source PS. When only one of switches SW11 to SW15 is connected, the voltmeter Vm measures the voltage across one via V.

[0027] The calculation unit 111 acquires the measurement result of the voltmeter Vm and calculates the resistance value of via V based on the measurement result of the voltmeter Vm and the current supplied by the constant current source PS. By sequentially switching the switches connected by the switch control unit 112, the calculation unit 111 can calculate the resistance value of each of the 15 vias V.

[0028] The calculation unit 111 determines whether each of the 15 vias V is normal or not based on the calculated resistance values. The calculation unit 111 stores the calculated resistance values ​​of each of the 15 vias V, or the determination results for each of the 15 vias V, in the storage unit 120, or outputs them to the monitor 150 via the output unit 113.

[0029] Figure 3 is a block diagram showing a substrate inspection system 10 according to the first embodiment of the present invention. The substrate inspection system 10 comprises the same inspection device 100 as the substrate inspection system 10A and a PCB 20.

[0030] The PCB inspection system 10 differs from the PCB inspection system 10A in its inspection method. In the PCB inspection method of this embodiment used in the PCB inspection system 10, a daisy-chain DC is formed on the PCB 20 by electrically connecting multiple vias V in series, and the resistance value is measured relative to the daisy-chain DC.

[0031] [First Wiring Step] For example, on the PCB 20, a daisy chain DC11 is formed by connecting all vias V11 to V15, which are arranged in a horizontal row, in series with each other; a daisy chain DC12 is formed by connecting vias V21 to V25 in series with each other; and a daisy chain DC13 is formed by connecting vias V31 to V35 in series with each other. Daisy chains DC11, DC12, and DC13 are examples of the first wiring pattern.

[0032] Figure 4 is a schematic diagram showing the structure of the daisy chain DC12. Figure 4 shows a cross-section of Figure 2(c) when the daisy chain DC12 is formed. The daisy chain DC12 will be described as a representative example below, but since it is similar to the daisy chain DC11 and daisy chain DC13, the explanation will be omitted. For example, the daisy chain DC12 is formed from a PCB 20 and flexible printed circuit boards (FPCs) 21A and 21B. Conductive pattern wiring L1 to L6 corresponding to each via of the PCB 20 are formed on the FPCs 21A and 21B.

[0033] Specifically, the FPC21A is positioned to cover one side 200A of the PCB20. The FPC21A has a pattern wiring L1 that corresponds to via V21 and connects to the end of pattern wiring Pt21 on the 200A side of one side, a pattern wiring L2 that corresponds to vias V22 and V23 and connects the end of pattern wiring Pt22 on the 200A side of one side to the end of pattern wiring Pt23 on the 200A side of one side, and a pattern wiring L3 that corresponds to vias V24 and V25 and connects the end of pattern wiring Pt24 on the 200A side of one side to the end of pattern wiring Pt25 on the 200A side of one side.

[0034] On the other hand, FPC21B is positioned to cover the other side 200B of PCB20. FPC21B has via V21 and pattern wiring L4 which corresponds to via V21 and connects the end of the other side 200B of pattern wiring Pt21 to the end of the other side 200B of pattern wiring Pt22, pattern wiring L5 which corresponds to via V23 and via V24 and connects the end of the other side 200B of pattern wiring Pt23 to the end of the other side 200B of pattern wiring Pt24, and pattern wiring L6 which corresponds to via V25 and connects to the end of the other side 200B of pattern wiring Pt25.

[0035] Therefore, by sandwiching PCB20 between FPC21A and 21B, pattern wiring L1 to L6 are connected to vias V21 to V25, forming a daisy chain DC12 that goes from pattern wiring L1 through vias V21, L4, V22, L2, V23, L5, V24, L3, and V25 to pattern wiring L6.

[0036] In addition to using FPC21A and 21B, the daisy chain DC11, DC12, and DC13 may also be formed by connecting adjacent vias V with probe pins or the like, or by connecting vias V using anisotropic conductive rubber.

[0037] [First Measurement Step] In the board inspection method of this embodiment, the resistance values ​​of each of the daisy chains DC11, DC12, and DC13 are measured. For example, as shown in Figures 3 and 4, probe 30A of the 30 probes 30 is connected to pattern wiring L1, which is one end of the daisy chain DC12. On the other hand, probe 30A of the 30 probes 30 is connected to pattern wiring L6, which is the other end of the daisy chain DC12. Therefore, when the switch control unit 112 switches only the switch SW22 connected to the daisy chain DC12 to the connected state, the voltage across both ends of the daisy chain DC12 is measured by the voltmeter Vm of the resistance measurement unit 130.

[0038] In the inspection device 100 of this embodiment, the calculation unit 111 acquires the measurement result of the voltmeter Vm and calculates the resistance value R of the daisy chain DC 12 based on the measurement result of the voltmeter Vm and the current flowing from the constant current source PS. The storage unit 120 of the inspection device 100 of this embodiment stores path information that shows the correspondence between the daisy chain DC 12 and the vias V21 to V25 included in the daisy chain DC 12. For example, the path information is generated based on the operation input to the inspection device 100.

[0039] When the calculation unit 111 calculates the resistance value R of the daisy chain DC 12, it associates the resistance value R with the path information in the storage unit 120 and updates the path information. Figure 5 is a table showing an example of path information related to the first wiring pattern. Here, for example, in the case of a daisy chain that includes a broken via V, no current flows through the daisy chain, so the resistance value R calculated by the calculation unit 111 indicates high impedance (Hi-Z). In this embodiment, as shown in Figure 5, the resistance value R of daisy chain DC 11 and daisy chain DC 12 is resistance value R1, and the resistance value R of daisy chain DC 13 is high impedance. For example, the storage unit 120 stores the reference value and error range of the resistance value R of daisy chain DC 11, DC 12, and DC 13. The resistance value R1 is assumed to be within the error range of the reference value.

[0040] The calculation unit 111 determines whether daisy chain DC11, daisy chain DC12, and daisy chain DC13 are normal or not based on the calculated resistance value R. Specifically, the calculation unit 111 refers to the storage unit 120 and compares the resistance value R1 with a reference value, determining that daisy chain DC11 and daisy chain DC12, for which a resistance value R1 was calculated, are normal, and determining that daisy chain DC13, for which a high impedance was calculated, is abnormal. The calculation unit 111 further associates the determination result with the path information in the storage unit 120 and updates the path information.

[0041] Next, in the PCB inspection method of this embodiment, daisy chains DC21, DC22, DC23, DC24, and DC25, which are different from daisy chains DC11, DC12, and DC13, are formed on the PCB20. Each of the daisy chains DC21, DC22, DC23, DC24, and DC25 is formed by electrically connecting one via V included in any of daisy chains DC11, DC12, and DC13 with one or more other via V in series. Daisy chains DC21, DC22, DC23, DC24, and DC25 are examples of second wiring patterns.

[0042] Figure 6 is a block diagram showing the board inspection system 10 with the second wiring pattern formed on it. In the PCB 20, the daisy chain DC21 is formed by connecting via V11, which is included in daisy chain DC11, via V21, which is included in another daisy chain DC12, and via V31, which is included in daisy chain DC13, in series with each other. In other words, in daisy chain DC21, only all vias V11, V21, V31, V41, and V51, which are arranged in a vertical line on the PCB 20, are connected in series with each other.

[0043] [Second Wiring Step] Similarly, daisy chain DC22 is formed by connecting via V12 included in daisy chain DC11, via V22 included in daisy chain DC12, and via V32 included in daisy chain DC13 in series with each other. Daisy chain DC23 is formed by connecting via V13 included in daisy chain DC11, via V23 included in daisy chain DC12, and via V33 included in daisy chain DC13 in series with each other. Daisy chain DC24 is formed by connecting via V14 included in daisy chain DC11, via V24 included in daisy chain DC12, and via V34 included in daisy chain DC13 in series with each other. Daisy chain DC25 is formed by connecting via V15 included in daisy chain DC11, via V25 included in daisy chain DC12, and via V35 included in daisy chain DC13 in series with each other.

[0044] FIG. 7 is a schematic diagram showing the structure of a daisy chain DC23. FIG. 4 is a cross-sectional view of FIG. 2(b) when a daisy chain DC12 is formed. Hereinafter, the daisy chain DC23 will be described as a representative example; however, descriptions of daisy chain DC21, daisy chain DC22, daisy chain DC24 and daisy chain DC25 will be omitted since they are the same as the daisy chain DC23. For example, the daisy chain DC23 is formed of a PCB 20, and FPCs 21G and 21H which are different from FPCs 21A and 21B, respectively. Conductive pattern wirings L8 to L11 corresponding to respective vias of the PCB 20 are formed on the FPCs 21G and 21H.

[0045] Specifically, the FPC 21G is disposed so as to cover one surface 200A of the PCB 20. The FPC 21G is formed with: a pattern wiring L8 that corresponds to the via V13 and is connected to an end portion of the pattern wiring Pt13 on the one surface 200A side; and a pattern wiring L9 that corresponds to the via V23 and the via V33 and connects an end portion of the pattern wiring Pt23 on the one surface 200A side to an end portion of the pattern wiring Pt33 on the one surface 200A side.

[0046] On the other hand, the FPC 21H is disposed so as to cover the other surface 200B of the PCB 20. The FPC 21H is formed with: a pattern wiring L10 that corresponds to the via V13 and the via V23 and connects an end portion of the pattern wiring Pt13 on the other surface 200B to an end portion of the pattern wiring Pt23 on the other surface 200B; and a pattern wiring L11 that corresponds to the via V33 and is connected to an end portion of the pattern wiring Pt33 on the other surface 200B.

[0047] Therefore, by sandwiching the PCB 20 between the FPCs 21G and 21H, the pattern wirings L8 to L11 are connected to the vias V13 to V33, and a daisy chain DC13 extending from the pattern wiring L8 to the pattern wiring L11 via the via V13, the pattern wiring L10, the via V23, the pattern wiring L9, and the via V33 is formed.

[0048] [Second Measurement Step] The resistance measuring unit 130 measures the voltage applied across each of the daisy chains DC21, DC22, DC23, DC24, and DC25. The arithmetic unit 111 acquires the measurement result from the resistance measuring unit 130, and calculates the resistance value R of each of the daisy chains DC21, DC22, DC23, DC24, and DC25 based on the measurement result of the resistance measuring unit 130 and the current supplied by the constant current source PS. After calculating the resistance value R of each of the daisy chains DC21, DC22, DC23, DC24, and DC25, the arithmetic unit 111 updates the route information stored in the storage unit 120 by associating the resistance value R with the route information, in the same manner as for the daisy chains DC11, DC12, and DC13. FIG. 8 is a list showing an example of route information related to the second wiring pattern. In the present embodiment, as shown in FIG. 8, it is assumed that the resistance values R of the daisy chains DC21, DC23, DC24, and DC25 are resistance values R2 that fall within the error range of the reference value, and the resistance value R of the daisy chain DC22 is high impedance. Based on the calculated resistance value R, the arithmetic unit 111 determines that the daisy chains DC21, DC23, DC24, and DC25 for which the resistance value R2 is calculated are normal, and determines that the daisy chain DC22 for which high impedance is calculated is abnormal. The arithmetic unit 111 further associates the determination result with the route information in the storage unit 120 and updates the route information.

[0049] As described above, when the first wiring pattern and the second wiring pattern are formed using four FPCs 21A, 21B, 21G, and 21H and their respective resistance values are measured, if the wiring of the measurement circuit constituting the resistance measuring unit 130 connected to the FPCs 21A and 21B and the wiring of the measurement circuit connected to the FPCs 21G and 21H are formed by wired-OR connection, the measurement circuit can be simplified. The four FPCs 21A, 21B, 21G, and 21H are an example of a substrate inspection jig.

[0050] Once the resistance measurements for the first wiring pattern and the second wiring pattern are completed, the calculation unit 111 identifies the abnormal via V based on the measurement results for the resistance measurements for the first wiring pattern and the measurement results for the resistance measurements for the second wiring pattern. Specifically, the calculation unit 111 refers to the path information in the storage unit 120 and extracts the daisy chain DC 13 and daisy chain DC 22 that have been determined to be abnormal. The calculation unit 111 identifies the via V 32 that is included in the extracted daisy chain DC 13 and daisy chain DC 22 in duplicate. The calculation unit 111 stores information indicating that the identified via V 32 is abnormal in the storage unit 120 or outputs it to the monitor 150 via the output unit 113.

[0051] As described above, in the PCB inspection method of this embodiment, two types of wiring patterns are formed for multiple internal wirings included in the PCB 20, by connecting multiple internal wirings in series while overlapping some of the internal wirings. When measuring the resistance value of multiple internal wirings individually, twice the number of probes and switches are required for each internal wiring. However, by forming two types of wiring patterns, the number of probes and switches required for measuring resistance can be reduced to the number of the larger of the two wiring patterns. As the circuit size of the PCB 20 increases and the number of internal wirings increases, the reduction in the number of probes and switches becomes greater. Furthermore, since some internal wirings overlap between the two types of wiring patterns, measuring the resistance values ​​of the two types of wiring patterns makes it easy to determine whether the overlapping internal wiring is abnormal or not. Therefore, in the PCB inspection method of this embodiment, abnormal internal wirings among the internal wirings included in the PCB can be easily identified with a simple configuration.

[0052] In particular, in a substrate where vias V are arranged in a grid pattern, such as PCB 20 in this embodiment, it is easy to form two types of wiring patterns in which some internal wiring overlaps. Specifically, by forming a first wiring pattern in which internal wiring arranged in a horizontal grid is connected in series, and a second wiring pattern in which internal wiring arranged in a vertical grid is connected in series, two types of wiring patterns can be formed with a simple trajectory.

[0053] Furthermore, in the circuit board inspection method of this embodiment, in addition to identifying a broken via V as an abnormality in internal wiring, it is also possible to identify two or more vias V that are incorrectly conducting within each daisy-chain DC. Specifically, if two or more vias V within each daisy-chain DC are incorrectly conducting, a resistance value R exceeding the error range of the reference value is measured. Therefore, vias V that are duplicated within the daisy-chain DC in which a resistance value R exceeding the error range of the reference value is measured are identified as abnormalities in internal wiring.

[0054] Figure 9 is a flowchart showing a substrate inspection method according to the first embodiment of the present invention. In the substrate inspection method of this embodiment, first, a daisy chain DC11, DC12, DC13 is formed by electrically connecting a plurality of vias V included in the PCB 20 in series ((first wiring) step S11).

[0055] The control unit 110 and the resistance measuring unit 130 measure the resistance values ​​of each of the daisy-chain DC11, DC12, and DC13 (first measurement step S12).

[0056] The control unit 110 stores the measurement results for the daisy-chain DC11, DC12, and DC13 in the storage unit 120 (step S13).

[0057] Next, a daisy chain DC21, DC22, DC23, DC24, DC25 is formed by electrically connecting some of the vias V included in the first wiring pattern with one or more other vias V from among the multiple vias V included in the PCB 20 in series ((second wiring) step S14).

[0058] The control unit 110 and the resistance measuring unit 130 measure the resistance values ​​of each of the daisy-chain DC21, DC22, DC23, DC24, and DC25 (second measurement step S15).

[0059] The control unit 110 stores the measurement results for the daisy-chain DC21, DC22, DC23, DC24, and DC25 in the storage unit 120 (step S16).

[0060] The control unit 110 determines whether there are abnormal wiring patterns in the daisy chain DC11, DC12, DC13, DC21, DC22, DC23, DC24, DC25 based on the measurement results for the daisy chain DC11, DC12, DC13, and the measurement results for the daisy chain DC21, DC22, DC23, DC24, DC25 (step S17). If there are no abnormal wiring patterns in the daisy chain DC11, DC12, DC13, DC21, DC22, DC23, DC24, DC25 (NO in step S17), the board inspection method is terminated.

[0061] If there is an abnormal wiring pattern in the daisy chain DC11, DC12, DC13, DC21, DC22, DC23, DC24, DC25 (YES in step S17), the calculation unit 111 identifies the via V that overlaps with the abnormal wiring pattern (identification step S18), and the board inspection method is completed.

[0062] In this embodiment, the PCB 20 has vias V arranged in three vertical rows and five horizontal rows, but the arrangement of vias V is not particularly limited. Figure 10 shows PCB 20A, which has a different arrangement of vias V than PCB 20. Figure 10(a) shows the formation of the first wiring pattern on PCB 20A.

[0063] As shown in Figure 10(a), PCB 20A has five vias V arranged vertically and five horizontally on PCB 20, and when forming the first wiring pattern on PCB 20A, FPCs 21C and 21D, which are the same as FPCs 21A and 21B that correspond to PCB 20, are used.

[0064] Figure 10(b) shows the formation of the second wiring pattern on PCB 20A. The arrows in Figure 10 indicate that the FPCs 21C and 21D are rotated 90 degrees (1 / 4 turn) clockwise relative to the PCB 20A which is oriented in the same direction. When forming the second wiring pattern on PCB 20A, the FPCs 21C and 21D used to form the first wiring pattern are used with their orientations changed by 90 degrees.

[0065] Thus, as in PCB 20A, when the number of vertical and horizontal vias V is equal and the spacing between them is the same, the first and second wiring patterns can be accommodated simply by changing the orientation of FPCs 21C and 21D by 90 degrees. FPCs 21C and 21D can be reused for forming the first and second wiring patterns, respectively. This reduces the number of instruments used in the board inspection method compared to PCB 20 (Figure 2), where different FPCs 21A and 21B are required for the first and second wiring patterns, as the number of vertical and horizontal vias V differs. However, even if the number of vertical and horizontal vias V differs, if FPCs 21C and 21D corresponding to the larger of the vertical and horizontal numbers are used, it is possible to use them by changing their orientation by 90 degrees when forming the first and second wiring patterns.

[0066] Furthermore, as an example of via V arrangement other than PCB 20 and PCB 20A used in this embodiment, PCB 20B is shown. Figure 11 is a diagram of PCB 20B. Figure 10(a) shows the formation of the first wiring pattern on PCB 20A.

[0067] As shown in Figure 11(a), the PCB 20B has eight vias V arranged in a 4-fold rotational symmetry such that the same arrangement appears four times during one rotation (360 degrees), and when forming the first wiring pattern on the PCB 20B, the FPC 21J and 21K corresponding to the PCB 20B are used.

[0068] Figure 10(b) shows the formation of the second wiring pattern on PCB 20B. The arrows in Figure 10 indicate that the FPCs 21J and 21K are rotated 90 degrees (1 / 4 turn) clockwise relative to the PCB 20B which is oriented in the same direction. When forming the second wiring pattern on PCB 20B, the FPCs 21J and 21K used to form the first wiring pattern are used with their orientations changed by 90 degrees.

[0069] Thus, even when vias V are arranged in a 4-fold rotationally symmetrical manner, as in PCB 20B, the first and second wiring patterns can be accommodated simply by changing the orientation of FPCs 21J and 21K by 90 degrees (1 / 4 rotation), and FPCs 21J and 21K can be reused for forming the first and second wiring patterns, respectively.

[0070] [Modification 1] Next, Modification 1 of the substrate inspection system 10 according to the first embodiment of the present invention will be described. Modification 1 of the substrate inspection system 10 is the same as the substrate inspection system 10 except that the method of measuring the resistance value of the daisy-chain DC by the inspection device 100 is different. Specifically, in Modification 1 of the substrate inspection system 10, the resistance measurement unit 130 of the inspection device 100 measures the resistance value of the daisy-chain DC by a simulated four-terminal measurement.

[0071] Figure 12 is a block diagram showing a simulated four-terminal measurement in a modified example 1 of the substrate inspection system according to the first embodiment of the present invention. Figure 12 schematically shows the resistance measurement unit 130 when performing a simulated four-terminal measurement on the daisy-chain DC 12 shown in Figure 3, etc.

[0072] In a simulated four-terminal measurement, the voltage measurement points differ from those in a two-terminal measurement. In other words, in a simulated four-terminal measurement, the method of connecting the probe 30 to the PCB 20 differs from that in a two-terminal measurement. Specifically, in a simulated four-terminal measurement, the probe 30 connected to the constant current source PS and the probe 30 connected to the voltmeter Vm are separated. The probe 30 connected to the constant current source PS is connected to pattern wiring L1 and pattern wiring L6, which are the ends of the daisy chain DC 12. The probe 30 connected to the voltmeter Vm is connected to pattern wiring L1 to L6, which are connected to the ends of vias V21 to V25, respectively. The voltmeter Vm measures the voltage between pattern wiring L1 and pattern wiring L4, between pattern wiring L4 and pattern wiring L2, between pattern wiring L2 and pattern wiring L5, between pattern wiring L5 and pattern wiring L3, and between pattern wiring L3 and pattern wiring L6, respectively.

[0073] In the case of simulated four-terminal measurement, the voltage measured is on the PCB20 side rather than the switch SW22. Therefore, the voltage measured by the voltmeter Vm is the voltage after the parasitic resistance of various components such as the switch SW22 has been removed. Thus, simulated four-terminal measurement can measure the resistance value of the daisy-chain DC12 more precisely than two-terminal measurement. In addition, while the reduction rate is smaller in the case of simulated four-terminal measurement compared to measuring the resistance values ​​of multiple internal wirings individually, the number of probes and switches required for resistance measurement can be reduced.

[0074] [Modified Version 2] Next, Modified Version 2 of the substrate inspection system 10 according to the first embodiment of the present invention will be described. Modified Version 2 of the substrate inspection system 10 is the same as the substrate inspection system 10 except that the method of measuring the resistance value of the daisy-chain DC by the inspection device 100 is different. Specifically, in Modified Version 2 of the substrate inspection system 10, the resistance measuring unit 130 of the inspection device 100 measures the resistance value of the daisy-chain DC by four-terminal measurement.

[0075] Figure 13 is a block diagram showing a four-terminal measurement in a modified example 2 of the substrate inspection system according to the first embodiment of the present invention. Figure 13 schematically shows the resistance measurement unit 130 when performing a four-terminal measurement on the daisy-chain DC 12 shown in Figure 3, etc.

[0076] In four-terminal measurement, the voltage measurement points differ from those in two-terminal measurement and pseudo-four-terminal measurement. In other words, in four-terminal measurement, the method of connecting the probe 30 to the PCB 20 differs from that in two-terminal measurement and pseudo-four-terminal measurement. Specifically, in four-terminal measurement, similar to pseudo-four-terminal measurement, the probe 30 connected to the constant current source PS and the probe 30 connected to the voltmeter Vm are separated. The probe 30 connected to the constant current source PS is connected to pattern wiring L1 and pattern wiring L6, which are the ends of the daisy chain DC 12. The probe 30 connected to the voltmeter Vm is connected to the ends of vias V21 to V25. The voltmeter Vm measures the voltage between the ends of vias V21 to V25.

[0077] In the case of four-terminal measurement, the voltage measured by the voltmeter Vm is the voltage after the parasitic resistance of the pattern wiring L1 to L6 has been further removed compared to a pseudo-four-terminal measurement. Therefore, four-terminal measurement can measure resistance values ​​more precisely than a pseudo-four-terminal measurement. For example, when using the four FPCs 21A, 21B, 21G, and 21H as described above, four-terminal measurement or pseudo-four-terminal measurement only needs to be performed in the first wiring step using FPCs 21A and 21B, thereby reducing the number of components required for board inspection.

[0078] [Modification 3] Next, Modification 3 of the substrate inspection system 10 according to the first embodiment of the present invention will be described. Modification 3 of the substrate inspection system 10 is the same as the substrate inspection system 10 except that the object to be inspected is different from the PCB 20.

[0079] Figure 14 is a cross-sectional view showing a PCB 22 that is the object of inspection in Modification 3 of the PCB inspection system 10. The PCB 22 that is the object of inspection in Modification 3 of the PCB inspection system 10 includes a flat substrate 201 and a plurality of pattern wirings Pt3 that have a different shape from vias V. The pattern wirings Pt3 are conductive and extend from one side 201A of the substrate 201 through the interior of the substrate 201 to the other side 201B that faces either side 201A or the opposite side 201A.

[0080] For example, in Modification 3 of the board inspection system 10, two types of daisy chains DC41 and daisy chain DC42 are formed by connecting multiple pattern wirings Pt3 in series using a PCB 22 and FPCs 21E and 21F on which multiple pattern wirings L7 that connect multiple pattern wirings Pt3 are arranged. Daisy chain DC41 goes from pattern wiring L71 (Figure 14) through one or more pattern wirings Pt3 and one or more pattern wirings L7 to pattern wiring L72 (Figure 14). Daisy chain DC42 goes from pattern wiring L72 (Figure 14) through one or more pattern wirings Pt3 and one or more pattern wirings L7 to pattern wiring L73 (Figure 14).

[0081] The control unit 110 and the resistance measurement unit 130 measure the resistance values ​​of daisy chain DC41 and daisy chain DC42 by two-terminal measurement, pseudo-four-terminal measurement, or four-terminal measurement. Based on the measurement results of the resistance values ​​of daisy chain DC41 and daisy chain DC42, the control unit 110 identifies abnormalities in the pattern wiring Pt3 included in daisy chain DC41 and daisy chain DC42.

[0082] In this embodiment, the substrate inspection method was performed using the inspection device 100, but the substrate inspection method may be performed without using the inspection device 100. For example, the resistance values ​​of the first wiring pattern and the second wiring pattern formed on the printed circuit board may be measured manually, and abnormal internal wiring may be identified based on the measured resistance values.

[0083] [Second Embodiment] Hereinafter, a substrate method according to the second embodiment of the present invention will be described with reference to the drawings. In the second embodiment, matters that differ from the first embodiment will be described, and matters that overlap with the first embodiment will be omitted.

[0084] The substrate inspection method according to the second embodiment is the same as the substrate inspection method according to the first embodiment, except that in the first wiring step, first measurement step, second wiring step, and second measurement step, a conversion substrate 24 is provided between the PCB 20D to be inspected and each FPC for forming a daisy chain.

[0085] Figure 15 is a schematic diagram showing the first wiring step of the substrate inspection method according to the second embodiment. The PCB 20D used in the substrate inspection method according to the second embodiment has eight vias V arranged irregularly. For example, in the substrate inspection method according to the second embodiment, when the FPCs 21J and 21K shown in Figure 11 are used, a conversion board 24A is provided between PCB 20D and FPC 21J, and a conversion board 24B is provided between PCB 20D and FPC 21K. Conversion boards 24A and 24B are examples of wiring conversion jigs.

[0086] Figure 16 shows an example of a conversion board 24A. Figure 16(a) shows one side 240A of the conversion board 24A on the FPC 21J side, and Figure 16(b) shows the other side 240B of the conversion board 24A on the PCB 20D side. The conversion board 24B has the same structure as the conversion board 24A, only the orientation is different, so its explanation is omitted.

[0087] The conversion board 24A includes conversion wiring Pta to Pth, each corresponding to one of the eight vias V of the PCB 20D. The conversion wiring Pta to Pth has the same conductivity as the pattern wiring in the FPC 21J. Each of the conversion wiring Pta to Pth extends through from one side 240A to the other side 240B of the conversion board 24A. The ends of each of the conversion wiring Pta to Pth on the side 240A and the end on the other side 240B of the conversion board 24A are exposed from the side 240A and the other side 240B of the conversion board 24A, respectively.

[0088] The arrangement of the ends of each conversion board 24A on one side 240A for each conversion wiring Pta to Pth is 4 rotationally symmetrical, corresponding to the positions of the pattern wiring on the FPC 21J. On the other hand, the arrangement of the ends of each conversion board 24A on the other side 240B for each conversion wiring Pta to Pth corresponds to the positions of the eight vias V. In Figure 16, the correspondence between the ends of the conversion wiring Pta to Pth on one side 240A and the other side 240B is shown by letters.

[0089] In this way, by using the conversion board 24, the first wiring pattern and the second wiring pattern can be easily formed even on the inspection target where vias V are arranged irregularly.

[0090] Note that the arrangement of the ends of the conversion wiring Pta to Pth on one side 240A of the conversion board 24A may be, for example, a 4x2 grid, in addition to the arrangement shown in Figure 16. Figure 17 shows the conversion board 24A in which the arrangement of each end on one side 240A is a 4x2 grid. Figure 17(a) shows one side 240A with each end arranged in a grid. Figure 17(b) is the same as Figure 16(b).

[0091] As described above, the substrate inspection method of the present invention is not limited to the embodiments described above, and can be implemented in various forms without departing from the spirit of the invention. Furthermore, the multiple components disclosed in the above embodiments can be modified as appropriate. For example, some components from all the components shown in one embodiment may be added to the components of another embodiment, or some components from all the components shown in one embodiment may be deleted from the embodiment.

[0092] Furthermore, the drawings schematically show each component in order to facilitate understanding of the invention, and the thickness, length, number, spacing, etc. of each component shown may differ from the actual dimensions due to the convenience of drawing creation. Also, the configuration of each component shown in the above embodiments is merely an example and is not particularly limiting, and it goes without saying that various modifications are possible without substantially departing from the effects of the present invention.

[0093] 10: PCB inspection system 20, 20A, 20B, 20D, 22: PCB 24A, 24B: Conversion board (wiring conversion jig) 200A, 201A, 240A: One side 200B, 201B, 240B: Other side DC, DC11-DC13, DC21-DC25, DC41, DC42: Daisy chain FPC21A-FPC21K: Wiring board (board inspection jig) L1-L11, L71-L73, Pt, Pt13, Pt21-Pt25, Pt3, Pt33: Pattern wiring R, R1, R2: Resistance value S11: Step (first wiring step) S12: Step (first measurement step) S14: Step (second wiring step) S15 : Step (Second measurement step) S18 : Step (Specific step) SW11-SW15, SW22 : Switch V, V11-V15, V21-V25, V31-V35, V41, V51 : Via (Through-hole via)

Claims

1. A printed circuit board is provided with a plurality of internal wirings, each of which is conductive, extending from one side of the printed circuit board through the interior of the printed circuit board to the other side facing the opposite side, and a first wiring step is performed to form a first wiring pattern by electrically connecting at least two of the internal wirings in series using conductive first external wirings and second external wirings provided on a first wiring board covering one side of the printed circuit board and a second wiring board covering the other side, respectively; a first measurement step is performed to measure the resistance value of the first wiring pattern; a second wiring step is performed to form a second wiring pattern different from the first wiring pattern by electrically connecting one or more of the internal wirings included in the first wiring pattern and one or more other internal wirings in series using conductive third external wirings and fourth external wirings provided on a third wiring board covering one side of the printed circuit board and a fourth wiring board covering the other side, respectively; and a second measurement step is performed to measure the resistance value of the second wiring pattern. A substrate inspection method comprising: a selection step of identifying an abnormal internal wiring from among the plurality of internal wirings based on the measurement results of the first measurement step and the measurement results of the second measurement step, wherein the internal wiring forms a through hole that penetrates the printed circuit board in a straight line from one surface of the printed circuit board to the other surface.

2. The substrate inspection method according to claim 1, wherein the through holes are arranged in a four-fold rotationally symmetrical manner on the printed circuit board, the third wiring board is the first wiring board with its orientation relative to the printed circuit board changed by a quarter rotation from the first wiring step, and the fourth wiring board is the second wiring board with its orientation relative to the printed circuit board changed by a quarter rotation from the first wiring step in the same direction as the third wiring board.

3. The printed circuit board has a plurality of through holes arranged in a grid pattern formed by a plurality of vertical columns and a plurality of horizontal rows, the first wiring pattern is formed by connecting all the through holes in series in each of the plurality of horizontal rows, the second wiring pattern is formed by connecting all the through holes in series in each of the plurality of vertical columns, and the printed circuit board has the same spacing between the vertical columns and the horizontal rows of the plurality of internal wirings.

4. A first conversion board is provided between the printed circuit board and the first wiring board and between the printed circuit board and the third wiring board for converting the arrangement of the ends of the internal wiring on one side of the printed circuit board, the first conversion board includes a plurality of first conversion wires that penetrate from the side of the first conversion board facing the printed circuit board to the side of the first wiring board or the side of the third wiring board, connecting the plurality of internal wiring to the plurality of first external wiring or the plurality of third external wiring, the arrangement of the ends of the plurality of first conversion wires on the side facing the printed circuit board corresponds to the plurality of internal wiring, and the arrangement of the ends of the plurality of first conversion wires on the side facing the first wiring board or the third wiring board is rotationally symmetrical four times, a second conversion board is provided between the printed circuit board and the second wiring board and between the printed circuit board and the fourth wiring board for converting the arrangement of the ends of the internal wiring on the other side of the printed circuit board, The substrate inspection method according to claim 1 or claim 2, wherein the second conversion board includes a plurality of second conversion wires that penetrate from the printed circuit board side of the second conversion board to the second wiring board side or the fourth wiring board side, connecting the plurality of internal wirings to the plurality of second external wirings or the plurality of fourth external wirings, respectively, the arrangement of the ends of the plurality of second conversion wires on the printed circuit board side corresponds to the plurality of internal wirings, and the arrangement of the ends of the plurality of second conversion wires on the second wiring board or the fourth wiring board side is four-fold rotationally symmetric.

5. The substrate inspection method according to claim 1 or 2, wherein the measurement of resistance in the first measurement step and the second measurement step is the measurement of resistance by two-terminal measurement, the measurement of resistance between two adjacent external wirings by pseudo-four-terminal measurement, or the measurement of resistance for each internal wiring by four-terminal measurement.

6. A printed circuit board inspection jig comprising: a printed circuit board having a plurality of internal wirings, each having conductivity, extending from one side of the printed circuit board through the interior of the printed circuit board to the other side facing the opposite side of the printed circuit board; a first and second wiring board each having conductive first and second external wirings that cover the one side and the other side of the printed circuit board, respectively, and electrically connecting at least two of the internal wirings in series to form a first wiring pattern; and a third and fourth wiring board each having conductive third and fourth external wirings that cover the one side and the other side of the printed circuit board, respectively, and electrically connecting one or more of the internal wirings included in the first wiring pattern with one or more other internal wirings in series to form a second wiring pattern different from the first wiring pattern, wherein the internal wirings form through holes that penetrate the printed circuit board linearly from one side to the other side of the printed circuit board.

7. The substrate inspection jig according to claim 6, wherein the through holes are arranged four rotationally symmetrically on the printed circuit board, the third wiring board is the first wiring board whose orientation relative to the printed circuit board is changed by a quarter rotation from the orientation that forms the first wiring pattern, and the fourth wiring board is the second wiring board whose orientation relative to the printed circuit board is changed by a quarter rotation from the orientation that forms the first wiring pattern in the same direction as the third wiring board.

8. A first conversion board is provided between the printed circuit board and the first wiring board and between the printed circuit board and the third wiring board for converting the arrangement of the ends of the internal wiring on one side of the printed circuit board, the first conversion board includes a plurality of first conversion wires that penetrate from the side of the first conversion board facing the printed circuit board to the side of the first wiring board or the side of the third wiring board, connecting the plurality of internal wiring to the plurality of first external wiring or the plurality of third external wiring, the arrangement of the ends of the plurality of first conversion wires on the side facing the printed circuit board corresponds to the plurality of internal wiring, and the arrangement of the ends of the plurality of first conversion wires on the side facing the first wiring board or the third wiring board is rotationally symmetrical four times, a second conversion board is provided between the printed circuit board and the second wiring board and between the printed circuit board and the fourth wiring board for converting the arrangement of the ends of the internal wiring on the other side of the printed circuit board, The substrate inspection jig according to claim 6 or 7, wherein the second conversion board includes a plurality of second conversion wires that penetrate from the printed circuit board side of the second conversion board to the second wiring board side or the fourth wiring board side, connecting the plurality of internal wirings to the plurality of second external wirings or the plurality of fourth external wirings, respectively, the arrangement of the ends of the plurality of second conversion wires on the printed circuit board side corresponds to the plurality of internal wirings, and the arrangement of the ends of the plurality of second conversion wires on the second wiring board or the fourth wiring board side is four-fold rotationally symmetric.

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