Optical detection device and ranging system
Patent Information
- Application Number
- PCT/JP2026/010897
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-03-26
- Filing Date
- 2026-03-19
- Publication Date
- 2026-10-01
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Figure JP2026010897_01102026_PF_FP_ABST
Abstract
Description
Light detection device and distance measuring system
[0001] This disclosure relates to an optical detection device and a distance measuring system.
[0002] A single-photon avalanche diode (SPAD) is known that multiplies the charge obtained by photoelectric conversion of a single incident photon. For example, a photodetector has been proposed that improves quantum efficiency for SWIR (Short-Wavelength InfraRed) light and reduces the generation of dark current in the multiplier by providing the light-receiving part on a Ge (germanium) substrate with a small band gap and the multiplier part on a Si (silicon) substrate with a large band gap (see Patent Document 1).
[0003] International Publication No. 2022 / 244384
[0004] However, in the photodetector described in Patent Document 1, a transition defect occurs at the heterointerface between the Si substrate and the Ge substrate due to lattice mismatch. As a result, a dark current is generated in the carrier transfer path from the light-receiving unit to the multiplier unit due to leakage current from the SRH (Schockley-Read-Hall).
[0005] Therefore, this disclosure provides an optical detection device and a ranging system that can reduce dark current in the carrier transfer path.
[0006] To solve the above problems, the present disclosure provides a photodetector comprising: a substrate; a light-receiving unit disposed on the substrate and comprising a first semiconductor material, which generates an electric charge based on incident light by photoelectric conversion; a multiplier unit disposed at a distance from the light-receiving unit in a first direction, which avalanches the charge generated in the light-receiving unit; and a first semiconductor region comprising the first semiconductor material and a second semiconductor material having a larger band gap than the first semiconductor material, which transfers the generated charge to the multiplier unit, wherein the first semiconductor region has a concentration gradient of the first semiconductor material that changes stepwise or continuously in the first direction.
[0007] In the first semiconductor region, the region close to the light-receiving portion may have a higher concentration of the first semiconductor material, while the region farther from the light-receiving portion may have a lower concentration of the first semiconductor material.
[0008] The multiplier may include the first semiconductor material and the second semiconductor material.
[0009] The multiplier portion may contain a first semiconductor material with a concentration of 85% or less.
[0010] The multiplier portion has a second semiconductor region containing an impurity of a first conductivity type and a third semiconductor region containing an impurity of a second conductivity type, and at least one of the second semiconductor region or the third semiconductor region may contain the first semiconductor material and the second semiconductor material.
[0011] The material may also include a fourth semiconductor region located between the second semiconductor region and the third semiconductor region, having a lower impurity concentration than the second and third semiconductor regions.
[0012] The present invention may further include: a first semiconductor layer containing the second semiconductor material; a second semiconductor layer laminated on the first semiconductor layer, containing the first semiconductor material and the second semiconductor material, and having a concentration gradient of the first semiconductor material in the lamination direction; and a third semiconductor layer laminated on the second semiconductor layer, having the light-receiving portion.
[0013] The present invention may further include: a first semiconductor layer comprising the first semiconductor material and the second semiconductor material, having a concentration gradient of the first semiconductor material in the stacking direction; a second semiconductor layer stacked on the first semiconductor layer and having the light-receiving portion; and a wiring layer in contact with the surface of the first semiconductor layer opposite to the main surface facing the second semiconductor layer.
[0014] The light-receiving portion further comprises a fifth semiconductor region containing the second semiconductor material, and is arranged to face the fifth semiconductor region in a first direction and a second direction intersecting the first direction via the first semiconductor region, and the first semiconductor region may have a concentration gradient of the first semiconductor material in the first direction and the second direction.
[0015] The fifth semiconductor region may have a recess on one main surface of the substrate, the first semiconductor region may be located in the recess of the fifth semiconductor region and have a recess on one main surface of the substrate, and the light receiving portion may be located in the recess of the first semiconductor region.
[0016] The multiplication unit may be located inside the first semiconductor region.
[0017] A portion of the multiplication section may be located inside the second semiconductor layer, and another portion of the multiplication section may be located inside the first semiconductor layer.
[0018] A portion of the multiplication unit may be located inside the first semiconductor region, and another portion of the multiplication unit may be located inside the fifth semiconductor region.
[0019] The device comprises a plurality of pixels having a plurality of light-receiving units and a plurality of first semiconductor regions, and a pixel separation region that separates a plurality of adjacent pixels, wherein the pixel separation region may be arranged between adjacent plurality of first semiconductor regions.
[0020] The device comprises a plurality of light-receiving units, a plurality of pixels having a plurality of first semiconductor regions and a plurality of fifth semiconductor regions, and a pixel separation region that separates a plurality of adjacent pixels, wherein the pixel separation region may be arranged between adjacent plurality of fifth semiconductor regions.
[0021] The light-receiving portion may be provided with a lens portion for focusing the incident light, and the lens portion may be arranged on one main surface of the substrate on which the light-receiving portion is located.
[0022] The light-receiving portion may be provided with a lens portion for focusing the incident light, and the lens portion may be arranged to face the light-receiving portion via the first semiconductor region.
[0023] The first semiconductor layer further comprises the second semiconductor material, and the multiplication portion may be disposed inside the first semiconductor layer.
[0024] The first semiconductor material may be Ge (germanium), and the second semiconductor material may be Si (silicon).
[0025] Furthermore, according to this disclosure, a distance measuring system is provided, comprising: a light detection device that receives reflected light when emitted light is reflected by an object; a light emission device that emits the emitted light; and a distance measuring unit that measures the distance to the object based on the reflected light.
[0026] A cross-sectional view showing the configuration of a photodetector according to the first embodiment of this disclosure. A cross-sectional view showing the configuration of a pixel according to the first embodiment of this disclosure. A diagram showing the relationship between the concentration of Ge in SiGe and the bandgap energy. A schematic diagram showing the stacked structure of the photodetector. A cross-sectional view showing the configuration of a pixel according to one modified example of Figure 2. A cross-sectional view showing the configuration of a pixel according to the first comparative example. A cross-sectional view showing the configuration of a pixel according to the second comparative example. A diagram showing the formation process of the semiconductor substrate of Figure 1. A diagram showing the first formation process of the buffer layer, following Figure 8. A diagram showing the first ion implantation process into the semiconductor substrate, following Figure 9. A diagram showing the formation process of the multiplication section, following Figure 10. A diagram showing the second formation process of the buffer layer, following Figure 11. A diagram showing the formation process of the light-receiving section and the semiconductor layer, following Figure 12. A diagram showing the second ion implantation process into the semiconductor substrate, following Figure 13. A diagram showing the bonding process of the dummy substrate, following Figure 14. A diagram showing the formation process of the wiring layer, following Figure 15. A diagram showing the formation process of the lens section, following Figure 16. A cross-sectional view showing the configuration of a photodetector according to the second embodiment of this disclosure. A cross-sectional view showing the configuration of a photodetector according to the third embodiment of this disclosure. A cross-sectional view showing the configuration of a photodetector according to the fourth embodiment of this disclosure. A cross-sectional view showing the configuration of a photodetector according to one modification of Figure 20. A cross-sectional view showing the configuration of a photodetector according to the fifth embodiment of this disclosure. A cross-sectional view showing the configuration of a photodetector according to the first modification of Figure 22. A cross-sectional view showing the configuration of a photodetector according to the second modification of Figure 22. A cross-sectional view showing the configuration of a photodetector according to the third modification of Figure 22. A cross-sectional view showing the configuration of a photodetector according to the sixth embodiment of this disclosure. A cross-sectional view showing the configuration of a photodetector according to one modification of Figure 26. A cross-sectional view showing the configuration of a photodetector according to the seventh embodiment of this disclosure. A diagram showing the formation process of the buffer layer and light-receiving part of Figure 28. A diagram showing the bonding process of a dummy substrate, following Figure 29. A diagram showing the polishing process of a semiconductor substrate, following Figure 30. A diagram showing the ion implantation process into a semiconductor substrate, following Figure 31. A diagram showing the formation process of a wiring layer, following Figure 32. A diagram showing the bonding process with a logic substrate, following Figure 33. A diagram showing the formation process of a lens part, following Figure 34. A block diagram of a distance measuring system according to the eighth embodiment of this disclosure. A block diagram showing an example of a schematic configuration of a vehicle control system. An explanatory diagram showing an example of the installation positions of the external information detection unit and the imaging unit.
[0027] Embodiments of the light detection device and distance measuring system will be described below with reference to the drawings. While the main components of the light detection device and distance measuring system will be described below, there may be components and functions not shown or described. The following description does not exclude any components or functions not shown or described.
[0028] (First Embodiment) Figure 1 is a cross-sectional view showing the configuration of a photodetector 1 according to the first embodiment of the present disclosure. The photodetector 1 has a semiconductor substrate (substrate) 2. The photodetector 1 can detect light incident on the semiconductor substrate 2. Light is incident on the semiconductor substrate 2 in Figure 1 from the upper side in Figure 1.
[0029] The semiconductor substrate 2 has a multilayer semiconductor structure. The semiconductor substrate 2 is constructed by stacking semiconductor layers (first semiconductor layer) 3, buffer layers (second semiconductor layer, or first semiconductor region) 4, and semiconductor layers (third semiconductor layer) 5 in the order shown, starting from the side opposite to the incident light surface (i.e., the bottom side in Figure 1).
[0030] The semiconductor layer 3 includes, for example, Si (second semiconductor material). The buffer layer 4 includes, for example, Si and Ge. The semiconductor layer 5 includes, for example, Ge (first semiconductor material).
[0031] The semiconductor layer 3 is, for example, a region where the composition ratio of Si (hereinafter also referred to as concentration) is uniform. The semiconductor layer 5 is, for example, a region where the concentration of Ge is uniform. In the buffer layer 4, the concentrations of Si and Ge change stepwise or continuously from the interface in contact with the semiconductor layer 3 to the interface in contact with the semiconductor layer 5. That is, the buffer layer 4 has a concentration gradient in the stacking direction.
[0032] In the buffer layer 4, the concentration of Ge is higher in regions closer to the semiconductor layer 5 and lower in regions further away from the semiconductor layer 5. In other words, in the buffer layer 4, the Ge composition ratio x increases as it gets closer to the semiconductor layer 5. 1-x Ge x Includes.
[0033] Furthermore, the buffer layer 4 in Figure 1 has a Ge concentration of 85% or less (i.e., Si 0.15 Ge 0.85 The boundary B of the diagram is shown.
[0034] This specification describes an example in which the semiconductor substrate 2 is a Si substrate. The buffer layer 4 and the semiconductor layer 5 are formed from the semiconductor layer 3 by epitaxial growth or the like. In this specification, the semiconductor layer 3 may be referred to as a substrate. Without being limited thereto, the semiconductor substrate 2 may be a Ge substrate on which the semiconductor layer 3 and the buffer layer 4 are formed from the semiconductor layer 5 by epitaxial growth or the like. Alternatively, the photodetecting device 1 may be formed by bonding a Si substrate and a Ge substrate together.
[0035] In this specification, the stacking direction of the semiconductor substrate 2 (the vertical direction in FIG. 1) is referred to as a first direction Z. In addition, among directions intersecting the first direction Z, one direction (the horizontal direction in FIG. 1) is referred to as a second direction Y, and the other direction (the depth direction in FIG. 1) is referred to as a third direction X.
[0036] The semiconductor substrate 2 includes a plurality of pixels 10 each detecting incident light. The plurality of pixels 10 are arranged, for example, in the second direction Y and the third direction X. Each pixel 10 includes, for example, a SPAD. The pixel 10 includes a light receiving unit 11, a multiplication unit 12, and a lens unit 13. The lens unit 13 is arranged on a light incident surface (hereinafter also referred to as a first surface A1) side of the semiconductor substrate 2.
[0037] The light receiving unit 11 is arranged in the semiconductor layer 5. The light receiving unit 11 receives incident light and generates charges corresponding to the amount of received light through photoelectric conversion. The charges generated by the light receiving unit 11 pass through the buffer layer 4 and are transferred to the multiplication unit 12.
[0038] The multiplication unit 12 multiplies the charges transferred from the light receiving unit 11 by avalanche multiplication. The multiplication unit 12 is arranged spaced apart from the light receiving unit 11 in the first direction Z. The multiplication unit 12 includes a semiconductor region (second semiconductor region) 14 containing an impurity of a first conductivity type (for example, P+ type), and a semiconductor region (third semiconductor region) 15 containing an impurity of a second conductivity type (for example, N+ type). In the multiplication unit 12 of FIG. 1, the semiconductor region 14 and the semiconductor region 15 form a junction (PN junction).
[0039] The semiconductor region 14 and the semiconductor region 15 in FIG. 1 are disposed on the buffer layer 4. The buffer layer 4 in FIG. 1 includes a semiconductor layer 7 including the semiconductor region 14, a semiconductor layer 8 disposed closer to the semiconductor layer 3 side than the semiconductor layer 7, and a semiconductor layer 9 disposed closer to the semiconductor layer 5 side than the semiconductor layer 7. The semiconductor layer 9 has a higher Ge concentration than the semiconductor layer 8. Further, the boundary B is disposed within the semiconductor layer 9.
[0040] The lens portion 13 includes, for example, an OCL (On Chip Lens). The lens portion 13 condenses incident light onto the light receiving portion 11. An infrared filter, an infrared cut filter, a color filter, or the like may be disposed between the lens portion 13 and the light receiving portion 11.
[0041] A pixel isolation region 16 is disposed between two adjacent pixels 10. The pixel isolation region 16 has, for example, an impurity concentration of a first conductivity type (e.g., P-type), and has a lower impurity concentration than the semiconductor region 14. The pixel isolation region 16 has a potential barrier that prevents charge intrusion (crosstalk) from one pixel 10 to an adjacent pixel 10. Note that the pixel isolation region 16 may have a pinning region that adjusts the reference voltage of the pixel 10.
[0042] A wiring layer 6 is disposed, for example, on a surface of the semiconductor substrate 2 opposite to the first surface A1 (hereinafter also referred to as a second surface A2). The wiring layer 6 includes, for example, an anode (An) wiring electrically connected to a P-type semiconductor region in the semiconductor layer 3, and a cathode (Ca) wiring electrically connected to an N-type semiconductor region in the semiconductor layer 3. The anode wiring and the cathode wiring are respectively connected to an unillustrated anode electrode and cathode electrode, and apply a reverse bias voltage for causing avalanche multiplication to the multiplication portion 12.
[0043] The buffer layer 4 of FIG. 1 will be described in detail with reference to FIG. 2. FIG. 2 is a cross-sectional view showing the configuration of the pixel 10 according to the first embodiment of the present disclosure. Note that in FIG. 2, illustration of the lens portion 13 and the pixel isolation region 16 is omitted.
[0044] The light-receiving section 11 includes, for example, Ge. Since Ge has a smaller band gap than Si, when Ge is used in the light-receiving section 11, it can receive longer wavelength light than when Si is used. In other words, the light-receiving section 11 can improve the quantum efficiency for NIR (Near Infrared) light and SWIR light, etc.
[0045] The greater the film thickness of the light-receiving section 11, the higher its light-receiving efficiency for SWIR light and the like. The light-receiving section 11 according to the first embodiment of this disclosure may have a film thickness greater than or equal to the critical film thickness.
[0046] The buffer layer 4 is used as a transfer path to transfer the charge generated in the light-receiving unit 11 to the charge multiplier unit 12.
[0047] The buffer layer 4 is used as a SRB (Strain-Relaxed Buffer) to alleviate lattice mismatch between the light-receiving portion 11 (Relaxed region) and the semiconductor layer 3 (Strain region). The buffer layer 4 is formed, for example, by gradually increasing the concentration of Ge while gradually decreasing the Si concentration (step grading) from the interface on the semiconductor layer 3 side.
[0048] Because the buffer layer 4 can gradually change its lattice constant, it can reduce the occurrence of transition defects. This suppresses the occurrence of SRH and reduces dark current in the charge transfer path. In other words, the buffer layer 4 can improve the DCR (Dark Count Rate).
[0049] In order to slow down the change in the lattice constant of the buffer layer 4, it is desirable that the thickness of the buffer layer 4 be large. For example, the thickness of the buffer layer 4 is preferably 2 to 3 μm, or 3 μm or more.
[0050] The multiplication section 12 is preferably made of a material with a large band gap. Here, let's consider an example in which the multiplication section 12 is formed within the semiconductor layer 3. In this example, the multiplication section 12 can be made of Si. Since Si has a sufficiently large band gap, it can suppress the dark current of BTBT (Band to Band Tunneling) caused by the electric field of the multiplication section 12.
[0051] Increasing the thickness of the buffer layer 4 increases the distance between the light-receiving section 11 and the semiconductor layer 3. If the multiplier section 12 is formed on the semiconductor layer 3, the charge transfer path length between the light-receiving section 11 and the multiplier section 12 becomes larger, raising concerns about losses due to carrier recombination during charge transfer.
[0052] Therefore, in the first embodiment of this disclosure, a multiplier 12 is formed within the buffer layer 4. This makes it possible to reduce the length of the charge transfer path between the light-receiving unit 11 and the multiplier 12. By suppressing losses in the charge transfer path, the sensitivity of the pixel 10 to the charge generated in the light-receiving unit 11 can be improved. In other words, the pixel 10 according to the first embodiment of this disclosure can improve the photon detection efficiency (PDE). Furthermore, it is possible to improve the jitter from the time incident light enters the photodetector 1 until the pixel 10 detects a photon.
[0053] The semiconductor region 14 in Figure 2 includes, for example, Si and Ge. Furthermore, the semiconductor region 14 is located on the semiconductor layer 3 side of boundary B. That is, the Ge concentration in the semiconductor region 14 is 85% or less. Similarly, the semiconductor region 15 in Figure 2 includes Si and Ge at a concentration of 85% or less.
[0054] SiGe exhibits similar properties to Si when the Ge concentration is 85% or less. Specifically, SiGe with a Ge concentration of 85% or less has a band gap close to that of Si.
[0055] Figure 3 shows Si 1-x Ge x This figure shows the relationship between the concentration of Ge and the band gap energy (hereinafter also simply referred to as energy) in the sample. The horizontal axis of Figure 3 shows the composition ratio (composition) of Ge. The vertical axis of Figure 3 shows Si 1-x Ge x This shows the energy (Energy [meV]). Also, in Figure 3, the energy at x = 0.0 represents the energy of Si, and the energy at x = 1.0 represents the energy of Ge.
[0056] Figure 3 illustrates region R1, where the energy gradient of SiGe in response to the Ge concentration change is gradual, and region R2, where the energy gradient of SiGe in response to the Ge concentration change is steep. Region R1 corresponds to the region of the buffer layer 4 on the semiconductor layer 3 side of boundary B (sixth semiconductor region). Region R2 corresponds to the region of the buffer layer 4 on the semiconductor layer 5 side of boundary B (seventh semiconductor region).
[0057] As shown in Figure 3, when the Ge concentration of SiGe exceeds approximately 85%, the energy change gradient changes abruptly, and the energy decreases rapidly.
[0058] The multiplier 12 in Figure 2 contains Si and Ge at a concentration of 85% or less. That is, the SiGe in the multiplier 12 in Figure 2 has a sufficiently large band gap, similar to Si. As a result, the multiplier 12 in Figure 2 can suppress the dark current of the BTBT.
[0059] Figure 4 is a schematic diagram showing the stacked structure of the photodetector 1. The photodetector 1 can be made up of, for example, a stacked substrate made by stacking multiple substrates (chips). The semiconductor substrate 2 in Figure 4 has a pixel array section 21 in which multiple pixels 10 are arranged in a second direction Y and a third direction X.
[0060] The semiconductor substrate 2 is stacked on the logic substrate 22. For example, logic circuits 23 are arranged on the logic substrate 22. The logic circuits 23 perform predetermined signal processing based on photons detected by a plurality of pixels 10. Predetermined signal processing includes, for example, image data generation processing or histogram generation.
[0061] The semiconductor substrate 2 and the logic substrate 22 are joined at a joint 24. The joint 24 includes, for example, a Cu-Cu joint. In addition, the semiconductor substrate 2 and the logic substrate 22 may be joined by vias or bumps.
[0062] Multiple pixel circuits may be arranged on the semiconductor substrate 2 or logic substrate 22. The pixel circuits may include, for example, a pulse generation circuit that outputs a pulse signal based on the voltage fluctuation when the pixel 10 detects a photon, and a counter that measures the number of photons detected by the pixel 10.
[0063] Figure 4 shows an example of the photodetector 1 being composed of a two-tiered stacked chip. However, the photodetector 1 is not limited to this and may be composed of three or more stacked chips. For example, a substrate on which the above-mentioned multiple pixel circuits are arranged may be stacked between the semiconductor substrate 2 and the logic substrate 22. Alternatively, the photodetector 1 may be composed of a single flat chip. Furthermore, at least a portion of the logic circuit 23 may be located outside the photodetector 1.
[0064] Figure 5 is a cross-sectional view showing the configuration of a pixel 10a according to a modified example of the first embodiment of the present disclosure. The multiplication portion 12a in Figure 5 is arranged in the semiconductor layer 3. The semiconductor regions 14a and 15a in Figure 5 include, for example, Si.
[0065] Similar to the pixel 10 in Figure 2, the buffer layer 4 in pixel 10a of Figure 5 can suppress dark current in the charge transfer path. Furthermore, since the band gap of the multiplication unit 12a is sufficiently large, the dark current of the BTBT can be suppressed.
[0066] The multiplication section 12a in Figure 5 can be formed closer to the second surface A2 of the semiconductor substrate 2 than the multiplication section 12 in Figure 2. As a result, when the semiconductor regions 14a and 15a are formed by impurity ion implantation (ion implantation) from the second surface A2, the implantation energy of the ion implantation can be reduced compared to the semiconductor regions 14 and 15 in Figure 2.
[0067] By reducing the implantation energy, the thickness of the resist film formed on the ion implantation surface of the semiconductor substrate 2 can be reduced. This reduces the ratio of the thickness of the resist film to the surface area (aspect ratio) when implanting impurity ions into a region with a small surface area (e.g., a semiconductor region 15a), thereby simplifying the resist pattern formation process. Furthermore, reducing the implantation energy reduces damage to the semiconductor substrate 2 during ion implantation, improving the characteristics of the photodetector 1.
[0068] Figure 6 is a cross-sectional view showing the configuration of a pixel 100 according to the first comparative example. The pixel 100 does not have a buffer layer 4. The pixel 100 has a structure in which a light-receiving portion 101 (Ge layer) and a semiconductor layer 102 (Si layer) are in contact.
[0069] In pixel 100, the lattice mismatch rate between Si and Ge is large, resulting in large lattice defects at the Si-Ge heterointerface between the light-receiving portion 101 and the semiconductor layer 102. These lattice defects become particularly large when the film thickness of the light-receiving portion 101 exceeds the critical film thickness.
[0070] As a result, in pixel 100, a dark current is generated when the charge e trapped at the heterointerface enters the multiplication section 12a. In Figure 6, the charge e that causes the dark current is illustrated with dot hatches.
[0071] Even when performing interface pinning by injecting P-type impurities into the heterointerface, full-surface pinning is not possible because a charge transfer path is required at the heterointerface, and dark current may not be sufficiently suppressed. Furthermore, heterointerface pinning may cause losses during charge transfer, potentially worsening PDE and jitter.
[0072] Furthermore, even when a SiGe layer is placed between the light-receiving section 101 and the semiconductor layer 102, if there is no gentle concentration gradient like in the buffer layer 4 (for example, if the Ge concentration is uniform), dark current due to lattice defects may similarly occur.
[0073] In contrast, in pixels 10 and 10a of Figures 2 and 5, the buffer layer 4 can suppress dark current due to lattice defects. Furthermore, in pixels 10 and 10a, the film thickness of the light-receiving portion 11 can be increased to a critical thickness or higher. By increasing the film thickness of the light-receiving portion 11 to a critical thickness or higher, the light-receiving sensitivity of the light-receiving portion 11 can also be improved.
[0074] Figure 7 is a cross-sectional view showing the configuration of a pixel 200 according to a second comparative example. The pixel 200 has a multiplication section 201 within the light-receiving section 101 (Ge layer). The multiplication section 201 has semiconductor regions 202 and 203, which correspond to semiconductor regions 14 and 15 in Figure 2, respectively.
[0075] In the pixel 200, when the charge generated in the light-receiving unit 101 is transferred to the multiplier unit 201, the charge does not need to pass through the heterointerface. Therefore, pinning of the entire heterointerface is possible, and dark current due to lattice defects can be suppressed.
[0076] However, in the pixel 200, the multiplication unit 201 is formed of Ge. Since the band gap of Ge is smaller than that of Si or the like, the multiplication unit 201 may not be able to suppress BTBT dark current in some cases.
[0077] In contrast, in the pixels 10 and 10a of FIGS. 2 and 5, the band gaps of the multiplication units 12 and 12a can be sufficiently increased as described above, so that BTBT dark current can be suppressed.
[0078] Hereinafter, the manufacturing process of the photodetection device 1 will be described with reference to FIGS. 8 to 17. FIG. 8 is a diagram showing a forming step of a semiconductor substrate 2. In FIG. 8, the semiconductor substrate 2 and a semiconductor layer 3 are formed as a Si wafer.
[0079] FIG. 9 is a diagram showing a first forming step of a buffer layer 4. In FIG. 9, a semiconductor layer 8 which is a part of the buffer layer 4 is formed. The semiconductor layer 8 is formed, for example, by epitaxially growing SiGe on the semiconductor layer 3. Further, the semiconductor layer 8 is formed such that the Ge concentration gradually increases. The semiconductor layer 8 is formed, for example, such that the Ge concentration is less than 85% (Si 1-x Ge x x<0.85).
[0080] FIG. 10 is a diagram showing a first ion implantation (ion implant) step into the semiconductor substrate 2. In FIG. 10, a semiconductor region 15 which is a part of the multiplication unit 12 and a part of a pixel isolation region 16 are formed by ion implantation into the semiconductor layer 8 or the like.
[0081] FIG. 11 is a diagram showing a forming step of the multiplication unit 12. In FIG. 11, a semiconductor region 14 (semiconductor layer 7) which is a part of the multiplication unit 12 is formed. The semiconductor region 14 is formed, for example, by epitaxially growing SiGe on the semiconductor layer 8. In addition, the semiconductor region 14 may be formed by ion implantation into the semiconductor layer 8.
[0082] FIG. 12 is a diagram showing a second forming step of the buffer layer 4. In FIG. 12, a semiconductor layer 9 which is the remaining part of the buffer layer 4 is formed. The semiconductor layer 9 is formed, for example, by epitaxially growing SiGe on the semiconductor layer 7 such that the Ge concentration gradually increases.
[0083] Figure 13 shows the process of forming the light-receiving section 11 and the semiconductor layer 5. In Figure 13, the semiconductor layer 5 is formed. The semiconductor layer 5 is formed, for example, by epitaxial growth of Ge on the semiconductor layer 9.
[0084] Figure 14 shows the second ion implantation process into the semiconductor substrate 2. In Figure 14, the remaining portion of the pixel separation region 16 is formed by ion implantation into the buffer layer 4 and the semiconductor layer 5, etc.
[0085] Figure 15 shows the bonding process for the dummy substrate. In Figure 15, the semiconductor substrate 2 is flipped, and the dummy substrate 31 is bonded to the first surface A1 side of the semiconductor substrate 2. The dummy substrate 31 is, for example, a Si substrate.
[0086] Figure 16 shows the process of forming the wiring layer 6 (BEOL: back end of line). In Figure 16, the wiring layer 6 is formed on the second surface A2 side of the semiconductor substrate 2.
[0087] Figure 17 shows the process of forming the lens portion 13. In Figure 17, the dummy substrate 31 is removed by polishing (backside grinding) or the like. The lens portion 13 is formed on the first surface A1 side of the semiconductor substrate 2 (BSI: backside illumination). Note that the process in Figure 17 may include a step of thinning the semiconductor substrate 2 by polishing so that the light receiving portion 11 can receive incident light from the lens portion 13. The photodetector 1 according to the first embodiment of this disclosure is formed by the packaging process and the like in the post-processing steps of Figure 17.
[0088] As described above, the photodetector 1 according to the first embodiment of this disclosure has a buffer layer 4 (SiGe layer) disposed between the light-receiving section 11 (Ge layer) and the semiconductor layer 3 (Si layer). In the buffer layer 4 shown in Figures 2 and 5, the lattice constant is changed gradually by gradually changing the concentrations of Si and Ge, thereby suppressing the dark current of SRH in the charge transfer path.
[0089] Furthermore, the multiplication unit 12 in Figure 2 is positioned within the buffer layer 4. This allows for a shorter charge transfer path between the light receiving unit 11 and the multiplication unit 12, even when the thickness of the buffer layer 4 is large, thereby improving PDE and reducing jitter.
[0090] Furthermore, the multiplication section 12 in Figure 2 contains SiGe with a Ge concentration of 85% or less. The multiplication section 12 has a sufficiently large band gap. As a result, the dark current of the BTBT in the multiplication section 12 can be suppressed, similar to the case where the multiplication section 12 is formed of Si.
[0091] The amplification unit 12a in Figure 5, like the amplification unit 12 in Figure 2, can suppress the dark current of BTBT and SRH. Furthermore, since the amplification unit 12a can be formed in a simple process that causes little damage to the photodetector 1, the characteristics of the photodetector 1 can be improved.
[0092] (Second Embodiment) Figure 18 is a cross-sectional view showing the configuration of a photodetector 1a according to the second embodiment of the present disclosure. The multiplier 12b in Figure 18 is, for example, a PIN (p-intrinsic-n) diode. Semiconductor regions 14b and 15b are arranged spaced apart in the first direction Z. A semiconductor region (fourth semiconductor region) 41 is arranged between semiconductor regions 14b and 15b. Semiconductor region 41 is a region with a lower impurity concentration than semiconductor regions 14b and 15b. Semiconductor region 41 is preferably a neutral region or an intrinsic semiconductor, but may contain trace amounts of P-type or N-type impurities.
[0093] In the multiplication section 12b of Figure 18, the electric field is relaxed compared to the multiplication section 12 of Figure 1, etc. This further suppresses the dark current caused by the BTBT.
[0094] The semiconductor region 14b in Figure 18 may be formed by epitaxial growth or the like. In this case, compared to the case where the semiconductor region 14b is formed by ion implantation or the like, the diffusion of impurities into the semiconductor region 41 (generation of tails) can be suppressed. Epitaxial growth allows for the formation of a sharp impurity distribution in the semiconductor region 14b, thus further improving the electrical characteristics of the multiplication section 12b.
[0095] (Third Embodiment) Figure 19 is a cross-sectional view showing the configuration of a photodetector 1b according to the third embodiment of the present disclosure. The multiplication section 12c in Figure 19 includes a semiconductor region 14c disposed within a buffer layer (SiGe layer) 4, a semiconductor region 15c disposed within a semiconductor layer (Si layer) 3, and a semiconductor region 41. The semiconductor region 15c includes, for example, Si.
[0096] The multiplication unit 12c in Figure 19 can enlarge the size of the semiconductor region 41 compared to the multiplication unit 12b in Figure 18. The multiplication unit 12c can relax the electric field more effectively than the multiplication unit 12b, further suppressing the dark current of the BTBT.
[0097] (Fourth Embodiment) Figure 20 is a cross-sectional view showing the configuration of a photodetector 1c according to the fourth embodiment of the present disclosure. In the photodetector 1c of Figure 20, adjacent pixels 10 are separated by a pixel isolation region 16a formed in a trench (Full trench isolation). The trench of the pixel isolation region 16a is arranged, for example, from the second surface A2 side of the semiconductor substrate 2 to the first surface A1 side or the light-receiving section 11. An insulating film and a light-shielding film are placed in the trench of the pixel isolation region 16a, for example. A metal film is used as the light-shielding film.
[0098] Figure 21 is a cross-sectional view showing the configuration of a photodetector 1d according to a modified example of the fourth embodiment of the present disclosure. The pixel isolation region 16b in Figure 21 is arranged, for example, from the second surface A2 side of the semiconductor substrate 2 to a height that reaches the interface between the light-receiving unit 11 and the buffer layer 4 (Deep trench isolation).
[0099] The pixel isolation regions 16a in Figure 20 and 16b in Figure 21 are positioned between the buffer layer 4 and semiconductor layer 3 within adjacent pixels 10. The pixel isolation regions 16a and 16b can electrically isolate adjacent buffer layers 4 and adjacent semiconductor layers 3, and can suppress crosstalk between adjacent pixels 10 more effectively than the pixel isolation region 16 in Figure 1. The pixel isolation regions 16a and 16b according to the fourth embodiment of this disclosure can be applied to any of the first to third embodiments.
[0100] (Fifth Embodiment) Figure 22 is a cross-sectional view showing the configuration of a photodetector 1e according to the fifth embodiment of the present disclosure. In the photodetector 1e, a buffer region (first semiconductor region) 4a and a light-receiving unit 11 are arranged in a trench formed in a semiconductor substrate 2.
[0101] The light detection device 1e is placed on the semiconductor substrate 2 and has a semiconductor region (fifth semiconductor region) 3a with a recess on the surface of the semiconductor substrate 2 (first surface A1 in Figure 22). The buffer region 4a is placed in the recess of the semiconductor region 3a. The buffer region 4a also has a recess on the surface of the semiconductor substrate 2 (first surface A1 in Figure 22). The light receiving unit 11 is placed in the recess of the buffer region 4a. As described above, the buffer region 4a is placed between the light receiving unit 11 and the semiconductor region 3a. That is, the light receiving unit 11 is placed so as to face the semiconductor region 3a in the stacking direction (first direction Z) and the planar direction of the semiconductor substrate 2 (second direction Y and third direction X) via the buffer region 4a.
[0102] The semiconductor region 3a contains, for example, Si. The buffer region 4a contains SiGe. In the buffer region 4a, the concentrations of Si and Ge change stepwise or continuously from the interface in contact with the semiconductor region 3a to the interface in contact with the light-receiving portion 11. That is, the buffer region 4a has a concentration gradient in the stacking direction (first direction Z) and the planar direction of the semiconductor substrate 2 (second direction Y and third direction X). In the buffer region 4a, the concentration of Ge is higher in the region closer to the light-receiving portion 11. In the buffer region 4a of Figure 22, there is a point where the concentration of Ge is 85% or less (i.e., Si 0.15 Ge 0.85 The boundary B of the diagram is shown.
[0103] The amplification unit 12 is positioned at a distance from the light receiving unit 11 in the first direction Z. In Figure 22, the semiconductor regions 14 and 15 within the amplification unit 12 are positioned within the buffer region 4a. The semiconductor regions 14 and 15 are positioned on the semiconductor region 3a side of the boundary B. That is, the semiconductor regions 14 and 15 contain Si and Ge at a concentration of 85% or less. The amplification unit 12 may also be positioned within the semiconductor region 3a, similar to the amplification unit 12a in Figure 5.
[0104] Figure 23 is a cross-sectional view showing the configuration of a photodetector 1f according to a first modification of the fifth embodiment of the present disclosure. While the semiconductor regions 14 and 15 in Figure 22 are joined together, the semiconductor regions 14b and 15b in Figure 23 are arranged separated in the first direction Z with the semiconductor region 41 in between, similar to Figure 18.
[0105] Figure 24 is a cross-sectional view showing the configuration of a photodetector 1g according to a second modification of the fifth embodiment of the present disclosure. The semiconductor region 15c in Figure 24 is located in the semiconductor region 3a, similar to Figure 19.
[0106] Figure 25 is a cross-sectional view showing the configuration of a photodetector 1h according to a third modification of the fifth embodiment of the present disclosure. In the photodetector 1h of Figure 25, adjacent pixels 10 are separated by a pixel separation region 16c formed in a trench, similar to the photodetector 1c of Figure 20.
[0107] The trench of the pixel isolation region 16c is arranged, for example, to penetrate the semiconductor region 3a from the second surface A2 side of the semiconductor substrate 2. In other words, each of the multiple pixels 10 separated by the pixel isolation region 16c has a semiconductor region 3a. The pixel isolation region 16c is arranged between multiple adjacent semiconductor regions 3a.
[0108] The pixel isolation region 16c in Figure 25 can be formed using a simpler process than the pixel isolation region 16a in Figure 20. The trench in the pixel isolation region 16a in Figure 20 is formed, for example, by etching the semiconductor layer (Si layer) 3, the buffer layer (SiGe layer) 4, and the light-receiving portion (Ge layer) 11. That is, in the formation of the pixel isolation region 16a, it may be necessary to switch etching conditions for multiple semiconductor materials (e.g., Si, SiGe, and Ge). In contrast, the trench in the pixel isolation region 16c in Figure 25 is formed, for example, by etching the semiconductor region (Si layer) 3a. Therefore, the switching of etching conditions for multiple semiconductor materials can be omitted when forming the pixel isolation region 16c.
[0109] The trench in the pixel isolation region 16c may penetrate the semiconductor region 3a (Full trench isolation), as shown in Figure 25. Alternatively, the trench in the pixel isolation region 16c may be positioned to reach the height of the interface between the buffer region 4a and the light-receiving section 11 from the second surface A2 side (Deep trench isolation).
[0110] (Sixth Embodiment) Figure 26 is a cross-sectional view showing the configuration of a photodetector 1i according to the sixth embodiment of the present disclosure. In the photodetector 1i of Figure 1, the lens portion 13 is arranged on the side of the semiconductor substrate 2 where the light-receiving portion 11 is arranged. In contrast, in the photodetector 1i of Figure 26, the lens portion 13 is arranged on the side where the semiconductor layer 3 is arranged. That is, the lens portion 13 in Figure 26 is arranged to face the light-receiving portion 11 via a buffer layer 4.
[0111] In the photodetector 1i shown in Figure 26, the surface on which the semiconductor layer 3 of the semiconductor substrate 2 is located becomes the light incident surface (i.e., the first surface A1). In the example shown in Figure 26, a wiring layer 6 is located between the lens portion 13 and the semiconductor layer 3. In this specification, the configuration of the photodetector 1 shown in Figure 1 is also referred to as a BSI configuration, and the configuration of the photodetector 1i shown in Figure 26 is also referred to as an FSI (Frontside Illumination) configuration.
[0112] In the formation process of the photodetector 1i shown in Figure 26, the step of thinning the semiconductor substrate 2 is unnecessary, so the formation process can be simplified compared to the photodetector 1 shown in Figure 1.
[0113] Figure 27 is a cross-sectional view showing the configuration of a photodetector 1j according to a modified example of the sixth embodiment of the present disclosure. The photodetector 1j in Figure 27 has a buffer region 4a and a light-receiving unit 11 formed in a trench of the semiconductor region 3a, similar to Figure 22. The lens portion 13 in Figure 27 is arranged to face the light-receiving unit 11 via the buffer region 4a. The FSI structure according to the sixth embodiment of the present disclosure can be applied to any of the first to fifth embodiments.
[0114] (Seventh Embodiment) Figure 28 is a cross-sectional view showing the configuration of a photodetector 1k according to the seventh embodiment of the present disclosure. The photodetector 1k in Figure 28 does not have a semiconductor layer 3 compared to the photodetector 1 in Figure 1. In the semiconductor substrate 2 of Figure 28, a buffer layer (first semiconductor layer) 4 and a semiconductor layer (second semiconductor layer) 5 are stacked in this order from the side opposite to the incident light surface (i.e., the bottom side of Figure 28).
[0115] In Figure 28, the wiring layer 6 is positioned in contact with the buffer layer 4. In Figure 28, the interface between the buffer layer 4 and the wiring layer 6 becomes the second surface A2 of the semiconductor substrate 2.
[0116] The manufacturing process of the photodetector 1k will be explained below with reference to Figures 29 to 35. Figure 29 shows the process of forming the semiconductor layer 3, the buffer layer 4, and the light-receiving section 11. The semiconductor layer 3, the buffer layer 4, and the light-receiving section 11 are formed on the semiconductor substrate 2 by epitaxial growth or the like.
[0117] Figure 30 shows the bonding process for the dummy substrate. In Figure 30, the semiconductor substrate 2 is flipped, and the dummy substrate 31 is bonded to the side of the semiconductor substrate 2 where the light-receiving portion 11 is located (for example, the first surface A1). The dummy substrate 31 is, for example, a Si substrate.
[0118] Figure 31 shows the polishing process of the semiconductor substrate 2. In Figure 31, the semiconductor substrate 2 is polished from the side opposite to the bonding surface (first surface A1) with the dummy substrate 31. This removes the semiconductor layer 3 and a portion of the buffer layer 4.
[0119] Figure 32 shows the ion implantation process into the semiconductor substrate 2. In Figure 32, impurity ions are implanted from the polished side (second surface A2) of the semiconductor substrate 2. This forms the pixel separation region 16 and the semiconductor regions 14 and 15 of the multiplication region 12. Note that a part of the multiplication region 12 (for example, the semiconductor region 14) may be formed by epitaxial growth or the like in a step prior to Figure 32.
[0120] Figure 33 shows the process of forming the wiring layer 6 (BEOL). In Figure 33, the wiring layer 6 is formed on the second surface A2 side.
[0121] Figure 34 shows the bonding process with the logic board 22. In Figure 34, the wiring layer 6 and the logic board 22 are bonded at the bonding portion 24 (for example, Cu-Cu bonding).
[0122] Figure 35 shows the process of forming the lens portion 13. In Figure 35, the dummy substrate 31 is removed by polishing or the like. The lens portion 13 is formed on the first surface A1 side of the semiconductor substrate 2. The photodetector 1k shown in Figure 28 is formed by subsequent packaging processes.
[0123] As described above, the multiplication section 12 in Figure 28 can be formed by ion implantation from the second surface A2. Compared with the multiplication section 12 in Figure 1, the multiplication section 12 in Figure 28 is positioned closer to the second surface A2 of the semiconductor substrate 2. This allows for a reduction in the implantation energy of the ion implanter, similar to the pixel 10a in Figure 5. The configuration of the photodetector element 1k according to the seventh embodiment of this disclosure can be applied to any of the first to sixth embodiments.
[0124] (Eighth Embodiment) Figure 36 is a block diagram showing the configuration of a distance measuring system 90 according to the eighth embodiment of the present disclosure. The distance measuring system 90 of Figure 36 can measure the distance to an object M. The distance measuring system 90 has a light-emitting device 91 and a distance measuring device 92. The distance measuring device 92 has a light detection device 1, a light emission timing control unit 93, a control unit 94, a time-of-flight detection unit 95, a histogram generation unit 96, and a distance detection unit 97.
[0125] As the light detection device 1 in Figure 36, any of the light detection devices 1 and 1a to 1k (hereinafter collectively referred to as light detection device 1) according to the first to seventh embodiments can be applied.
[0126] The light emission timing control unit 93, the control unit 94, the time-of-flight detection unit 95, the histogram generation unit 96, and some or all of the distance detection unit 97 (hereinafter referred to as the distance measuring unit) may be arranged within the light detection device 1. For example, the distance measuring unit may be arranged in the logic circuit 23 of Figure 4, etc. Also, the light emission device 91 and the distance measuring device 92 may be arranged on the same semiconductor substrate (or a multilayer semiconductor substrate).
[0127] The light-emitting device 91 intermittently emits light pulses (TX: Transmitter exchange) signals toward object M. The light-detecting device 1 repeatedly receives reflected light pulses (RX: Received exchange) signals that are generated when the TX signal is reflected by object M.
[0128] The light-emitting device 91 has, for example, a plurality of light-emitting elements arranged in a two-dimensional direction. Furthermore, the light-emitting device 91 can adjust the pulse width and phase of the individual TX signals emitted by the plurality of light-emitting elements through the control of the light-emitting timing control unit 93.
[0129] The control unit 94 controls the light detection device 1 and the light emission timing control unit 93. For example, the control unit 94 generates a clock signal that synchronizes the light emission operation of the light emission device 91 with the light receiving operation of the light detection device 1.
[0130] The time-of-flight detection unit 95 detects the time of flight (ToF) from the time the light-emitting device 91 emits a TX signal until the light detection device 1 receives an RX signal. The histogram generation unit 96 generates a histogram classifying the frequency of RX signal reception for predetermined unit reception periods based on the time of flight repeatedly detected by the time-of-flight detection unit 95. The distance detection unit 97 detects the distance between the distance measuring system 90 and object M based on the generated histogram.
[0131] The light detection device 1 according to the first to seventh embodiments of this disclosure can detect the reception of an RX signal with high accuracy by suppressing dark current. Furthermore, when the light detection device 1 of Figure 1 is applied to the distance measuring system 90, jitter and the like can be suppressed, and ToF can be detected with high accuracy. This improves the distance measuring accuracy of the distance measuring system 90. Note that the light detection device 1 may be applied to an image processing system or the like, in addition to the distance measuring system.
[0132] (Application Examples) The technology disclosed herein can be applied to a variety of products. For example, the technology disclosed herein may be implemented as a device mounted on any type of mobile vehicle, such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobility devices, airplanes, drones, ships, robots, construction machinery, or agricultural machinery (tractors).
[0133] Figure 37 is a block diagram showing a schematic configuration example of a vehicle control system 7000, which is an example of a mobile control system to which the technology of this disclosure may be applied. The vehicle control system 7000 comprises a plurality of electronic control units connected via a communication network 7010. In the example shown in Figure 37, the vehicle control system 7000 comprises a drive system control unit 7100, a body system control unit 7200, a battery control unit 7300, an external information detection unit 7400, an internal information detection unit 7500, and an integrated control unit 7600. The communication network 7010 connecting these plurality of control units may be an in-vehicle communication network conforming to any standard such as CAN (Controller Area Network), LIN (Local Interconnect Network), LAN (Local Area Network), or FlexRay®.
[0134] Each control unit comprises a microcomputer that performs calculations according to various programs, a storage unit that stores programs executed by the microcomputer or parameters used in various calculations, and a drive circuit that drives various controlled devices. Each control unit is equipped with a network interface for communication with other control units via the communication network 7010, and a communication interface for communication with devices or sensors inside or outside the vehicle via wired or wireless communication. Figure 37 shows the functional configuration of the integrated control unit 7600, which includes a microcomputer 7610, a general-purpose communication interface 7620, a dedicated communication interface 7630, a positioning unit 7640, a beacon receiver 7650, an in-vehicle equipment interface 7660, an audio / image output unit 7670, an in-vehicle network interface 7680, and a storage unit 7690. Other control units similarly include a microcomputer, a communication interface, and a storage unit.
[0135] The drivetrain control unit 7100 controls the operation of devices related to the vehicle's drivetrain according to various programs. For example, the drivetrain control unit 7100 functions as a control device for generating driving force for the vehicle, such as an internal combustion engine or a drive motor; a driving force transmission mechanism for transmitting driving force to the wheels; a steering mechanism for adjusting the steering angle of the vehicle; and a braking device for generating braking force for the vehicle. The drivetrain control unit 7100 may also function as a control device such as an ABS (Antilock Brake System) or an ESC (Electronic Stability Control).
[0136] A vehicle state detection unit 7110 is connected to the drive system control unit 7100. The vehicle state detection unit 7110 includes, for example, a gyro sensor for detecting the angular velocity of the axial rotation motion of the vehicle body, an acceleration sensor for detecting the acceleration of the vehicle, or at least one of the sensors for detecting the amount of operation of the accelerator pedal, the amount of operation of the brake pedal, the steering angle of the steering wheel, the engine speed, or the rotational speed of the wheels. The drive system control unit 7100 performs calculation processing using the signals input from the vehicle state detection unit 7110 and controls the internal combustion engine, drive motor, electric power steering system, brake system, etc.
[0137] The body system control unit 7200 controls the operation of various devices mounted on the vehicle body according to various programs. For example, the body system control unit 7200 functions as a control device for a keyless entry system, a smart key system, a power window system, or various lamps such as headlights, reverse lights, brake lights, turn signals, or fog lights. In this case, the body system control unit 7200 may receive radio waves transmitted from a portable device that replaces a key or signals from various switches. The body system control unit 7200 receives these radio waves or signals and controls the vehicle's door lock system, power window system, lamps, etc.
[0138] The battery control unit 7300 controls the secondary battery 7310, which is the power source for the drive motor, according to various programs. For example, the battery control unit 7300 receives information such as battery temperature, battery output voltage, or remaining battery capacity from the battery device equipped with the secondary battery 7310. The battery control unit 7300 uses these signals to perform calculations and controls the temperature of the secondary battery 7310 or the cooling device provided in the battery device.
[0139] The external information detection unit 7400 detects information from outside the vehicle equipped with the vehicle control system 7000. For example, at least one of the imaging unit 7410 and the external information detection unit 7420 is connected to the external information detection unit 7400. The imaging unit 7410 includes at least one of the following: a Time of Flight (ToF) camera, a stereo camera, a monocular camera, an infrared camera, and other cameras. The external information detection unit 7420 includes at least one of the following: an environmental sensor for detecting the current weather or climate, or an ambient information detection sensor for detecting other vehicles, obstacles, or pedestrians around the vehicle equipped with the vehicle control system 7000.
[0140] The environmental sensor may be at least one of the following: a raindrop sensor for detecting rain, a fog sensor for detecting fog, a sunshine sensor for detecting the degree of sunlight, and a snow sensor for detecting snowfall. The ambient information detection sensor may be at least one of the following: an ultrasonic sensor, a radar device, and a LIDAR (Light Detection and Ranging, Laser Imaging Detection and Ranging) device. These imaging unit 7410 and external information detection unit 7420 may be provided as independent sensors or devices, or as a device in which multiple sensors or devices are integrated.
[0141] Here, Figure 38 shows an example of the installation location of the imaging unit 7410 and the external information detection unit 7420. The imaging units 7910, 7912, 7914, 7916, and 7918 are installed, for example, at least one of the following locations on the vehicle 7900: the front nose, side mirrors, rear bumper, back door, and the upper part of the windshield inside the passenger compartment. The imaging unit 7910 installed on the front nose and the imaging unit 7918 installed on the upper part of the windshield inside the passenger compartment mainly acquire images of the front of the vehicle 7900. The imaging units 7912 and 7914 installed on the side mirrors mainly acquire images of the sides of the vehicle 7900. The imaging unit 7916 installed on the rear bumper or back door mainly acquires images of the rear of the vehicle 7900. The imaging unit 7918 installed on the upper part of the windshield inside the passenger compartment is mainly used for detecting preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, or lanes.
[0142] Figure 38 shows an example of the imaging range of each imaging unit 7910, 7912, 7914, and 7916. Imaging range a shows the imaging range of imaging unit 7910 located on the front nose, imaging ranges b and c show the imaging ranges of imaging units 7912 and 7914 located on the side mirrors, respectively, and imaging range d shows the imaging range of imaging unit 7916 located on the rear bumper or back door. For example, by superimposing the image data captured by imaging units 7910, 7912, 7914, and 7916, an overhead view image of the vehicle 7900 can be obtained.
[0143] The external information detection units 7920, 7922, 7924, 7926, 7928, and 7930, which are installed on the front, rear, sides, corners, and the upper part of the windshield inside the vehicle 7900, may be, for example, ultrasonic sensors or radar devices. The external information detection units 7920, 7926, and 7930, which are installed on the front nose, rear bumper, back door, and the upper part of the windshield inside the vehicle 7900, may be, for example, LIDAR devices. These external information detection units 7920 to 7930 are mainly used for detecting preceding vehicles, pedestrians, or obstacles.
[0144] Returning to Figure 37, the explanation continues. The external information detection unit 7400 causes the imaging unit 7410 to capture images of the area outside the vehicle and receives the captured image data. The external information detection unit 7400 also receives detection information from the connected external information detection unit 7420. If the external information detection unit 7420 is an ultrasonic sensor, radar device, or LIDAR device, the external information detection unit 7400 emits ultrasonic waves or electromagnetic waves and receives information on the received reflected waves. Based on the received information, the external information detection unit 7400 may perform object detection processing such as detecting people, vehicles, obstacles, signs, or characters on the road surface, or distance detection processing. Based on the received information, the external information detection unit 7400 may perform environmental recognition processing to recognize rainfall, fog, or road surface conditions. Based on the received information, the external information detection unit 7400 may calculate the distance to an object outside the vehicle.
[0145] Furthermore, the external information detection unit 7400 may perform image recognition processing or distance detection processing to recognize people, vehicles, obstacles, signs, or characters on the road surface based on the received image data. The external information detection unit 7400 may perform distortion correction or alignment processing on the received image data, and may also synthesize image data captured by different imaging units 7410 to generate an overhead view image or a panoramic image. The external information detection unit 7400 may also perform viewpoint transformation processing using image data captured by different imaging units 7410.
[0146] The in-vehicle information detection unit 7500 detects information inside the vehicle. The in-vehicle information detection unit 7500 is connected to, for example, a driver status detection unit 7510 that detects the driver's state. The driver status detection unit 7510 may include a camera that images the driver, a biosensor that detects the driver's biometric information, or a microphone that collects sounds inside the vehicle. The biosensor is installed, for example, on the seat or steering wheel and detects the biometric information of an occupant sitting in the seat or a driver holding the steering wheel. Based on the detection information input from the driver status detection unit 7510, the in-vehicle information detection unit 7500 may calculate the driver's level of fatigue or concentration, or determine whether the driver is dozing off. The in-vehicle information detection unit 7500 may perform processing such as noise cancellation on the collected audio signals.
[0147] The integrated control unit 7600 controls the overall operation of the vehicle control system 7000 according to various programs. An input unit 7800 is connected to the integrated control unit 7600. The input unit 7800 is implemented by a device that can be operated by the passenger, such as a touch panel, buttons, a microphone, a switch, or a lever. The integrated control unit 7600 may also receive data obtained by voice recognition of voice input from the microphone. The input unit 7800 may be, for example, a remote control device using infrared or other radio waves, or an externally connected device such as a mobile phone or PDA (Personal Digital Assistant) that is compatible with the operation of the vehicle control system 7000. The input unit 7800 may be, for example, a camera, in which case the passenger can input information by gesture. Alternatively, data obtained by detecting the movement of a wearable device worn by the passenger may be input. Furthermore, the input unit 7800 may include, for example, an input control circuit that generates an input signal based on the information input by the passenger using the above input unit 7800 and outputs it to the integrated control unit 7600. Passengers and others can input various data or instruct the vehicle control system 7000 to perform processing operations by operating this input unit 7800.
[0148] The storage unit 7690 may include a ROM (Read Only Memory) for storing various programs executed by a microcomputer, and a RAM (Random Access Memory) for storing various parameters, calculation results, or sensor values. The storage unit 7690 may also be implemented using a magnetic storage device such as an HDD (Hard Disk Drive), a semiconductor storage device, an optical storage device, or a magneto-optical storage device.
[0149] The general-purpose communication interface 7620 is a general-purpose communication interface that mediates communication between the external environment 7750 and various devices present in the external environment 7750. The general-purpose communication interface 7620 may implement cellular communication protocols such as GSM (Global System of Mobile communications), WiMAX (registered trademark), LTE (registered trademark) (Long Term Evolution), or LTE-A (LTE-Advanced), or other wireless communication protocols such as wireless LAN (also known as Wi-Fi (registered trademark)) and Bluetooth (registered trademark). The general-purpose communication interface 7620 may connect, for example, to devices (e.g., application servers or control servers) located on an external network (e.g., the Internet, a cloud network, or a carrier-specific network) via a base station or access point. Furthermore, the general-purpose communication I / F 7620 may connect to terminals located near the vehicle (for example, terminals belonging to the driver, pedestrians, or shops, or MTC (Machine Type Communication) terminals) using, for example, P2P (Peer To Peer) technology.
[0150] The dedicated communication interface 7630 is a communication interface that supports communication protocols developed for use in vehicles. The dedicated communication interface 7630 may implement standard protocols such as WAVE (Wireless Access in Vehicle Environment), DSRC (Dedicated Short Range Communications), or cellular communication protocols, which are combinations of lower-layer IEEE 802.11p and upper-layer IEEE 1609. The dedicated communication interface 7630 typically performs V2X communication, a concept that includes one or more of the following: vehicle-to-vehicle communication, vehicle-to-infrastructure communication, vehicle-to-home communication, and vehicle-to-pedestrian communication.
[0151] The positioning unit 7640 performs positioning by receiving, for example, GNSS (Global Navigation Satellite System) signals from GNSS satellites (for example, GPS signals from GPS (Global Positioning System) satellites) and generates location information including the vehicle's latitude, longitude, and altitude. The positioning unit 7640 may also determine its current location by exchanging signals with a wireless access point, or it may acquire location information from a terminal such as a mobile phone, PHS, or smartphone that has a positioning function.
[0152] The beacon receiver 7650 receives radio waves or electromagnetic waves transmitted from, for example, a radio station installed on a road, and obtains information such as the current location, traffic congestion, road closures, or travel time. The functions of the beacon receiver 7650 may also be included in the dedicated communication interface 7630 described above.
[0153] The in-vehicle equipment interface 7660 is a communication interface that mediates connections between the microcomputer 7610 and various in-vehicle equipment 7760 located inside the vehicle. The in-vehicle equipment interface 7660 may establish a wireless connection using wireless communication protocols such as wireless LAN, Bluetooth®, NFC (Near Field Communication), or WUSB (Wireless USB). Furthermore, the in-vehicle equipment I / F 7660 may establish a wired connection such as USB (Universal Serial Bus), HDMI (High-Definition Multimedia Interface), or MHL (Mobile High-definition Link) via connection terminals (and, if necessary, cables) not shown. The in-vehicle equipment 7760 may include, for example, at least one of the following: a mobile device or wearable device owned by a passenger, or an information device brought into or installed in the vehicle. The in-vehicle equipment 7760 may also include a navigation device that searches for a route to any destination. The in-vehicle equipment I / F 7660 exchanges control signals or data signals with these in-vehicle equipment 7760s.
[0154] The in-vehicle network interface 7680 is an interface that mediates communication between the microcomputer 7610 and the communication network 7010. The in-vehicle network interface 7680 transmits and receives signals and other data in accordance with a predetermined protocol supported by the communication network 7010.
[0155] The microcomputer 7610 of the integrated control unit 7600 controls the vehicle control system 7000 according to various programs based on information acquired via at least one of the general-purpose communication I / F 7620, dedicated communication I / F 7630, positioning unit 7640, beacon receiver 7650, in-vehicle equipment I / F 7660, and in-vehicle network I / F 7680. For example, the microcomputer 7610 may calculate control target values for the drive force generator, steering mechanism, or braking device based on acquired information from inside and outside the vehicle, and output control commands to the drive system control unit 7100. For example, the microcomputer 7610 may perform coordinated control aimed at realizing ADAS (Advanced Driver Assistance System) functions, including vehicle collision avoidance or impact mitigation, following driving based on distance between vehicles, maintaining vehicle speed, vehicle collision warning, or vehicle lane departure warning. Furthermore, the microcomputer 7610 may perform cooperative control for purposes such as autonomous driving, where the vehicle drives autonomously without driver intervention, by controlling the drive force generating device, steering mechanism, or braking device, etc., based on the acquired information about the vehicle's surroundings.
[0156] The microcomputer 7610 may generate three-dimensional distance information between the vehicle and surrounding structures, people, and other objects based on information acquired via at least one of the general-purpose communication I / F 7620, dedicated communication I / F 7630, positioning unit 7640, beacon receiver 7650, in-vehicle equipment I / F 7660, and in-vehicle network I / F 7680, and create local map information including surrounding information of the vehicle's current location. The microcomputer 7610 may also predict dangers such as vehicle collision, proximity of pedestrians, or entry into a closed road based on the acquired information, and generate a warning signal. The warning signal may be, for example, a signal to generate a warning sound or to illuminate a warning lamp.
[0157] The audio-image output unit 7670 transmits at least one of audio and image output signals to an output device capable of visually or audibly notifying the vehicle's occupants or those outside the vehicle. In the example shown in Figure 37, the output devices are exemplified as an audio speaker 7710, a display unit 7720, and an instrument panel 7730. The display unit 7720 may include, for example, at least one of an onboard display and a head-up display. The display unit 7720 may also have an AR (Augmented Reality) display function. The output device may be other devices besides these, such as headphones, wearable devices such as glasses-type displays worn by occupants, projectors, or lamps. If the output device is a display device, the display device visually displays the results obtained from various processes performed by the microcomputer 7610 or information received from other control units in various formats such as text, images, tables, and graphs. If the output device is an audio output device, the audio output device converts the audio signal, consisting of reproduced audio data or sound data, into an analog signal and outputs it audibly.
[0158] In the example shown in Figure 37, at least two control units connected via the communication network 7010 may be integrated into a single control unit. Alternatively, each control unit may be composed of multiple control units. Furthermore, the vehicle control system 7000 may include other control units not shown. Also, in the above description, some or all of the functions performed by one control unit may be assigned to other control units. In other words, as long as information is transmitted and received via the communication network 7010, predetermined calculation processing may be performed by any of the control units. Similarly, a sensor or device connected to one control unit may be connected to another control unit, and multiple control units may transmit and receive detection information to each other via the communication network 7010.
[0159] In the vehicle control system 7000 described above, the light detection device 1 according to this embodiment, as described with reference to Figure 1, can be applied to the imaging unit 7410 in the application example shown in Figure 37. This improves the light detection accuracy of the imaging unit 7410, enabling high-precision imaging or high-precision distance measurement.
[0160] The present technology can take the following configurations: (1) A photodetector comprising: a substrate; a light-receiving unit disposed on the substrate and containing a first semiconductor material, which generates an electric charge based on incident light by photoelectric conversion; a multiplier unit disposed at a distance from the light-receiving unit in a first direction, which avalanches the charge generated in the light-receiving unit; and a first semiconductor region comprising the first semiconductor material and a second semiconductor material having a larger band gap than the first semiconductor material, which transfers the generated charge to the multiplier unit, wherein the first semiconductor region has a concentration gradient of the first semiconductor material that changes stepwise or continuously in the first direction. (2) The photodetector according to (1), wherein the region of the first semiconductor region closer to the light-receiving unit has a high concentration of the first semiconductor material, and the region farther from the light-receiving unit has a low concentration of the first semiconductor material. (3) The photodetector according to (1), wherein the multiplier unit contains the first semiconductor material and the second semiconductor material. (4) The photodetector according to (2), wherein the multiplier portion comprises a first semiconductor material having a concentration of 85% or less. (5) The photodetector according to (3) or (4), wherein the multiplier portion comprises a second semiconductor region containing an impurity of a first conductivity type and a third semiconductor region containing an impurity of a second conductivity type, and at least one of the second semiconductor region or the third semiconductor region comprises the first semiconductor material and the second semiconductor material. (6) The photodetector according to (5), wherein the photodetector comprises a fourth semiconductor region disposed between the second semiconductor region and the third semiconductor region and having a lower impurity concentration than the second semiconductor region and the third semiconductor region. (7) The photodetector according to any one of (1) to (6), further comprising: a first semiconductor layer containing the second semiconductor material; a second semiconductor layer laminated on the first semiconductor layer, comprising the first semiconductor material and the second semiconductor material, and having a concentration gradient of the first semiconductor material in the lamination direction; and a third semiconductor layer laminated on the second semiconductor layer, having the light-receiving portion.(8) The photodetector according to any one of (1) to (6), further comprising: a first semiconductor layer comprising the first semiconductor material and the second semiconductor material and having a concentration gradient of the first semiconductor material in the stacking direction; a second semiconductor layer stacked on the first semiconductor layer and having the light-receiving portion; and a wiring layer in contact with the surface of the first semiconductor layer opposite to the main surface facing the second semiconductor layer. (9) The photodetector according to any one of (1) to (6), further comprising a fifth semiconductor region comprising the second semiconductor material, wherein the light-receiving portion is arranged to face the fifth semiconductor region in a first direction and in a second direction intersecting the first direction via the first semiconductor region, and the first semiconductor region has a concentration gradient of the first semiconductor material in the first direction and in the second direction. (10) The photodetector according to (9), wherein the fifth semiconductor region has a recess on one main surface of the substrate, the first semiconductor region is arranged in the recess of the fifth semiconductor region and has a recess on one main surface of the substrate, and the light receiving portion is arranged in the recess of the first semiconductor region. (11) The photodetector according to any one of (1) to (10), wherein the multiplier is arranged inside the first semiconductor region. (12) The photodetector according to (7), wherein a part of the multiplier is arranged inside the second semiconductor layer, and another part of the multiplier is arranged inside the first semiconductor layer. (13) The photodetector according to (9), wherein a part of the multiplier is arranged inside the first semiconductor region, and another part of the multiplier is arranged inside the fifth semiconductor region. (14) The photodetector according to (7), (8), (11), or (12), comprising: a plurality of pixels having a plurality of light-receiving units and a plurality of first semiconductor regions; and a pixel separation region for separating a plurality of adjacent pixels, wherein the pixel separation region is disposed between a plurality of adjacent first semiconductor regions. (15) The photodetector according to (9), (10), (11), or (13), comprising: a plurality of pixels having a plurality of light-receiving units, a plurality of first semiconductor regions and a plurality of fifth semiconductor regions; and a pixel separation region for separating a plurality of adjacent pixels, wherein the pixel separation region is disposed between a plurality of adjacent fifth semiconductor regions.(16) The light-receiving portion is further provided with a lens portion for focusing the incident light, wherein the lens portion is arranged on one main surface of the substrate on which the light-receiving portion is arranged, according to any one of (1) to (15). (17) The light-receiving portion is further provided with a lens portion for focusing the incident light, wherein the lens portion is arranged to face the light-receiving portion via the first semiconductor region, according to any one of (1) to (15). (18) The light-receiving portion further comprises a first semiconductor layer containing the second semiconductor material, wherein the multiplier portion is arranged inside the first semiconductor layer, according to (1) or (2). (19) The light-receiving portion is Ge (germanium), and the second semiconductor material is Si (silicon), according to any one of (1) to (18). (20) The photodetector according to (14) or (15), wherein the pixel has a SPAD (Single Photon Avalanche Diode). (21) The photodetector according to any one of (1) to (20), wherein the first semiconductor region has a film thickness of 2 μm or more. (22) The photodetector according to any one of (1) to (20), wherein the first semiconductor region has a film thickness of 3 μm or more. (23) The photodetector according to any one of (11) to (13), wherein the first semiconductor region includes a sixth semiconductor region and a seventh semiconductor region in which the band gap change with respect to the concentration change of the first semiconductor material is greater than that of the sixth semiconductor region, and at least a part of the multiplication section is arranged in the sixth semiconductor region. (24) A distance measuring system comprising: a light detection device according to any one of (1) to (23) that receives reflected light when emitted light is reflected by an object; a light-emitting device that emits the emitted light; and a distance measuring unit that measures the distance to the object based on the reflected light.
[0161] The aspects of this disclosure are not limited to the individual embodiments described above, but include various modifications that a person skilled in the art could conceive, and the effects of this disclosure are not limited to those described above. In other words, various additions, modifications, and partial deletions are possible, as long as they do not depart from the conceptual idea and spirit of this disclosure derived from the claims and their equivalents.
[0162] 1, 1a, 1b, 1c, 1d, 1e, 1f, 1g, 1h, 1i, 1j, 1k: Photodetector, 2: Semiconductor substrate, 3, 5, 7, 8, 9, 102: Semiconductor layer, 3a, 14, 14a, 14b, 14c, 15, 15a, 15b, 15c, 41, 202, 203: Semiconductor region, 4: Buffer layer, 4a: Buffer region, 6: Wiring layer, 10, 10a, 100, 200: Pixel, 11, 101: Light receiving section, 12, 12a, 12b, 12c, 201: Multiplier section, 13: Lens section, 16, 16a, 16b, 16c: Pixel separation region, 21: Pixel array section, 22: Logic substrate, 23: Logic circuit, 24: Junction, 31: Dummy substrate, 90: Distance measuring system, 91 Light-emitting device, 92 Range-measuring device, 93 Light-emitting timing control unit, 94 Control unit, 95 Time-of-flight detection unit, 96 Histogram generation unit, 97 Distance detection unit
Claims
1. A photodetector comprising: a substrate; a light-receiving unit disposed on the substrate and comprising a first semiconductor material, which generates an electric charge based on incident light by photoelectric conversion; a multiplier unit disposed at a distance from the light-receiving unit in a first direction, which avalanches the charge generated in the light-receiving unit; and a first semiconductor region comprising the first semiconductor material and a second semiconductor material having a larger band gap than the first semiconductor material, which transfers the generated charge to the multiplier unit, wherein the first semiconductor region has a concentration gradient of the first semiconductor material that changes stepwise or continuously in the first direction.
2. The photodetector according to claim 1, wherein the region of the first semiconductor area has a high concentration of the first semiconductor material in the region close to the light-receiving part, and the region far from the light-receiving part has a low concentration of the first semiconductor material.
3. The photodetector according to claim 1, wherein the multiplication unit includes the first semiconductor material and the second semiconductor material.
4. The photodetector according to claim 2, wherein the multiplier includes a first semiconductor material having a concentration of 85% or less.
5. The photodetector according to claim 3, wherein the multiplier has a second semiconductor region containing an impurity of a first conductivity type and a third semiconductor region containing an impurity of a second conductivity type, and at least one of the second semiconductor region or the third semiconductor region contains the first semiconductor material and the second semiconductor material.
6. The photodetector according to claim 5, comprising a fourth semiconductor region disposed between the second semiconductor region and the third semiconductor region, wherein the impurity concentration is lower than that of the second and third semiconductor regions.
7. The photodetector according to claim 1, further comprising: a first semiconductor layer containing the second semiconductor material; a second semiconductor layer laminated on the first semiconductor layer, containing the first semiconductor material and the second semiconductor material, and having a concentration gradient of the first semiconductor material in the lamination direction; and a third semiconductor layer laminated on the second semiconductor layer, having the light-receiving portion.
8. The photodetector according to claim 1, further comprising: a first semiconductor layer comprising the first semiconductor material and the second semiconductor material, having a concentration gradient of the first semiconductor material in the stacking direction; a second semiconductor layer stacked on the first semiconductor layer and having the light-receiving portion; and a wiring layer in contact with the surface of the first semiconductor layer opposite to the main surface of the first semiconductor layer that faces the second semiconductor layer.
9. The photodetector according to claim 1, further comprising a fifth semiconductor region containing the second semiconductor material, wherein the light-receiving portion is arranged to face the fifth semiconductor region in a first direction and in a second direction intersecting the first direction via the first semiconductor region, and the first semiconductor region has a concentration gradient of the first semiconductor material in the first direction and in the second direction.
10. The photodetector according to claim 9, wherein the fifth semiconductor region has a recess on one main surface of the substrate, the first semiconductor region is arranged in the recess of the fifth semiconductor region and has a recess on one main surface of the substrate, and the light-receiving portion is arranged in the recess of the first semiconductor region.
11. The photodetector according to claim 1, wherein the multiplication unit is arranged inside the first semiconductor region.
12. The photodetector according to claim 7, wherein a portion of the multiplication portion is arranged inside the second semiconductor layer, and the other portion of the multiplication portion is arranged inside the first semiconductor layer.
13. The photodetector according to claim 9, wherein a portion of the multiplication portion is arranged inside the first semiconductor region, and another portion of the multiplication portion is arranged inside the fifth semiconductor region.
14. The photodetector according to claim 7, comprising: a plurality of light-receiving units; a plurality of pixels having a plurality of first semiconductor regions; and a pixel separation region for separating a plurality of adjacent pixels, wherein the pixel separation region is disposed between a plurality of adjacent first semiconductor regions.
15. The photodetector according to claim 9, comprising: a plurality of light-receiving units; a plurality of pixels having a plurality of first semiconductor regions and a plurality of fifth semiconductor regions; and a pixel separation region for separating a plurality of adjacent pixels, wherein the pixel separation region is disposed between a plurality of adjacent fifth semiconductor regions.
16. The light detection device according to claim 1, wherein the light receiving portion is provided with a lens portion for focusing the incident light, and the lens portion is arranged on one main surface of the substrate on which the light receiving portion is located.
17. The light detection device according to claim 1, wherein the light receiving portion is provided with a lens portion for focusing the incident light, and the lens portion is arranged to face the light receiving portion via the first semiconductor region.
18. The photodetector according to claim 1, further comprising a first semiconductor layer containing the second semiconductor material, wherein the multiplication unit is disposed inside the first semiconductor layer.
19. The photodetector according to claim 1, wherein the first semiconductor material is Ge (germanium) and the second semiconductor material is Si (silicon).
20. A distance measuring system comprising: a light detection device according to claim 1, which receives reflected light that has been reflected by an object; a light-emitting device that emits the light; and a distance measuring unit that measures the distance to the object based on the reflected light.