Group iii nitride semiconductor light-emitting element

Abstract

This group III nitride semiconductor light-emitting element has an element layer having an n-type semiconductor layer expressed by the composition formula AlXGaYIn1-X-YN, an active layer, and a p-type semiconductor layer in this order on a single-crystal substrate transmissive to light having a wavelength of 200 nm-365 nm, wherein the active layer is configured to emit light having a wavelength of 200 nm to 365 nm, the area of an element layer lamination surface in the single crystal substrate is larger than the area of an upper surface which is opposite to the element layer lamination surface, the single crystal substrate is provided with a plurality of side surfaces serving as prescribed crystal surfaces, the plurality of side surfaces include a plurality of inclined surfaces inclined to the element layer lamination surface, and an angle formed by one inclined surface and another inclined surface among the plurality of inclined surfaces is less than 90°.

Description

Group III nitride semiconductor light-emitting element

[0001] The present invention relates to a group III nitride semiconductor light-emitting element, and more particularly to a group III nitride semiconductor light-emitting element that emits ultraviolet light.

[0002] In recent years, research and development of semiconductor light-emitting devices with emission wavelengths in the deep ultraviolet region has been progressing as light sources that have the effect of inactivating bacteria and viruses and sterilizing them. Furthermore, semiconductor light-emitting devices that emit deep ultraviolet light are attracting attention as light sources for resin curing and inspection. As a semiconductor that realizes such deep ultraviolet emission, Al is a popular choice. q Ga p In 1-q-p A light-emitting element using a group III nitride semiconductor represented by N (0 ≤ q ≤ 1.0, 0 ≤ p ≤ 1.0, 0 ≤ q + p ≤ 1.0) has been proposed. Because such a light-emitting element using a group III nitride semiconductor is a direct bandgap semiconductor in the entire wavelength range of 200 to 365 nm, it functions as a deep ultraviolet light-emitting element. For the single crystal substrate used for growth in the above deep ultraviolet light-emitting element, dissimilar single crystal substrate materials such as sapphire, SiC, and Si, or homogeneous single crystal substrates such as AlN and GaN are used, and a deep ultraviolet light-emitting element using a group III nitride semiconductor is formed by crystal growth of a laminate that forms the light-emitting element on the substrate. In particular, it is known that using an AlN single crystal substrate, which is a homogeneous substrate, is desirable from the viewpoint of increasing power output and extending lifespan because it suppresses the generation of dislocations inside the deep ultraviolet light-emitting element layer.

[0003] For example, Patent Document 1 discloses a group III nitride semiconductor light-emitting device in which an element layer is stacked on a single crystal substrate, the area of ​​the element layer stacking surface is larger than the area of ​​the back surface of the element layer stacking surface of the substrate, the single crystal substrate has a plurality of sides which are predetermined crystal planes, and the plurality of sides are inclined with respect to the element layer stacking surface.

[0004] Furthermore, Patent Document 2 discloses a semiconductor light-emitting device comprising a substrate having first and second main surfaces and a side surface extending between the first and second main surfaces, and an active layer provided on the first main surface. This document discloses the complementary angle of the angle between the first main surface and at least a portion of the side surface.

[0005] Patent No. 7046834 Patent No. 6521443

[0006] However, conventional ultraviolet light-emitting devices that use frustum-shaped substrates as the light extraction section have the problem of low light extraction efficiency and insufficient light output.

[0007] The present invention was made in view of the problem that in conventional ultraviolet light-emitting devices using substrates with a frustoconical shape or the like, particularly deep ultraviolet light-emitting devices, light reflected from the side of the substrate tends to enter an infinite reflection loop and is ultimately absorbed, thus not contributing to light extraction.

[0008] Therefore, the object of the present invention is to provide a group III nitride semiconductor light-emitting element that has high light extraction efficiency and can obtain high light output.

[0009] One embodiment of the present invention is a group III nitride semiconductor light-emitting device, which is mounted on a single crystal substrate having light transmittance for light with wavelengths of 200 nm to 365 nm and is composed of Al X Ga Y In 1-X-Y A group III nitride semiconductor light-emitting element has an element layer comprising an n-type semiconductor layer represented by N (0 ≤ X ≤ 1.0, 0 ≤ Y ≤ 1.0, 0 ≤ X + Y ≤ 1.0), an active layer, and a p-type semiconductor layer in that order, wherein the active layer is configured to emit light with a wavelength of 200 nm to 365 nm, the area of ​​the element layer stacking surface on the single crystal substrate is larger than the area of ​​the top surface which is the surface opposite to the element layer stacking surface, the single crystal substrate has a plurality of sides which are predetermined crystal planes, the plurality of sides include a plurality of inclined surfaces inclined with respect to the element layer stacking surface, and the angle between one of the plurality of inclined surfaces and another inclined surface is less than 90°.

[0010] This is a schematic diagram of the Group III nitride semiconductor light-emitting element of the first embodiment, viewed from the side (side view). This is a perspective view of the substrate. This is an overhead SEM image of the substrate. This is a perspective view showing the top surface, the element layer stacking surface, and several sides of the substrate in detail. The position of the cross-section of the frustum (dashed line) is also shown. This is a schematic plan view of the substrate as seen from the top side (top view). This is a plan view showing the cross-section of the frustum. This is a magnified view of the corner shown in Figure 4B. This is a diagram showing the method for manufacturing the Group III nitride semiconductor light-emitting element of this embodiment. This is a schematic cross-sectional view of a part of the semiconductor wafer before and after chemical etching. This is a schematic diagram showing the reflection of light and the optical path in a substrate having a regular square frustum shape. This is a perspective view of the substrate of the Group III nitride semiconductor light-emitting element (CX1) of Comparative Example 1, with an overhead SEM image also shown. This is a perspective view of the substrate of the Group III nitride semiconductor light-emitting element (CX2) of Comparative Example 2, with an overhead SEM image also shown. This figure shows a comparison of the light extraction efficiency of the Group III nitride semiconductor light-emitting element of this embodiment (EX), Comparative Example 1 (CX1), and Comparative Example 2 (CX2). This is a schematic diagram of the substrate viewed from the side (side view) from direction P shown in Figure 3. This is a schematic diagram of the substrate viewed from the side (side view) from direction Q shown in Figure 3. This figure shows the simulation results of the light extraction efficiency when the substrate thickness Hsub is 400 μm and 450 μm. This is a schematic diagram of the substrate viewed from the top side (top view) of Modification Example 1 of this embodiment. This is a schematic diagram of the substrate viewed from the top side of Modification Example 2. This is a schematic diagram of the substrate viewed from the top side of Modification Example 3. This is a schematic diagram of the substrate viewed from the top side of Modification Example 4.

[0011] Preferred embodiments of the present invention will be described below, but these may be modified and combined as appropriate. In the following description and accompanying drawings, substantially identical or equivalent parts will be denoted by the same reference numerals.

[0012] [First Embodiment] 1. Structure of Group III Nitride Semiconductor Light-Emitting Device FIG. 1 is a schematic side view (lateral view) of a Group III nitride semiconductor light-emitting device 10 according to a first embodiment of the present invention. The Group III nitride semiconductor light-emitting device 10 includes a light-transmissive substrate 20 and a light-emitting device layer 30 (light-emitting device structure layer) formed on the substrate 20.

[0013] More specifically, the substrate 20 has a dislocation density of 10 －４ cm －２ is a single crystal substrate of aluminum nitride (AlN) below, and the light emitting element layer 30 is formed on the element layer lamination surface 21 which is the back surface of the substrate 20. In the light-emitting device layer 30, the +c-plane of the substrate 20 is used as the device layer lamination surface 21, and on the device layer lamination surface 21, the composition formula Al X Ga Y In 1-X-Y A Group III nitride stacked body including an n-type semiconductor layer 31, an active layer 32, and a p-type semiconductor layer 33 represented by N (0≤X≤1.0, 0≤Y≤1.0, 0≤X+Y≤1.0) is formed by crystal growth.

[0014] Further, the light-emitting device layer 30 has an n-electrode 35 and a p-electrode 36 electrically connected to the n-type semiconductor layer 31 and the p-type semiconductor layer 33, respectively. Note that the p-type semiconductor layer 33 may be provided with a p-contact layer made of a p-type AlGaN layer in order to increase the reflectance of the p-electrode 36.

[0015] The light-emitting device layer 30 is a light-emitting diode (LED) and emits ultraviolet light with a wavelength of 200 nm to 365 nm. The emission wavelength of the light-emitting device layer 30 is preferably 300 nm or less, more preferably 285 nm or less, and even more preferably 270 nm or less.

[0016] The substrate 20 has an upper surface 25 (-c plane) and an element layer lamination surface 21 (+c plane) opposite to the upper surface 25, and the upper surface 25 and the element layer lamination surface 21 are planes parallel to each other. In the present embodiment, the element layer lamination surface 21 has a rectangular shape. Further, the substrate 20 has a thickness of 440 μm. The thickness of the substrate 20 is preferably 100 μm or more, more preferably 300 μm or more. Further, the absorption coefficient of the light-emitting device layer 30 with respect to the emission wavelength is 30 cm －１The following is preferable:

[0017] Figure 2A is a perspective view of the substrate 20, and Figure 2B is an overhead SEM (Scanning Electron Microscope) image of the substrate 20.

[0018] As schematically shown in Figures 1 and 2A, the substrate 20 has a prism portion 20A and a frustum portion 20B on the prism portion 20A. The back surface of the prism portion 20A is the element layer lamination surface 21 of the substrate 20, and the upper surface of the frustum portion 20B is the upper surface 25 of the substrate 20. In Figure 2A, the prism portion 20A and the frustum portion 20B are shown with hatching for clarity.

[0019] The frustum portion 20B has a plurality of side surfaces 23 extending from the upper surface 25 of the substrate 20 to the prismatic portion 20A. Each of the plurality of side surfaces 23 is a crystal plane extending from the upper edge of the prismatic portion 20A. That is, each of the plurality of side surfaces 23 is a predetermined crystal plane of the substrate 20 and is inclined outward from the edge of the upper surface 25 with respect to the element layer stacking surface 21.

[0020] In this embodiment, the multiple side surfaces 23 are crystal planes formed according to the mask shape, and although there is no particular definition of the side of the prismatic portion 20A, it is composed of a-planes to m-planes or inclined facet planes.

[0021] Figure 3 is a perspective view showing in detail the top surface 25, the element layer stacking surface 21, and the multiple side surfaces 23 of the substrate 20. The position (dashed line) of the cross-section of the frustum portion 20B parallel to these surfaces (perpendicular to the central axis CZ) is also shown. Figure 4A is a schematic plan view of the substrate 20 as seen from the top surface 25 side (top view). In Figure 4A, the edges of the multiple side surfaces 23 are omitted from the illustration. Figure 4B is a plan view showing the cross-section of the frustum portion 20B. Figure 4C is a partially enlarged view showing an enlarged corner W shown in Figure 4B.

[0022] As shown in Figures 3 and 4A, on the substrate 20, the area of ​​the element layer stacking surface 21 is larger than the area of ​​the top surface 25 of the substrate 20 (the surface opposite to the element layer stacking surface 21). Furthermore, the top surface 25 of the substrate 20 has a concave hexagonal shape. That is, on the concave hexagonal top surface 25, the interior angles θ1 and θ2 of the two opposing corners in a direction perpendicular to the long side of the rectangular prism portion 20A, which has a rectangular shape on the element layer stacking surface 21 (back surface), are angles greater than 180°.

[0023] Furthermore, the interior angles of the other four corners of the top surface 25 are acute angles. Specifically, the angle θ between two adjacent sides 25E1 and 25E2 of the top surface 25 is 0 < θ < 90°. In this specification, the acute-angled (angle θ) corners of the top surface 25 will be specifically referred to and described as the "vertex TA of the top surface 25".

[0024] Furthermore, as shown in Figures 3 to 4B, the frustum portion 20B has two inclined sides 23 (referred to as facets 23G1 and 23G2 in particular) extending from the apex TA of the upper surface 25 to the prism portion 20A. Facets 23G1 and 23G2 are facets formed independently of the mask shape having the apex TA of the upper surface 25.

[0025] Furthermore, as shown in Figures 4B and 4C, the angle formed by the side surfaces 23 (referred to as side surfaces 23F1 and 23F2 in particular) corresponding to sides 25E1 and 25E2 of the upper surface 25 is θ (0 < θ < 90°).

[0026] In the substrate 20 of this embodiment, the upper surface 25 has central axes CX and CY in a direction parallel to one side of the bottom surface (element layer stacking surface 21) of the prism portion 20A (X direction) and a direction perpendicular thereto (Y direction), and the upper surface 25 has a symmetrical shape with respect to the central axes CX and CY. Therefore, the two interior angles θ1 and θ2 are equal (θ1 = θ2), and the interior angles of the other four vertices TA are equal, and are angles θ. Furthermore, the central axes of the bottom surface and the upper surface 25 of the prism portion 20A are coaxial.

[0027] 2. Method for manufacturing a group III nitride semiconductor light-emitting element Figure 5 is a diagram showing the method for manufacturing the group III nitride semiconductor light-emitting element 10 of this embodiment. (Step S1: Element layer formation process) First, on the element layer stacking surface 21 of the single crystal substrate (sub), the composition formula Al X GaY In 1-X-Y A light-emitting element layer (multilayer semiconductor layer) consisting of an n-type semiconductor layer, an active layer, and a p-type semiconductor layer, represented by N (0 ≤ X ≤ 1.0, 0 ≤ Y ≤ 1.0, 0 ≤ X + Y ≤ 1.0), was crystallized using metal-organic vapor deposition (MOCVD). This resulted in the formation of a semiconductor multilayer wafer with the grown light-emitting element layer. Note that other crystal growth methods, such as molecular beam epitaxy (MBE), can also be used.

[0028] In the example, an AlN single crystal substrate is used as the substrate 20 for the group III nitride semiconductor light-emitting element 10, with the +c plane serving as the element layer stacking surface 21, but this is not limited to this. The substrate 20 is preferably a substrate that can be processed on the back surface by chemical etching. Examples of such substrates include AlN substrates, GaN substrates, and sapphire substrates that can be etched with alkali, and sapphire substrates and AlN substrates that are transparent to light in the 200-365 nm range are particularly preferred. Furthermore, from the viewpoint of the crystallinity of the light-emitting element layer 30 on the single-crystal substrate 20, a group III nitride single crystal substrate of the same type is preferred. Also, from the viewpoint of productivity, an AlN substrate, which is a group III nitride single crystal substrate that can be wet-etched at a lower temperature than a sapphire substrate which requires wet etching in a high-temperature environment of nearly 300°C, is preferred. In this case, since the light-emitting element layer of the group III nitride single crystal substrate is etched from the -C plane by alkali, an AlN substrate with the +C plane as the growth surface is most preferred.

[0029] Furthermore, the n-type semiconductor layer, active layer, and p-type semiconductor layer of the light-emitting element may be a single layer or a multi-layer configuration. In addition, the n-type semiconductor layer, active layer, and p-type semiconductor layer may include an undoped layer or a superlattice layer. Also, all layers may have the composition formula Al q Ga 1-q It is preferable that it be represented by N (0 ≤ q ≤ 1), but this is not limited to the empirical formula Al r In 1-r It may also be represented as N (0 ≤ r ≤ 1), or as an element with the composition formula Al s Ga t In 1-s-tIt may be represented by N (0≦s≦1, 0≦t≦1, 0≦s+t≦1). Regardless of the composition formula, the emission wavelength is 200 to 365 nm.

[0030] (Step S2: Light-emitting element forming step) Subsequently, an exposed surface of the n-type semiconductor layer was formed by mesa processing. By forming the exposed surface of the n-type semiconductor layer, the light-emitting element layer (laminated semiconductor layer) remains in a mesa shape, and the light-emitting element layer 30 having a mesa structure including the n-type semiconductor layer 31, the active layer 32 and the p-type semiconductor layer 33 was formed.

[0031] Examples of etching methods for forming a mesa structure include dry etching such as reactive ion etching and inductively coupled plasma etching. After forming the exposed surface of the n-type layer, the exposed surface is preferably surface-treated with an acid or alkali solution to remove etching damage. Thereafter, an ohmic n-electrode 35 was formed on the exposed surface of the n-type semiconductor layer 31. Further, a p-electrode 36 was formed on the p-type semiconductor layer 33.

[0032] The n-electrode 35 on the n-type semiconductor layer 31 is formed along the lower end of the mesa structure in the lowland portion of the mesa structure, but a structure in which the n-type layer is exposed between the mesa structure and the n-electrode 35 with a slight distance from the bottom of the mesa structure may also be employed.

[0033] (Step S3: Thinning step) Thinning was performed by grinding the surface (substrate upper surface) opposite to the surface (element layer lamination surface 21) on which the light-emitting element layer 30 of the semiconductor laminated wafer formed by the above steps is formed. The thickness of the single crystal substrate after thinning was 440 μm. From the viewpoint of improving light extraction efficiency, the thickness is preferably 100 μm or more, and more preferably 300 μm or more.

[0034] (Step S4: Protective layer forming step) A predetermined resist pattern was formed by photolithography on the single crystal substrate of the thinned semiconductor laminated wafer. Thereafter, a protective layer 50 patterned into a predetermined shape is formed on the back surface of the semiconductor wafer by a vapor deposition method, a sputtering film forming method, or the like. More specifically, the protective layer 50 having a concave hexagonal shape corresponding to the upper surface 25 of the frustum portion 20B was formed by alignment so as to be coaxial with the central axis of the light-emitting element layer 30.

[0035] It is desirable that the center of the protective layer 50 coincides with the center of the light-emitting layer 30. However, from a productivity standpoint, some variation in the coincidence with the crystal plane is acceptable, and depending on the shape of the upper surface 25 of the frustum portion 20B or the chemical etching method, the center of the protective layer 50 may be significantly off from the center of each group III nitride semiconductor light-emitting element 10.

[0036] Any material is acceptable for the protective layer, as long as it meets three conditions: high adhesion to the single-crystal substrate, resistance to chemical etching processes, and high corrosiveness or peelability during protective film removal processes.

[0037] (Step S5: Chemical etching process) Chemical etching (wet etching) was performed on the semiconductor wafer on which the protective layer 50 was formed to form a frustum portion 20B on the single crystal substrate. In this embodiment, tetramethylammonium hydroxide (TMAH) solution was used as the chemical etching agent.

[0038] The chemical etching agent used is not particularly limited as long as it can chemically etch a single-crystal substrate and expose the crystal faces; it should be appropriately selected depending on the type of single-crystal substrate. Specific examples of chemical etching agents include, but are not limited to, alkaline solutions such as KOH, NaOH, and TMAH, and acidic solutions such as phosphoric acid and pyrophosphate. Furthermore, the etching method may not be limited to simple immersion methods, but may also include electrochemical methods or etching methods that involve light irradiation.

[0039] Figure 6 is a schematic cross-sectional view of a portion of a semiconductor wafer before and after chemical etching. Chemical etching using the protective layer 50 etches the single crystal substrate, forming a frustum portion 20B having multiple side surfaces 23. Here, all of the multiple side surfaces 23 are crystal planes of the single crystal substrate and are inclined outward from the edge of the upper surface 25 with respect to the element layer stacking surface 21.

[0040] Furthermore, the frustum portion 20B can be formed by stopping the etching process before reaching the back surface (element layer stacking surface 21) of the single crystal substrate.

[0041] (Step S6: Element Separation Process) The semiconductor wafer formed as described above is separated into elements to form individual group III nitride semiconductor light-emitting elements 10. Well-known methods such as etching, scribing, and cleavage can be used for element separation.

[0042] 3. Light extraction from the substrate (1) Infinite loop of light Figure 7 is a schematic diagram showing the reflection and optical path of light projected onto a two-dimensional plane when a substrate 120 having a truncated square pyramidal shape is used. It shows the optical path in the square cross section of the substrate 120 (cross section parallel to the element layer stacking surface).

[0043] Of the light emitted from the Group III nitride semiconductor light-emitting element and incident on the substrate 120, light LA ​​incident on the side surface of the substrate 120 within the critical angle is extracted to the outside of the substrate 120. On the other hand, light LB incident at an incident angle θi greater than the critical angle repeatedly reflects off the side surface of the substrate 120 (θj = 90 - θi), and unless it is extracted from the substrate 120 once, it will enter an infinite reflection loop. The critical angle θc between AlN (substrate) and air is approximately 26.5°, and in the case of a square, an infinite reflection loop of light occurs when the incident angle θi is 26.5° < θi < 63.5°.

[0044] The more symmetrical the cross-section parallel to the element layer stacking plane of the substrate, the less efficient the light extraction. For example, if the opposite sides are parallel, or if it is a regular n-gon (where n is an even number greater than or equal to 4), the light extraction efficiency is unfavorable. On the other hand, if it is a regular n-gon (where n is an odd number greater than or equal to 3), the light extraction efficiency is higher.

[0045] (2) Figure 8 of the optical extraction efficiency of the group III nitride semiconductor light-emitting element of this embodiment and comparative example is a perspective view of the substrate 220 of the group III nitride semiconductor light-emitting element (CX1) of Comparative Example 1, and also shows an overhead SEM image of the substrate 220. The shape of the frustum portion 220B is different from the frustum portion 20B of the group III nitride semiconductor light-emitting element 10 (EX) of this embodiment. The substrate 220 is made of an AlN single crystal substrate, and the element layer stacking surface 221 is a +c plane, which is the same as the substrate 20 of the group III nitride semiconductor light-emitting element 10 of this embodiment. The thickness of the substrate 220 is also 440 μm, the same as the substrate 20 of the group III nitride semiconductor light-emitting element 10. The element layer stacking surface 221 of the substrate 220 is provided with the same light-emitting element layer as the light-emitting element layer 30 of the group III nitride semiconductor light-emitting element 10 of this embodiment.

[0046] The substrate 220 of the Group III nitride semiconductor light-emitting element (CX1) of Comparative Example 1 consists of a prismatic portion 220A and a frustum portion 220B on the prismatic portion 220A. The prismatic portion 220A has a rectangular prism shape with a rectangular back surface (element layer stacking surface 221), and the frustum portion 220B has a rectangular frustum shape. For clarity in the figure, the frustum portion 220B is shown with hatching.

[0047] The upper surface 225 of the substrate 220 has a rectangular shape with an area smaller than that of the element layer stacking surface 221. The frustum portion 220B has a plurality of side surfaces 223 that are inclined outward from each of the four sides of the upper surface 225 of the substrate 220.

[0048] Figure 9 is a perspective view of the substrate 230 of the Group III nitride semiconductor light-emitting element (CX2) of Comparative Example 2, and also shows an overhead SEM image of the substrate 230.

[0049] The substrate 230 of the Group III nitride semiconductor light-emitting element (CX2) in Comparative Example 2 is a parallel plate AlN single crystal substrate. That is, the back surface (element layer stacking surface 231) and the top surface 235 of the substrate 230 have a rectangular shape. The thickness of the substrate 230 is 100 μm. The element layer stacking surface 231 of the substrate 230 is provided with the same light-emitting element layer 30 as the light-emitting element layer of the Group III nitride semiconductor light-emitting element 10 of this embodiment.

[0050] Figure 10 is a diagram comparing the light extraction efficiencies of the Group III nitride semiconductor light-emitting element 10 (EX) of this embodiment, the Group III nitride semiconductor light-emitting element (CX1) of Comparative Example 1, and the Group III nitride semiconductor light-emitting element (CX2) of Comparative Example 2. Note that the light extraction efficiency of the Group III nitride semiconductor light-emitting element (CX2) of Comparative Example 2 is normalized to 1.0.

[0051] In the Group III nitride semiconductor light-emitting element 10 (EX) of this embodiment, it can be seen that the light extraction efficiency can be significantly improved compared to the Group III nitride semiconductor light-emitting element (CX2) of Comparative Example 2. Furthermore, it was confirmed that the light extraction efficiency can be improved even compared to the Group III nitride semiconductor light-emitting element (CX1) of Comparative Example 1, which has the same substrate thickness and whose side surface is a sloped surface. In other words, it was demonstrated that the light extraction efficiency was improved with the semiconductor light-emitting element 10 (EX) having a concave hexagonal shape, as hypothesized.

[0052] (3) The ratio diagrams 11A and 11B of the frustum are schematic diagrams of the substrate 20 of the group III nitride semiconductor light-emitting element 10 as viewed from the side (side view) from the two directions P and Q shown in Figure 3, respectively. The side surface of the prism portion 20A is shown with hatching.

[0053] The upper edge of the prism portion 20A is connected to the inclined side surface 23 of the upper surface 25 of the substrate 20, and the height H of the mutually orthogonal side surfaces 20S1 and 20S2 of the prism portion 20A S1 and H S2 It is changing within the lateral surface.

[0054] Figure 12 shows the simulation results of the light extraction efficiency of the Group III nitride semiconductor light-emitting element 10 when the thickness Hsub (height of the substrate 20) of the substrate 20 is 400 μm and 450 μm. The horizontal axis is the average value Hav of the height of the frustum portion 20B (height of the inclined surface) on the side surface of the substrate 20. The absorption coefficient of the substrate 20 is assumed to be 2.5 cm². －１ The calculations were performed, and the light extraction efficiency of the Group III nitride semiconductor light-emitting element (CX2) of Comparative Example 2 was normalized to 1.0 and shown.

[0055] When the thickness of the substrate 20 is 400 μm, it can be seen that the light extraction efficiency is improved when the average value Hav of the height of the frustum 20B is between 250 μm and 350 μm. Similarly, when the thickness of the substrate 20 is 450 μm, it can be seen that the light extraction efficiency is improved when the average value Hav of the height of the frustum 20B is between 250 μm and 400 μm. In other words, the light extraction efficiency is improved by setting the average value Hav of the height of the inclined surface of the frustum 20B to approximately 55% to 90% of the thickness of the substrate 20.

[0056] This is because, according to the Group III nitride semiconductor light-emitting element 10 of this embodiment, when light emitted from the active layer is incident on the side surface of the element (frustum portion 20B and prismatic portion 20A) at a shallow angle, the angle of incidence to the extraction surface is more likely to satisfy the critical angle when the light is incident on the prismatic portion than when the light is incident on the frustum portion 20B.

[0057] 4. Modification Examples (1) Modification Example 1 Figure 13 is a schematic diagram of the substrate 20 of the Group III nitride semiconductor light-emitting element 10, which is Modification Example 1 of this embodiment, as seen from the upper surface 25 side of the substrate 20 (top view). Note that in Figure 13, the edges of the multiple side surfaces 23 are omitted from the illustration.

[0058] In modification example 1, the upper surface 25 has a polygonal shape and has four vertices TA at symmetrical positions with respect to the central axes CX and CY of the upper surface 25, and the angle θ of the vertices TA A The angle is acute. Furthermore, there are two vertices TB positioned symmetrically with respect to the central axis CY between the two vertices TA which are in symmetrical positions, and the angle θ of the vertices TB is acute. B It is an acute angle (interior angle less than 90°). Also, the interior angle (θ) is symmetric with respect to the central axis CY. C A top TC of less than 90° may be provided.

[0059] In other words, the upper surface 25 has a plurality of vertices TA and a plurality of vertices TB that are symmetrically positioned with respect to the central axes CX and CY of the upper surface 25. The plurality of vertices TA, a plurality of vertices TB and a vertices TC are arranged along one side of the bottom surface (element layer stacking surface 21) of the prism portion 20A. Furthermore, it is preferable that the plurality of vertices TA, a plurality of vertices TB and a vertices TC are symmetrically provided along the side opposite to the said side.

[0060] Infinite reflection is reduced by the crystal planes extending from the sides of the apex TA and apex TB to the prismatic portion 20A, thereby improving the light extraction efficiency.

[0061] (2) Modification Examples 2-4 Figures 14A-14C are schematic diagrams of the Group III nitride semiconductor light-emitting element 10, which are modification examples 2-4 of this embodiment, as viewed from the upper surface 25 side of the substrate 20. Note that the central axis CX and CY, etc., are not shown.

[0062] In the modified example 2 shown in Figure 14A, the modified example 1 has inwardly recessed corners TD on the sides perpendicular to the multiple vertices TA and multiple TB, i.e., corners TD with an interior angle (θr) exceeding 180°. By providing corners TD on the upper surface 25, infinite reflection is reduced by the crystal planes extending from both sides of the corners TD to the prismatic portion 20A, thereby improving the light extraction efficiency.

[0063] In the modified example 3 shown in Figure 14B, the vertex TE (inner angle θ) is located at the position of the corner TD of modified example 2. E A ) is provided. The crystal planes extending from both sides of the apex TE to the prismatic portion 20A further improve the light extraction efficiency.

[0064] In the modified example 4 shown in Figure 14C, the vertices TF and TG (interior angle θ) are rotationally symmetric with respect to the center C of the upper surface 25. F and θ G ) is provided. The top TF and TG break the symmetry of reflection, thereby suppressing infinite reflection and further improving the light extraction efficiency.

[0065] As described in detail above, this disclosure makes it possible to provide a group III nitride semiconductor light-emitting element that has high light extraction efficiency and can obtain high light output.

[0066] The present invention is not limited to the embodiments described above, and can be combined or modified without departing from the scope of this disclosure.

[0067] 10: Group III nitride semiconductor light-emitting element 20: Substrate 20A: Prismatic section 20B: Frustum section 20S1: Side surface 21: Element layer stacking surface 23: Side surface 23F1: Inclined surface 23G1: Facet 25: Top surface 25E1: Edge 30: Light-emitting element layer 31: n-type semiconductor layer 32: Active layer 33: p-type semiconductor layer 35: n-electrode 36: p-electrode 50: Protective layer C: Center CX, CY, CZ: Central axis TA, TB, TC, TD, TE, TF: Top

Claims

1. A single crystal substrate with light transmittance for light with wavelengths of 200 nm to 365 nm is used. X Ga Y In 1-X-Y A group III nitride semiconductor light-emitting element having an element layer comprising an n-type semiconductor layer represented by N (0 ≤ X ≤ 1.0, 0 ≤ Y ≤ 1.0, 0 ≤ X + Y ≤ 1.0), an active layer, and a p-type semiconductor layer in that order, wherein the active layer is configured to emit light with a wavelength of 200 nm to 365 nm, the area of ​​the element layer stacking surface on the single crystal substrate is larger than the area of ​​the upper surface which is the surface opposite to the element layer stacking surface, the single crystal substrate has a plurality of sides which are predetermined crystal planes, the plurality of sides include a plurality of inclined surfaces inclined with respect to the element layer stacking surface, and the angle between one of the plurality of inclined surfaces and another inclined surface is less than 90°.

2. The group III nitride semiconductor light-emitting element according to claim 1, wherein the single crystal substrate comprises a prismatic portion and a frustum portion provided on the prismatic portion, and each of the plurality of sides is a crystal plane extending from the upper edge of the prismatic portion.

3. The Group III nitride semiconductor light-emitting element according to claim 2, characterized in that the upper surface of the single crystal substrate has a concave hexagonal shape, and the upper surface has a apex with an interior angle of less than 90°, and the first inclined surface and the other inclined surface are two crystal planes extending from the apex to the prismatic portion.

4. The upper surface of the concave hexagon is symmetric with respect to a central axis parallel to one side of the bottom surface of the prism and a central axis perpendicular to the parallel direction, as described in claim 3.

5. The upper surface of the single crystal substrate has a polygonal shape having a plurality of vertices, each with an interior angle of less than 90°, and the plurality of vertices are arranged symmetrically along one side of the bottom surface of the prismatic portion and the side opposite to that side, as described in claim 2.

6. The Group III nitride semiconductor light-emitting element according to claim 5, wherein the upper surface of the single crystal substrate has an inwardly recessed corner with an interior angle exceeding 180° on an edge perpendicular to one side of the bottom surface of the prismatic portion.

7. The Group III nitride semiconductor light-emitting element according to claim 5, wherein the upper surface of the single crystal substrate has a recess consisting of two sides with an interior angle exceeding 180° on a side perpendicular to one side of the element layer stacking surface, and a top portion provided in the recess with an interior angle of less than 90°.

8. The Group III nitride semiconductor light-emitting element according to claim 5, wherein the upper surface of the single crystal substrate has a plurality of vertices arranged rotationally symmetrically with respect to the center of the upper surface, each having an interior angle of less than 90°.

9. The group III nitride semiconductor light-emitting element according to claim 2, wherein the average value of the height of the frustum portion is within the range of 55% to 90% of the thickness of the single crystal substrate.

10. The Group III nitride semiconductor light-emitting element according to any one of claims 1 to 9, wherein the thickness of the single crystal substrate is 100 μm or more.

11. The Group III nitride semiconductor light-emitting element according to any one of claims 1 to 9, wherein the thickness of the single crystal substrate is 300 μm or more.

12. The single crystal substrate is AlN, and is 30 cm relative to the emission wavelength of the active layer. －１ A group III nitride semiconductor light-emitting element according to any one of claims 1 to 9, having the following absorption coefficient.

13. The group III nitride semiconductor light-emitting element according to any one of claims 1 to 9, wherein any of the plurality of sides is a facet from a {10-1-1} facet group or a facet group in which {10-1-1} is slightly inclined.

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