Electrode-equipped substrate

Abstract

An electrode-equipped substrate according to the present disclosure is provided with: a substrate; a film electrode that is located on the substrate; and a dielectric layer that is located on the film electrode and has a first surface on the reverse side thereof with respect to the substrate. On the first surface, the surface roughness R1 of a portion located at the central portion of the film electrode is greater than the surface roughness R2 of a portion located at the outer peripheral portion of the film electrode.

Description

Substrate with Electrode

[0001] The present disclosure relates to a substrate with an electrode.

[0002] In the field of semiconductor manufacturing, methods for performing plasma processing on objects to be processed such as semiconductor substrates by using plasma discharge are widely used for purposes including plasma CVD (Chemical Vapor Deposition), ashing, etching, sputtering, and other surface treatments.

[0003] In the plasma processing step, when applying a high voltage or a high-frequency voltage from a high-frequency power supply, problems such as abnormal discharge may occur, and poor plasma stability can cause degradation of the electronic element characteristics of the object to be processed. In order to address such problems, it is required to accurately detect the plasma state in the plasma processing chamber.

[0004] Known plasma measuring instruments for detecting plasma states include Langmuir probes, which measure plasma states such as space potential from current-voltage characteristics obtained by inserting a probe-shaped electrode with its tip exposed into plasma and applying a voltage, and capacitive probes, which measure plasma states such as space potential from capacitance after covering the electrode with an insulator.

[0005] Conventionally proposed plasma measuring instruments include those disclosed in Patent Documents 1 to 3, for example. Specifically, Patent Document 1 proposes a plasma monitoring device using a window-type probe. Patent Document 2 proposes that a plasma processing apparatus includes a signal detection unit that detects a precursor signal for catching occurrence of abnormal plasma discharge in advance, and a control unit that controls ESC leakage current based on the precursor signal.

[0006] Patent Document 3 proposes that in a plasma processing apparatus, a probe substrate is installed on the side wall of a processing chamber, pulsed bias power is applied to the substrate, and the voltage change of a capacitor is analyzed to monitor the state of the inner wall of the processing chamber and the internal state of plasma in real time, and the processing method of the plasma processing apparatus is controlled based on the obtained data values.

[0007] Japanese Patent Application Laid-Open No. 2003-318115, Japanese Patent Application Laid-Open No. 2007-73309, Japanese Patent Application Laid-Open No. 2011-228386

[0008] The electrode-equipped substrate according to this disclosure comprises a substrate, a film electrode located on the substrate, and a dielectric layer located on the film electrode and having a first surface opposite to the substrate. The surface roughness R1 of the first surface is greater than the surface roughness R2 of the portion located on the outer periphery of the film electrode.

[0009] This is a schematic cross-sectional view showing an electrode-equipped substrate of an embodiment not limited to the present disclosure. This is an enlarged view of the vicinity of the interface between the dielectric layer and the film electrode shown in Figure 1. This is an enlarged view of the vicinity of the interface between the dielectric layer and the substrate shown in Figure 1. This is a schematic diagram of a sputtering apparatus for manufacturing the electrode-equipped substrate shown in Figure 1. This is a schematic cross-sectional view showing an electrode-equipped substrate of another embodiment not limited to the present disclosure.

[0010] In the semiconductor manufacturing field, plasma treatment methods using plasma discharge are widely used on materials to be treated, such as semiconductor substrates, for purposes such as plasma CVD (chemical vapor deposition), ashing, etching, sputtering, and other surface treatments.

[0011] In plasma processing, applying high voltage or high-frequency voltage from a high-voltage or high-frequency power supply can lead to abnormal discharges and other plasma instability issues, causing degradation of the electronic component characteristics of the workpiece. To address these problems, accurate detection of the plasma state within the plasma processing chamber is required.

[0012] Known plasma measuring instruments for detecting plasma states include Langmuir probes, which measure plasma states such as spatial potential from the current-voltage characteristics obtained by inserting a probe-shaped electrode with its tip exposed into the plasma and applying a voltage, and capacitive probes, which measure plasma states such as spatial potential from capacitance by covering the electrode with an insulator.

[0013] Capacitive probe-type plasma measuring instruments require high-precision measurement and plasma resistance.

[0014] <Electrode-equipped substrate> Hereinafter, an electrode-equipped substrate 1 of an embodiment not limited to the present disclosure will be described in detail with reference to the drawings. However, in each of the figures referenced below, for the sake of convenience of explanation, only the main components necessary for describing the embodiment are shown in a simplified manner. Therefore, the electrode-equipped substrate 1 may include any components not shown in the figures referenced. Also, the dimensions of the components in each figure do not faithfully represent the dimensions of the actual components or the dimensional ratios of each component.

[0015] The electrode-equipped substrate 1 comprises a base body 2, a film electrode 3, and a dielectric layer 4, as shown in the example in Figure 1.

[0016] The film electrode 3 is located on the substrate 2. The dielectric layer 4 is also located on the film electrode 3. The dielectric layer 4 has a first surface 5 opposite to the substrate 2.

[0017] Here, the surface roughness R1 of the first surface 5 is greater than the surface roughness R2 of the portion P1 located on the central portion P3 of the film electrode 3.

[0018] By relatively increasing the surface roughness R1 of a portion P1 located on the central portion P3 of the film electrode 3 on the first surface 5 of the dielectric layer 4, this portion P1 becomes rougher, increasing its surface area and thus increasing the amount of plasma on the first surface 5, thereby improving sensitivity. On the other hand, plasma tends to concentrate at the edge portion located on the outer edge of the film electrode 3. By relatively decreasing the surface roughness R2 of a portion P2 located on the outer peripheral portion P4 of the film electrode 3 on the first surface 5 of the dielectric layer 4, this portion P2 can be smoothed, improving plasma resistance. Therefore, the electrode-equipped substrate 1 enables high-precision measurement, has high plasma resistance, and is suitable for use in plasma measuring instruments in plasma processing equipment. The electrode-equipped substrate 1 can function, for example, as a capacitive probe type plasma sensor.

[0019] The upper surface 6 of the film electrode 3 may have a surface roughness R3 in the central part P3 that is greater than the surface roughness R4 in the outer peripheral part P4.

[0020] On the upper surface 6 of the film electrode 3, the adhesion to the dielectric layer 4 can be improved by relatively increasing the surface roughness R3 of the central part P3. On the other hand, the electric field tends to concentrate at the edge located at the outer edge of the film electrode 3. On the upper surface 6 of the film electrode 3, the plasma resistance can be improved by relatively decreasing the surface roughness R4 of the outer peripheral part P4 to make the outer peripheral part P4 smoother.

[0021] The surface roughness R1 may be greater than the surface roughness R3. In this case, the amount of plasma on the first surface 5 can be increased to improve sensitivity.

[0022] Surface roughness may be evaluated by the arithmetic mean height (Sa). For example, the arithmetic mean height (Sa) of surface roughness R1 may be between 0.005 μm and 0.2 μm, or between 0.01 μm and 0.1 μm. For example, the arithmetic mean height (Sa) of surface roughness R2 may be between 1 / 100 and 1 / 5 of surface roughness R1, or between 1 / 50 and 1 / 10.

[0023] The surface roughness R3 may, for example, have an arithmetic mean height (Sa) of 0.0005 μm or more and 0.02 μm or less, or 0.001 μm or more and 0.01 μm or less. The surface roughness R4 may, for example, have an arithmetic mean height (Sa) of 1 / 50 or more and 1 / 2 times or less than the surface roughness R3, or 1 / 20 or more and 1 / 5 times or less.

[0024] Arithmetic mean height (Sa) is a surface texture parameter defined in ISO 25178-6:2010, and is an extension of the arithmetic mean roughness (Ra) of a line to a surface. Specifically, arithmetic mean height (Sa) represents the average of the absolute differences in height between each point on the surface being measured, relative to the average surface of the surface being measured.

[0025] The central portion P3 of the membrane electrode 3 includes the center of the membrane electrode 3 and has a width of 10% or less of the width of the membrane electrode 3. The outer peripheral portion P4 of the membrane electrode 3 is located outside the central portion P3 of the membrane electrode 3 and extends from the central portion P3 to the outer peripheral portion of the membrane electrode 3.

[0026] Each component constituting the electrode substrate 1 may have the following dimensions, for example. The width of the film electrode 3 may be set to 5 mm or more and 50 mm or less. The thickness of the film electrode 3 may be set to 0.5 μm or more and 5 μm or less.

[0027] The width of the dielectric layer 4 may be set to 5 mm or more and 100 mm or less. Also, the thickness of the dielectric layer 4 from the upper surface 6 of the film electrode 3 may be set to 0.5 μm or more and 5 μm or less.

[0028] The width of the substrate 2 may be set to 5 mm or more and 100 mm or less. The thickness of the substrate 2 is set so that the electrode-equipped substrate 1 satisfies the mechanical strength requirements. For example, if the diameter of the substrate 2 is about 50 mm (2 inches), the thickness of the substrate 2 may be set to 100 μm or more. The substrate 2 may also be in the form of a plate.

[0029] The above-described configuration, in which the dielectric layer 4 is located on the film electrode 3, is not limited to a configuration in which the dielectric layer 4 is located only on the film electrode 3. For example, in the example shown in Figure 1, the width of the substrate 2 is greater than the width of the film electrode 3. The dielectric layer 4 is also located on the substrate 2 outside the outer peripheral portion P4 of the film electrode 3. In these cases, the outer peripheral portion of the film electrode 3, in addition to the upper surface 6 of the film electrode 3, is also covered with the dielectric layer 4, making it easier to protect the film electrode 3 from plasma. The width of the dielectric layer 4 may be the same as the width of the substrate 2.

[0030] The surface roughness R1 of the first surface 5 may be greater than the surface roughness R5 of the portion P5 located on the substrate 2 outside the outer peripheral portion P4 of the film electrode 3, where P1 is located. The surface roughness R5 may be the same as the surface roughness R2.

[0031] Substrate 2 may contain sapphire. Sapphire has excellent plasma resistance and mechanical strength. Substrate 2 may contain sapphire as its main component. "Main component" means the component with the largest mass percentage value compared to other components. The main component may be, for example, 80% by mass or more.

[0032] The dielectric layer 4 may contain an oxide containing yttrium. The dielectric layer 4 may contain an oxide containing yttrium as its main component. Yttria (Y ２ O ３ It has even better plasma resistance than sapphire.

[0033] The film electrode 3 may contain an active metal, or constituent elements of the substrate 2 or dielectric layer 4, or a laminate thereof. The film electrode 3 may mainly contain an active metal, or constituent elements of the substrate 2 or dielectric layer 4, or a laminate thereof. When the film electrode 3 contains the above-mentioned active metal, etc., the adhesion to the substrate 2 or dielectric layer 4 is improved. The reasons for this are as follows.

[0034] To illustrate with an example where substrate 2 contains sapphire, active metals are metals that bond more readily with the oxygen atoms of the oxides constituting substrate 2 compared to inert metals such as copper, silver, and gold, resulting in higher adhesion. Alkaline earth metals, rare earth metals, metals from groups 4 to 6 of the periodic table, and metals from groups 13 to 14 are typical active metals. In particular, titanium, zirconium, hafnium, vanadium, and chromium have high adhesion to sapphire, and their thermal expansion coefficients are relatively small compared to sapphire. Therefore, when the film electrode 3 contains an active metal, the adhesion to substrate 2 is improved.

[0035] Furthermore, if the substrate 2 contains sapphire, aluminum is a constituent element of the sapphire that makes up the substrate 2. If the film electrode 3 contains this constituent element, an improvement in adhesion to the substrate 2 can be expected by utilizing the diffusion of aluminum atoms due to heat treatment.

[0036] When the dielectric layer 4 contains an oxide containing yttrium, yttrium is a constituent element of the yttria that makes up the dielectric layer 4. When the film electrode 3 contains this constituent element, the dielectric layer 4 can be continuously formed by oxidizing the surface of the yttrium, so an improvement in adhesion to the dielectric layer 4 can be expected.

[0037] When the substrate 2 contains sapphire and the dielectric layer 4 contains an oxide containing yttrium, and the film electrode 3 includes a laminate of an active metal formed on the substrate 2 and yttrium formed on this active metal, both the adhesion to the substrate 2 and the adhesion to the dielectric layer 4 are improved.

[0038] The substrate 2 may include a via conductor 7 connected to the central part P3 of the film electrode 3. In this case, the distance between the via conductor 7 and the portion P1 of the first surface 5, which is made rougher to allow plasma to concentrate more easily, is shortened, thereby increasing sensitivity.

[0039] The via conductor 7 is electrically connected to the central part P3. The diameter of the via conductor 7 may be set to, for example, 30 μm or more and 200 μm or less. There may be only one via conductor 7 or there may be multiple via conductors 7. If there are multiple via conductors 7, the number of via conductors 7 may be, for example, 2 to 4.

[0040] The dielectric layer 4 may be a polycrystalline dielectric layer. In this case, the grain size of the polycrystalline dielectric layer may be smaller near the substrate 2 or near the film electrode 3 than near the first surface 5.

[0041] In this case, near the substrate 2 or the film electrode 3, the grain size of the polycrystalline dielectric layer is relatively small, which improves the adhesion between the substrate 2 or the film electrode 3 and the dielectric layer 4. On the other hand, near the first surface 5, the relatively large grain size of the polycrystalline dielectric layer improves plasma resistance.

[0042] The grain size of the polycrystalline dielectric layer near the first surface 5 may be, for example, 50 nm to 100 nm. Furthermore, the grain size of the polycrystalline dielectric layer near the substrate 2 or near the film electrode 3 may be, for example, 30 nm to 80 nm.

[0043] The crystal grain size may be an average value. Further, the crystal grain size may be measured by cross-sectional observation using an electron microscope. For example, the crystal grain size can be obtained by acquiring an image of a 9×12 μm range, drawing six straight lines of the same length radially centered on an arbitrary point, for example, 6 μm each, and dividing the total length of these six straight lines by the total number of crystals present on these straight lines. Examples of electron microscopes include a scanning electron microscope (SEM) and a transmission electron microscope (TEM).

[0044] The dielectric layer 4 may have a first amorphous layer 8 at the interface with the film electrode 3, as in the example shown in FIG. 2. The first amorphous layer 8 contains constituent elements of the dielectric layer 4 and the film electrode 3. Further, the dielectric layer 4 may have a second amorphous layer 9 at the interface with the base body 2, as in the example shown in FIG. 3. The second amorphous layer 9 contains constituent elements of the dielectric layer 4 and the base body 2. In these cases, the adhesion between the film electrode 3, the base body 2, and the dielectric layer 4 can be improved.

[0045] The thickness D1 of the first amorphous layer 8 may be smaller than the thickness D2 of the second amorphous layer 9 (see FIGS. 2 and 3). In this case, since the dielectric layer 4 has the second amorphous layer 9 having a relatively large thickness at the interface with the base body 2, the adhesion to the base body 2 can be further improved. On the other hand, since the dielectric layer 4 has the first amorphous layer 8 having a relatively small thickness at the interface with the film electrode 3, electrical characteristics can be improved.

[0046] Note that, contrary to the above, the thickness D1 of the first amorphous layer 8 may be larger than the thickness D2 of the second amorphous layer 9. In this case, since the dielectric layer 4 has the first amorphous layer 8 having a relatively large thickness at the interface with the film electrode 3, the adhesion to the film electrode 3 can be further improved. On the other hand, since the dielectric layer 4 has the second amorphous layer 9 having a relatively small thickness at the interface with the base body 2, the crystallinity of the dielectric layer 4 can be improved.

[0047] Furthermore, the thickness D1 of the first amorphous layer 8 may be the same as the thickness D2 of the second amorphous layer 9. In this case, a surface with uniform crystallinity can be formed on the first surface 5 of the dielectric layer 4.

[0048] The determination that the first amorphous layer 8 and the second amorphous layer 9 are amorphous may be performed by electron beam diffraction using TEM. Furthermore, the thickness D1 of the first amorphous layer 8 may be, for example, 2 nm or more and 4 nm or less. The thickness D2 of the second amorphous layer 9 may be, for example, 2 nm or more and 4 nm or less. The measurement of thicknesses D1 and D2 may be performed by cross-sectional observation using an electron microscope.

[0049] The substrate with electrode 1 may further comprise a support layer 10 for supporting the base body 2, as in the example shown in Fig. 1.

[0050] Examples of the material of the support layer 10 include alumina ceramics and the like. Since alumina ceramics is the same material as sapphire, the difference in physical properties such as coefficient of thermal expansion is small, and it can be manufactured at a lower cost than sapphire.

[0051] The support layer 10 may be bonded to the base body 2. For bonding, for example, an adhesive such as an epoxy adhesive or a silicone adhesive may be used. Alternatively, the support layer 10 may be bonded to the base body 2 by direct bonding such as diffusion bonding.

[0052] The support layer 10 may be provided with a power feeding terminal 11. The power feeding terminal 11 can function as a terminal for power feeding and measurement. The support layer 10 may be provided as necessary. The base body 2 and the support layer 10 may be integrally formed using sapphire.

[0053] The membrane electrode 3 may be electrically connected to the power feeding terminal 11 of the support layer 10 via the via conductor 7. In this case, the membrane electrode 3 and the dielectric layer 4 serve as a probe for plasma measurement, and the spatial potential indicating the plasma state can be measured.

[0054] <Method for Manufacturing Substrate with Electrode> Next, a method for manufacturing a substrate with electrode according to a non-limiting embodiment of the present disclosure will be described with an example of manufacturing the substrate with electrode 1.

[0055] First, prepare the substrate 2. The main surface of the substrate 2 may be polished. For example, polishing may be performed by lapping using diamond abrasive grains and a surface plate, or by chemical mechanical polishing (CMP) using colloidal silica abrasive grains and an alkaline slurry.

[0056] The main surface of the substrate 2 after polishing may have an arithmetic mean height (Sa) of, for example, 0.1 μm or less, or 10 nm or less. In this case, it is easier to form film electrodes 3 and dielectric layers 4 with fewer defects such as voids.

[0057] The via conductor 7 may be formed by applying copper plating or the like to a through-hole provided in the substrate 2. Surface polishing may be used to reduce the step difference between the via conductor 7 and the main surface of the substrate 2, thereby improving the connectivity between the via conductor 7 and the film electrode 3. The step difference may be, for example, 1 μm or less, or 0.2 μm or less.

[0058] The bonding of the substrate 2 and the support layer 10 may be performed before or after the sputtering described below.

[0059] Next, a film electrode 3 is formed on the substrate 2, and a dielectric layer 4 is formed on the film electrode 3 to obtain an electrode-equipped substrate 1. The method for forming the film electrode 3 and the dielectric layer 4 will be explained using the example where the constituent element of the dielectric layer 4 is yttrium and the film electrode 3 contains yttrium.

[0060] For forming the film electrode 3 and dielectric layer 4, a sputtering apparatus 101 may be used, as shown in the example in Figure 4. The sputtering apparatus 101 comprises a chamber 102, a gas supply source 103 connected to the chamber 102, an anode 104 and a cathode 105 located inside the chamber 102, and a target 106 connected to the cathode 105.

[0061] The film electrode 3 and dielectric layer 4 may be formed continuously using a sputtering apparatus 101 capable of sputtering and plasma processing. First, the substrate 2 is placed on the anode 104 side of the chamber 102. A target 106 of metallic yttrium with a purity of 4N (99.99%) or higher is placed on the cathode 105 side. In this state, the chamber 102 is depressurized by an exhaust pump, and argon and oxygen are supplied as gas G from a gas supply source 103. For example, the pressure of the argon gas is set to 0.1 Pa or more and 2 Pa or less, and the pressure of the oxygen gas is set to 1 Pa or more and 5 Pa or less.

[0062] Next, in an argon-rich atmosphere, an electric field is applied between the anode 104 and cathode 105 using a power supply to generate plasma P and sputter to form a metallic yttrium film on the main surface of the substrate 2, thereby forming a film electrode 3. The power supplied from the power supply can be either high-frequency power or DC power. When forming a film electrode 3 made of multiple metals such as titanium and yttrium, multiple targets 106 can be installed in the sputtering apparatus 101, and the metal to be deposited can be switched by switching the targets 106.

[0063] After forming the film electrode 3, a dielectric layer 4 is formed by post-oxidation sputtering. Specifically, a yttria film that becomes the dielectric layer 4 is formed on the upper surface 6 of the film electrode 3 by repeatedly forming a metallic yttrium film by sputtering and oxidizing it with oxygen plasma. The thickness of the yttrium film formed in one step is approximately 1 nm or less.

[0064] If the upper surface 6 of the film electrode 3 is yttrium, the connection portion with the dielectric layer 4 can be formed by oxidation of the film electrode 3, resulting in a highly adhesive and stable dielectric layer 4. The interface between such a yttrium layer and yttrium oxide is indistinct, and there is a region where the oxygen ratio increases continuously.

[0065] The sputtering apparatus 101, which alternately performs a sputtering process to form a metallic yttrium film and an oxidation process, comes in two types: one in which the sputtering region and the oxidation region are separated by space and the substrate 2 moves between the two regions, and another in which the sputtering and oxidation processes are separated by time and the sputtering and oxidation processes are performed alternately in the same region. Figure 4 shows an example of the latter type.

[0066] In the former type, the apparatus includes a sputtering region and an oxidation region, and the substrate 2 moves between these regions. Each region is surrounded by a partition wall. In the sputtering region, the argon partial pressure is increased, and ions are accelerated by a magnetic field (or electric field) to collide with the target 106. On the other hand, in the oxidation region, the oxygen partial pressure is increased.

[0067] In the latter type, the substrate 2 remains in the same location, and the type of gas supplied into the chamber 102 is switched, repeating the process of metal film deposition and oxidation.

[0068] In both cases, during sputtering, an argon-rich plasma is irradiated onto the target 106 to perform sputtering, and during oxidation, an oxygen-rich plasma is irradiated onto the target film to perform oxidation.

[0069] To make the surface roughness R1 of the first surface 5 of the formed dielectric layer 4 greater than the surface roughness R2, the first surface 5 should be polished to achieve this relative relationship. The same applies to the upper surface 6 of the film electrode 3. That is, the upper surface 6 of the film electrode 3 before forming the dielectric layer 4 should be polished so that the surface roughness R3 is greater than the surface roughness R4. For example, the lapping process and the CMP described above may be performed as polishing.

[0070] To obtain a dielectric layer 4 which is a polycrystalline dielectric layer in which the crystal grain size is smaller near the substrate 2 or near the film electrode 3 than near the first surface 5, the total amount of sputtered particles should be increased in order to reduce crystal growth due to rearrangement of sputtered particles in the initial stages of film formation, and the film formation time until the desired thickness of the dielectric layer 4 is obtained should be shortened.

[0071] The dielectric layer 4 having a first amorphous layer 8 and a second amorphous layer 9 is obtained by activating the surface of the film electrode 3 and the substrate 2 by plasma treatment and then performing sputtering.

[0072] The thickness D1 of the first amorphous layer 8 and the thickness D2 of the second amorphous layer 9 can be adjusted by adjusting the combination of the materials and surface roughness of the film electrode 3 and the substrate 2, respectively. In other words, the thicknesses D1 and D2 are related to the ease of diffusion of the constituent elements of the film electrode 3 and the substrate 2, and the surface roughness of the film electrode 3 and the substrate 2 (the rougher the surface, the thicker the amorphous layer tends to be). Therefore, the desired relationship between the thicknesses D1 and D2 can be adjusted by adjusting the surface roughness of the film electrode 3 and the substrate 2 according to their respective materials.

[0073] <Plasma Processing Apparatus> Next, a plasma processing apparatus of an embodiment not limited to the present disclosure will be described.

[0074] The plasma processing apparatus has a plasma sensor, including the electrode-equipped substrate 1 described above, installed inside the plasma processing chamber.

[0075] As described above, the electrode-equipped substrate 1 enables high-precision measurement, has high plasma resistance, and can function as a capacitive probe-type plasma sensor. Therefore, it can be used as a plasma sensor mounted on the wall of the plasma processing chamber in a plasma processing apparatus that performs plasma processing on a workpiece such as a semiconductor substrate using plasma discharge, such as plasma CVD, ashing, etching, or sputtering.

[0076] The plasma sensor installed in the plasma processing chamber may be just one or multiple. If there are multiple plasma sensors, the number of plasma sensors may be, for example, two to four.

[0077] While the embodiments described above are examples of those relating to this disclosure, it goes without saying that this disclosure is not limited to the embodiments described above, and any embodiments can be used as long as they do not deviate from the gist of this disclosure.

[0078] For example, if substrate 2 contains sapphire, substrate 2 may contain additives or oxygen vacancies, etc., to adjust the light transmittance of the sapphire, to the extent that it does not impair its properties. Specifically, substrate 2 may contain additives or vacancies, etc., that absorb harmful light such as ultraviolet light.

[0079] Furthermore, if the dielectric layer 4 contains an oxide containing yttrium, the dielectric layer 4 may also contain other oxides such as aluminum in addition to yttrium, or it may contain a composite oxide such as yttrium aluminum garnet, as long as it does not impair its properties.

[0080] In the embodiments described above, the example of using the electrode-equipped substrate 1 as a plasma sensor was used, but the electrode-equipped substrate 1 can be applied to other uses as well. Other applications of the electrode-equipped substrate 1 include, for example, electrostatic chucks.

[0081] The electrode-equipped substrate 1 may have the configuration shown in Figure 5. Next, an electrode-equipped substrate 1A of another embodiment not limited to this disclosure will be described. In the following, the differences between electrode-equipped substrate 1A and electrode-equipped substrate 1 will be mainly described, and detailed explanations of aspects having the same configuration as electrode-equipped substrate 1 may be omitted. Therefore, the description of electrode-equipped substrate 1 may be used as a reference to understand the configuration of electrode-equipped substrate 1A.

[0082] As shown in the example in Figure 5, the height H1 from the base body 2 of the first surface 5 of the electrode-equipped substrate 1A is lower at the portion P2 located above the outer peripheral portion P4 of the film electrode 3 than at the portion P1 located above the central portion P3 of the film electrode 3.

[0083] If the height H1 of the portion P2 located above the outer peripheral portion P4 of the film electrode 3 on the first surface 5 of the dielectric layer 4 is made relatively lower, the distance from the plasma source on the first surface 5 becomes relatively greater for portion P2. Therefore, the concentration of plasma on the portion P2, where charge tends to concentrate, is reduced on the first surface 5 of the dielectric layer 4, thereby improving plasma resistance. It is also possible to reduce particle generation. Furthermore, since the surface area of ​​the first surface 5 of the dielectric layer 4 is increased, the amount of plasma on the first surface 5 can be increased, thereby improving sensitivity.

[0084] The upper surface 6 of the membrane electrode 3 may have a height H2 from the substrate 2 that is lower at the outer periphery P4 than at the central part P3.

[0085] When the height H2 of the outer peripheral portion P4 on the upper surface 6 of the film electrode 3 is relatively lowered, the distance from the plasma source to the outer peripheral portion P4 on the upper surface 6 of the film electrode 3 becomes relatively greater. Therefore, the concentration of plasma on the outer peripheral portion P4, where charge tends to concentrate, is reduced on the upper surface 6 of the film electrode 3. Furthermore, by relatively lowering the height H2 of the outer peripheral portion P4 on the film electrode 3, the height H1 of portion P2 of the dielectric layer 4 located above this outer peripheral portion P4 can be further reduced. As a result, plasma resistance can be further improved and particle generation can be further reduced. In addition, the surface area of ​​the first surface 5 in the dielectric layer 4 is increased, which can further increase sensitivity.

[0086] The first surface 5 may be a curved surface in which the height H1 from the substrate 2 gradually decreases from the portion P1 located above the central portion P3 of the film electrode 3 to the portion P2 located above the outer peripheral portion P4 of the film electrode 3. In this case, since there are no corners on the first surface 5 of the dielectric layer 4 where charge tends to concentrate, plasma resistance can be further improved and particle generation can be further reduced.

[0087] The above-described configuration in which the first surface 5 is a curved surface is not limited to a configuration in which the entire first surface 5 is a curved surface. For example, in the example shown in Figure 5, the first surface 5 is curved in the portion located on the film electrode 3 and in its vicinity.

[0088] The upper surface 6 of the film electrode 3 may be a curved surface in which the height H2 from the substrate 2 gradually decreases from the central part P3 to the outer peripheral part P4. In this case, since there are no corners on the upper surface 6 of the film electrode 3, stress concentration can be reduced and delamination of the film electrode 3 or the dielectric layer 4 can be reduced.

[0089] The height H1 of part P1 on the first surface 5 may be set to, for example, 2 μm or more and 6 μm or less, or to 3 μm or more and 5 μm or less. The height H1 of part P2 on the first surface 5 may be set to, for example, 0.4 times or more and 0.9 times the height H1 of part P1, or to 0.5 times or more and 0.8 times.

[0090] The height H2 of the central part P3 of the membrane electrode 3 may be set to, for example, 0.5 μm or more and 4 μm or less, or to, 1 μm or more and 3 μm or less. The height H2 of the outer peripheral part P4 of the membrane electrode 3 may be set to, for example, 0.2 times or more and 0.8 times the height H2 of the central part P3, or to, 0.4 times or more and 0.6 times.

[0091] Heights H1 and H2 are the heights from the main surface of the substrate 2 that is in contact with the film electrode 3. Alternatively, heights H1 and H2 may be measured by cross-sectional observation using an electron microscope.

[0092] To make part P2 lower than part P1 on the first surface 5 of the dielectric layer 4, the first surface 5 can be shaped to achieve the above-mentioned magnitude relationship. At this time, the first surface 5 may be shaped to become the curved surface described above. These points are the same for the upper surface 6 of the film electrode 3. That is, in the film electrode 3 before forming the dielectric layer 4, the upper surface 6 can be shaped so that the outer peripheral part P4 is lower than the central part P3, or the upper surface 6 may be shaped to become the curved surface described above. The shaping may be performed by preparing multiple targets 106 and changing the magnetic field (or electric field) applied to each target 106. Alternatively, it may be performed by polishing. For example, the above-mentioned lapping process and the above-mentioned CMP may be performed as polishing.

[0093] Furthermore, the electrode-equipped substrate according to this disclosure may have the following configurations: [1] The electrode-equipped substrate comprises a substrate, a film electrode located on the substrate, and a dielectric layer located on the film electrode and having a first surface opposite to the substrate, wherein the surface roughness R1 of the portion located on the central part of the film electrode is greater than the surface roughness R2 of the portion located on the outer periphery of the film electrode. [2] In the electrode-equipped substrate of [1], the upper surface of the film electrode may have a surface roughness R3 of the central part greater than the surface roughness R4 of the outer periphery. [3] In the electrode-equipped substrate of [1] or [2], the film electrode may include an active metal, or constituent elements of the substrate or the dielectric layer, or a laminate thereof. [4] In any of the electrode-equipped substrates of [1] to [3], the substrate may include a via conductor connected to the central part of the film electrode. [5] In any of the electrode-equipped substrates described in [1] to [4] above, the dielectric layer may be a polycrystalline dielectric layer, and the grain size of the polycrystalline dielectric layer may be smaller near the substrate or near the film electrode than near the first surface. [6] In any of the electrode-equipped substrates described in [1] to [5] above, the dielectric layer may have a first amorphous layer at the interface with the film electrode containing the constituent elements of the dielectric layer and the film electrode, and a second amorphous layer at the interface with the substrate containing the constituent elements of the dielectric layer and the substrate. [7] In the electrode-equipped substrate described in [6] above, the thickness of the first amorphous layer may be smaller than the thickness of the second amorphous layer. [8] In any of the electrode-equipped substrates described in [1] to [7] above, the height of the first surface from the substrate may be lower at the outer periphery of the film electrode than at the central part of the film electrode. [9] In the electrode-equipped substrate of [8] above, the height of the upper surface of the film electrode from the base is lower at the outer periphery than at the central part.

[10] In the electrode-equipped substrate of [8] or [9] above, the first surface may be a curved surface in which the height from the base gradually decreases from the portion located on the central part of the film electrode toward the portion located on the outer periphery of the film electrode.

[11] In the electrode-equipped substrate of [9] or

[10] above, the upper surface of the film electrode may be a curved surface in which the height from the base gradually decreases from the central part toward the outer periphery.

[0094] 1... Electrode-equipped substrate 1A... Electrode-equipped substrate 2... Substrate 3... Film electrode 4... Dielectric layer 5... First surface 6... Top surface 7... Via conductor 8... First amorphous layer 9... Second amorphous layer 10... Support layer 11... Power supply terminal 101... Sputtering apparatus 102... Chamber 103... Gas supply source 104... Anode 105... Cathode 106... Target P1... Area located on the central part P2... Area located on the outer periphery P3... Central part P4... Outer periphery P5... Area located on the substrate

Claims

1. An electrode-equipped substrate comprising: a substrate; a film electrode located on the substrate; and a dielectric layer located on the film electrode and having a first surface opposite to the substrate, wherein the surface roughness R1 of the portion located on the central part of the film electrode is greater than the surface roughness R2 of the portion located on the outer periphery of the film electrode.

2. The electrode substrate according to claim 1, wherein the upper surface of the film electrode has a surface roughness R3 in the central part that is greater than the surface roughness R4 in the outer part.

3. The electrode-equipped substrate according to claim 1 or 2, wherein the film electrode comprises an active metal, or a constituent element of the substrate or the dielectric layer, or a laminate thereof.

4. The electrode substrate according to any one of claims 1 to 3, wherein the substrate comprises a via conductor connected to the central portion of the film electrode.

5. The electrode substrate according to any one of claims 1 to 4, wherein the dielectric layer is a polycrystalline dielectric layer, and the grain size of the polycrystalline dielectric layer is smaller near the substrate or near the film electrode than near the first surface.

6. The electrode substrate according to any one of claims 1 to 5, wherein the dielectric layer has a first amorphous layer containing the constituent elements of the dielectric layer and the film electrode at its interface with the film electrode, and a second amorphous layer containing the constituent elements of the dielectric layer and the substrate at its interface with the substrate.

7. The electrode substrate according to claim 6, wherein the thickness of the first amorphous layer is smaller than the thickness of the second amorphous layer.

8. The electrode substrate according to any one of claims 1 to 7, wherein the height of the first surface from the substrate is lower in the portion located on the outer periphery of the film electrode than in the portion located on the central portion of the film electrode.

9. The electrode substrate according to claim 8, wherein the height of the upper surface of the film electrode from the substrate is lower at the outer periphery than at the central portion.

10. The electrode substrate according to claim 8 or 9, wherein the first surface is a curved surface whose height from the substrate gradually decreases from the portion located on the central part of the film electrode toward the portion located on the outer periphery of the film electrode.

11. The electrode substrate according to claim 9 or 10, wherein the upper surface of the film electrode is a curved surface whose height from the substrate gradually decreases from the central part toward the outer periphery.

Images