Method, apparatus and system for extracting profile of doping concentration of amorphous oxide semiconductor thin-film transistor

Abstract

The present invention relates to a method, an apparatus and a system for extracting a profile of doping concentration of an amorphous oxide semiconductor thin-film transistor. The method for extracting a profile of doping concentration for a channel region of an amorphous oxide semiconductor thin-film transistor, according to one embodiment of the present invention, comprises the steps of: measuring CG, which is a gate capacitance for a gate electrode according to a gate voltage; using information about the measured CG to map each of n, which is the carrier concentration of the channel region, and y, which is the length in the transverse direction of the channel region, thereby deriving n(y), which is a profile of carrier concentration according to y in the channel region; and converting the derived n(y) into ND(y), which is a profile of doping concentration according to y in the channel region.

Description

Method, apparatus, and system for extracting doping concentration profile of amorphous oxide semiconductor thin-film transistors

[0001] The present invention relates to a technique for extracting a profile of doping concentration of an amorphous oxide semiconductor thin-film transistor, and more specifically, to a technique for extracting a lateral profile of doping concentration for the channel region of an amorphous oxide semiconductor thin-film transistor using capacitance-voltage characteristics.

[0002] Amorphous oxide semiconductor thin-film transistors (hereinafter referred to as "amorphous oxide semiconductor TFTs") possess several advantages, such as high carrier mobility, uniformity of the thin film over large areas, and stability in terms of reliability. Due to these advantages, amorphous oxide semiconductor TFTs are being researched as devices to replace amorphous silicon TFTs applied to display backplanes, such as high-resolution Active Matrix (AM) LCDs and Organic Light-Emitting Diodes (AM-OLEDs).

[0003] Since the electrical influence of amorphous oxide semiconductor TFTs is significant depending on the channel doping profile, extracting the doping profile within the corresponding channel region is very important for device characteristic analysis. In this regard, conventional technology is a VGS-based TLM method based on current (I)-voltage (V) that can obtain the carrier concentration distribution in the transverse direction. However, this conventional technology not only makes it difficult to extract the carrier concentration in the central part of the channel region, but also cannot determine the difference in doping profiles according to the length of the device.

[0004] Accordingly, there is a need for a new method to extract the doping profile of the entire channel region and the doping profile according to the length in the transverse direction by measuring the capacitance (C)-voltage (V) of an amorphous oxide semiconductor TFT.

[0005] However, the above description merely provides background information regarding the present invention and does not constitute previously disclosed technology.

[0006] The present invention aims to provide a technique capable of extracting a transverse profile of doping concentration for the channel region of an amorphous oxide semiconductor thin-film transistor using capacitance-voltage characteristics.

[0007] However, the problems that the present invention aims to solve are not limited to those mentioned above, and other unmentioned problems will be clearly understood by those skilled in the art to which the present invention belongs from the description below.

[0008] A method according to one embodiment of the present invention for solving the above-mentioned problem is a method for extracting a doping concentration profile for a channel region of an amorphous oxide semiconductor thin-film transistor, wherein C is a gate capacitance for a gate electrode according to a gate voltage. G A step of measuring ; the measured C GA step of deriving a carrier concentration profile n(y) according to y in the channel region by mapping n, which is a carrier concentration in the channel region, and y, which is a length in the transverse direction of the channel region, respectively, using information regarding; and a doping concentration profile N according to y in the channel region using the derived n(y). D Includes a step of converting to (y).

[0009] The above N D (y) may correspond to a carrier concentration profile derived from the carrier concentration when a gate voltage of a size for the flat band state of the channel region is applied.

[0010] The C measured in the above measuring step G is C GDS and C GS(D) Includes, and the above C GDS The above C, measured according to the change in gate voltage while voltage is applied to the gate electrode, source electrode, and drain electrode, respectively. G Corresponds to, and the above C GS(D) is C GS and C GD At least one of the above C GS The above C, which is measured according to the change in gate voltage while voltage is applied to the gate electrode and source electrode, respectively, and the drain electrode is floating. G Corresponds to, and the above C GD The above C, which is measured according to the change in gate voltage while voltage is applied to the gate electrode and drain electrode, respectively, and the source electrode is floating. G It may apply to.

[0011] The step of deriving the above n(y) involves the first axis with respect to the gate voltage and the measured C G The above n(y) can be derived using a first graph that includes a second axis for the target capacitance related to each.

[0012] The step of deriving the above n(y) can map the above n and the above y by extracting information about the above n from information about multiple segments divided in the direction of the first axis in the above first graph, and extracting information about the above y from information about multiple segments divided in the direction of the second axis.

[0013] The target capacitance is the above C G In C parasitic The value after subtracting C OX It corresponds to the capacitance divided by, and the above C parasitic The above C G It corresponds to parasitic capacitance caused by the measuring instrument used during the measurement of, and the above C OX The above C G It can correspond to the capacitance per unit area.

[0014] The above C parasitic It can be derived using the following formula.

[0015] C parasitic = min C GS(D) - min (C GDS -C GD(S) )

[0016] (here, min C GS(D) is V G C according to GS(D) C of the minimum value among the values GS(D) Corresponds to, and min (C GDS -C GD(S) ) is V G C according to GDS Value and V G C according to GD(S) Corresponds to the minimum difference between values)

[0017] The step of deriving the above n(y) is the above C at V1, which is the gate voltage range that causes the channel region to turn off. GC1 and y1, which is the position of the accumulated area in the lateral direction of the channel region in V1, can be derived and mapped using the following equations, respectively.

[0018] C1= C GDS - min C GDS

[0019] C1= 2WC OX y1

[0020] (here, min C GDS is V G C according to GDS C of the minimum value among the values GDS ...corresponds to, and W corresponds to the width of the above channel area)

[0021] The step of deriving the above n(y) is n corresponding to the above n when the gate voltage is 0V. o The above V1 can be mapped using the following equation.

[0022] n0=C OX (0-V1) / qt act

[0023] (Here, q corresponds to the elementary charge, and t act (corresponds to the thickness of the above channel region)

[0024] The above N D The step of converting to (y) is performed using the following formula for the above n o The above N D It can be converted to (y).

[0025]

[0026] (Here, min n0(y) corresponds to the minimum value of n0(y), and min N D (corresponds to the minimum value of the doping concentration in the above channel region)

[0027] The above min N D It can be obtained under charge neutrality conditions in the flat band of the channel region.

[0028] V, which is the threshold value that turns on the above channel region. ON When applied as the gate voltage, the above y is L GRAD Corresponding to and the above C G is 2C ox WL GRAD It can respond to.

[0029] (Here, W corresponds to the width of the channel area, and L GRAD is the C along with the change in the accumulation area in the channel region according to the gate voltage. G (corresponds to the lateral length of the changing region)

[0030] An electronic device according to one embodiment of the present invention comprises C, which is a gate capacitance for a gate electrode according to a gate voltage measured using a measuring instrument. G It includes a memory that stores information about; and a control unit that controls the extraction of a doping concentration profile for a channel region of an amorphous oxide semiconductor thin film transistor using the information stored in the memory.

[0031] The above control unit is, the above C G Using information regarding, by mapping n, which is the carrier concentration of the channel region, and y, which is the length in the transverse direction of the channel region, respectively, a carrier concentration profile n(y) according to y in the channel region is derived, and the derived n(y) is used to derive N, which is a doping concentration profile according to y in the channel region. D It can be converted to (y).

[0032] The above C G is C GDS and C GS(D) Includes, and the above C GDS The above C, measured with voltage applied to the gate electrode, source electrode, and drain electrode, respectively. G Corresponds to, and the above C GS(D) is CGS and C GD At least one of the above C GS The above C is measured with voltage applied to the gate electrode and source electrode, respectively, while the drain electrode is floating. G Corresponds to, and the above C GD The above C is measured with voltage applied to the gate electrode and drain electrode, respectively, while the source electrode is floating. G It may apply to.

[0033] The control unit, when deriving n(y), has a first axis for the gate voltage and the measured C G The above n(y) can be derived using a first graph that includes a second axis for the target capacitance related to each.

[0034] When deriving n(y), the control unit can map n and y by extracting information about n from information about multiple segments divided in the first axis direction in the first graph, and extracting information about y from information about multiple segments divided in the second axis direction.

[0035] A system according to one embodiment of the present invention has a gate capacitance C for a gate electrode according to a gate voltage. G A measuring instrument for measuring information about; C measured by the said measuring instrument G An electronic device that extracts a doping concentration profile for the channel region of an amorphous oxide semiconductor thin-film transistor using information about

[0036] The above electronic device is, the C GUsing information regarding, by mapping n, which is the carrier concentration of the channel region, and y, which is the length in the transverse direction of the channel region, respectively, a carrier concentration profile n(y) according to y in the channel region is derived, and the derived n(y) is used to derive N, which is a doping concentration profile according to y in the channel region. D It can be converted to (y).

[0037] The present invention, configured as described above, has the advantage of being able to extract a transverse profile of the doping concentration for the channel region of an amorphous oxide semiconductor thin-film transistor using capacitance-voltage characteristics.

[0038] In particular, since the electrical influence of amorphous oxide semiconductor thin-film transistors is significant depending on the doping profile of the channel region, extracting the doping profile for the corresponding channel region is very important for device characteristic analysis. The present invention has the advantage of being able to observe and analyze changes in the doping profile according to process variables of amorphous oxide semiconductor thin-film transistors, thereby providing direction for parameter design regarding the process of amorphous oxide semiconductor thin-film transistors.

[0039] The effects obtainable from the present invention are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art from the description below.

[0040] FIG. 1 shows a cross-sectional view of one side of an amorphous oxide semiconductor thin film transistor (100) according to one embodiment of the present invention and its length in the transverse direction.

[0041] FIG. 2 shows the configuration of a system (10) according to one embodiment of the present invention.

[0042] Figure 3 shows the configuration of an electronic device (300) for extracting a doping concentration profile.

[0043] FIG. 4 shows an operation flowchart for a method according to one embodiment of the present invention.

[0044] FIG. 5 relates to an amorphous oxide semiconductor TFT (100) according to one embodiment of the present invention, with respect to a gate voltage (V G A graph of capacitance according to ) and a graph of doping concentration according to lateral distance in the channel region (150) are shown, respectively.

[0045] Figure 6 shows a graph of various information that can be used during the execution of S402 and S403.

[0046] Hereinafter, specific embodiments according to the embodiments of the present disclosure will be described with reference to the drawings. The following detailed description is provided to facilitate a comprehensive understanding of the methods, apparatuses, and / or systems described herein. However, this is merely illustrative and the present invention is not limited thereto.

[0047] In describing the embodiments of the present disclosure, detailed descriptions of known technologies related to the present invention are omitted if it is determined that such detailed descriptions would unnecessarily obscure the essence of the embodiments. Furthermore, terms used below are defined with consideration of their functions in the present invention, and these may vary depending on the intentions or practices of the user or operator. Therefore, such definitions should be based on the content throughout this specification. Terms used in the detailed description are intended merely to describe specific embodiments and should not be limiting. Unless explicitly stated otherwise, expressions in the singular form include the meaning of the plural form. In this description, expressions such as "include" or "comprise" are intended to refer to certain characteristics, numbers, steps, actions, elements, parts thereof, or combinations thereof, and should not be interpreted to exclude the existence or possibility of one or more other characteristics, numbers, steps, actions, elements, parts thereof, or combinations thereof other than those described. Additionally, terms such as "...part," "...unit," "module," and "block" described in the specification refer to a unit that processes at least one function or operation, and this may be implemented in hardware, software, or a combination of hardware and software.

[0048] Amorphous oxide semiconductor thin-film transistors (hereinafter referred to as "amorphous oxide semiconductor TFTs") are gaining attention as alternative devices to amorphous silicon thin-film transistors (a-Si TFTs), which are commercially used as switches or driving elements in display backplanes such as AMLCDs and AMOLEDs, due to their high carrier mobility, uniformity of the thin film over large areas, and stability in terms of reliability.

[0049] In relation to such amorphous oxide semiconductor TFTs, extracting the doping profile within the channel region, which significantly affects electrical characteristics, is very important for analyzing the characteristics of the amorphous oxide semiconductor TFT device. Accordingly, the present invention aims to provide a technique for more accurately extracting the transverse profile of the doping concentration in the channel region of an amorphous oxide semiconductor TFT using capacitance-voltage characteristics. In this case, the transverse direction refers to the longitudinal direction between the source electrode (120) and the drain electrode (130), which will be described later. That is, the direction from the source electrode (120) to the drain electrode (130) or the direction from the drain electrode (130) to the source electrode (120) may correspond to the transverse direction.

[0050] FIG. 1 shows a cross-sectional view of one side of an amorphous oxide semiconductor thin film transistor (100) according to one embodiment of the present invention and its length in the transverse direction.

[0051] Referring to FIG. 1, an amorphous oxide semiconductor TFT (100) according to one embodiment of the present invention may include three electrodes (i.e., gate electrode, source electrode, drain electrode) (110, 120, 130) for applying driving power, a gate insulator (140), and a channel region (150).

[0052] For example, an amorphous oxide semiconductor TFT (100) may correspond to a TFT with a Top Gate Coplanar structure. That is, the amorphous oxide semiconductor TFT (100) may have a Top Gate structure in which the gate electrode (110) is located above the gate insulating layer (140). Accordingly, in the Top Gate structure, the gate electrode (110) may be located above the source electrode (120) and the drain electrode (130). Additionally, the amorphous oxide semiconductor TFT (100) may have a Coplanar structure in which the source electrode (120) and the drain electrode (130) are located on the same plane.

[0053] However, the amorphous oxide semiconductor TFT (100) is not limited to this Top Gate Coplanar structure and may have a different Bottom Gate structure (i.e., a Staggered structure). In this case, the Bottom Gate structure corresponds to a structure in which the gate electrode (110) is located below the gate insulating layer (140). Accordingly, in the Bottom Gate structure, the gate electrode (110) may be located below the source electrode (120) and the drain electrode (130).

[0054] The gate electrode (110) includes a conductive material. For example, the gate electrode (110) may be formed such that some regions overlap with or do not overlap with the source electrode (120) and the drain electrode (130).

[0055] The gate voltage (V) on these gate electrodes (110) G ) can be applied. For example, the gate voltage (V G ) can be applied within a range from a voltage for turning off to a voltage for turning on of the amorphous oxide semiconductor TFT (100). That is, various sizes of gate voltages (V) for controlling the turn-off or turn-on of the amorphous oxide semiconductor TFT (100). G ) may be applied. At this time, a minimum gate voltage (V) of a size that causes the channel region (150) to turn on may be applied. G ) to V ON It is referred to as. That is, V ON is a threshold V that causes the channel region (150) to turn on. G It corresponds to.

[0056] The gate insulating layer (140) comprises an insulating material and may be provided between the gate electrode (110) and the channel region (150) to protect the gate electrode (110). For example, the gate insulating layer (140) may be provided below the gate electrode (110). That is, the gate insulating layer (140) may be a layer for electrically isolating the gate electrode (110) from other electrodes (i.e., the source electrode (120) and the drain electrode (130)) while electrically isolating it from the channel region (150).

[0057] The gate insulating layer (140) has a dielectric constant (ε OX ) insulating material of a certain thickness (T OX It can be formed to have a structure of ). At this time, capacitance may be formed by the gate insulating layer (140), and said capacitance may be determined by the physical structure of the gate insulating layer (140). That is, the capacitance formed by the gate insulating layer (140) is the dielectric constant (ε) of the insulating material used in the gate insulating layer (140). OX ) and thickness (T OX ) can be determined using the dielectric constant (ε) of the insulating material. For example, the capacitance of the gate insulating layer (140) can be determined using the dielectric constant (ε) of the insulating material. OX ) and thickness (T OX The ratio of )(ε OX / T OX It can be determined according to ).

[0058] The channel region (150) is a layer comprising an amorphous oxide semiconductor and can be provided between the gate insulating layer (140), the source electrode (120), and the drain electrode (130). For example, the amorphous oxide semiconductor may include amorphous IGZO, etc. That is, the channel region (150) is provided between the gate insulating layer (140) and the source electrode (120), and is provided between the gate insulating layer (140) and the drain electrode (130), and between the source electrode (120) and the drain electrode (130). For example, the channel region (150) can be provided below the gate insulating layer (140).

[0059] The source electrode (120) and the drain electrode (130) comprise a conductive material and are provided spaced apart by a certain distance. For example, a channel region (150) may be provided between the source electrode (120) and the drain electrode (130).

[0060] Of course, although not shown in the drawing, an amorphous oxide semiconductor TFT (100) can be provided on a substrate (not shown). For example, a source electrode (120), a drain electrode (130), and a channel region (150) may be provided on the substrate, a gate insulating layer (140) may be provided on the channel region (150), and a gate electrode (110) may be provided on the gate insulating layer (140).

[0061] FIG. 2 shows the configuration of a system (10) according to one embodiment of the present invention, and FIG. 3 shows the configuration of an electronic device (300) for extracting a doping concentration profile.

[0062] A system (10) according to one embodiment of the present invention is a system for extracting a doping concentration profile of an amorphous oxide semiconductor TFT (100), and includes a measuring instrument (200) and an electronic device (300) as shown in FIG. 2.

[0063] The measuring device (200) can apply voltage to the amorphous oxide semiconductor TFT (100) to measure various capacitances for the amorphous oxide semiconductor TFT (100). In particular, the measuring device (200) measures the capacitance (C) for the gate electrode (110) of the amorphous oxide semiconductor TFT (100). G ) can be measured. At this time, C G is C GDS and C GS(D) It may include.

[0064] C GDS The capacitance (C) for the gate electrode (110) is measured when voltage is applied to the gate electrode (110), source electrode (120), and drain electrode (130), respectively. G It corresponds to ). At this time, a constant voltage is applied to the source electrode (120) and the drain electrode (130), and the gate voltage (V) applied to the gate electrode (110) G ) can be authorized as it changes, and in this state V G C according to the change of GDS It can be measured using a measuring device (200).

[0065] C GS The capacitance (C) for the gate electrode (110) is measured when voltage is applied to the gate electrode (110) and the source electrode (120), respectively, while the drain electrode (130) is floating. G It corresponds to ). At this time, a constant voltage is applied to the source electrode (120), and the gate voltage (V) applied to the gate electrode (110) G ) can be authorized as it changes, and in this state V G C according to the change of GS It can be measured using a measuring device (200).

[0066] C GDThe capacitance (C) for the gate electrode (110) is measured with voltage applied to the gate electrode (110) and the drain electrode (130), respectively, while the source electrode (120) is floating. G It corresponds to ). At this time, a constant voltage is applied to the drain electrode (130), and the gate voltage (V) applied to the gate electrode (110) G ) can be authorized as it changes, and in this state V G C according to the change of GD It can be measured using a measuring device (200).

[0067] Of course, C GS and C GD At least one of C GS(D) It can be referred to as such. That is, through the measuring instrument (200) C GDS and C GS(D) can be measured.

[0068] The electronic device (300) corresponds to an electronic device that performs computing to extract a doping concentration profile for an amorphous oxide semiconductor TFT (100) using the capacitance measured by the measuring instrument (200).

[0069] For example, the electronic device (300) may be a general-purpose computing system such as a desktop PC, laptop PC, tablet PC, netbook computer, workstation, smartphone, or smartpad, or a dedicated embedded system implemented based on Embedded Linux, but is not limited thereto.

[0070] Referring to FIG. 3, the electronic device (300) may include a communication unit (320), a memory (340), and a control unit (350). Of course, the electronic device (300) may further include an input unit (310) or a display (330).

[0071] The input unit (310) generates input data in response to various user inputs and may include various input means. For example, the input unit (310) may include a keyboard, a key pad, a dome switch, a touch panel, a touch key, a touch pad, a mouse, a menu button, etc., but is not limited thereto.

[0072] The communication unit (320) is configured to perform communication with other devices. That is, the communication unit (320) can receive information such as the capacitance measured by the measuring device (200). Of course, the communication unit (320) may also transmit information regarding the doping concentration profile of the amorphous oxide semiconductor TFT (100) extracted according to the following description to another device.

[0073] For example, the communication unit (320) may perform wireless communication such as cellular communication, LoRa communication, SigFox communication, 5G (5th generation communication), LTE-A (long term evolution-advanced), LTE (long term evolution), WiFi communication or Bluetooth, or wired communication using an RS-232 port, a USB (Universal Serial Bus) port, a UTP (Unshielded Twisted Pair cable) cable, a coaxial cable, an optical cable or an HFC (Hybrid Fiber Coax) cable, but is not limited thereto.

[0074] The display (330) displays various image data on the screen. For example, the display (330) can display the process of extracting a doping concentration profile for an amorphous oxide semiconductor TFT (100) and the results thereof. Such a display (330) may be composed of a non-emissive panel or an emissive panel. For example, the display (330) may include a liquid crystal display (LCD), a light emitting diode (LED) display, an organic light emitting diode (OLED) display, a micro electro mechanical systems (MEMS) display, or an electronic paper display, but is not limited thereto. Additionally, the display (330) may be combined with an input unit (310) to be implemented as a touch screen, etc.

[0075] The memory (340) stores various information necessary for the operation of the electronic device (300). For example, the stored information may include capacitance measured by the measuring instrument (200), program information related to the extraction of a doping concentration profile for the amorphous oxide semiconductor TFT (100), etc. For example, the memory (340) may include volatile memory devices such as DRAM or SRAM, non-volatile memory such as PRAM, MRAM, ReRAM, or NAND flash memory, or a hard disk drive (HDD) or solid-state drive (SSD), but is not limited thereto. Additionally, depending on its use / location, the memory (340) may be a cache, buffer, main memory, or auxiliary memory, or a separately provided storage system, but is not limited thereto.

[0076] The control unit (350) can perform various control operations of the electronic device (300). That is, the control unit (350) can control the extraction of a doping concentration profile for an amorphous oxide semiconductor TFT (100). At this time, the control unit (350) can control the extraction of the doping concentration profile based on information stored in the memory (340) or information measured by the measuring instrument (200). In addition, the control unit (350) can control the operation of the remaining components of the electronic device (300), such as the input unit (310), communication unit (320), display (330), memory (340), etc. For example, the control unit (350) may include a processor, which is hardware, or a process, which is software executed on the processor, but is not limited thereto. For example, a processor may include, but is not limited to, a microprocessor, a micro controller unit (MCU), a central processing unit (CPU), a processor core, a multiprocessor, an application-specific integrated circuit (ASIC), or a field programmable gate array (FPGA).

[0077] Below, a method for extracting a doping concentration profile for an amorphous oxide semiconductor TFT (100) will be described.

[0078] FIG. 4 shows an operation flowchart for a method according to one embodiment of the present invention.

[0079] A method according to one embodiment of the present invention (hereinafter referred to as "the method") is a method for extracting a doping concentration profile of an amorphous oxide semiconductor TFT (100) and can be performed under the control of a control unit (350) of an electronic device (300). Referring to FIG. 4, the method according to one embodiment of the present invention may include S401 to S403.

[0080] FIG. 5 relates to an amorphous oxide semiconductor TFT (100) according to one embodiment of the present invention, with respect to a gate voltage (V G A graph of capacitance according to ) and a graph of doping concentration according to lateral distance in the channel region (150) are shown, respectively.

[0081] That is, FIG. 5(a) shows the gate voltage (V) of an amorphous oxide semiconductor TFT (100). G Figure 5(b) shows a graph of capacitance according to ) (hereinafter referred to as "the first graph"). In addition, Figure 5(b) is a transverse profile graph of doping concentration for the channel region (150) of the amorphous oxide semiconductor TFT (100) derived from Figure 5(a), and shows a graph of doping concentration according to the transverse distance in the corresponding channel region (150) (hereinafter referred to as "the second graph").

[0082] In addition, Figure 6 shows a graph of various information that can be used during the execution of S402 and S403.

[0083] First, using a measuring device (200), the gate voltage (V G Gate capacitance (C) which is the capacitance for the gate electrode (110) of the amorphous oxide semiconductor TFT (100) according to ) G Measures ) (S401).

[0084] At this time, the gate voltage (V) through the measuring device (200) G Various gate capacitances (C) for the gate electrode (110) while varying the ) G It can measure ), and especially CGDS and C GS(D) It can measure. That is, gate capacitance (C G In relation to ), V G C according to the change of GDS and C GS Measure or V G C according to the change of GDS and C GD Measure or V G C according to the change of GDS and C GS and C GD It can measure.

[0085] By performing this S401, a first graph of the capacitance-voltage characteristics according to FIG. 5(a) can be obtained.

[0086] Next, the information measured in S401 (i.e., V G C according to G Using information about the channel region (150), the carrier concentration n of the channel region (150) and the length (i.e., position in the lateral direction) y of the channel region (150) are respectively extracted and mapped, thereby deriving the carrier concentration profile n(y) for the channel region (150) (S402).

[0087] At this time, n(y) represents the carrier concentration (n) at the corresponding lateral length (y) (i.e., at the corresponding lateral position) according to the lateral length (y) of the channel region (150).

[0088] That is, the gate voltage (V) measured using the measuring instrument (200). G Gate capacitance (C) according to the change of ) G )in C GDS and C GS(D) Information regarding the transverse length (y) of the channel region (150) is extracted from the change information regarding. In addition, the gate voltage (V GInformation regarding the carrier concentration (n) of the channel region (150) is extracted from the change information of ). By mapping the extracted y and n, a carrier concentration profile n(y) can be derived.

[0089] In particular, in S402, n(y) may be derived using the first graph. In this case, the first graph of FIG. 5(a) is the gate voltage (V G This roughly represents the change in capacitance (hereinafter referred to as "target capacitance") according to ). That is, in the first graph, the horizontal axis, the first axis, is V G It corresponds to, and the second axis, which is the vertical axis, corresponds to the target capacitance.

[0090] The target capacitance is the gate capacitance (C G As a capacitance related to ), C G It has a positive (+) correlation with. In this case, the positive correlation is C G It refers to a relationship where the target capacitance increases as increases. Specifically, the target capacitance is C G In C parasitic The value after subtracting C OX The capacitance divided by (C G -C parasitic ) / C OX It may correspond to . In this case, C OX is the gate capacitance per unit area (C G It corresponds to ), and C parasitic This corresponds to parasitic capacitance caused by the measuring instrument (200).

[0091] That is, the gate voltage (V) measured at S401 G C according to ) GDS and C GS(D) A first graph can be obtained from change information regarding . In addition, information about y and n can be extracted and matched from this first graph, thereby deriving n(y).

[0092] In particular, in the first graph, multiple sections divided in the direction of the second axis can correspond to multiple sections for the lateral length of the channel area (150). Accordingly, information about y, which is the lateral length of the channel area (150), can be extracted from the information about multiple sections in the direction of the second axis of the first graph.

[0093] Additionally, in the first graph, multiple sections divided in the direction of the first axis may correspond to multiple sections for the carrier concentration (n) of the channel region (150). Accordingly, information regarding n, which is the carrier concentration of the channel region (150), can be extracted from the information regarding multiple sections in the direction of the first axis of the first graph.

[0094] That is, by using the first graph to extract information about y and n and mapping it, the carrier concentration profile n(y) can be derived.

[0095] Meanwhile, n0, which will be discussed later, is the gate voltage (V G ) corresponds to the carrier concentration (n) for the channel region (150) when ) is 0V, and N C is the effective density of states function of the conduction band for the amorphous oxide semiconductor in the channel region (150) (i.e., as a constant value of approximately 5.0 x 10 18 It corresponds to (can be), and N D corresponds to the doping concentration of the channel region (150). At this time, the dopant profile for the channel region (150) is N D It can be represented as (y). Such N D (y) is the doping concentration (N) at the corresponding lateral length (y) (i.e., at the corresponding lateral position) according to the lateral length (y) of the channel region (150). D It represents ).

[0096] Next, the derived carrier concentration profile n(y) is used to define the dopant profile N for the channel region (150). D Convert to (y) (S403).

[0097] That is, V from n(y) derived from S402 G =V FB Dopant profile N, which is the carrier concentration profile when D It can be transformed into (y). In this case, V FB is a gate voltage (V) of a magnitude applied to create a flat band state in relation to the channel region (150). G It corresponds to ).

[0098] That is, by performing S401, a first graph of capacitance-voltage characteristics according to FIG. 5(a) can be obtained, and by using the first graph obtained in this way to obtain a second graph of the channel region (150) according to FIG. 5(b), a transverse profile of the doping concentration for the channel region (150) of the amorphous oxide semiconductor TFT (100) can be extracted.

[0099] However, the doping concentration profile for the channel region (150) extracted in the present invention is n(y) extracted according to S402 or N extracted according to S403 D (y) may be. In this case, if only n(y) is required, S401 and S402 are performed, but S403 may not be performed, and N D If (y) is required, S401 to S403 may be performed. Accordingly, the performance of S403 may be optional.

[0100] Below, the principle of extracting the transverse profile of the doping concentration for this channel region (150) will be explained.

[0101] First, I will explain the details regarding S401 and S402.

[0102] Referring to FIG. 1, the gate voltage (V G ) is V ONIn the case where the voltage gradually decreases below, the central part (L) in the transverse direction of the channel region (150), which is a region with a low doping concentration in the channel region (150) GATE A depletion (D) occurs starting from / 2), and when this depletion (D) area (region) is viewed from the transverse direction of the channel region (150), the corresponding center (L GATE In / 2), it gradually expands in both directions of the channel region (150). Due to this phenomenon, the accumulation (A) area (region) within the channel region (150) gradually decreases, and the gate capacitance (C) of the gate electrode (110) G ) decreases. At this time, the accumulation (A) area corresponds to the region in the channel region (150) where a large number of carriers are gathered, and L Gate represents the length (gate length) in the transverse direction of the gate electrode (110).

[0103] Accordingly, in the turn-off state, from V1 to V ON As the gate voltage (V G In the case where ) gradually increases, the gate voltage corresponding to V1 (V G C when ) is authorized G From this, carriers are accumulated (A) to a certain extent in the channel region (150), and in this case V1, y1, which is the lateral position of the area of ​​accumulation (A) in the channel region (150), can be obtained. At this time, V1 is included in the voltage range of the turn-off state, V ON A smaller voltage and V to be described later G,min It corresponds to a higher voltage.

[0104] Meanwhile, the amount of carriers present in the channel region (150) in the flat band state is equal to the doping concentration, and the voltage at which all said carriers are eliminated and no current flows can be said to be the voltage in the turn-off state.

[0105] Therefore, the flat band voltage (V FB Assuming that the entire channel region (150) is the same, N, which is the doping concentration for position y1 in the transverse direction of the channel region (150) from V1. D (y1) can be derived

[0106] Referring to FIG. 5(a), a plurality of specific sections divided in the direction of the second axis for the first graph may correspond to a plurality of sections in the lateral length of the channel area (150). These plurality of sections are L OV , L GRAD , L BASE It may include the back.

[0107] First, L OV corresponds to the overlap length section, where N is the doping concentration in the amorphous oxide semiconductor of the channel region (150). D Ga N C The region greater than or equal to (i.e., N D ≥N C It corresponds to the length of the portion that overlaps with the gate electrode (110) within the region. That is, L OV is N D Ga N C Gate voltage (V) is higher than G It corresponds to the length of the portion overlapping with the n+ region of the source electrode (120) and the gate electrode (110), which always have metallic characteristics regardless of the size of ). Accordingly, L OV is V G Despite the change, gate capacitance (C G ) corresponds to the length of the region that does not change.

[0108] L GRAD is the region where the doping concentration changes. That is, L GRAD is the gate voltage (V G Gate capacitance (C) along with the change in area of ​​accumulation (A) according to )G ) also corresponds to the length of the changing region.

[0109] L BASE is the center (L) in the transverse direction of the channel area (150). GATE N corresponding to the doping concentration of / 2) D,ch corresponds to a segment of the base region, which is a constant area. That is, L BASE is the center (L) in the transverse direction of the channel area (150). GATE / 2) and the corresponding center (L GATE / 2) may correspond to a section of a predetermined length that includes a portion on both sides.

[0110] Meanwhile, referring to FIG. 6(a), n0 and N D The voltage range for the capacitance-voltage (CV) data used for the profile analysis of is V G,min From V ON It can include up to. In this case, V G,min is C GDS The gate voltage (V) at which it begins to saturate at the minimum value G It corresponds to ), and V ON The gate voltage (V) at which the amorphous oxide semiconductor TFT (100) (i.e., the channel region (150)) is turned on is G It corresponds to ).

[0111] At this time, V ON is V G C according to GDS and C GS V, the difference between livers G C according to GDS - C GS V corresponding to the capacitance value corresponding to the maximum value among the capacitance values. G It corresponds to. Such V ON is the turn-on voltage on the transfer curve (i.e., V GS @I DS =W / L*10 -11 It is the same as ).

[0112] The voltage range is V G,min From V ON The reason it is defined as including up to is as follows. That is, V G,min At lower voltages, y1 remains unchanged and n0 continuously increases, so n0 at that location cannot be specified. Additionally, the voltage V at which the channel region (150) is turned on and the entire channel region (150) accumulates (A) ON From then on, gate capacitance (C G This is because the change in ) is no longer determined by the accumulation (A) area, so y1 corresponding to the boundary between accumulation (A) and depletion (D) in the transverse direction of the channel area (150) can no longer be defined.

[0113] Meanwhile, the geometry and gate capacitance (C) of the amorphous oxide semiconductor TFT (100) G From the relationship regarding the maximum (max) and minimum (min), etc. of ) C parasitic ,c OX , L effective , L OV , L GRAD and L BASE All values ​​for can be obtained. At this time, the geometry is the width of the channel region (150) (i.e., channel width; W) and the length in the lateral direction of the gate electrode (110) (gate length; L). Gate It may include values ​​for ).

[0114] C parasitic In relation to this, the following Equation 1 holds.

[0115] C parasitic = min C GS(D) - min (C GDS -C GD(S) ) (Equation 1)

[0116] In this Equation 1, min C GS(D) is V GC according to GS(D) C of the minimum value among the values GS(D) corresponds to min (C GDS -C GD(S) ) is V G C according to GDS Value and V G C according to GD(S) It corresponds to the minimum value of the difference between the values.

[0117] Also, C OX In relation to this, the following Equation 2 holds.

[0118] C OX = (max C GDS - C parasitic ) / WL Gate (Equation 2)

[0119] In this Equation 2, max C GDS is V G C according to GDS C of the maximum value at the value of GDS It corresponds to.

[0120] Also, L effective represents the effective channel length for the channel region (150) of the amorphous oxide semiconductor TFT (100). That is, L effective can refer to a length in which the length of the channel region (150) in the transverse direction is smaller than the length of the gate electrode (110) due to the n+ diffusion regions on both sides of the gate electrode (110). This L effective In relation to this, the following Equation 3 holds.

[0121] L effective = (max C GDS - min C GDS ) / C OX W (Equation 3)

[0122] In this Equation 3, min C GDS is V G C according to GDS C of the minimum value at the value of GDS It corresponds to.

[0123] Also, LOV N in the amorphous oxide semiconductor of the channel region (150) D ≥N C Since the region corresponds to the length that overlaps with the gate electrode (110), C GDS Ga min C GDS V that starts to saturate G in V G,min It is determined at. L OV In relation to , the following Equation 4 holds, and from this Equation 4, L OV You can obtain the value of.

[0124] min (C GDS -C GD ) = C OX WL OV (Equation 4)

[0125] However, if saturated within the measurement range of the measuring instrument (200), N D Through regression on N D N of the literature value C (approx. 5.0x10 18 Find y that becomes ) and L OV You can also obtain the value of.

[0126] Meanwhile, L GRAD and L BASE In relation to this, the following Equations 5 and 6 hold, and using these equations, L GRAD and L BASE You can obtain the values ​​of respectively.

[0127] L GRAD = C1(V ON ) / 2WC OX (Equation 5)

[0128] L BASE = L Gate - 2L OV - 2L GRAD (Equation 6)

[0129] Meanwhile, referring to FIG. 6(b), C G and V GThe relationship between and, y and V G The relationship between them can be summarized as follows. Here, y represents the length in the lateral direction of the channel area (150).

[0130] That is, the gate voltage (V), which is a specific voltage within the turn-off range. G Gate capacitance (C) at V1 G C1, which is ), can be defined as shown in Equation 7 below.

[0131] C1= C GDS - min C GDS (Equation 7)

[0132] That is, V ON V of V1 smaller than V G When applied, the position of the accumulation (A) area in the lateral direction of the channel area (150) can be denoted as y1. At this time, V G <V ON During this time, as V1 increases, the accumulation (A) area in the channel region (150) increases, and the gate capacitance (C G Since it leads the change of ), the relationship between C1 and y1 can be mapped using the relationship in Equation 8 below.

[0133] C1= 2WC OX y1(Equation 8)

[0134] For example, if the value of C1 obtained according to Equation 7 is substituted into Equation 8, the value for y1 can also be obtained.

[0135] In Equation 8, the reason there are two factors is that the accumulation (A) region increases at both the source electrode (120) and the drain electrode (130). If, C GDS C, not GS or C GDWhen mapped to this, the corresponding factor becomes 1, and the carrier concentration profiles of the source electrode (120) and drain electrode (130) can be independently generated.

[0136] V G =V ON In the case of, C G =2C ox WL GRAD It becomes, and y=L GRAD It becomes. The base region (i.e., L) having the lowest doping concentration in the channel region (150). GRAD <y<L effective -L GRAD ) begins to accumulate (A) simultaneously.

[0137] V G >V ON In the case of, V G As the channel region (150) increases, the base region changes from a relatively weak accumulation to a relatively strong accumulation, and the gate capacitance (C) G Since it leads the change of ), C no longer G =2WC OX The relationship y does not hold.

[0138] Next, referring to Fig. 6(c), V G The relationship between and y, and the relationship between n0 and y, can be summarized as follows.

[0139] The carrier concentration at thermal equilibrium (i.e., zero bias) of y1 is V G Accumulation (A) starts from V1, and V G This corresponds to the concentration of carriers accumulated (A) until V becomes 0V. Accordingly, V1 and n0 can be mapped as shown in Equation 9 below.

[0140] n0=C OX (0-V1) / qtact (Equation 9)

[0141] In Equation 9, q represents the elementary charge, and t act is the thickness of the amorphous oxide semiconductor (e.g., IGZO) of the channel region (150).

[0142] V1(y1) and n0(y1), obtained based on Equation 9, represent the lateral distribution of the turn-off voltage and carrier density, respectively.

[0143] Next, referring to Fig. 6(d), y1 is L effective Converted to -y1, the n0-y1 curve near the source electrode (120) and drain electrode (130) and n0-(L effective -y1) Combine the curves, and the base region of the channel region (150) (i.e., L GRAD <y<L effective -L GRAD If we connect such that the carrier concentration n0(y) of ) becomes n0(y) = min n0(y), then 0 <y1<L effective The profile for n0(y) of the region is completed (refer to the black line in Fig. 6(d). At this time, min n0(y) corresponds to the minimum value of n0(y).

[0144] However, V G >V ON In the case of (i.e., V G (if >0), V within the channel area (150) G There exists a region where (y) > 0, and n0(y) in that region takes on a negative value. The location of y where n0 becomes negative is in a state of depletion in the zero bias. Therefore, V G By changing n0(y)=0 in the region where (y)>0, the profile for the final n0(y) is completed (refer to the red line in Fig. 6(d).

[0145] Next, for S403, n0(y) is N D When converting to (y), use n0 before the information on the concentration distribution of the depletion region in n0 disappears (refer to the black line in Fig. 6(d)).

[0146] N D In the low depletion region, N due to band bending in the thermal equilibrium state D N, the difference between and n0 D -n0 looks large. However, N D As increases, the difference decreases, and in the case of the accumulation region, N D and n0 are almost the same. Therefore, for convenience, N at min n0 D The following Equation 10 can be used, which is defined to correct the difference from the entire region and follow the profile of n0(y) exactly.

[0147] (Equation 10)

[0148] In this Equation 10, min N D is N D As a minimum value, it can be obtained from Equation 11 for charge neutrality in the flat band for the channel region (150).

[0149] (Equation 11)

[0150] However, in this Equation 11, And, am.

[0151] At this time, n cFB represents the concentration of free electrons inside the semiconductor in the flat band. Also, n tFB It refers to the charge density existing in traps (defect states) in the flat band. At this time, represents the charge density in a state where acceptor-like traps are filled (occupied).

[0152] also, represents the charge density in the unoccupied state of donor-like traps. Here, g A (E) represents the acceptor trap state density at energy E, and (E) represents the donor trap state density at energy E. f(E) is the Fermi-Dirac distribution function, representing the probability that the corresponding trap is filled with an electron. [1-f(E)] represents the probability that the corresponding trap is empty.

[0153] g A (E), g D (E), E FB and V FB It can be obtained by utilizing the MPCV method, and N C is 5x10 18 You can use a value known as.

[0154] However, depletion mode (i.e., V ON <V FB If it corresponds to ), use the following Equation 12 to min N D The value of can be calculated.

[0155] (Equation 12)

[0156] At this time, ts is the thickness of the channel region (150), that is, the thickness of the amorphous oxide semiconductor (e.g., IGZO).

[0157] Although the present invention has been described in detail above through representative embodiments, those skilled in the art will understand that various modifications and equivalent alternative embodiments are possible therefrom. Accordingly, the true technical scope of protection of the present invention should be determined by the technical spirit of the appended claims.

Claims

1. A method for extracting a doping concentration profile for the channel region of an amorphous oxide semiconductor thin-film transistor, C, the gate capacitance for the gate electrode depending on the gate voltage G Step of measuring; The measured C above G A step of deriving n(y), a carrier concentration profile according to y in the channel region, by mapping n, a carrier concentration in the channel region, and y, a length in the transverse direction of the channel region, respectively, using information regarding; and The derived n(y) is N, which is the doping concentration profile according to y in the channel region. D Step of converting to (y); A method including 2. In Paragraph 1, The above N D (y) is a method corresponding to a carrier concentration profile derived from the carrier concentration when a gate voltage of a size for a flat band state in the channel region is applied.

3. In Paragraph 1, The C measured in the above measuring step G is C GDS and C GS(D) Includes, The above C GDS The above C, measured according to the change in gate voltage while voltage is applied to the gate electrode, source electrode, and drain electrode, respectively. G It corresponds to, The above C GS(D) is C GS and C GD At least one of them, The above C GS The above C, which is measured according to the change in gate voltage while voltage is applied to the gate electrode and source electrode, respectively, and the drain electrode is floating. G It corresponds to, The above C GD The above C, which is measured according to the change in gate voltage while voltage is applied to the gate electrode and drain electrode, respectively, and the source electrode is floating. G A method corresponding to.

4. In Paragraph 3, The step of deriving the above n(y) involves the first axis with respect to the gate voltage and the measured C G A method for deriving the above n(y) using a first graph each including a second axis for the target capacitance related to.

5. In Paragraph 4, The step of deriving the above n(y) is a method of mapping the above n and the above y by extracting information about the above n from information about multiple segments divided in the direction of the first axis in the above first graph, and extracting information about the above y from information about multiple segments divided in the direction of the second axis.

6. In Paragraph 4, The target capacitance is the above C G In C parasitic The value after subtracting C OX It corresponds to the capacitance divided by, The above C parasitic The above C G It corresponds to parasitic capacitance caused by the measuring instrument used during the measurement of, and The above C OX The above C G A method corresponding to the capacitance per unit area.

7. In Paragraph 6, The above C parasitic is a method derived using the following formula. C parasitic = my C GS(D) - my (C GDS -C GD(S) ) (here, min C GS(D) is V G C according to GS(D) C of the minimum value among the values GS(D) Corresponds to, and min (C GDS -C GD(S) ) is V G C according to GDS Value and V G C according to GD(S) Corresponds to the minimum difference between values) 8. In Paragraph 5, The step of deriving the above n(y) is the above C at V1, which is the gate voltage range that causes the channel region to turn off. G A method for deriving and mapping C1 and y1, which is the position of the accumulated area in the lateral direction of the channel region in V1, respectively, using the following formulas. C1= C GDS - my C GDS C1= 2WC OX y1 (here, min C GDS is V G C according to GDS C of the minimum value among the values GDS ...corresponds to, and W corresponds to the width of the above channel area) 9. In Paragraph 8, The step of deriving the above n(y) is n corresponding to the above n when the gate voltage is 0V. o A method for mapping the above V1 using the following equation. n0=C OX (0-V1) / qt act (Here, q corresponds to the elementary charge, and t act (corresponds to the thickness of the above channel region) 10. In Paragraph 9, The above N D The step of converting to (y) is performed using the following formula for the above n o The above N D Method to convert to (y). (Here, min n0(y) corresponds to the minimum value of n0(y), and min N D (corresponds to the minimum value of the doping concentration in the above channel region) 11. In Paragraph 10, The above min N D A method obtained under charge neutrality conditions in the flat band of the channel region.

12. In Paragraph 5, V, which is the threshold value that turns on the above channel region. ON When applied as the gate voltage, the above y is L GRAD Corresponding to and the above C G is 2C ox WL GRAD A method to respond to. (Here, W corresponds to the width of the channel area, and L GRAD is the C along with the change in the accumulation area in the channel region according to the gate voltage. G (corresponds to the lateral length of the changing region) 13. C, the gate capacitance of the gate electrode according to the gate voltage measured using a measuring instrument G Memory storing information about; and A control unit that controls the extraction of a doping concentration profile for a channel region of an amorphous oxide semiconductor thin-film transistor using information stored in the memory above; is included. The above control unit is, The above C G Using information regarding, by mapping n, which is the carrier concentration of the channel region, and y, which is the length in the transverse direction of the channel region, respectively, a carrier concentration profile n(y) according to y in the channel region is derived, and The derived n(y) is N, which is the doping concentration profile according to y in the channel region. D Electronic device that converts to (y).

14. In Paragraph 13, The above C G is C GDS and C GS(D) Includes, The above C GDS The above C, measured according to the change in gate voltage while voltage is applied to the gate electrode, source electrode, and drain electrode, respectively. G It corresponds to, The above C GS(D) is C GS and C GD At least one of them, The above C GS The above C, which is measured according to the change in gate voltage while voltage is applied to the gate electrode and source electrode, respectively, and the drain electrode is floating. G It corresponds to, The above C GD The above C, which is measured according to the change in gate voltage while voltage is applied to the gate electrode and drain electrode, respectively, and the source electrode is floating. G An electronic device corresponding to 15. In Paragraph 14, The control unit, when deriving n(y), has a first axis for the gate voltage and the measured C G An electronic device for deriving n(y) using a first graph each including a second axis for the target capacitance related to.

16. In Paragraph 15, The above control unit is an electronic device that, when deriving the above n(y), extracts information about the above n from information about multiple segments divided in the first axis direction in the first graph, extracts information about the above y from information about multiple segments divided in the second axis direction, and maps the above n and the above y.

17. C, the gate capacitance of the gate electrode according to the gate voltage G A measuring instrument that measures information about; C measured by the above measuring instrument G An electronic device for extracting a doping concentration profile for the channel region of an amorphous oxide semiconductor thin-film transistor using information about; comprising The above electronic device is, The above C G Using information regarding, by mapping n, which is the carrier concentration of the channel region, and y, which is the length in the transverse direction of the channel region, respectively, a carrier concentration profile n(y) according to y in the channel region is derived, and The derived n(y) is N, which is the doping concentration profile according to y in the channel region. D A system that converts to (y).

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