Wideband amplifier with one-bit step attenuation

Abstract

The wideband amplifier includes a cascoded circuit comprising a first transistor and a second transistor, a third transistor, a first resistor, and a bias control circuit coupled between the first resistor and the third transistor to provide attenuation function of the amplifier. The bias control circuit includes a second resistor and a switch coupled to the second resistor in parallel. The resistor is coupled to the first resistor and a collector of the third transistor in series. The wideband amplifier requires a single bias control circuit, which includes one resistor and one MOSFET switch, to implement attenuation function, which simplifies the design process. The wideband amplifier consumes much less current while providing attenuation, which saves power consumption.

Description

[0001] WIDEBAND AMPLIFIER WITH ONE-BIT STEP ATTENUATION CROSS REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Patent Application No. 19 / 091,180, filed on March 26, 2025, the entire contents of which are incorporated herein by reference.

[0003] BACKGROUND

[0004] In many radio frequency integrated circuits (RFICs) for radar and space applications, the radio frequency (RF) transmit / receive chains require digital step attenuators to control the overall gain. Those attenuators are implemented as separate blocks, which cost layout area and design time. Integrating attenuation function into an amplifier can save layout area and design time. The problem is how to efficiently add attenuation function into an amplifier. The conventional approach is to add a switchable emitter degeneration resistor while the amplifier bias current is kept constant. Because of the constant amplifier bias current, the conventional approach does not provide any power saving effect. This conventional approach requires multiple switches and quite extensive design effort to implement. Therefore, the conventional approach is quite inefficient, consumes large area, and provides no power saving. Therefore, there is a need to provide a wideband amplifier device in which the attenuation function is efficiently added, providing a compact structure and also power saving effect.

[0005] SUMMARY

[0006] The disclosed invention relates to a wideband amplifier with efficient and compact 1 -bit digital step attenuation. The wideband amplifier of the disclosed invention has been developed to support a program that requires an amplifier with 8dB attenuation for its radio frequency integrated circuit (RFIC). A conventional way of adding attenuation function to an amplifier requires multiple switches and design tweaks to vary the gain. The purpose of the disclosed invention is to integrate the attenuation function into an amplifier in a very efficient manner in a very small area. The wideband amplifier of the disclosed invention consumes much less current in attenuation mode than in normal full gain mode. A 1 -bit attenuator and an amplifier are integrated into one block. This 1 -bit attenuator can be integrated into gain amplifiers as well as power amplifiers.

[0007] Contrary to the conventional approach that requires multiple switches and quite extensive design effort to implement, the disclosed invention is just to add one resistor and one switch to the

[0008] 1

[0009] US 304988427vl 390708-008462 / 24 / 20269:44 AMamplifier to lower the reference current, and consequently lower the gain to obtain attenuation. It does not require any tweaks or tuning on the amplifier. Since it requires lower current in attenuation mode, it saves current consumption. It is implemented in a very small area with a very short design time.

[0010] These advantages and others are achieved, for example, by a wideband amplifier that includes a cascoded circuit including a first transistor and a second transistor, where an emitter of the second transistor is coupled to a collector of the first transistor in series. The wideband amplifier further includes a third transistor, a first resistor coupled to a supply voltage source, a bias control circuit coupled between the first resistor and the third transistor, an input terminal for receiving an input signal, and an output terminal for outputting an output signal. The base of the third transistor is coupled to the base of the first transistor in series. The bias control circuit is configured to control attenuation. The input terminal is coupled to the bases of the first transistor and the third transistor. The output terminal is coupled to a collector of the second transistor.

[0011] Each of the first, second, and third transistors may be an NPN bipolar junction transistor (BJT). The bias control circuit may include a second resistor coupled to the first resistor and a collector of the third transistor in series, and a switch coupled to the second resistor in parallel. The switch may be a metal-oxide-semiconductor field-effect transistor (MOSFET). The collector of the third transistor may be connected to the base of the third transistor.

[0012] The wideband amplifier further includes a feedback network configured to extract a portion of the output signal and to feed the portion of the output signal to the base of the first transistor. The feedback network is configured to provide controlled adjustments to a gain of the common emitter device. The wideband amplifier further includes an input matching network coupled between the input terminal and the bases of the first transistor and the third transistor. The input matching network is configured to maximize power transfer between the input terminal and the base of the first transistor. The wideband amplifier further includes an output matching network between the output terminal and the collector of the second transistor. The output matching network is configured to maximize power transfer between the output terminal and the collector of the second transistor. The base of the second transistor and the collector of the second transistor are connected to the supply voltage source to receive a source voltage. The wideband amplifier further includes a first bias network configured to deliver the source voltage to the base of the second transistor. The wideband amplifier further includes a second bias network configured to

[0013] 2

[0014] US 304988427vl 390708-008462 / 24 / 20269:44 AMdeliver the source voltage to the collector of the second transistor. The gate of the switch is connected to a control signal source. The switch is turned on or off based on the control signal from the control signal source. The switch may be configured to provide on-resistance when the switch is turned on.

[0015] BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The preferred embodiments described herein and illustrated by the drawings hereinafter are included to illustrate and not to limit the invention, where like designations denote like elements.

[0017] FIG. 1 shows a circuit diagram of a conventional amplifier in which two emitter degeneration circuits are implemented.

[0018] FIG. 2 shows a circuit diagram of a wideband amplifier of the disclosed invention in which a single bias control circuit is implemented.

[0019] FIG. 3 shows a Cadence schematic diagram built to test the performance of the wideband amplifier of the disclosed invention.

[0020] FIGS. 4A-4D show simulation results for gain, return loss, noise figure, and stability of the wideband amplifier of the disclosed invention, respectively.

[0021] DETAILED DESCRIPTION

[0022] The following detailed description is merely exemplary in nature and is not intended to limit the described embodiments or the application and uses of the described embodiments. All of the implementations described below are exemplary implementations provided to enable persons skilled in the art to make or use the embodiments of the disclosure and are not intended to limit the scope of the disclosure, which is defined by the claims. It is also to be understood that the drawings included herewith only provide diagrammatic representations of the presently preferred structures of the present invention and that structures falling within the scope of the present invention may include structures different than those shown in the drawings.

[0023] With reference to FIG. 1, shown is a circuit diagram of a conventional amplifier 100 in which attenuation circuit is implemented. The conventional amplifier 100 implements two emitter degeneration circuits 120 and 130. It is still a cascoded common emitter amplifier with one step digitally controlled attenuation. However, emitter degeneration is utilized to lower the gain of the amplifier.

[0024] 3

[0025] US 304988427vl 390708-008462 / 24 / 20269:44 AMThe amplifier 100 includes cascoded circuit 110, which includes common emitter device (first transistor) QI 1111 and second transistor Q12112, and first emitter degeneration circuit 120.

[0026] The emitter of the second transistor Q12112 is coupled to the collector of the first transistor QI 1 111 in series. The emitter of the first transistor QI 1 Ill is coupled to the first emitter degeneration circuit 120 that includes first resistor 121 and first switch Mil 122 coupled in parallel. The first switch Ml 1 122 is controlled by a control signal Vent from control signal source 101. The control signal Vent is applied to the gate of the first switch Ml 1 122 to turn on or off the first switch Ml 1 122

[0027] When the control signal Vent is high, the switch Ml 1 122 is turned on and presents a small on-resistance (Ron). Since the parallel combination of the on-resistance Ron and the resistance Rl 1 of the first resistor 121 is quite small, the first transistor Qll 111 is not degenerated and the amplifier provides full gain with no attenuation. When the control signal Vent is low, the first switch Ml 1 122 is turned off and the first transistor Qll 111 is degenerated by the first resistor 121, which lowers the gain of the amplifier.

[0028] The amount of the resistance Rll of the first resistor 121 will determine how much attenuation it will provide. The problem of this approach is that once the first transistor Qll 111 is degenerated for attenuation, its bias network and feedback network also have to be modified to keep the amplifier stable and functioning in attenuation mode. To do so, another switch M12132 should be added and other switches should be also added to the feedback network, which really complicates the design process.

[0029] As shown in FIG. 1, the amplifier 100 further includes third transistor Q13 113 and second emitter degeneration circuit 130 that includes second resistor 131 and second switch M12 132 coupled in parallel. The base of the third transistor Q13 113 is coupled to the base of the first transistor Qll 111 in series. The collector of the third transistor Q13 113 is coupled to the base of the third transistor Q13113. The collector ofthe third transistor Q 13113 is coupled to third resistor 114. The first transistor Qll 111, the third transistor Q13 113, and the third resistor 114 may form a current mirror circuit. The emitter of the third transistor Q13 113 is coupled to the second emitter degeneration circuit 130. The second switch M12132 is controlled by a control signal Vent from control signal source 101. The control signal Vent is applied to the gate of the second switch M12 132 to turn on or off the second switch M12132.

[0030] 4

[0031] US 304988427vl 390708-008462 / 24 / 20269:44 AMThe amplifier 100 includes an input terminal 102 receives an input signal. The input terminal 102 is coupled to the bases of the first transistor QI 1 111 and the third transistor QI 3113 through input matching network 142. The input matching network 142 is a circuit configured to provide maximum power transfer between the input terminal 102 and the base of the first transistor QI 1111. The input matching network 142 may include inductors and capacitors to optimize signal transmission. The amplifier 100 includes an output terminal 103 that outputs an output signal. The output terminal 103 is coupled to the collector of the second transistor Q12 112 through output matching network 143. The output matching network 143 is a circuit configured to provide maximum power transfer between the output terminal 103 and the collector of the second transistor Q12112. The output matching network 143 may include inductors and capacitors to optimize the signal transmission.

[0032] The amplifier 100 includes feedback network 141 that is configured to extract a portion of the output signal to be output through the output terminal 103 and to feed the portion of the output signal to the base of the first transistor QI 1 111. The feedback network is configured to provide controlled adjustments to the amplifier’s gain. In the conventional amplifier 100, the feedback network 141 is controlled by the control signal from the control signal source 101. The amplifier 100 includes bias networks 144 and 145 through which the supply voltage from the supply voltage source 146 is respectively supplied to the base and collector of the second transistor Q12112.

[0033] As shown in FIG. 1 and described above, the conventional amplifier 100 requires multiple design tweaks on bias and feedback networks to make the amplifier stable and functioning in attenuation mode. On top of that, the resulting amplifier performance in attenuation state is not very good due to this complication. Also, in attenuation mode, the amplifier consumes the same amount of current as in normal mode.

[0034] With reference to FIG. 2, shown is a circuit diagram of wideband amplifier 200 of the disclosed invention, in which a single bias control circuit 220 is implemented to control attenuation. The wideband amplifier 200 of the disclosed invention is a cascoded common emitter amplifier with one step digitally controlled attenuation. The wideband amplifier 200 modifies the bias current of the common emitter device to get attenuation or to lower the gain of the amplifier.

[0035] The wideband amplifier 200 includes cascoded circuit 210 that includes common emitter device (first transi stor) Q21211 and secondtransistor Q22212. The emitter of the second transistor Q22212 is coupled to the collector of the first transistor Q21211 in series. The wideband amplifier

[0036] 5

[0037] US 304988427vl 390708-008462 / 24 / 20269:44 AM200 includes first resistor 214, third transistor Q23 213, and bias control circuit 220 coupled between the first resistor 214 and the third transistor Q23213. The bias control circuit 220 includes a second resistor 221 and switch M21 222. The bias control circuit 220 essentially changes or controls the bias current. The second resistor 221 is coupled to the first resistor 214 and the collector of the third transistor Q23 213 in series. The switch M21 222 coupled to the second resistor 221 in parallel. The base of the third transistor Q23213 is coupled to the base of the first transistor Q21211 in series. The collector of the third transistor Q23213 is coupled to the base of the third transistor Q23213. The collector of the third transistor Q23213 is coupled to the second resistor 221 and the switch M21 222. The first transistor Q21 211, the third transistor Q23 213, and the first resistor 214 may form a current mirror circuit. The switch M21222 is controlled by a control signal Vent from control signal source 201. The control signal Vent is applied to the gate of the switch M21 222 to turn on or off the switch M21 222.

[0038] The bias current of the first transistor Q21 211 is generated by current mirror circuit including the diode connected third transistor Q23 213 and the first transistor Q21 211. The reference current flowing through the third transistor Q23213 is determined by the total resistance applied to the collector of the third transistor Q23213. The larger the total resistance, the smaller the reference current is and the lower the amplifier gain is.

[0039] The first transistor Q21211, second transistors Q22212, and the third transistors Q23213 may be NPN bipolar junction transistors (BJTs). The switch M21 222 may be a metal-oxide-semiconductor field-effect transistor (MOSFET). However, the types of the transistors are not limited to those shown in FIG. 2. Different types of transistors may be employed for the wideband amplifier of the disclosed invention as long as the different types provide the same functionalities described in this specification.

[0040] When the control signal Vent is high, the switch M21222 is turned on and presents a small on-resistance (Ron). Since parallel combination of the on-resistance Ron and the resistance R22 of the second resistor 221 is quite small, the reference current flowing through the transistor Q23213 is determined mostly by the resistance R21 of the first resistor 214, and provides full bias current. When the control signal Vent is low, the switch M21 222 is turned off and the reference current flowing through the third transistor Q23213 is determined by series combination of the resistances R21 and R22 of the first and second resistors 214 and 221, in which case the reference current is smaller and the amplifier gain is reduced. In summary, when the control signal Vent is high, full

[0041] 6

[0042] US 304988427vl 390708-008462 / 24 / 20269:44 AMbias current is generated and the amplifier provides full gain with no attenuation. When the control signal Vent is low, smaller bias current is generated and the amplifier provides attenuation with reduced gain. The amount of the resistance R22 of the second resistor 221 will determine how much attenuation it will provide.

[0043] The wideband amplifier 200 includes feedback network 241 that is configured to extract a portion of the output signal to be output through the output terminal 203 and to feed the portion of the output signal to the base of the first transistor Q21 211. The feedback network is configured to provide controlled adjustments to the amplifier’s gain. The wideband amplifier 200 includes bias networks 244 and 245 through which the supply voltage from the supply voltage source 246 is respectively supplied to the base and collector of the second transistor Q22212.

[0044] In the wideband amplifier 200 of the disclosed invention, a single (only one) bias control circuit, which includes one resistor and one MOSFET switch, is required to implement attenuation function, which really simplifies the design process compared to the amplifier 100 shown in FIG.

[0045] 1. The wideband amplifier 200 does not require any design tweaks or tuning on the amplifier. Consequently, the resulting performance of the wideband amplifier 200 in attenuation state is very predictable and excellent due to this simplicity. Moreover, the wideband amplifier 200 consumes much less current while providing attenuation, which saves power consumption.

[0046] With reference to FIG. 3, shown is a Cadence schematic diagram built to test the performance of the wideband amplifier 200 of the disclosed invention. The wideband amplifier 200 was implemented in 0.18pm SiGe BiCMOS process and was simulated in Cadence environment. The Cadence schematic diagram shows bias control circuit inside the broken line box, the input matching network in the rectangular block on the lower left side, and output matching networks, feedback network, and bias network in another rectangular block on the upper right side.

[0047] With reference to FIGS. 4A-4D, shown are simulation results for gain, return loss, noise figure, and stability of the wideband amplifier 200, respectively, in the SiGe BiCMOS process. The solid lines represent no attenuation modes (Iccq=33.5mA), and the dashed lines represent 8dB attenuation modes (Iccq=9.6mA).

[0048] In the attenuation mode (dash lines), the wideband amplifier 200 provides 8dB attenuation in the frequency range from 18 to 50GHz. The wideband amplifier 200 implemented in SiGe BiCMOS process exhibits 17dB of gain with 8dB attenuation in the frequency range from 18 to

[0049] 7

[0050] US 304988427vl 390708-008462 / 24 / 20269:44 AM50GHz. As shown in FIG. 4A, the gain curve (no attenuation mode) preserves the same shape in attenuation mode. The return loss, noise figure, and stability performance in 8dB attenuation mode, shown in FIGS. 4B-4D, are very similar to normal mode (no attenuation mode), which is a great advantage of the wideband amplifier 200 of the disclosed invention. In normal or full gain mode, the wideband amplifier 200 consumes 33.5mA, but it consumes only 9.6mA in attenuation mode. In other words, in the attenuation mode, the wideband amplifier 200 consumes much less current, which saves power consumption.

[0051] Since many modifications, variations, and changes in detail can be made to the described preferred embodiments of the invention, it is intended that all matters in the foregoing description and shown in the accompanying drawings be interpreted as illustrative and not in a limiting sense. Consequently, the scope of the invention should be determined by the appended claims and their legal equivalents.

[0052] 8

[0053] US 304988427vl 390708-008462 / 24 / 20269:44 AM

Claims

WHAT IS CLAIMED IS:

1. A wideband amplifier, comprising:a cascoded circuit comprising a first transistor and a second transistor, wherein an emitter of the second transistor is coupled to a collector of the first transistor in series;a third transistor, wherein a base of the third transistor is coupled to a base of the first transistor in series;a first resistor coupled to a supply voltage source;a bias control circuit coupled between the first resistor and the third transistor, wherein the bias control circuit is configured to control attenuation;an input terminal for receiving an input signal, wherein the input terminal is coupled to the bases of the first transistor and the third transistor; andan output terminal for outputting an output signal, wherein the output terminal is coupled to a collector of the second transistor.

2. The wideband amplifier of claim 1 wherein each of the first, second, and third transistors is an NPN bipolar junction transistor (BJT).

3. The wideband amplifier of claim 1 wherein the bias control circuit comprises:a second resistor coupled to the first resistor and a collector of the third transistor in series; anda switch coupled to the second resistor in parallel.

4. The wideband amplifier of claim 3 where the switch is a metal-oxide-semiconductor field-effect transistor (MOSFET).

5. The wideband amplifier of claim 1 wherein a collector of the third transistor is connected to the base of the third transistor.

6. The wideband amplifier of claim 1 further comprising a feedback network configured to extract a portion of the output signal and to feed the portion of the output signal to the base of the first transistor, wherein the feedback network is configured to provide controlled adjustments to a gain of the common emitter device.

7. The wideband amplifier of claim 1 further comprising an input matching network coupled between the input terminal and the bases of the first transistor and the third transistor, wherein the input matching network is configured to maximize power transfer between the input terminal and the base of the first transistor.9US 304988427vl 390708-008462 / 24 / 20269:44 AM8. The wideband amplifier of claim 1 further comprising an output matching network between the output terminal and the collector of the second transistor, wherein the output matching network is configured to maximize power transfer between the output terminal and the collector of the second transistor.

9. The wideband amplifier of claim 1 wherein a base of the second transistor and the collector of the second transistor are connected to the supply voltage source to receive a source voltage.

10. The wideband amplifier of claim 9 further comprising a first bias network configured to deliver the source voltage to the base of the second transistor.

11. The wideband amplifier of claim 9 further comprising a second bias network configured to deliver the source voltage to the collector of the second transistor.

12. The wideband amplifier of claim 1 a gate of the switch is connected to a control signal source, wherein the switch is turned on or off based on the control signal from the control signal source.

13. The wideband amplifier of claim 12 wherein the switch is configured to provide on-resistance when the switch is turned on.10US 304988427vl 390708-008462 / 24 / 20269:44 AM

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