Ultrasonic separation of microscale electronic components into fluid

Abstract

The present disclosure relates generally to methods for releasing microscale electronic components from fabrication substrates, and more particularly to ultrasonic separation of microchiplets into fluid media to form microelectronic inks for substrate-agnostic circuit assembly. A method for releasing microscale electronic components from a fabrication substrate into a fluid includes fabricating a plurality of microchiplets on a fabrication substrate, each microchiplet including at least one electronic component. The method includes forming at least one opening through each microchiplet to expose an underlying portion of the fabrication substrate, then performing an isotropic etch through the opening to undercut each microchiplet, creating an undercut region and leaving each microchiplet suspended on an interfacial support layer. The method includes applying ultrasonic energy to the fabrication substrate while immersed in a fluid medium, thereby releasing the microchiplets into the fluid medium.

Description

ULTRASONIC SEPARATION OF MICROSCALE ELECTRONIC COMPONENTS INTO FLUIDCROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of U.S. Provisional Application Serial No.63 / 779,658, filed on 28 March 2025, which is incorporated herein by reference in its entirety as if fully set forth below.FIELD OF INVENTION

[0002] The present disclosure relates to methods for releasing microscale electronic components from fabrication substrates, and more particularly to ultrasonic separation of microchiplets into fluid media to form suspensions of microscale electronic components for substrate-agnostic circuit assembly.BACKGROUND

[0003] The field of microscale electronics fabrication has advanced considerably, with various approaches developed for creating and integrating high-performance semiconductor devices onto diverse substrates. A key step in such integration processes is the release of microscale electronic components from their fabrication substrates, which enables subsequent handling and re-assembly. Current methods for releasing microscale electronic components from their fabrication substrates include chemical release techniques, mechanical separation processes, and interface-engineered detachment approaches. Chemical release techniques typically involve dissolving or chemically etching sacrificial layers or using etchants to free components from their fabrication substrates. Mechanical release methods rely on physical material removal processes — such as wafer thinning, back-grinding, and dicing — to isolate discrete microscale components. Interface-engineered approaches, including stamp-based techniques, employ materials with controlled adhesion properties to facilitate detachment of components from a surface.

[0004] However, existing release approaches suffer from several limitations. Chemical release techniques that employ harsh etchants such as hydrofluoric acid present safety concerns1326716252v4and compatibility issues with certain device materials. Furthermore, many existing release methods are limited to relatively thick components, typically greater than one micrometer, and cannot accommodate thinner devices that offer improved electrical performance characteristics. At reduced component thicknesses, chemical release can be hindered due to strong van der Waals interactions that cause components to adhere to surfaces rather than dispersing freely into suspension. Mechanical release methods introduce challenges associated with induced stress, edge damage, particulate contamination, and kerf loss during dicing or grinding, which can degrade device yield and reliability, particularly for ultrathin or fragile microscale components. Interface-engineered techniques, including stamp-based detachment methods, often rely on adhesion-controlled detachment mechanisms that can limit release uniformity and introduce fracturing damage, particularly as component dimensions decrease. These methods may also require precise control of interfacial properties and process conditions, which can create throughput limitations and reproducibility challenges, especially for heterogeneous components.

[0005] What is needed, therefore, is an improved method for releasing microscale electronic components from fabrication substrates that enables rapid, parallel separation of thin microchiplets directly into fluid media without requiring harsh chemicals or excessive handling. Such a method would allow microchiplets to be dispersed into stable suspensions suitable for flexible circuit assembly while preserving the electrical performance of the released microchiplets.SUMMARY

[0006] This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

[0007] According to an aspect of the present disclosure, a method for releasing microscale electronic components from a substrate into a fluid can be provided. The method can include fabricating a plurality of microchiplets on a substrate, each microchiplet including at least one electronic component. The method can include forming at least one hole through each microchiplet to expose an underlying portion of the substrate. The method can include performing an isotropic etch through the at least one hole to undercut each microchiplet, thereby creating an undercut region beneath each microchiplet and leaving each microchiplet suspended on an interfacial support layer. The method can include applying ultrasonic energy to the substrate while the 2326716252v4substrate is immersed in a fluid medium, thereby releasing the plurality of microchiplets from the substrate into the fluid medium to form a suspension of microchiplets.

[0008] According to another aspect of the present disclosure, a suspension of microchiplets can be provided. The suspension can include a fluid medium. The suspension can include a plurality of microchiplets dispersed within the fluid medium, each microchiplet including at least one electronic component and having a central hole extending therethrough, wherein the plurality of microchiplets are released from a fabrication substrate by ultrasonic separation following isotropic undercut etching, and wherein the microchiplets retain electrical functionality after release into the fluid medium.

[0009] According to another aspect of the present disclosure, a method for fabricating an electronic ink can be provided. The method can include providing a substrate having a plurality of microchiplets fabricated thereon, each microchiplet having at least one hole extending through the microchiplet to the substrate. The method can include etching the substrate through the at least one hole to form an undercut region beneath each microchiplet such that each microchiplet is suspended above a void in the substrate. The method can include immersing the substrate in a fluid medium. The method can include sonicating the substrate in the fluid medium to release the plurality of microchiplets into the fluid medium, thereby forming an electronic ink including the microchiplets suspended in the fluid medium.

[0010] The foregoing general description of the illustrative embodiments and the following detailed description thereof are merely exemplary aspects of the teachings of this disclosure and are not restrictive.BRIEF DESCRIPTION OF FIGURES

[0011] Non-limiting and non-exhaustive examples are described with reference to the following figures.

[0012] Figs. 1A and 1C illustrate top views of a fabrication substrate with an array of microchiplets, according to examples of the disclosed technology. Fig. IB illustrates a cross-sectional view of the array shown in FIG. 1 A across the dashed line, according to examples of the disclosed technology.

[0013] Figs. 2A and 2C illustrate top views of microchiplets on a fabrication substrate after an undercut etching process, according to examples of the disclosed technology. Fig. 2B illustrates 3326716252v4a cross-sectional view of the array shown in FIG. 2A across the dashed line, according to examples of the disclosed technology.

[0014] Figs. 3A and 3C illustrate top views of a fabrication substrate after an ultrasonic release process, according to examples of the disclosed technology. Fig. 3B illustrates a cross-sectional view of the substrate shown in FIG. 3A across the dashed line, according to examples of the disclosed technology.

[0015] FIG. 4A-4B illustrates a suspension of microchiplets dispersed within a fluid medium and deposited on target substrate, according to examples of the disclosed technology.

[0016] FIG. 5 illustrates interconnected microchiplets on a target substrate, according to examples of the disclosed technology.

[0017] FIG. 6 illustrates voltage transfer characteristics of a transistor microchiplet inverter, according to examples of the disclosed technology.DETAILED DESCRIPTION

[0018] The following description sets forth exemplary aspects of the present disclosure. It should be recognized, however, that such description is not intended as a limitation on the scope of the present disclosure. Rather, the description also encompasses combinations and modifications to those exemplary aspects described herein.

[0019] The present disclosure relates to methods and systems for releasing microscale electronic components from fabrication substrates into fluid media using ultrasonic energy. Microscale electronic components, which can be referred to herein as microchiplets, can be fabricated on substrates using conventional semiconductor processing techniques and subsequently released into fluid to form suspensions. Such suspensions can function as microelectronic inks suitable for deposition onto target substrates, enabling substrate-agnostic circuit assembly. As used herein, the term microchiplet is broadly used to refer to any electronic circuit or component thereof, including, but not limited to, a transistor, a signal amplifier, a controller, a capacitor, a solar cell, and the like, and may include such components configured for release from a fabrication substrate.

[0020] Conventional approaches for releasing microscale electronic components from fabrication substrates to target substrates include stamp transfer methods, which involve adhering components to an elastomeric stamp, and removing the components from the fabrication substrate 4326716252v4upon lifting the stamp. Other conventional approaches involve releasing components into harsh chemical solutions, which can require subsequent solvent transfer steps and can be limited to relatively thick components.

[0021] The disclosed technology provides an alternative approach in which microchiplets are released from fabrication substrates directly into benign fluid media through application of ultrasonic energy. Prior to ultrasonic release, an undercut etching process can be performed to create voids beneath the microchiplets, leaving the microchiplets suspended on an interfacial support layer. Application of ultrasonic energy can rapidly fracture the support layer and release the microchiplets into the surrounding fluid, forming a suspension. The released microchiplets can retain electrical functionality and can remain dispersible in the fluid medium for extended periods without substantial agglomeration. It should be understood that although various embodiments of the present disclosure are discussed below in the context of dispersion in a liquid medium, the disclosure is not so limited. Rather, any fluid can be utilized, including, but not limited to, liquids, gasses, and the like.

[0022] The disclosed approach can enable parallel release of large numbers of microchiplets simultaneously, providing advantages in throughput compared to serial transfer methods. The microchiplets can have various geometries and can include various types of electronic components. The fluid medium can be selected from various solvents and solvent mixtures to provide desired suspension characteristics. Following release, the microchiplet suspensions can be deposited onto diverse target substrates, and printed or lithographically defined interconnects can be formed to electrically connect the deposited microchiplets into functional circuits.

[0023] Referring to Figs. 1A-1C, a fabrication substrate 110 supports an array of microchiplets 105 arranged thereon. Fig. 1A illustrates a top view of the fabrication substrate 110 supporting a three-by -three array of microchiplets 105. Each microchiplet 105 has a circular configuration with a central opening and contact pads positioned around the periphery. The microchiplets 105 are spaced apart from one another on the fabrication substrate 110 in a regular pattern. A cross section of substrate 110 and microchiplet 105 is shown in Fig. IB. The cross section illustrates a fabrication substrate 110, an interfacial support layer 111, and a device layer 112. The device layer 112 comprises a plurality of microchiplets 105. Fig. 1C shows a micrograph of a larger array of microchiplets 105 on the fabrication substrate 110, demonstrating the scalability of the arrangement. The scale bar indicates 50 microns, providing a reference for the dimensions 5326716252v4of the microchiplets 105 and the spacing between adjacent microchiplets 105 on the fabrication substrate 110.

[0024] The microchiplets 105 can be fabricated on the fabrication substrate 110 using semiconductor processing techniques. Each microchiplet 105 can comprise at least one electronic component. The at least one electronic component can comprise one or more of a transistor, a signal amplifier, a controller, a capacitor, or a solar cell. In some cases, each microchiplet 105 can comprise an integrated circuit containing multiple transistors, capacitors, or combinations of different electronic components fabricated at a foundry. The microchiplets 105 can comprise prefabricated contact pads to enable reliable interconnect formation after deposition onto a target substrate.

[0025] With continued reference to Figs. 1A-1C, each microchiplet 105 can have a circular geometry. Each microchiplet 105 can have lateral dimensions ranging from 1 micrometer to 200 micrometers, with 15 micrometers being a standard diameter. Each microchiplet 105 can have a thickness ranging from 10 nanometers to 20 micrometers. In some cases, each microchiplet 105 can have a thickness of approximately 200 nanometers.

[0026] The fabrication substrate 110 can comprise a silicon-on-insulator wafer having a silicon handle layer, a buried oxide layer, and a device layer. The plurality of microchiplets 105 can be fabricated in the device layer 112 of the silicon-on-insulator wafer. Materials and structures necessary for a functional device, including active semiconductor regions, dielectric layers, and metallization or back-end-of-line (BEOL) features are included in and above the device layer 112. Alternatively, the fabrication substrate 110 can comprise a glass substrate with an interface layer as an interfacial support layer 111 — such as a silicon nitride layer, a buried oxide layer, or an epoxy layer — deposited thereon, where the microchiplets 105 are fabricated on top of the interface layer. The interface layer can provide separation between the device layer and handle layer that facilitates subsequent release of the microchiplets 105 from the fabrication substrate 110.

[0027] Referring to Figs. 2A-2C, the microchiplets 105 are shown on the fabrication substrate 110 after an undercut etching process has been performed. Fig. 2A provides a schematic top view showing an array of nine microchiplets 105 arranged in a three-by -three configuration on the fabrication substrate 110. Each microchiplet 105 has a circular geometry (though other geometries are also contemplated within the scope of the present disclosure) with an opening 107 extending through the microchiplet 105 to expose an underlying portion of the fabrication substrate 110. The 6326716252v4opening 107 can be positioned at a center of each microchiplet 105 (though, in some embodiments, the opening 107 can be at other locations or surrounding each microchiplet 105). Surrounding each microchiplet 105 is an undercut region 106, which appears as a circular boundary indicating where fabrication substrate material beneath the microchiplet 105 has been removed by an isotropic etching process. A cross section of substrate 110, microchiplet 105, undercut region 106, and opening 107 is shown in Fig. 2B.

[0028] With continued reference to Figs. 2A-2C, performing an isotropic etch through the opening 107 undercuts each microchiplet 105, thereby creating the undercut region 106 beneath each microchiplet 105 and leaving each microchiplet 105 suspended on an interfacial support layer 111. The isotropic etch creates a hemispherical undercut region 106 beneath each microchiplet 105. The undercut region 106 has a hemispherical shape extending radially outward from the opening 107. An etchant passes through the opening 107 and etches the fabrication substrate 110 in an outward radial direction beneath the microchiplet 105, forming the undercut region 106. This configuration leaves each microchiplet 105 suspended above the undercut region 106 in the fabrication substrate 110.

[0029] Performing the isotropic etch can comprise exposing a portion of the fabrication substrate 110 to xenon difluoride gas. When the fabrication substrate 110 comprises a silicon-on-insulator wafer having a silicon handle layer, a buried oxide layer, and a device layer, etching the fabrication substrate 110 can comprise performing an isotropic etch using xenon difluoride gas to remove silicon from the silicon handle layer beneath each microchiplet 105. The interfacial support layer 111 suspending each microchiplet 105 can comprise silicon dioxide from the buried oxide layer. For glass substrates, the opening 107 can extend through the interfacial support layer 111 to the glass substrate, and the glass fabrication substrate can be etched using gas phase HF or liquid HF to create the undercut region 106 beneath the microchiplet 105.

[0030] Fig. 2C presents a micrograph showing a larger array of microchiplets 105 on the fabrication substrate 110 after the undercut etching process. The scale bar indicates 50 microns, providing a reference for the dimensions of the microchiplets 105. The image shows the repeating pattern of microchiplets 105 with the openings 107 and surrounding undercut regions 106, demonstrating the uniformity and scalability of the fabrication process across the fabrication substrate 110.7326716252v4

[0031] Alternative microchiplet geometries can be employed. In some cases, the microchiplet 105 can have a rectangular geometry with two or more openings positioned on either side of the device to enable undercut etching. In some cases, the microchiplet 105 can have any other polygonal or irregular geometry, with one or more openings configured to produce a corresponding undercut region 106. In some cases, the microchiplet 105 can have multiple openings positioned within a single circular microchiplet 105 to enable more uniform undercut etching. In further configurations, the microchiplet 105 can include a surrounding etch opening that defines the perimeter of the microchiplet and enables formation of a supporting suspension pillar. The shape of the opening 107 can influence the shape of the resulting undercut region 106, though the isotropic nature of the etch can produce rounding of edges regardless of the initial opening geometry.

[0032] Referring to Figs. 3A-3B, the fabrication substrate 110 is shown after the ultrasonic release process has been performed. Figs. 3A-3B illustrate top views of the fabrication substrate 110, which contains a plurality of undercut regions 106 arranged in a regular grid pattern of, for example, three rows and three columns. Each undercut region 106 appears as a circular depression or cavity in the fabrication substrate 110, representing the hemispherical bowl-shaped voids that remain after the microchiplets have been released into solution. The undercut regions 106 are the result of the isotropic etching process that was performed to undercut the microchiplets prior to release. The uniform spacing and arrangement of the undercut regions 106 demonstrates the parallel nature of the release process, where multiple microchiplets can be simultaneously released from the fabrication substrate 110 through ultrasonication. A cross section of substrate 110 and undercut region 106 is shown in Fig. 3B.

[0033] With continued reference to Figs. 3A-3B, applying ultrasonic energy to the fabrication substrate 110 while the fabrication substrate 110 is immersed in a fluid medium releases the plurality of microchiplets from the fabrication substrate 110 into the fluid medium, which in the case of a liquid medium, forms a suspension of microchiplets. The ultrasonic energy can fracture the interfacial support layer 111 suspending the microchiplets, causing the microchiplets to detach from the fabrication substrate 110 and disperse into the surrounding fluid medium. Immersing the fabrication substrate 110 in a fluid medium and sonicating the fabrication substrate 110 in the fluid medium releases the plurality of microchiplets into the fluid medium, thereby, in the case of a8326716252v4liquid medium, forming a microelectronic ink comprising the microchiplets suspended in the fluid medium.

[0034] Applying ultrasonic energy can comprise immersing the fabrication substrate 110 in a bath sonicator operating at a frequency of approximately lKHz-20 MHz. In some cases, the ultrasonic energy is applied at a frequency of approximately 42 kHz. Other frequency ranges can also be used depending on the characteristics of the microchiplets and the fabrication substrate 110. Sonicating the fabrication substrate 110 can comprise applying ultrasonic energy at a frequency of approximately 10-100 kHz for a duration of less than 120 seconds. Applying ultrasonic energy can release the plurality of microchiplets from the fabrication substrate 110 in less than 120 seconds. In some cases, applying ultrasonic energy releases the plurality of microchiplets from the fabrication substrate 110 in less than 30 seconds, with release beginning in as little as 1 second and full removal occurring within 3 seconds.

[0035] Alternative sonication methods can be employed depending on the characteristics of the microchiplets. Applying ultrasonic energy can comprise using a probe sonicator instead of a bath sonicator for more powerful sonication of thicker devices. Probe sonication can provide increased directional ultrasonic energy delivery for microchiplets that are more firmly attached to the fabrication substrate 110 or that have greater thickness. Conversely, applying ultrasonic energy can comprise using a weaker sonication method for microchiplets that release easily to prevent damage. Reduced power sonication can be employed for microchiplets having reduced thickness or for microchiplets that detach readily from the interfacial support layer 111 to avoid potential damage to the electronic components during the release process.

[0036] Referring to FIG. 4, the microchiplets 105 are shown dispersed within a fluid medium 115 to form a suspension. FIG. 4A illustrates a schematic view of a container holding the suspension of microchiplets 105 distributed throughout the fluid medium 115. Each microchiplet 105 includes internal features represented by smaller circular patterns, indicating the electronic components fabricated on the microchiplets 105. The microchiplets 105 are suspended at various positions within the fluid medium 115, demonstrating the dispersion achieved following ultrasonic release from the fabrication substrate 110. FIG. 4B provides a micrograph showing the microchiplets 105 suspension in the fluid medium 115 deposited on a glass target substrate at a scale indicated by a scale bar of 100 microns. The microscopy image reveals the actual appearance of the microchiplets 105 after ultrasonic separation, with the microchiplets 105 appearing as 9326716252v4circular structures with visible internal features corresponding to the fabricated electronic components.

[0037] The suspension of microchiplets 105 dispersed within the fluid medium 115 can be referred to herein as a microelectronic ink. The microelectronic ink comprises the microchiplets 105 suspended in the fluid medium 115. Each microchiplet 105 comprises at least one electronic component and can have an opening extending therethrough, as described previously with respect to the opening 107. The plurality of microchiplets 105 is released from a fabrication substrate by ultrasonic separation following isotropic undercut etching, as described above with respect to the undercut region 106 and the ultrasonic release process.

[0038] With continued reference to FIG. 4A, the fluid medium 115 can comprise one or more of isopropanol, ethanol, deionized water, ethylene glycol, or glycerol. In some cases, the fluid medium 115 comprises a mixture of glycerol and water. In some cases, the fluid medium 115 comprises a mixture of glycerol and isopropanol. Other solvent combinations can also be employed depending on the desired suspension characteristics and the intended deposition method for the microelectronic ink. For example, in some embodiments, the fluid can be air, such that the microchiplets form a “powder” when collected following release.

[0039] The plurality of microchiplets 105 retain electrical functionality after release into the fluid medium 115. The plurality of microchiplets 105 remain dispersible in the fluid medium 115 without significant agglomeration for at least two months, enabling extended storage of the microelectronic ink prior to use. The suspension of microchiplets 105 can include additives to prevent agglomeration and support dispersion stability. The microchiplets 105 in the suspension can be re-suspended by additional mechanical agitation after settling, allowing the microelectronic ink to be reconstituted for use after extended storage periods.

[0040] Referring to FIG. 5, two microchiplets are shown interconnected on a target substrate. The micrograph depicts two circular microchiplet structures, each featuring a central opening and surrounding electronic components arranged in a horseshoe or C-shaped configuration. The two microchiplets are connected by a printed interconnect line that extends between the microchiplets, demonstrating the capability to electrically link released microchiplets after deposition onto a target substrate. Additional interconnect lines extend from each microchiplet toward the edges of the micrograph, indicating connections to other circuit elements or contact pads. The scale bar10326716252v4indicates that the image spans approximately 50 microns, providing a reference for the dimensions of the microchiplets and interconnects.

[0041] With continued reference to FIG. 5, the method can further comprise depositing one or more of the released microchiplets from the suspension onto a target substrate. Depositing the released microchiplets onto the target substrate can comprise drop casting the suspension containing the microchiplets onto the target substrate. Fluidic deposition allows the microchiplets to be transferred from the fluid medium to the target substrate without requiring precise alignment or deterministic placement. The microchiplets can settle onto the target substrate as the fluid medium evaporates or is otherwise removed.

[0042] The method can further comprise forming printed or lithographically defined interconnects to electrically connect the one or more deposited microchiplets. Forming printed interconnects can comprise using electrohydrodynamic jet printing to deposit conductive ink between contact pads on adjacent microchiplets. Electrohydrodynamic jet printing can enable direct, ambient deposition of conductive inks with feature sizes compatible with microchiplet integration. Alternatively, lithographically defined interconnects can be formed using conventional photolithography and metal deposition processes to create high-resolution wiring between microchiplets. The printed or lithographically defined interconnects can provide high-resolution wiring compatible with the prefabricated contact pads on the released microchiplets, preserving device-level performance while enabling customizable circuit layouts.

[0043] The target substrate can comprise glass, silicon, plastic, paper, or porous anodized aluminum oxide. The use of diverse target substrates demonstrates substrate independence of the disclosed approach. In some cases, the target substrate comprises a glass substrate, as shown in FIG. 5. In some cases, the target substrate comprises a plastic substrate that cannot withstand the high temperatures associated with conventional semiconductor fabrication processes. In some cases, the target substrate comprises paper. In some cases, the target substrate comprises porous anodized aluminum oxide. Comparable electrical performance can be maintained across different target substrate materials, demonstrating that the released microchiplets retain functionality regardless of the receiving substrate composition.

[0044] Referring to FIG. 6, a graph shows the voltage transfer characteristics of a silicon transistor microchiplet inverter. The horizontal axis represents the input voltage, labeled as Vi,11326716252v4ranging from negative one volt to positive one volt. The vertical axis represents the output voltage, labeled as Vo, ranging from zero volts to two volts. Data points are indicated along the curve by square markers.

[0045] With continued reference to FIG. 6, the plotted curve shows a characteristic inverter response. The output voltage remains at approximately two volts for input voltages below approximately negative zero point two volts. The output voltage transitions through a steep slope region between approximately negative zero point two volts and positive zero point two volts. The output voltage settles at approximately zero volts for input voltages above approximately positive zero point two volts. The steep transition region demonstrates the switching behavior of the inverter, with the output voltage decreasing as the input voltage increases through the threshold region.

[0046] The electrical performance data shown in FIG. 6 confirms that microchiplets retain electrical functionality after release from the fabrication substrate and assembly onto a target substrate. The inverter shows proper operation across the input voltage range, with the output voltage transitioning between high and low states in response to changes in the input voltage. The voltage transfer characteristics demonstrate that the ultrasonic release process and subsequent deposition and interconnection steps do not degrade the electrical performance of the microchiplets. Silicon transistor microchiplets assembled on glass can exhibit a subthreshold swing of 82 ± 7 mV dec" , a peak effective mobility of 520 ± 100 cm V s' , a threshold voltage of 0.08 ± 0.10 V, and an inverter gain of 8 ± 1. Comparable electrical performance can be maintained on porous anodized aluminum oxide substrates, demonstrating target substrate independence of the disclosed approach.

[0047] The disclosed technology can be further understood according to the following clauses:

[0048] Clause 1 : A method for releasing microscale electronic components from a fabrication substrate into a fluid, comprising: fabricating a plurality of microchiplets on a fabrication substrate, each microchiplet comprising at least one electronic component; forming at least one opening through each microchiplet to expose an underlying portion of the fabrication substrate; performing an isotropic etch through the at least one opening to undercut each microchiplet, thereby creating an undercut region beneath each microchiplet and leaving each microchiplet suspended on a interfacial support layer; and applying ultrasonic energy to the substrate while the substrate is12326716252v4immersed in a fluid medium, thereby releasing the plurality of microchiplets from the substrate into the fluid medium.

[0049] Clause 2: The method of clause 1, wherein the substrate comprises a silicon-on-insulator wafer having a silicon handle layer, a buried oxide layer, and a device layer, and wherein the plurality of microchiplets are fabricated in and / or above the device layer.

[0050] Clause 3: The method of clause 2, wherein the interfacial support layer comprises silicon dioxide from the buried oxide layer.

[0051] Clause 4: The method of clause 1, wherein performing the isotropic etch comprises exposing the substrate to xenon difluoride gas.

[0052] Clause 5: The method of clause 1 , wherein the at least one hole is positioned at a center of each microchiplet.

[0053] Clause 6: The method of clause 5, wherein the isotropic etch creates a hemispherical undercut region beneath each microchiplet.

[0054] Clause 7 : The method of clause 1 , wherein each microchiplet has lateral dimensions ranging from 1 micrometer to 200 micrometers.

[0055] Clause 8: The method of clause 1, wherein each microchiplet has a thickness ranging from 10 nanometers to 20 micrometers.

[0056] Clause 9: The method of clause 1, further comprising forming an electronic ink comprising the microchiplets suspended in the fluid medium, wherein the fluid medium comprises a liquid.

[0057] Clause 10: The method of clause 1, wherein the at least one electronic component comprises one or more of a transistor, a signal amplifier, a controller, a capacitor, or a solar cell.

[0058] Clause 11 : The method of clause 1 , wherein the fluid medium comprises one or more of a gas or a liquid, wherein the liquid is selected from the group consisting of: isopropanol, ethanol, deionized water, ethylene glycol, and glycerol.

[0059] Clause 12: The method of clause 1, wherein applying ultrasonic energy comprises immersing the substrate in a bath sonicator operating at a frequency of approximately lKHz-20 MHz.

[0060] Clause 13 : The method of clause 1 , wherein applying ultrasonic energy releases the plurality of microchiplets from the substrate in less than 3 seconds.13326716252v4

[0061] Clause 14: The method of clause 1, wherein the plurality of microchiplets retain electrical functionality after release into the fluid medium.

[0062] Clause 15: The method of clause 14, wherein the fluid is a liquid, the method further comprising depositing one or more of the released microchiplets onto a target substrate and forming interconnects to electrically connect the one or more deposited microchiplets.

[0063] Clause 16: A composition of microchiplets, comprising: a fluid medium; and a plurality of microchiplets dispersed within the fluid medium, each microchiplet comprising at least one electronic component and having an opening extending therethrough, wherein the plurality of microchiplets are released from a fabrication substrate by ultrasonic separation following isotropic undercut etching, and wherein the microchiplets retain electrical functionality after release into the fluid medium.

[0064] Clause 17: The suspension of clause 16, wherein the fluid medium comprises one or more of a gas or a liquid, wherein the liquid is selected from the group consisting of: isopropanol, ethanol, deionized water, ethylene glycol, and glycerol.

[0065] Clause 18: The suspension of clause 16, wherein each microchiplet has lateral dimensions ranging from 1 micrometer to 200 micrometers.

[0066] Clause 19: The suspension of clause 18, wherein each microchiplet has a thickness ranging from 10 nanometers to 20 micrometers.

[0067] Clause 20: The suspension of clause 16, wherein the at least one electronic component comprises one or more of a transistor, a signal amplifier, a controller, a capacitor, or a solar cell.

[0068] Clause 21 : The suspension of clause 16, wherein the plurality of microchiplets remain dispersed in the fluid medium without significant agglomeration for at least two months, wherein the fluid is a liquid.

[0069] Clause 22: The suspension of clause 16, wherein each microchiplet has a circular geometry.

[0070] Clause 23: A method for fabricating an electronic ink, comprising: providing a fabrication substrate having a plurality of microchiplets fabricated thereon, each microchiplet having at least one hole extending through the microchiplet to the substrate; etching the fabrication substrate through the at least one hole to form an undercut region beneath each microchiplet such that each microchiplet is suspended above a void in the fabrication substrate; immersing the fabrication substrate in a fluid medium; and sonicating the fabrication substrate in the fluid 14326716252v4medium to release the plurality of microchiplets into the fluid medium, thereby forming an electronic ink comprising the microchiplets.

[0071] Clause 24: The method of clause 23, wherein the fabrication substrate comprises a silicon-on-insulator wafer having a silicon handle layer, a buried oxide layer, and a device layer, and wherein the plurality of microchiplets are fabricated in and / or on the device layer.

[0072] Clause 25: The method of clause 24, wherein etching the fabrication substrate comprises performing an isotropic etch using xenon difluoride gas to remove silicon from the silicon handle layer beneath each microchiplet.

[0073] Clause 26: The method of clause 23, wherein each microchiplet comprises at least one electronic component selected from a transistor, a signal amplifier, a controller, a capacitor, or a solar cell.

[0074] Clause 27: The method of clause 23, wherein each microchiplet has a circular geometry with the at least one opening within the microchiplet.

[0075] Clause 28: The method of clause 27, wherein the undercut region has a hemispherical shape extending radially outward from the at least one opening.

[0076] Clause 29: The method of clause 23, wherein sonicating the substrate comprises applying ultrasonic energy at a frequency of approximately lkHz-20MHz for a duration of less than 3 seconds.

[0077] Clause 30: The method of clause 23, wherein the fluid is a liquid, and wherein the microchiplets in the microelectronic ink retain electrical functionality and remain dispersible without significant agglomeration for at least two months.

[0078] A number of implementations have been described. Nevertheless, it will be understood that various modifications may be made without departing from the spirit and scope of the disclosure. Accordingly, other implementations are within the scope of the following claims.15326716252v4

Claims

CLAIMS1. A method for releasing microscale electronic components from a fabrication substrate into a fluid, comprising:fabricating a plurality of microchiplets on a fabrication substrate, each microchiplet comprising at least one electronic component;forming at least one opening through each microchiplet to expose an underlying portion of the fabrication substrate;performing an isotropic etch through the at least one opening to undercut each microchiplet, thereby creating an undercut region beneath each microchiplet and leaving each microchiplet suspended on an interfacial support layer; andapplying ultrasonic energy to the fabrication substrate while the fabrication substrate is immersed in a fluid medium, thereby releasing the plurality of microchiplets from the fabrication substrate into the fluid medium.

2. The method of claim 1, wherein the fabrication substrate comprises a silicon-on-insulator wafer having a silicon handle layer, a buried oxide layer, and a device layer, and wherein the plurality of microchiplets is fabricated in and / or above the device layer.

3. The method of claim 2, wherein the interfacial support layer comprises silicon dioxide from the buried oxide layer.

4. The method of claim 1, wherein performing the isotropic etch comprises exposing the fabrication substrate to xenon difluoride gas.

5. The method of claim 1, wherein the at least one opening is within each microchiplet.

6. The method of claim 5, wherein the isotropic etch creates a hemispherical undercut region beneath each microchiplet.

7. The method of claim 1, wherein each microchiplet has lateral dimensions ranging from 1 micrometer to 200 micrometers.16326716252v48. The method of claim 1, wherein each microchiplet has a thickness ranging from 10 nanometers to 20 micrometers.

9. The method of claim 1, further comprising forming a microelectronic ink comprising the microchiplets suspended in the fluid medium, wherein the fluid medium comprises a liquid.

10. The method of claim 1, wherein the at least one electronic component comprises one or more of a transistor, a signal amplifier, a controller, a capacitor, or a solar cell.

11. The method of claim 1 , wherein the fluid medium comprises one or more of a gas or a liquid, wherein the liquid is selected from the group consisting of: isopropanol, ethanol, deionized water, ethylene glycol, and glycerol.

12. The method of claim 1, wherein applying ultrasonic energy comprises immersing the fabrication substrate in a bath sonicator operating at a frequency of approximately 1kHz-20MHz.

13. The method of claim 1 , wherein applying ultrasonic energy releases the plurality of microchiplets from the fabrication substrate in less than 3 seconds.

14. The method of claim 1, wherein the plurality of microchiplets retain electrical functionality after release into the fluid medium.

15. The method of claim 14, wherein the fluid is a liquid, the method further comprising depositing one or more of the released microchiplets onto a target substrate and forming interconnects to electrically connect the one or more deposited microchiplets.

16. A composition of microchiplets, comprising:a fluid medium; anda plurality of microchiplets dispersed within the fluid medium, each microchiplet comprising at least one electronic component and having an opening extending therethrough, wherein the plurality of microchiplets is released from a fabrication substrate by ultrasonic separation following isotropic undercut etching, and wherein the microchiplets retain electrical functionality after release into the fluid medium.17326716252v417. The suspension of claim 16, wherein the fluid medium comprises one or more of a gas or a liquid, wherein the liquid is selected from the group consisting of: isopropanol, ethanol, deionized water, ethylene glycol, and glycerol.

18. The suspension of claim 16, wherein each microchiplet has lateral dimensions ranging from 1 micrometer to 200 micrometers.

19. The suspension of claim 18, wherein each microchiplet has a thickness ranging from 10 nanometers to 20 micrometers.

20. The suspension of claim 16, wherein the at least one electronic component comprises one or more of a transistor, a signal amplifier, a controller, a capacitor, or a solar cell.

21. The suspension of claim 16, wherein the plurality of microchiplets remain dispersible in the fluid medium without significant agglomeration for at least two months, wherein the fluid is a liquid.

22. The suspension of claim 16, wherein each microchiplet has a circular geometry.

23. A method for fabricating a microelectronic ink, comprising:providing a fabrication substrate having a plurality of microchiplets fabricated thereon, each microchiplet having at least one opening extending through the microchiplet to the fabrication substrate;etching the fabrication substrate through the at least one opening to form an undercut region beneath each microchiplet such that each microchiplet is suspended above a void in the fabrication substrate;immersing the fabrication substrate in a fluid medium; andsonicating the fabrication substrate in the fluid medium to release the plurality of microchiplets into the fluid medium, thereby forming a microelectronic ink comprising the microchiplets.

24. The method of claim 23, wherein the fabrication substrate comprises a silicon-on-insulator wafer having a silicon handle layer, a buried oxide layer, and a device layer, and wherein the plurality of microchiplets is fabricated in and / or on the device layer.18326716252v425. The method of claim 24, wherein etching the fabrication substrate comprises performing an isotropic etch using xenon difluoride gas to remove silicon from the silicon handle layer beneath each microchiplet.

26. The method of claim 23, wherein each microchiplet comprises at least one electronic component selected from a transistor, a signal amplifier, a controller, a capacitor, or a solar cell.

27. The method of claim 23, wherein each microchiplet has a circular geometry with the at least one opening within the microchiplet.

28. The method of claim 27, wherein the undercut region has a hemispherical shape extending radially outward from the at least one opening.

29. The method of claim 23, wherein sonicating the fabrication substrate comprises applying ultrasonic energy at a frequency of approximately 1 kHz-20 MHz for a duration of less than 3 seconds.

30. The method of claim 23, wherein the fluid is a liquid, and wherein the microchiplets in the microelectronic ink retain electrical functionality and remain dispersible without significant agglomeration for at least two months.19326716252v4

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