Control method for matrix converter, and controller and on-board charger

Abstract

Provided in the present application are a control method for a matrix converter, and a controller and an on-board charger. The method comprises: determining the operating mode of a matrix converter and an alternating-current side voltage corresponding to the mode; on the basis of the operating mode of the matrix converter, a switching period and the alternating-current side voltage, determining a plurality of time nodes within the switching period that correspond to target waveforms, wherein the target waveforms include a target primary-side current waveform, a target primary-side voltage waveform and a target secondary-side voltage waveform; on the basis of the operating mode and the plurality of time nodes, generating a plurality of primary-side switch-on intervals and a plurality of secondary-side switch-on intervals within the switching period; and on the basis of the alternating-current side voltage, within the switching period, controlling each primary-side switch unit to be in a turned on state during a primary-side switch-on interval corresponding to the primary-side switch unit, and controlling each secondary-side switch unit to be in a turned on state during a secondary-side switch-on interval corresponding to the secondary-side switch unit, such that a primary-side current waveform, a primary-side voltage waveform and a secondary-side voltage waveform of the matrix converter match the target waveforms. The present application aims to simplify the control architecture of matrix converters, thereby reducing the control costs.

Description

Matrix converter control method, controller, on-board charger Technical Field

[0001] This application relates to the field of matrix converter control technology, and in particular to a control method, controller, and on-board charger for a matrix converter. Background Technology

[0002] In existing matrix converter control schemes, due to the complexity of existing modulation modes (primary-side three-phase AC to high-frequency DC modulation and primary-secondary phase-shift modulation) and the complexity of the matrix converter's commutation strategy, the control of the primary and secondary bridge arm switching circuits of the matrix converter is generally achieved by combining controllers, such as DSPs or MCUs, with devices possessing logic gate functions, such as CPLDs or FPGAs. However, such a control architecture is complex and occupies a large space, negatively impacting the miniaturization of the equipment. Summary of the Invention

[0003] To achieve the above objectives, this application proposes a control method, controller, and on-board charger for a matrix converter, aiming to simplify the control architecture of the matrix converter and reduce control costs.

[0004] This application proposes a control method for a matrix converter, the matrix converter including a primary-side bridge arm switching circuit, an isolation circuit, and a secondary-side bridge arm switching circuit; one end of the primary-side bridge arm switching circuit is electrically connected to the AC side, and the other end is electrically connected to the primary side of the isolation circuit; one end of the secondary-side bridge arm switching circuit is electrically connected to the secondary side of the isolation circuit, and the other end is electrically connected to the DC side; the primary-side bridge arm switching circuit includes multiple primary-side bridge arm circuits, each composed of two primary-side switching units; the secondary-side bridge arm switching circuit includes multiple secondary-side bridge arm circuits, each composed of two secondary-side switching units; the matrix converter control method includes:

[0005] Determine the operating mode of the matrix converter and the corresponding AC side voltage for that mode;

[0006] Based on the operating mode, switching period, and AC side voltage of the matrix converter, multiple time points corresponding to the target waveform within the switching period are determined; wherein, the target waveform includes the target primary side current waveform, the target primary side voltage waveform, and the target secondary side voltage waveform;

[0007] Based on the working mode and multiple time nodes, multiple primary-side switch conduction periods and multiple secondary-side switch conduction periods are generated within the switching cycle.

[0008] Based on the AC side voltage, during the switching cycle, each primary-side switching unit is controlled to be in the on state during its corresponding primary-side switch conduction period; and each secondary-side switching unit is controlled to be in the on state during its corresponding secondary-side switch conduction period, so that the primary-side current waveform, primary-side voltage waveform and secondary-side voltage waveform of the matrix converter are matched with the target waveform.

[0009] In one embodiment, the operating modes include: rectification mode, V2G inverter mode, and V2L inverter mode;

[0010] When the operating mode is rectification mode and V2G inverter mode, the AC side voltage includes the AC voltage of the AC power supply connected to the AC side.

[0011] When the operating mode is V2L inverter mode, the AC side voltage includes the AC voltage output from the primary side bridge arm switching circuit to the AC side.

[0012] In one embodiment, determining multiple time points corresponding to the target waveform within the switching period based on the target waveform, the switching period, and the AC side voltage includes:

[0013] The amount of charge transferred during the switching cycle is determined based on the AC side voltage calculated via a phase-locked loop.

[0014] Based on the amount of charge transferred during the switching cycle, determine the primary and secondary side phase shift values ​​and the duration of the maximum positive voltage corresponding to the target waveform;

[0015] Based on the operating mode, the switching cycle, the phase shift value of the primary and secondary sides, and the duration of the maximum positive voltage, multiple time nodes corresponding to the target waveform within the switching cycle are determined.

[0016] In one embodiment, determining multiple time points corresponding to the target waveform within the switching cycle based on the operating mode, the switching cycle, the primary and secondary side phase shift values, and the duration of the maximum positive voltage includes:

[0017] When the operating mode is rectification mode, the multiple time nodes include zero point T0, first time node T1, second time node T2, third time node T3, fourth time node T4, fifth time node T5 and sixth time node T6;

[0018] Wherein, the time period T0-T6 is the duration of the switching cycle, the time period T0-T1 is the duration corresponding to the primary and secondary phase shift values, the time period T0-T2 is the duration of the maximum positive voltage, the time period T0-T3 is half the duration of the switching cycle, the time period T0-T4 is the sum of the duration corresponding to the primary and secondary phase shift values ​​and half the duration of the switching cycle, and the time period T0-T5 is the sum of the duration of the maximum positive voltage and half the duration of the switching cycle.

[0019] In one embodiment, determining multiple time points corresponding to the target waveform within the switching cycle based on the operating mode, the switching cycle, the primary and secondary side phase shift values, and the duration of the maximum positive voltage includes:

[0020] When the working mode is inverter mode, the multiple time nodes include zero point T0, first time node T1, second time node T2, third time node T3, fourth time node T4, fifth time node T5 and sixth time node T6.

[0021] Wherein, the time period T0-T6 is the duration of the switching cycle, the time period T0-T1 is the difference between half the duration of the switching cycle and the duration of the maximum positive voltage, the time period T0-T2 is the difference between half the duration of the switching cycle and the duration corresponding to the primary and secondary phase shift values, the time period T0-T3 is the duration of half the switching cycle, the time period T0-T4 is the difference between the duration of the switching cycle and the duration of the maximum positive voltage, and the time period T0-T5 is the difference between the duration of the switching cycle and the duration corresponding to the primary and secondary phase shift values.

[0022] In one embodiment, based on the AC side voltage, controlling each primary-side switching unit to be in the on state during its corresponding primary-side switch on-time period within the switching cycle; and controlling each secondary-side switching unit to be in the on state during its corresponding secondary-side switch on-time period includes:

[0023] Based on the AC side voltage, determine the sector position of the AC side voltage in the preset AC voltage sector;

[0024] Based on the sector position and the multiple primary-side switch conduction periods, a corresponding primary-side switch drive signal is generated for each primary-side switch unit; and a corresponding primary-side switch drive signal is output to each primary-side switch unit to control each primary-side switch unit to be in the conduction state during its corresponding primary-side switch conduction period.

[0025] Based on the sector position and the multiple secondary switch conduction periods, a corresponding secondary switch drive signal is generated for each secondary switch unit; and a corresponding secondary switch drive signal is output to each secondary switch unit to control each secondary switch unit to be in the conduction state during its corresponding secondary switch conduction period.

[0026] In one embodiment, the primary-side switching unit includes a bidirectional switching unit composed of an upper switching transistor and a lower switching transistor; the step of generating a corresponding primary-side switching drive signal for each primary-side switching unit based on the sector position and the multiple primary-side switching conduction periods includes:

[0027] For each of the aforementioned upper switching transistors, based on the corresponding conduction period, a rising edge trigger point is set when the emitting register clock is zero, and the trigger time of the rising edge trigger point is configured through either the dead-time register or the comparator, and the trigger time of the falling edge trigger point is set through either the dead-time register or the comparator, so that the emitting register outputs the corresponding primary-side switching drive signal.

[0028] For each of the lower switching transistors, based on the corresponding conduction period, a falling edge trigger point is set when the emitting register clock is zero, and the trigger time of the falling edge trigger point is configured through either the dead-time register or the comparator, and the trigger time of the rising edge trigger point is set through either the dead-time register or the comparator, so that the emitting register outputs the corresponding primary-side switching drive signal.

[0029] In one embodiment, the preset AC voltage sector includes a three-phase AC line voltage sector.

[0030] In one embodiment, the step of controlling each primary-side switching unit to be in the on state during its corresponding primary-side switching on period based on the AC side voltage further includes:

[0031] When the sector position of the AC side voltage in the preset AC voltage sector changes from the current position to the next position, and the primary-side switching unit switches from the on state to the non-conducting state, the primary-side switching unit is controlled to delay for a first dead time before switching from the on state to the non-conducting state.

[0032] In one embodiment, the step of controlling each primary-side switching unit to be in the on state during its corresponding primary-side switching on period based on the AC side voltage further includes:

[0033] When the sector position of the AC side voltage in the preset AC voltage sector changes from the current position to the next position, and the primary-side switching unit switches from the non-conducting state to the conducting state, the primary-side switching unit is controlled to switch from the non-conducting state to the conducting state.

[0034] In one embodiment, the step of controlling each primary-side switching unit to be in the on state during its corresponding primary-side switch on-time period based on the AC side voltage during the switching cycle; and controlling each secondary-side switching unit to be in the on state during its corresponding secondary-side switch on-time period further includes:

[0035] When the conduction periods of two primary-side switching units in the same bridge arm circuit are adjacent within the switching cycle, a second dead time is set between the two corresponding conduction periods.

[0036] When the conduction periods of two secondary switch units in the upper and lower arms of the same bridge arm circuit are adjacent within the switching cycle, a third dead time is set between the two corresponding conduction periods.

[0037] In one embodiment, the plurality of time nodes includes a commutation time node, wherein the amplitude of the primary voltage in the target primary voltage waveform switches from the maximum voltage to the intermediate voltage or from the intermediate voltage to the maximum voltage; the primary-side switching unit includes a bidirectional switching unit composed of an upper switching transistor and a lower switching transistor;

[0038] Based on the AC side voltage, controlling each primary-side switching unit to be in the conducting state during its corresponding primary-side switching conduction period within the switching cycle; and controlling each secondary-side switching unit to be in the conducting state during its corresponding secondary-side switching conduction period further includes:

[0039] In the upper bridge arm circuit of the primary side bridge arm switching circuit, if at least one of the upper switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper switch and the lower switch will be controlled to change state, and after a first delay, the other switch will be controlled to change state.

[0040] In the lower bridge arm circuit of the primary side bridge arm switching circuit, if at least one of the upper switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper and lower switches will be controlled to change state, and after a first delay, the other switch will be controlled to change state.

[0041] In one embodiment, the plurality of time nodes includes a commutation time node, wherein the primary voltage in the target primary voltage waveform changes from a positive voltage to a negative voltage or from a negative voltage to a positive voltage; the primary-side switching unit includes a bidirectional switching unit composed of two switching transistors;

[0042] Based on the AC side voltage, controlling each primary-side switching unit to be in the conducting state during its corresponding primary-side switching conduction period within the switching cycle; and controlling each secondary-side switching unit to be in the conducting state during its corresponding secondary-side switching conduction period further includes:

[0043] In the upper bridge arm circuit of the primary side bridge arm switching circuit, if at least one of the upper switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper switch and the lower switch will be controlled to change state, and after a first delay, the other switch will be controlled to change state.

[0044] In the lower bridge arm circuit of the primary side bridge arm switching circuit, if at least one of the upper switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper and lower switches will be controlled to change state, and after a second delay, the other switch will be controlled to change state.

[0045] In one embodiment, the matrix converter control method further includes: setting a corresponding switching cycle based on the operating power of the matrix converter.

[0046] This application also proposes a controller comprising: a memory, a processor, and a control program for a matrix converter stored in the memory and executable on the processor, the control program for the matrix converter being configured to implement the control method for the matrix converter as described in any of the preceding claims.

[0047] In one embodiment, the controller includes an MCU or a DSP.

[0048] This application also proposes an on-board charger, including a control method for a matrix converter as described in any of the preceding claims; and / or a controller as described in any of the preceding claims.

[0049] The control method for the matrix converter of this application includes: determining the operating mode of the matrix converter and the corresponding AC side voltage; determining multiple time nodes corresponding to the target waveform within the switching cycle based on the operating mode of the matrix converter, the switching cycle, and the AC side voltage; wherein the target waveform includes a target primary-side current waveform, a target primary-side voltage waveform, and a target secondary-side voltage waveform; generating multiple primary-side switch conduction periods and multiple secondary-side switch conduction periods within the switching cycle based on the operating mode and the multiple time nodes; controlling each primary-side switch unit to be in the conducting state within its corresponding primary-side switch conduction period within the switching cycle based on the AC side voltage; and controlling each secondary-side switch unit to be in the conducting state within its corresponding secondary-side switch conduction period, so that the primary-side current waveform, primary-side voltage waveform, and secondary-side voltage waveform of the matrix converter are matched with the target waveform. Thus, based on the control method of this application, the controller of this application can directly calculate multiple time nodes, and obtain multiple primary-side conduction periods and multiple secondary-side conduction periods according to the multiple time nodes. Then, based on the multiple primary-side conduction periods and multiple secondary-side conduction periods, it directly outputs corresponding signals to control multiple primary-side switching units and multiple secondary-side switching units. Compared with the prior art, which uses the controller to output the required duty cycle and then uses logic gate circuits to output corresponding signals to drive multiple primary-side switching units and multiple secondary-side switching units to work, thereby matching the primary-side current waveform, primary-side voltage waveform, and secondary-side voltage waveform of the matrix converter with the target waveform, this method eliminates the need for logic gate circuits, effectively simplifying the control architecture of the matrix converter and reducing control costs. Meanwhile, it should be noted that since the method of this application is directly executed by the controller, that is, the corresponding drive signals are directly output to the primary side bridge arm switching circuit and the secondary side bridge arm switching circuit, the clock within the controller is always consistent throughout the execution of all methods in this application. Compared with the DSP + logic gate circuit architecture in the prior art, since the DSP is only responsible for issuing multiple duty cycle signals, and multiple duty cycle signals need to be processed by logic gate voltage before reaching the controlled terminal of the corresponding switching unit, the consistency within the controller of this application can always ensure the synchronization and consistency of the controller's control of the primary side bridge arm switching circuit and the secondary side bridge arm switching circuit, thereby reducing delay and effectively improving the stability and reliability of the matrix converter. Attached Figure Description

[0050] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0051] Figure 1 is a flowchart illustrating an embodiment of the control method for the matrix converter of this application;

[0052] Figure 2 is a flowchart illustrating another embodiment of the control method for the matrix converter of this application;

[0053] Figure 3 is a flowchart illustrating another embodiment of the control method for the matrix converter of this application;

[0054] Figure 4 is a flowchart illustrating another embodiment of the control method for the matrix converter of this application;

[0055] Figure 5 is a flowchart illustrating another embodiment of the control method for the matrix converter of this application;

[0056] Figure 6 is a flowchart illustrating another embodiment of the control method for the matrix converter of this application;

[0057] Figure 7 is a flowchart illustrating another embodiment of the control method for the matrix converter of this application;

[0058] Figure 8 shows the control architecture of a matrix converter in the prior art;

[0059] Figure 9 shows the control architecture of the matrix converter in this application;

[0060] Figure 10 shows the target primary voltage waveform, target primary current waveform, and target secondary voltage waveform on the matrix converter under both inverter and rectification conditions.

[0061] Figure 11 shows the voltage sector of a three-phase AC power line;

[0062] Figure 12 is a schematic diagram of the drive signal waveform output to each switching transistor in the first sector of an embodiment of the control method of the matrix converter of this application.

[0063] Figure 13 is a schematic table showing the working status of all upper and lower switching transistors in the primary side bridge arm switching circuit under different sector positions during the switching cycle in a rectification mode according to an embodiment of the control method of the matrix converter of this application.

[0064] Figure 14 is a schematic table showing the working status of all upper and lower switching transistors in the primary side bridge arm switching circuit under different sector positions during the switching cycle in an embodiment of the control method of the matrix converter of this application in the inverter mode.

[0065] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0066] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0067] It should be noted that if the embodiments of this application involve directional indicators (such as up, down, left, right, front, back, etc.), the directional indicators are only used to explain the relative positional relationship and movement of the components in a certain specific posture (as shown in the figure). If the specific posture changes, the directional indicators will also change accordingly.

[0068] Furthermore, if the embodiments of this application involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed in this application.

[0069] In existing matrix converter control schemes, due to the complexity of existing modulation modes (primary-side three-phase AC to high-frequency DC modulation and primary-secondary phase-shift modulation) and the complexity of the matrix converter's commutation strategy, the control of the primary and secondary bridge arm switching circuits of the matrix converter is generally achieved by combining controllers, such as DSPs or MCUs, with devices possessing logic gate functions, such as CPLDs or FPGAs. However, such a control architecture is complex and occupies a large space, negatively impacting the miniaturization of the equipment.

[0070] It is important to understand that in existing technologies, to improve the efficiency and stability of matrix converters, the primary and secondary bridge arm switching circuits are controlled to ensure that the primary voltage (u1 in Figures 8 and 9), secondary voltage (u2 in Figures 8 and 9), and primary current (i1 in Figures 8 and 9) within one switching cycle of the matrix converter approximate the target waveform shown in Figure 10, in both inverter and rectifier modes. In Figure 10, Upri refers to the primary voltage, Usec to the secondary voltage, Up-max to the maximum positive voltage, Up-med to the intermediate positive voltage, Us-m to the maximum primary voltage, dutys to the duration corresponding to the phase shift value between the primary and secondary waveforms, dutyh to the duration of the maximum positive voltage, and Ts to the switching cycle. In existing technologies, to control the operation of the primary and secondary bridge arm switching circuits of a matrix converter and ultimately make the primary-side voltage, primary-side current, and secondary-side voltage approach the target waveform, a combination of a DSP controller and a CPLD logic gate circuit is often used, as shown in Figure 8, to control multiple primary-side or secondary-side switches within the matrix converter. Specifically, the DSP controller sends multiple signals with different duty cycles, which are then processed by the logic gate circuits to generate corresponding drive signals to each switch on the primary and secondary sides, causing each switch to operate and thus making the primary-side voltage, primary-side current, and secondary-side voltage of the matrix converter approach the target waveform. However, the control architecture of the above-mentioned existing technology requires a combination of a controller and logic gate circuits, resulting in a complex control architecture design that occupies a large space and negatively impacts the miniaturization of the device.

[0071] Therefore, this application proposes a control method for a matrix converter, the matrix converter including a primary-side bridge arm switching circuit, an isolation circuit, and a secondary-side bridge arm switching circuit; one end of the primary-side bridge arm switching circuit is electrically connected to the AC side, and the other end is electrically connected to the primary side of the isolation circuit; one end of the secondary-side bridge arm switching circuit is electrically connected to the secondary side of the isolation circuit, and the other end is electrically connected to the DC side; the primary-side bridge arm switching circuit includes multiple primary-side bridge arm circuits, each composed of two primary-side switching units; the secondary-side bridge arm switching circuit includes multiple secondary-side bridge arm circuits, each composed of two secondary-side switching units;

[0072] The aforementioned control methods can be stored and executed using the controller's memory, such as an MCU or DSP (Digital Signal Processor). The matrix converter can be integrated with the controller in the same device, such as an on-board charger, matrix converter module, charging pile, or power supply unit. Alternatively, it can be independently configured and electrically connected to a device with a matrix converter to control it. The primary-side bridge arm switching circuit includes multiple primary-side bridge arm circuits, such as the three shown in Figure 1. The primary-side switching unit can be implemented using a bidirectional switching unit, enabling the primary-side bridge arm switching circuit, under the control of the controller, to either convert the AC voltage input from the AC side and output it to the primary side of the isolation circuit, or to convert the AC voltage from the primary side and output it, thus achieving bidirectional frequency conversion. The secondary-side bridge arm switching circuit can be implemented using a full-bridge switching circuit or a half-bridge switching circuit, where the secondary-side switching unit can be implemented using MOSFETs, IGBTs, etc. In one example, referring to Figure 9, the secondary bridge arm switching circuit is implemented using a full-bridge switching circuit. Under the control of the controller, the secondary bridge arm switching circuit can achieve bidirectional rectification or inversion, or unidirectional rectification and unidirectional inversion.

[0073] Referring to Figure 1, in one embodiment of this application, the matrix converter control method includes:

[0074] Step S100: Determine the operating mode of the matrix converter and the corresponding AC side voltage;

[0075] The operating mode of the converter can be determined by the received mode setting signal. For example, the controller can receive a mode setting signal from a device connected to the AC side or the device connected to the DC side or an external terminal, or receive a mode setting signal from a trigger component on a user-triggered device, or receive a mode setting signal from another control terminal within the device.

[0076] In one embodiment, the matrix converter operates in a rectification mode. In rectification mode, the matrix converter converts the AC voltage from the AC power supply connected to the AC side into a corresponding DC voltage after processing by the primary-side bridge arm switching circuit, isolation circuit, and secondary-side bridge arm switching circuit, and then outputs it to the DC side. The AC power supply includes AC power equipment, the power grid, etc. In this mode, the AC-side voltage includes the AC voltage from the AC power supply connected to the AC side, such as the AC voltage from the connected power grid.

[0077] In another embodiment, the matrix converter also includes a V2G inverter mode. In this mode, the matrix converter converts the DC voltage input to the DC side into a corresponding AC voltage output to the AC power supply on the AC side after processing by the secondary-side bridge arm switching circuit, isolation circuit, and primary-side bridge arm switching circuit. For example, if the current AC power supply is a 220V 50Hz grid, the matrix converter in V2G inverter mode can convert the DC voltage input to the DC side and output a 220V / 50Hz AC voltage to the grid. In this mode, the AC side voltage includes the AC voltage of the AC power supply connected to the AC side, such as the AC voltage from the grid.

[0078] In another embodiment, the matrix converter's operating mode also includes a V2L inverter mode. In this mode, the AC side of the matrix converter is connected to an AC power device. The matrix converter converts the DC voltage connected to the DC side into a corresponding AC voltage after processing by the secondary-side bridge arm switching circuit, isolation circuit, and primary-side bridge arm switching circuit, and outputs it to the AC power device to provide power. In this mode, the AC side voltage includes the AC voltage output from the primary-side bridge arm switching circuit to the AC side. This AC voltage is a preset AC voltage information. The controller executes the following control process based on the current clock and the preset AC voltage information. For example, when the controller determines the sector position of the three-phase AC line voltage in the following embodiment, the AC voltage information includes a preset three-phase AC line voltage sector diagram. The controller starts timing from the clock zero (corresponding to time 0 in the three-phase AC line voltage sector diagram) and determines the corresponding sector position in the three-phase AC line voltage sector diagram based on the current timing.

[0079] Step S200: Based on the operating mode of the matrix converter, the switching period, and the AC side voltage, determine multiple time nodes corresponding to the target waveform within the switching period; wherein, the target waveform includes the target primary current waveform, the target primary voltage waveform, and the target secondary voltage waveform;

[0080] In this embodiment, as described above, the target waveform represents the waveforms of the primary-side current, primary-side voltage, and secondary-side voltage under high efficiency conditions. For example, Figure 10 shows the target primary-side current waveform, target primary-side voltage waveform, and target secondary-side voltage waveform of the matrix converter in inverter mode or rectifier mode. As shown in Figure 10, the target waveform is based on multiple time points. Therefore, the controller needs to first calculate the different time points in the switching cycle. In one embodiment, referring to Figure 2, determining the multiple time points corresponding to the target waveform within the switching cycle based on the target waveform, the switching cycle, and the AC side voltage includes:

[0081] Step S210: Based on the AC side voltage, calculate the amount of charge transferred during the switching cycle using a phase-locked loop;

[0082] Step S220: Based on the amount of charge transferred during the switching cycle, determine the primary and secondary side phase shift values ​​and the duration of the maximum positive voltage corresponding to the target waveform;

[0083] Step S230: Based on the operating mode, the switching cycle, the phase shift value of the primary and secondary sides, and the duration of the maximum positive voltage, determine multiple time nodes corresponding to the target waveform within the switching cycle.

[0084] In this embodiment, taking the target waveform shown in Figure 10 as an example, the controller calculates the amount of charge transferred within the switching cycle based on the current AC side voltage, such as line voltage or phase voltage, using a phase-locked loop. Then, based on the integration of this transferred charge and the three-phase balance principle, the primary and secondary side phase shift values ​​and the maximum positive voltage duration corresponding to the target waveform are determined. Finally, based on the operating mode, the switching cycle, the primary and secondary side phase shift values, and the maximum positive voltage duration, multiple time points corresponding to the target waveform within the switching cycle are determined. For detailed procedures, please refer to relevant existing technologies; they will not be elaborated here.

[0085] Referring to Figure 10, when the operating mode is rectification mode, the multiple time nodes include zero point T0, first time node T1, second time node T2, third time node T3, fourth time node T4, fifth time node T5, and sixth time node T6; wherein, the time period T0-T6 is the duration of the switching cycle, the time period T0-T1 is the duration corresponding to the primary and secondary phase shift values, the time period T0-T2 is the duration of the maximum positive voltage, the time period T0-T3 is half the duration of the switching cycle, the time period T0-T4 is the sum of the duration corresponding to the primary and secondary phase shift values ​​and the half duration of the switching cycle, and the time period T0-T5 is the sum of the duration of the maximum positive voltage and the half duration of the switching cycle.

[0086] When the operating mode is inverter mode, the multiple time nodes include zero point T0, first time node T1, second time node T2, third time node T3, fourth time node T4, fifth time node T5, and sixth time node T6; wherein, the time period T0-T6 is the duration of the switching cycle, the time period T0-T1 is the difference between half the duration of the switching cycle and the duration of the maximum positive voltage, the time period T0-T2 is the difference between half the duration of the switching cycle and the duration corresponding to the primary and secondary phase shift values, the time period T0-T3 is the duration of half the switching cycle, the time period T0-T4 is the difference between the duration of the switching cycle and the duration of the maximum positive voltage, and the time period T0-T5 is the difference between the duration of the switching cycle and the duration corresponding to the primary and secondary phase shift values.

[0087] Furthermore, in one embodiment, the matrix converter control method further includes setting a corresponding switching cycle based on the operating power of the matrix converter. In this embodiment, the controller can also set the corresponding switching cycle duration based on the operating power setting signal provided by an externally connected device, or based on the operating power demand generated by the current operating conditions of the matrix converter, thereby meeting different operating requirements of the matrix converter.

[0088] Step S300: Based on the working mode and multiple time nodes, generate multiple primary-side switch conduction periods and multiple secondary-side switch conduction periods within the switching cycle;

[0089] Step S400: Based on the AC side voltage, during the switching cycle, control each primary-side switching unit to be in the on state during its corresponding primary-side switch conduction period; and control each secondary-side switching unit to be in the on state during its corresponding secondary-side switch conduction period, so that the primary-side current waveform, primary-side voltage waveform and secondary-side voltage waveform of the matrix converter match the target waveform.

[0090] In this embodiment, the controller generates multiple primary-side switch conduction periods and secondary-side switch conduction periods within the switching cycle by combining the multiple time nodes obtained in the above embodiment with the analytical logic preset by the R&D personnel or the preset results obtained through simulation or experiment based on existing technology (DSP + logic gate).

[0091] In one example, the circuit topology shown in Figure 9 and the target waveform corresponding to Figure 10 are used as examples for illustration. In the circuit topology shown in Figure 9, there are three primary-side bridge arm circuits. The primary-side switching unit includes a bidirectional switching unit composed of an upper switching transistor and a lower switching transistor. The secondary-side bridge arm switching circuit includes a full-bridge switching circuit.

[0092] When the controller confirms that the matrix converter is operating in rectification mode, for all the upper switches in the primary side bridge arm switching circuit, the primary side switching conduction periods include: t2-t6 conduction period, two t3-t6 conduction periods, t3-t5 conduction period, two t0-t6 conduction periods, and six primary side switching conduction periods corresponding to six upper switches; for all the lower switches in the primary side bridge arm switching circuit, the primary side switching conduction periods include: two t0-t3 conduction periods, t0-t3 & t5-t6 conduction periods, t0-t2 conduction period, two t0-t6 conduction periods, and six primary side switching conduction periods corresponding to six lower switches; for the secondary side bridge arm switching circuit, the secondary side switching conduction periods include: two t1-t4 conduction periods, two t4-t1 conduction periods of the next switching cycle (due to the existence of primary and secondary side phase shift values), and four secondary side switching conduction periods corresponding to four switches in the secondary side bridge arm switching circuit.

[0093] When the controller confirms that the matrix converter's operating mode is inverter, for all the upper switches in the primary side bridge arm switching circuit, the primary side switching conduction periods include: t4-t6 conduction period, two t3-t6 conduction periods, t3-next switching cycle t1 conduction period, and two t0-t6 conduction periods, with six primary side switching conduction periods corresponding to six upper switches; for all the lower switches in the primary side bridge arm switching circuit, the primary side switching conduction periods include: two t0-t3 conduction periods, t1-t3 conduction periods, t0-t4 conduction periods, and two t0-t6 conduction periods, with six primary side switching conduction periods corresponding to six lower switches; for the secondary side bridge arm switching circuit, the secondary side switching conduction periods include: two t2-t5 conduction periods, and two t5-next switching cycle t2 conduction periods (due to the existence of primary and secondary side phase shift values), with four secondary side switching conduction periods corresponding to four switches in the secondary side bridge arm switching circuit.

[0094] In this embodiment, the controller determines the conduction periods of multiple primary-side switches corresponding to multiple primary-side switch units in the primary-side switch circuit and the conduction periods of multiple secondary-side switches in the secondary-side switch circuit based on the above process. Based on the current AC side voltage conditions, such as three-phase AC line voltage and phase voltage, and based on the pre-stored primary-side switch unit / secondary-side switch unit conduction rules or the pre-stored primary-side switch unit / secondary-side switch unit operating status diagram, multiple primary-side switch conduction periods are matched one-to-one with multiple primary-side switch units, and multiple secondary-side switch conductions are matched one-to-one with multiple secondary-side switch units. Each primary-side switch unit is controlled to be in the conducting state during its corresponding primary-side switch conduction period; and each secondary-side switch unit is controlled to be in the conducting state during its corresponding secondary-side switch conduction period. This ensures that during the operation of the matrix converter, the primary-side voltage waveform and the target primary-side voltage waveform can be matched (meaning that within the switching cycle, the actual primary-side voltage waveform and the target primary-side voltage waveform are close to or even identical, for example, the difference is less than or equal to a pre-set error percentage by the R&D personnel), the secondary-side voltage waveform and the target secondary-side voltage waveform can be matched, and the primary-side current waveform and the target current waveform can be matched. Thus, based on the control method of this application, the controller of this application can directly calculate multiple time nodes, and obtain multiple primary-side conduction periods and multiple secondary-side conduction periods according to the multiple time nodes. Then, based on the multiple primary-side conduction periods and multiple secondary-side conduction periods, it directly outputs corresponding signals to control multiple primary-side switching units and multiple secondary-side switching units. Compared with the prior art, which uses a controller to output the required duty cycle and then uses logic gate circuits to output corresponding signals to drive multiple primary-side switching units and multiple secondary-side switching units to work, thereby matching the primary-side current waveform, primary-side voltage waveform, and secondary-side voltage waveform of the matrix converter with the target waveform, this method eliminates the need for logic gate circuits, effectively simplifying the control architecture of the matrix converter and reducing control costs. Meanwhile, it should be noted that since the method of this application is directly executed by the controller, that is, the corresponding drive signals are directly output to the primary side bridge arm switching circuit and the secondary side bridge arm switching circuit, the clock within the controller is always consistent throughout the execution of all methods in this application. Compared with the DSP + logic gate circuit architecture in the prior art, since the DSP is only responsible for issuing multiple duty cycle signals, and multiple duty cycle signals need to be processed by logic gate voltage before reaching the controlled terminal of the corresponding switching unit, the consistency within the controller of this application can always ensure the synchronization and consistency of the controller's control of the primary side bridge arm switching circuit and the secondary side bridge arm switching circuit, thereby reducing delay and effectively improving the stability and reliability of the matrix converter.

[0095] In one embodiment of this application, referring to FIG3, step S400, based on the AC side voltage, controls each primary-side switching unit to be in the on state during its corresponding primary-side switching on period within the switching cycle; and controls each secondary-side switching unit to be in the on state during its corresponding secondary-side switching on period, including:

[0096] Step S410: Based on the AC side voltage, determine the sector position of the AC side voltage in the preset AC voltage sector;

[0097] In this embodiment, referring to FIG11, the preset AC voltage sector includes a three-phase AC line voltage sector or a three-phase AC voltage sector. The controller can determine the position of the three-phase voltage on the AC side within the preset AC voltage sector based on the voltage values ​​of the three-phase AC voltage detected in the above embodiment. For example, in rectification mode and V2G inverter mode, the controller will determine the magnitude relationship of the three-phase line voltage in the positive voltage range by detecting the three-phase AC voltage on the AC side, and then determine the sector position in the three-phase AC voltage sector according to the magnitude relationship. For example, referring to the three-phase AC voltage sector in FIG11, when the controller detects that the line voltage Vac is greater than Vab and Vab is greater than Vbc, it will determine the current sector position as the first sector according to the pre-stored three-phase AC voltage sector shown in FIG11.

[0098] Step S420: Based on the sector position and the multiple primary-side switch conduction periods, generate a corresponding primary-side switch drive signal for each primary-side switch unit; and output the corresponding primary-side switch drive signal to each primary-side switch unit to control each primary-side switch unit to be in the conduction state during its corresponding primary-side switch conduction period.

[0099] In this embodiment, since the AC side voltage state differs depending on the sector location, it is necessary to adaptively allocate the different primary-side switch conduction periods determined in the above embodiments to different primary-side switch units. In one embodiment, the controller can pre-store a schematic table of the operating states of each primary-side switch unit within each sector location during the switching cycle. This schematic table can be obtained by researchers during the development process through simulation and experimentation. That is, when all primary-side switch units in the primary-side bridge arm switch circuit operate according to this schematic table, the primary-side voltage waveform will match the target primary-side voltage waveform, and the primary-side current waveform will also match the target primary-side current waveform. The controller can determine the primary-side switch unit corresponding to each primary-side switch conduction period based on the sector location and the schematic table of the operating states of the primary-side switch units during the switching cycle, and then output the corresponding primary-side switch drive signal for control based on the device type of each primary-side switch unit.

[0100] In one example, referring to Figure 11, based on the six time nodes t1-t6 and the corresponding conduction periods of the six time nodes t1-t6, and referring to Figure 13, Figure 13 is a schematic table showing the operating state of each switch in different sectors during the switching cycle in the rectification mode of the matrix converter circuit topology shown in Figure 13. The primary-side switching unit in the matrix converter shown in Figure 9 includes a bidirectional switching unit composed of upper and lower switches. Sxpp includes the upper switches in the upper bridge arm circuits of all bridge arm circuits in Figure 9, namely Sapp, Sbpp, and Scpp; Sxpn includes the lower switches in the upper bridge arm circuits of all bridge arm circuits in Figure 9, namely Sapn, Sbpn, and Scpn; Sxnp includes the upper switches in the lower bridge arm circuits of all bridge arm circuits in Figure 9, namely Sanp, Sbnp, and Scnp; Sxnn includes the lower switches in the lower bridge arm circuits of all bridge arm circuits in Figure 9, namely Sann, Sbnn, and Scnn. State "1" indicates the conducting state, and state "0" indicates the non-conducting state. Taking the current matrix converter in rectification mode with the three-phase line voltage of the three-phase AC voltage connected to the AC side in the first sector shown in Figure 11 as an example, the controller will detect the three-phase AC line voltage. If the maximum positive voltage is Vac, the intermediate positive voltage is Vab, and the minimum positive voltage is Vac, then the sector position of the current three-phase AC line voltage on the AC side is determined to be the first sector. Based on the working state diagram shown in Figure 13, the current two "t3-t6 conducting periods" are determined to correspond to switching transistors Sanp and bpp respectively; the "t2-t6 conducting period" corresponds to switching transistor Sbnp; and the "t3-t5 conducting period" corresponds to... The following are the corresponding switching periods: "t0-t3 & t5-t6 conduction period" corresponds to switching transistor Sbpn; the two "t0-t3 conduction periods" correspond to switching transistors Sapn and Sbnn; the "t0-t2 conduction period" corresponds to switching transistor Scnn; and the four "t0-t6 conduction periods" correspond to switching transistors Sapp, Sann, Scpn, and Scnp, respectively. After determining the corresponding conduction periods, the controller, as shown in Figure 12, generates a corresponding primary-side switch drive signal for each switching transistor's conduction period and outputs it to the corresponding switching transistor, ensuring that each switching transistor is in the conducting state during its corresponding conduction period. For other sector locations, in rectification mode, the controller can output the corresponding primary-side switch drive signal to each switching transistor based on the same control logic to ensure that each switching transistor is in the conducting state during its corresponding conduction period, which will not be elaborated here.

[0101] Furthermore, in another example, still based on the six time nodes t1-t6 and the corresponding conduction periods of the six time nodes t1-t6, referring to Figure 14, Figure 14 is a schematic table showing the operating state of each switch in different sectors during the switching cycle in the inverter mode of the matrix converter circuit topology shown in Figure 9. During the process of the matrix converter being in inverter mode, the controller, based on the operating state schematic table shown in Figure 14 and the sector position of the current three-phase AC line voltage (the voltage on the AC side in V2G mode, and the three-phase AC voltage output by the primary side bridge arm switching circuit in V2L mode), and based on the same control process as in the rectification mode, outputs the corresponding primary side switch drive signal to each switch to make each switch in the conducting state during the corresponding conduction period, which will not be elaborated here.

[0102] It should be noted that, since this application involves the controller directly outputting the switching drive signal corresponding to the conduction period of each switching transistor, instead of outputting multiple duty cycle signals based on the corresponding duty cycle and then processing them through logic gates to output multiple switching drive signals as in the prior art, in one embodiment, the primary-side switching unit includes a bidirectional switching unit composed of an upper switching transistor and a lower switching transistor; the step of generating a corresponding primary-side switching drive signal for each primary-side switching unit based on the sector position and the multiple primary-side switching conduction periods includes:

[0103] For each of the aforementioned upper switching transistors, based on the corresponding conduction period, a rising edge trigger point is set when the emitting register clock is zero, and the trigger time of the rising edge trigger point is configured through either the dead-time register or the comparator, and the trigger time of the falling edge trigger point is set through either the dead-time register or the comparator, so that the emitting register outputs the corresponding primary-side switching drive signal.

[0104] For each of the lower switching transistors, based on the corresponding conduction period, a falling edge trigger point is set when the emitting register clock is zero, and the trigger time of the falling edge trigger point is configured through either the dead-time register or the comparator, and the trigger time of the rising edge trigger point is set through either the dead-time register or the comparator, so that the emitting register outputs the corresponding primary-side switching drive signal.

[0105] In this embodiment, for each upper-side switch, in either inverter or rectification mode, its primary-side switch drive signal always has a rising edge followed by a falling edge. For each lower-side switch, however, its primary-side switch drive signal always has a falling edge followed by a rising edge. Therefore, in generating the primary-side switch drive signal for each upper-side switch, the controller first sets the waveform counter to the rising edge trigger point when the clock is zero. Then, it configures the trigger time of the rising edge trigger line through either the dead-time register or a comparator, and sets the falling edge trigger point trigger time through either the dead-time register or a comparator. Similarly, in generating the primary-side switch drive signal for any lower-side switch, the controller first sets the waveform counter to the falling edge trigger point when the clock is zero. Then, it configures the trigger time of the falling edge trigger point through either the dead-time register or a comparator, and sets the rising edge trigger point trigger time through either the dead-time register or a comparator.

[0106] For example, referring to Figure 12, the waveforms corresponding to Sanp, Sapp, Sbpn, and Sann in Figure 12 are used as examples for explanation. The working process of other primary-side drive signals in the matrix converter in inverter and rectification modes is similar, and will not be elaborated further here. For Sanp, it is the upper switch, and its rising edge triggering time corresponds to time node t2, and its falling edge triggering time corresponds to time node t6. Therefore, the controller sets the rising edge triggering point when the emitting register clock is zero, and inserts a dead time representing the duration of the "0-t2 period" through the dead time register at this point. In this way, the emitting register will delay from the zero point to time node t3 before triggering the rising edge. Then, the controller will compare the clock in the current switching cycle with time node t6 based on the internal comparator. If time node t6 is reached, the controller will control the emitting register to trigger the falling edge to form the primary-side switch drive signal corresponding to Sanp.

[0107] For Sapp, since it is in the on state throughout the entire switching cycle, the controller sets the rising edge trigger point when the swarm register clock is zero, and inserts a dead time representing the duration of "0" through the dead time register at this point. Based on the internal comparator, the clock in the current switching cycle is compared with the time node t6. If the time node t6 is reached, the swarm register will be controlled to trigger the falling edge to form the primary-side switching drive signal for the corresponding Sapp.

[0108] For Sbpn, which is the lower switch, the trigger time of its rising edge corresponds to time node t3, and the trigger time of its falling edge corresponds to time node t5. Therefore, the controller sets the falling edge trigger point when the emitting register clock is zero, and inserts a dead time representing the duration of the "0-t3 period" through the dead time register at this point. In this way, the emitting register will be delayed from the zero point to the time node t3 before triggering the rising edge. Then, the controller will compare the clock of the current switching cycle with the time node t5 based on the internal comparator. If the time node t5 is reached, then the controller will control the emitting register to trigger the falling edge to form the primary-side switching drive signal corresponding to Sbpn.

[0109] For Sann, which is the lower switch, since it is in the on state throughout the entire switching cycle, the controller sets a falling edge trigger point when the ripple register clock is zero. At this point, a dead time representing the duration of the "0-t6 period" is inserted through the dead time register. Based on the internal comparator, the clock of the current switching cycle is compared with the time node t6. If the t6 time node is reached, the ripple register is controlled to trigger a rising or falling edge, thus forming the primary-side switch drive signal for the corresponding Sann. In this way, through the above settings, the controller can generate and output the corresponding primary-side switch drive signal for each primary-side switch unit based on the parameters of the current AC side voltage and the corresponding primary-side switch conduction period.

[0110] Step S430: Based on the sector position and the multiple secondary switch conduction periods, generate a corresponding secondary switch drive signal for each secondary switch unit; and output the corresponding secondary switch drive signal to each secondary switch unit to control each secondary switch unit to be in the conduction state during its corresponding secondary switch conduction period.

[0111] In this embodiment, the controller can also drive the secondary bridge arm switching circuit using the same control logic as that used in the primary bridge arm switching circuit described above. For example, the controller can pre-store a diagram showing the operating state of each secondary switch unit within each sector during the switching cycle. This diagram can be obtained by researchers during development through simulation and experimentation. That is, when all secondary switch units in the secondary bridge arm switching circuit operate according to this operating state diagram, the secondary voltage waveform will match the target secondary voltage waveform. The controller can determine the secondary switch unit corresponding to each secondary switch conduction period based on the sector position and the operating state diagram of the secondary switch units during the switching cycle, and then control each switch by outputting a corresponding secondary switch drive signal. For example, referring to Figure 12, in rectification mode, when the three-phase AC line voltage on the AC side is in the first sector, the controller will determine the two "t1-t4 conduction periods" corresponding to S1 and S4 in Figure 12 respectively, based on the secondary switch unit working status diagram preset by the R&D personnel. The two "t4-t1 conduction periods of the next switching cycle (due to the phase shift of the primary and secondary sides)" correspond to S2 and S3 in Figure 9 respectively. Then the controller will also use a dead-time register or comparator to set the rising edge and falling edge trigger time points to form the corresponding secondary switch drive signals and output them to the corresponding secondary switch tubes S1-S4.

[0112] Based on any embodiment, in one embodiment of this application, the step of controlling each primary-side switching unit to be in a conducting state during its corresponding primary-side switching conduction period based on the AC side voltage during the switching cycle; and controlling each secondary-side switching unit to be in a conducting state during its corresponding secondary-side switching conduction period further includes:

[0113] When the conduction periods of two primary-side switching units in the same bridge arm circuit are adjacent within the switching cycle, a second dead time is set between the two corresponding conduction periods.

[0114] When the conduction periods of two secondary switch units in the upper and lower arms of the same bridge arm circuit are adjacent within the switching cycle, a third dead time is set between the two corresponding conduction periods.

[0115] In this embodiment, during the operation of the primary-side bridge arm switching circuit, if the controller determines that the conduction periods of the upper and lower bridge arm circuits in any given bridge arm circuit are adjacent within the switching cycle—for example, the moment the primary-side switching unit of the upper bridge arm switches from the conducting state to the non-conducting state is also the moment the primary-side switching unit of the lower bridge arm in the same bridge arm circuit switches from the non-conducting state to the conducting state—then the control device will set a second dead time between the two corresponding conduction periods. This ensures that the primary-side switching unit with the earlier conduction period switches first within the switching cycle, and then the switching unit with the later conduction period switches after the second dead time. With this configuration, when the conduction periods of the two primary-side switching units of the upper and lower bridge arms in the same bridge arm circuit are adjacent within the switching cycle, the situation where the primary-side switching units of the two bridge arms in the same bridge arm circuit are simultaneously conducting due to control delay, switching delay, or other reasons, thus forming a direct loop in the bridge arm circuit, is avoided. This effectively ensures the stability and reliability of the matrix converter operation.

[0116] The second dead time can be set by R&D personnel according to requirements, or it can be adaptively set by the controller based on the current operating conditions of the matrix converter. For example, the controller can adaptively adjust the second dead time according to the current power demand of the matrix converter; for instance, the higher the power demand, the shorter the second dead time, to ensure that the output requirements are met. Thus, by using a controller to directly control the primary and secondary bridge arm switching circuits, not only can the logic gate circuits in existing technologies be simplified, but compared to the existing technology that uses logic gates to set a fixed dead time, the controller can also adaptively set different dead times according to actual needs during the direct control of the primary and secondary bridge arm switching circuits. This effectively improves the flexibility of dead time control, and thus improves the operational flexibility of the matrix converter.

[0117] During the process of the controller controlling the secondary bridge arm switching circuit, if it is determined that the conduction period of the upper bridge arm circuit and the conduction period of the lower bridge arm circuit in any current bridge arm circuit are set adjacently within the switching cycle, a third dead time will be set between the two corresponding conduction periods. The specific process can be referred to the above embodiment, and the setting of the third dead time can also be referred to the above embodiment of the second dead time setting. It will not be elaborated further here.

[0118] It is important to understand that, referring to Figure 9, as shown in the above embodiment, during the operation of the primary-side bridge arm switching circuit, the conduction time is allocated to each primary-side switching unit based on the sector position. Therefore, when the sector position changes, the state of some primary-side switching units will also change. However, due to the characteristics of the matrix converter, no capacitor is connected in parallel between the two ends of the primary side of the isolation circuit (referring to the figure, the voltage between the two ends of the primary side of the isolation circuit is the primary side voltage u1, and no capacitor is connected in parallel between the two ends of the primary side of the isolation circuit). Therefore, during the process of the primary-side switching unit state changing due to the sector switching state, in actual operating conditions, the circuit between the two ends of the primary side of the isolation circuit may be broken. At this time, the energy in the inductor will be released, which will lead to an abnormality in the primary-side bridge arm switching circuit.

[0119] Therefore, in order to ensure the stability and reliability of the matrix converter, in one embodiment of this application, referring to FIG4, the step of controlling each primary-side switching unit to be in the conducting state during its corresponding primary-side switching conduction period based on the AC side voltage further includes: step S440, when the sector position of the AC side voltage in the preset AC voltage sector changes from the current position to the next position, and the primary-side switching unit switches from the conducting state to the non-conducting state, controlling the primary-side switching unit to delay for a first dead time before switching from the conducting state to the non-conducting state.

[0120] The first dead time can be pre-set by the R&D personnel according to actual needs, or it can be set according to the current operating conditions of the matrix converter. With this setting, when the primary-side switching unit needs to switch from the conducting state to the non-conducting state, the switching will not occur immediately, but will be delayed by the first dead time. This allows other corresponding primary-side switching units sufficient time to complete their switching, such as switching from the non-conducting state to the conducting state, thus preventing a break in the circuit between the two ends of the primary side of the isolation circuit during sector position changes. Furthermore, since the first dead time can also be controlled by the controller according to the operating conditions of the matrix converter, compared to the existing technology that uses logic gates to set a fixed dead time, the flexibility of dead time control is effectively improved, thereby increasing the operational flexibility of the matrix converter.

[0121] In another embodiment, referring to FIG5, the step of controlling each primary-side switching unit to be in the on state during its corresponding primary-side switching on period based on the AC side voltage further includes:

[0122] Step S450: When the sector position of the AC side voltage in the preset AC voltage sector changes from the current position to the next position, and the primary-side switching unit switches from the non-conducting state to the conducting state, control the primary-side switching unit to switch from the non-conducting state to the conducting state.

[0123] In this embodiment, as described above, the first dead time is primarily set to prevent a break in the loop between the two ends of the primary side of the isolation circuit, especially when the primary-side switching unit switches from the conducting state to the non-conducting state during sector switching. However, if the primary-side switching unit switches from the non-conducting state to the conducting state at the moment of sector switching (i.e., when the sector position changes), then there is no need to set a dead time; the controller can directly control the corresponding primary-side switching unit to complete the transition at the moment of sector switching. Compared to the prior art scheme where logic gate devices delay the state transition of any primary-side switching unit for a fixed duration at any moment of sector switching, this application directly controls all primary-side switching units in the primary-side bridge arm switching circuit through the controller. Therefore, if the primary-side switching unit switches from the non-conducting state to the conducting state at the moment of sector switching, the controller will not delay its non-conducting state but will directly control it to switch to the conducting state, thereby effectively reducing the power loss of the matrix converter at the moment of sector switching and improving operating efficiency.

[0124] It should be understood that, as described above, in actual operation, the matrix converter may experience a break in the loop between the two ends of the primary side of the isolation circuit. For example, this could occur at the commutation time node within multiple time nodes of the switching cycle. Therefore, in one embodiment, referring to Figure 6, the multiple time nodes include a commutation time node, where the amplitude of the primary voltage in the target primary voltage waveform switches from the maximum voltage to an intermediate voltage or vice versa; the primary-side switching unit includes a bidirectional switching unit composed of an upper switching transistor and a lower switching transistor.

[0125] Based on the AC side voltage, controlling each primary-side switching unit to be in the conducting state during its corresponding primary-side switching conduction period within the switching cycle; and controlling each secondary-side switching unit to be in the conducting state during its corresponding secondary-side switching conduction period further includes:

[0126] Step S460: In the upper bridge arm circuit of all bridge arm circuits of the primary side bridge arm switching circuit, if at least one of the upper switching transistors will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switching transistors will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper switching transistors and the lower switching transistors is controlled to change state, and after a first delay, the other switching transistor is controlled to change state.

[0127] Step S470: In the lower bridge arm circuit of all bridge arm circuits of the primary side bridge arm switching circuit, if at least one of the upper switching transistors will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switching transistors will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper switching transistors and the lower switching transistors is controlled to change state, and after a first delay, the other switching transistor is controlled to change state.

[0128] In this embodiment, referring to Figure 10, the commutation time node is the time node when the amplitude of the primary voltage in the target primary voltage waveform switches from the maximum voltage to the intermediate voltage or from the intermediate voltage to the maximum voltage. As shown in Figure 10, in rectification mode, the commutation time nodes are t2 and t5. As shown in Figure 10, in inverter mode, the commutation time nodes are t1 and t4.

[0129] For the upper bridge arm circuit in all bridge arm circuits of the primary side bridge arm switching circuit, referring to Figures 9 and 10, when the switching unit includes a bidirectional switching unit, if the state combination of all upper switching transistors and the state combination of all lower switching transistors need to change at the commutation time node, the controller will first control the upper switching transistors that need to change state to change state, and after the first delay, control the lower switching transistors that need to change state to change state, or vice versa.

[0130] For example, referring to Figure 13, taking the commutation time nodes t2 and t5 in rectification mode as an example, when the sector position is in the second sector, at the commutation time node t2, at the three bridge arm circuits of the primary side bridge arm switching circuit, at least one of the three upper and three lower switches of each of the three bridge arm circuits needs to be adjusted. The three upper switches need to switch from "100 (Sapp on, Sbpp off, Scpp off)" to "110 (Sapp on, Sbpp on, Scpp off)", and the three lower switches need to switch from "111 (Sapn on, Sbpn on, Snpn on)". When switching to "011 (Sapn non-conducting, Sbpn conducting, Snpn conducting)," at time t2, the controller will first control the state transition of all the lower switching transistors that need to change state, that is, control the lower switching transistor Sapn to switch from the conducting state to the non-conducting state, while keeping the state of all the upper switching transistors unchanged. Then, after the first delay period (pre-set by the R&D personnel or set by the controller according to the current operating conditions of the matrix converter), that is, the intermediate state period shown in Figure 13, the controller will then control the state transition of all the upper switching transistors that need to change state, that is, control the upper switching transistor Sbpp to switch from the non-conducting state to the conducting state. Referring to Figure 14, which shows the working state of the primary side bridge arm switching circuit in inverter mode, at the commutation time nodes: time node t1 and time node t4, the same logic is implemented as in the rectification mode to delay, so that the upper switching transistors that need to change state at the commutation time node change state, and after the first delay, the lower switching transistors that need to change state change state, or vice versa.

[0131] Similarly, at the commutation time node, the lower bridge arm circuit of all bridge arm circuits in the primary side bridge arm switching circuit is also set according to the above control logic, which will not be elaborated further here. Through the above settings, at the commutation time node within the switching cycle, the loop between the two ends of the primary side of the isolation circuit will not be broken when the sector position changes, effectively ensuring the stability and reliability of the matrix converter.

[0132] At the same time, it is important to understand that during the switching cycle, not only will the state of the primary-side switching unit change during the commutation time node, potentially causing a break in the loop between the two ends of the primary side of the isolation circuit, but the same situation will also occur during the commutation time node.

[0133] Therefore, in another embodiment, referring to FIG7, the plurality of time nodes include a commutation time node, at which the primary voltage in the target primary voltage waveform changes from a positive voltage to a negative voltage or from a negative voltage to a positive voltage; the primary switching unit includes a bidirectional switching unit composed of two switching transistors;

[0134] Based on the AC side voltage, controlling each primary-side switching unit to be in the conducting state during its corresponding primary-side switching conduction period within the switching cycle; and controlling each secondary-side switching unit to be in the conducting state during its corresponding secondary-side switching conduction period further includes:

[0135] Step S480: In the upper bridge arm circuit of all bridge arm circuits of the primary side bridge arm switching circuit, if at least one of the upper switching transistors will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switching transistors will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper switching transistors and the lower switching transistors will be controlled to change state, and after a second delay, the other switching transistor will be controlled to change state.

[0136] Step S490: In the lower bridge arm circuit of all bridge arm circuits of the primary side bridge arm switching circuit, if at least one of the upper switching transistors will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switching transistors will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper switching transistors and the lower switching transistors is controlled to change state, and after a second delay, the other switching transistor is controlled to change state.

[0137] In this embodiment, referring to Figure 10, the commutation time node is the time node in the target primary voltage waveform where the primary voltage changes from a positive voltage to a negative voltage or from a negative voltage to a positive voltage. As shown in Figure 10, the commutation time node is time node t3.

[0138] For the upper bridge arm circuit in all bridge arm circuits of the primary side bridge arm switching circuit, referring to Figures 9 and 10, when the switching unit includes a bidirectional switching unit, if the state combination of all upper switching transistors and the state combination of all lower switching transistors need to change at the commutation time node, the controller will first control the upper switching transistors that need to change state to change state, and after the second delay, control the lower switching transistors that need to change state to change state, or vice versa.

[0139] For example, referring to Figure 13, in rectification mode, the commutation time node is t3. When the sector position is in the first sector, at the commutation time node t3, at the commutation time node t3, the state of at least one of the three upper and three lower switches in the three bridge arm circuits of the primary side bridge arm switching circuit needs to be adjusted. The three upper switches need to switch from "100 (Sapp on, Sbpp off, Scpp off)" to "111 (Sapp on, Sbpp on, Scpp on)", and the three lower switches need to switch from "111 (Sapn on, Sbpn on, Sccpn on)" to "001 (Sapn on, Sbpp off, Scpp off)". (n is not conducting, Sbpn is not conducting, Scpn is conducting). At time node t3, the controller will first control the state transition of all the lower switches that need to change state, that is, control the lower switches Sapn and Sbpn to switch from the conducting state to the non-conducting state, while keeping the state of all upper switches unchanged. Then, after the second delay period (pre-set by the R&D personnel or set by the controller according to the current operating conditions of the matrix converter), that is, the intermediate state period shown in Figure 13, the controller will then control the state transition of all the upper switches that need to change state, that is, control the upper switches Sbpp and Scpp to switch from the non-conducting state to the conducting state. Referring to Figure 14, which shows the working state of the primary side bridge arm switching circuit in inverter mode, at the same commutation time node t3, the same logic implementation delay as in the rectification mode is used to make the upper switching transistors that need to change state change at the commutation time node change state, and after the second delay, the lower switching transistors that need to change state change state or vice versa.

[0140] Similarly, at the commutation time node, the lower bridge arm circuit of all bridge arm circuits in the primary side bridge arm switching circuit is also set according to the above control logic, which will not be elaborated further here. Through the above settings, at the commutation time node within the switching cycle, the loop between the two ends of the primary side of the isolation circuit will not be broken when the sector position changes, effectively ensuring the stability and reliability of the matrix converter.

[0141] This application also proposes a controller, including: a memory, a processor, and a control program for a matrix converter stored in the memory and executable on the processor, the control program being configured to implement the control method for the matrix converter as described in any of the preceding claims. In this application, the controller includes an MCU or a DSP (Digital Signal Processor) chip.

[0142] It is worth noting that, since this application includes the control method for the matrix converter described above, all the technical solutions included in this application also possess at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be described in detail here.

[0143] This application also proposes an on-board charger, including a control method for a matrix converter as described in any of the preceding claims; and / or, a controller as described in the preceding claims.

[0144] It is worth noting that, since this application includes the control method and / or controller for the matrix converter described above, all the technical solutions included in this application also possess at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be described in detail here.

[0145] The above content is merely an embodiment of this application and does not limit the patent scope of this application. Any equivalent structural transformations made based on the concept of this application and the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included within the patent protection scope of this application.

Claims

1. A control method for a matrix converter, the matrix converter comprising a primary-side bridge arm switching circuit, an isolation circuit, and a secondary-side bridge arm switching circuit; one end of the primary-side bridge arm switching circuit is electrically connected to an AC side, and the other end is electrically connected to the primary side of the isolation circuit; one end of the secondary-side bridge arm switching circuit is electrically connected to the secondary side of the isolation circuit, and the other end is electrically connected to a DC side; the primary-side bridge arm switching circuit comprises multiple primary-side bridge arm circuits, each consisting of two primary-side switching units; the secondary-side bridge arm switching circuit comprises multiple secondary-side bridge arm circuits, each consisting of two secondary-side switching units; in, The matrix converter control method includes: Determine the operating mode of the matrix converter and the corresponding AC side voltage for that mode; Based on the operating mode, switching period, and AC side voltage of the matrix converter, multiple time points corresponding to the target waveform within the switching period are determined; wherein, the target waveform includes the target primary side current waveform, the target primary side voltage waveform, and the target secondary side voltage waveform; Based on the working mode and multiple time nodes, multiple primary-side switch conduction periods and multiple secondary-side switch conduction periods are generated within the switching cycle. Based on the AC side voltage, during the switching cycle, each primary-side switching unit is controlled to be in the on state during its corresponding primary-side switch conduction period; and each secondary-side switching unit is controlled to be in the on state during its corresponding secondary-side switch conduction period, so that the primary-side current waveform, primary-side voltage waveform and secondary-side voltage waveform of the matrix converter are matched with the target waveform.

2. The control method for the matrix converter as described in claim 1, wherein, The operating modes include: rectification mode, V2G inverter mode, and V2L inverter mode; When the operating mode is rectification mode and V2G inverter mode, the AC side voltage includes the AC voltage of the AC power supply connected to the AC side. When the operating mode is V2L inverter mode, the AC side voltage includes the AC voltage output from the primary side bridge arm switching circuit to the AC side.

3. The control method for the matrix converter as described in claim 1, wherein, The determination of multiple time points corresponding to the target waveform within the switching period based on the target waveform, the switching period, and the AC side voltage includes: The amount of charge transferred during the switching cycle is determined based on the AC side voltage calculated via a phase-locked loop. Based on the amount of charge transferred during the switching cycle, determine the primary and secondary side phase shift values ​​and the duration of the maximum positive voltage corresponding to the target waveform; Based on the operating mode, the switching cycle, the phase shift value of the primary and secondary sides, and the duration of the maximum positive voltage, multiple time nodes corresponding to the target waveform within the switching cycle are determined.

4. The control method for the matrix converter as described in claim 3, wherein, The determination of multiple time points corresponding to the target waveform within the switching period based on the operating mode, the switching period, the primary and secondary side phase shift values, and the duration of the maximum positive voltage includes: When the operating mode is rectification mode, the multiple time nodes include zero point T0, first time node T1, second time node T2, third time node T3, fourth time node T4, fifth time node T5 and sixth time node T6; Wherein, the time period T0-T6 is the duration of the switching cycle, the time period T0-T1 is the duration corresponding to the primary and secondary phase shift values, the time period T0-T2 is the duration of the maximum positive voltage, the time period T0-T3 is half the duration of the switching cycle, the time period T0-T4 is the sum of the duration corresponding to the primary and secondary phase shift values ​​and half the duration of the switching cycle, and the time period T0-T5 is the sum of the duration of the maximum positive voltage and half the duration of the switching cycle.

5. The control method for the matrix converter as described in claim 3, wherein, The determination of multiple time points corresponding to the target waveform within the switching period based on the operating mode, the switching period, the primary and secondary side phase shift values, and the duration of the maximum positive voltage includes: When the working mode is inverter mode, the multiple time nodes include zero point T0, first time node T1, second time node T2, third time node T3, fourth time node T4, fifth time node T5 and sixth time node T6. Wherein, the time period T0-T6 is the duration of the switching cycle, the time period T0-T1 is the difference between half the duration of the switching cycle and the duration of the maximum positive voltage, the time period T0-T2 is the difference between half the duration of the switching cycle and the duration corresponding to the primary and secondary phase shift values, the time period T0-T3 is the duration of half the switching cycle, the time period T0-T4 is the difference between the duration of the switching cycle and the duration of the maximum positive voltage, and the time period T0-T5 is the difference between the duration of the switching cycle and the duration corresponding to the primary and secondary phase shift values.

6. The control method for the matrix converter as described in claim 1, wherein, Based on the AC side voltage, during the switching cycle, each primary-side switching unit is controlled to be in the conducting state during the corresponding primary-side switching conduction period. Furthermore, controlling each of the secondary-side switching units to be in the on state during the on period of its corresponding secondary-side switch includes: Based on the AC side voltage, determine the sector position of the AC side voltage in the preset AC voltage sector; Based on the sector position and the multiple primary-side switch conduction periods, a corresponding primary-side switch drive signal is generated for each primary-side switch unit; and a corresponding primary-side switch drive signal is output to each primary-side switch unit to control each primary-side switch unit to be in the conduction state during its corresponding primary-side switch conduction period. Based on the sector position and the multiple secondary switch conduction periods, a corresponding secondary switch drive signal is generated for each secondary switch unit; and a corresponding secondary switch drive signal is output to each secondary switch unit to control each secondary switch unit to be in the conduction state during its corresponding secondary switch conduction period.

7. The control method for the matrix converter as described in claim 6, wherein, The primary-side switching unit includes a bidirectional switching unit composed of an upper switching transistor and a lower switching transistor; the generation of a corresponding primary-side switching drive signal for each primary-side switching unit based on the sector position and the multiple primary-side switching conduction periods includes: For each of the aforementioned upper switching transistors, based on the corresponding conduction period, a rising edge trigger point is set when the emitting register clock is zero, and the trigger time of the rising edge trigger point is configured through either the dead-time register or the comparator, and the trigger time of the falling edge trigger point is set through either the dead-time register or the comparator, so that the emitting register outputs the corresponding primary-side switching drive signal. For each of the lower switching transistors, based on the corresponding conduction period, a falling edge trigger point is set when the emitting register clock is zero, and the trigger time of the falling edge trigger point is configured through either the dead-time register or the comparator, and the trigger time of the rising edge trigger point is set through either the dead-time register or the comparator, so that the emitting register outputs the corresponding primary-side switching drive signal.

8. The control method for the matrix converter as described in claim 6, wherein, The preset AC voltage sector includes a three-phase AC line voltage sector.

9. The control method for the matrix converter as described in claim 6, wherein, Based on the AC side voltage, controlling each primary-side switching unit to be in the on state during its corresponding primary-side switching on period within the switching cycle further includes: When the sector position of the AC side voltage in the preset AC voltage sector changes from the current position to the next position, and the primary-side switching unit switches from the on state to the non-conducting state, the primary-side switching unit is controlled to delay for a first dead time before switching from the on state to the non-conducting state.

10. The control method for the matrix converter as described in claim 6, wherein, Based on the AC side voltage, controlling each primary-side switching unit to be in the on state during its corresponding primary-side switching on period within the switching cycle further includes: When the sector position of the AC side voltage in the preset AC voltage sector changes from the current position to the next position, and the primary-side switching unit switches from the non-conducting state to the conducting state, the primary-side switching unit is controlled to switch from the non-conducting state to the conducting state.

11. The control method for a matrix converter as described in claim 1, wherein, Based on the AC side voltage, during the switching cycle, each primary-side switching unit is controlled to be in the conducting state during the corresponding primary-side switching conduction period. Furthermore, controlling each of the secondary-side switching units to be in the on state during the on period of its corresponding secondary-side switch also includes: When the conduction periods of two primary-side switching units in the same bridge arm circuit are adjacent within the switching cycle, a second dead time is set between the two corresponding conduction periods. When the conduction periods of two secondary switch units in the upper and lower arms of the same bridge arm circuit are adjacent within the switching cycle, a third dead time is set between the two corresponding conduction periods.

12. The control method for the matrix converter as described in claim 1, wherein, The multiple time nodes include a commutation time node, at which the amplitude of the primary voltage in the target primary voltage waveform switches from the maximum voltage to the intermediate voltage or from the intermediate voltage to the maximum voltage; the primary-side switching unit includes a bidirectional switching unit composed of an upper switching transistor and a lower switching transistor; Based on the AC side voltage, during the switching cycle, each primary-side switching unit is controlled to be in the conducting state during the corresponding primary-side switching conduction period. Furthermore, controlling each of the secondary-side switching units to be in the on state during the on period of its corresponding secondary-side switch also includes: In the upper bridge arm circuit of the primary side bridge arm switching circuit, if at least one of the upper switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper switch and the lower switch will be controlled to change state, and after a first delay, the other switch will be controlled to change state. In the lower bridge arm circuit of the primary side bridge arm switching circuit, if at least one of the upper switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper and lower switches will be controlled to change state, and after a first delay, the other switch will be controlled to change state.

13. The control method for a matrix converter as described in claim 1, wherein, The plurality of time nodes include a commutation time node, wherein the primary voltage in the target primary voltage waveform changes from a positive voltage to a negative voltage or from a negative voltage to a positive voltage; the primary switching unit includes a bidirectional switching unit composed of two switching transistors; Based on the AC side voltage, during the switching cycle, each primary-side switching unit is controlled to be in the conducting state during the corresponding primary-side switching conduction period. Furthermore, controlling each of the secondary-side switching units to be in the on state during the on period of its corresponding secondary-side switch also includes: In the upper bridge arm circuit of the primary side bridge arm switching circuit, if at least one of the upper switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper switch and the lower switch will be controlled to change state, and after a first delay, the other switch will be controlled to change state. In the lower bridge arm circuit of the primary side bridge arm switching circuit, if at least one of the upper switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, and at least one of the lower switches will switch from a non-conducting state to a conducting state or from a conducting state to a non-conducting state at the commutation time node, then at the commutation time node, one of the upper and lower switches will be controlled to change state, and after a second delay, the other switch will be controlled to change state.

14. The control method for a matrix converter as described in claim 1, wherein, The matrix converter control method further includes setting a corresponding switching cycle based on the operating power of the matrix converter.

15. A controller, wherein, The controller includes: a memory, a processor, and a control program for a matrix converter stored in the memory and executable on the processor, the control program for the matrix converter being configured to implement the control method for the matrix converter as described in any one of claims 1 to 14.

16. The controller of claim 15, wherein, The controller may be an MCU or a DSP.

17. An on-board charger, wherein, Includes a control method for a matrix converter as described in any one of claims 1-14; and / or a controller as described in any one of claims 15-16.

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