Fault handling training system for 64d semi-automatic block circuit

Abstract

A fault handling training system for a 64D semi-automatic block circuit, relating to the technical field of circuits. The system comprises a fault setting subsystem, a student terminal subsystem, a teacher terminal subsystem, and a bidirectional wireless access system. By means of hybrid fault simulation and FPGA virtual-real fusion technology, a fault type is expanded, and a full-scene teaching requirement from a basic hardware open circuit to a complex signal timing anomaly is covered, such that the comprehensiveness of fault diagnosis of a trainee can be significantly improved; moreover, an AI evaluation module breaks through limitations on traditional preset answers on the basis of a knowledge graph and an LSTM model, and can identify multiple solution paths, quantify operations, and dynamically generate a multi-dimensional capability portrait comprising an efficiency score, a resource score, and an innovation score, such that skill evaluation is more suitable for an actual working scene; additionally, bidirectional wireless communication is optimized by means of an MQTT-TSN protocol and dual-band WiFi 6, thereby ensuring real-time linkage of a teacher terminal and a student terminal in a high-concurrency training environment.

Description

A 64D semi-automatic block circuit fault handling training system Technical Field

[0001] This invention relates to the field of circuit technology, and in particular to a 64D semi-automatic block circuit fault handling training system. Background Technology

[0002] The 64D semi-automatic block circuit connects the block equipment and outer lines of two adjacent stations to achieve safe control of train operation. It mainly consists of indoor and outdoor equipment. The indoor equipment includes a microcomputer mouse control console, relay circuits, etc., while the outdoor equipment includes departure signals, arrival signals, and block outer lines. The working principle of the 64D semi-automatic block circuit is to ensure the safe operation of trains by having the block equipment between the departure station and the receiving station cooperate with each other.

[0003] The 64D semi-automatic block signaling system is currently the mainstream semi-automatic block signaling system in China. The 64D relay circuit has high reliability and can achieve inter-station communication with only two core cables, which is inexpensive. Therefore, it is still widely used on non-busy lines in China. Automatic inter-station block signaling can be constructed based on the 64D system. In recent years, it has not only been applied on some domestic lines, but has also been promoted to some overseas railway projects.

[0004] With the country's vigorous development of vocational education and the rapid development of the rail transit industry, many undergraduate and vocational colleges in China have successively established rail transit signaling majors. Troubleshooting of 64D semi-automatic circuits is one of the core skills that students majoring in rail transit signaling must master. It is particularly important to be proficient in the principles of 64D circuits and troubleshooting skills. To improve students' practical skills, it is necessary to equip them with advanced and practical training equipment related to 64D semi-automatic block circuits.

[0005] However, most current training equipment has outdated hardware and fixed functions, and can only simulate standard working conditions. It lacks intelligent fault simulation and dynamic interaction capabilities, which prevents students from deeply experiencing complex faults such as open circuits, short circuits, and signal interference in real scenarios. The virtual simulation system is disconnected from physical operation. Although the existing virtual training equipment has reduced costs, it relies too much on software interface operation, which weakens students' intuitive understanding of circuit timing logic. These problems together restrict the systematic cultivation of students' practical abilities. Therefore, this invention proposes a 64D semi-automatic block circuit fault handling training system to solve the problems existing in the prior art. Summary of the Invention

[0006] To address the aforementioned problems, the present invention aims to propose a 64D semi-automatic block circuit fault handling training system. This system solves the problems that most current training equipment has outdated hardware and fixed functions, lacks intelligent fault simulation and dynamic interaction capabilities, and is disconnected from physical operation. Furthermore, while existing virtual training equipment reduces costs, it relies excessively on software interface operation, which weakens students' intuitive understanding of circuit timing logic.

[0007] To achieve the objectives of this invention, the invention is implemented through the following technical solution: a 64D semi-automatic block circuit fault handling training system, comprising a fault setting subsystem, a student terminal system, a teacher terminal system, and a two-way wireless access system, characterized in that: the fault setting subsystem comprises a composite fault simulation module for simulating circuit faults, a virtual-real fusion module for expanding circuit fault types, and a status acquisition module for real-time acquisition of circuit parameters;

[0008] The student terminal system includes a dynamic interactive interface for displaying fault circuit diagrams, a timing unit for recording the time of troubleshooting operations, and an answer submission unit for submitting operation answers.

[0009] The teacher terminal system includes a teacher-side interaction module for issuing fault control commands and an AI evaluation module for dynamically evaluating the scores of students' submitted answers.

[0010] The bidirectional wireless access system uses the MODBUS TCP / IP protocol to provide bidirectional wireless communication between the fault setting subsystem, the student terminal system, and the teacher terminal system.

[0011] Further improvements are made in that the composite fault simulation module adopts a parallel design of normally closed / normally open relays and solid-state relays, supports different fault modes including open circuit, short circuit and loose connection, and controls the relay state switching through a microcontroller.

[0012] Further improvements are made in that the virtual-real fusion module integrates soft faults, including FPGA chip simulation timing errors and relay sticking, and links with physical faults to expand the types of faults.

[0013] A further improvement is that the status acquisition module captures circuit parameters in real time through voltage / current sensors to obtain relay status data.

[0014] Further improvements are made in that: the dynamic interactive interface is based on a 64D complete circuit diagram, and uses GDI+ graphics device interface technology to draw the circuit diagram into the control window, and the circuit diagram can be zoomed in, zoomed out and dragged using the mouse.

[0015] Further improvements include: the teacher-side interaction module adopts the MQTT-TSN hybrid protocol to transmit fault control commands to the fault setting subsystem, and supports automatic channel switching of dual-band Wi-Fi 6 APs.

[0016] Further improvements are made in that the AI ​​evaluation module constructs a dynamic scoring model based on a fault tree, combines multi-dimensional data including operation time, logical rationality and resource consumption to generate a capability profile, and supports multi-solution path identification and weight allocation based on a dynamic scoring mechanism of knowledge graph.

[0017] A further improvement is that after the student terminal system submits the operation answer, the AI ​​evaluation module compares the operation sequence with the preset path of the knowledge graph. If an unconventional solution is detected, the LSTM model is activated to verify the rationality of the logic and generate a comprehensive evaluation report that includes efficiency score and innovation score.

[0018] Further improvements include a security extension system, which comprises a communication encryption module for encrypted communication and a remote collaboration module for remote operation. The communication encryption module combines MAC address binding with dynamic tokens to achieve two-way authentication, and the remote collaboration module supports collaborative troubleshooting of circuit faults among students from multiple campuses through a 5G slicing network.

[0019] The beneficial effects of this invention are as follows: By combining composite fault simulation with FPGA virtual-real fusion technology, this invention expands the types of faults, covering all teaching needs from basic hardware circuit breaks to complex signal timing anomalies. It can significantly improve the comprehensiveness of trainees' fault diagnosis. Moreover, the AI ​​evaluation module, based on knowledge graphs and LSTM models, breaks through the limitations of traditional preset answers, can identify multiple solution paths and quantify innovative operations, and dynamically generate a multi-dimensional ability profile including efficiency score, resource score, and innovation score, making skills assessment more in line with actual work scenarios. In addition, the two-way wireless communication adopts the MQTT-TSN protocol and dual-band Wi-Fi 6 optimization, achieving low-latency command interaction within 50ms and 99.99% communication availability, ensuring real-time linkage between teachers and students in high-concurrency training environments. Compared with traditional systems, this invention can not only greatly improve the skill level, employment quality, and competitiveness of signal engineering students, but also improve the teaching effect and work efficiency of signal engineering and various vocational training bases, reduce labor intensity, and to a certain extent extend the system's lifespan, thus having significant promotional value. Attached Figure Description

[0020] Figure 1 is a schematic diagram of the structure of the 64D semi-automatic block circuit fault handling training system of the present invention. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0022] The 64D semi-automatic block circuit design logic is classic, and its circuit fault handling is an essential professional skill for signal engineering students. During practical training and exercises, teachers usually use transparent tape to insulate certain electrical nodes in the control circuit to set up breakpoint faults. Students use multimeters and combine their existing knowledge to troubleshoot the faults. However, this traditional method is time-consuming, extremely inefficient, and can easily damage equipment.

[0023] Suppose a class of 20 students is having class in a training room with 10 64D semi-automatic training platforms (control console + semi-automatic block relay control circuit). If each group (2 students per group) is assigned one platform and each platform needs to have 4 fault points set, then the teacher will need at least 60 minutes to set the faults before class. Moreover, after a group of students completes the fault handling within the specified time, the teacher will need to reset the fault points. It is evident that the teaching efficiency is low and the teaching effect is greatly reduced.

[0024] As shown in Figure 1, this embodiment provides a 64D semi-automatic block circuit fault handling training system. This system adopts a distributed architecture design and includes four core subsystems:

[0025] Fault setting subsystem: As a hardware control layer, it consists of a composite fault simulation module, a virtual-real fusion module and a status acquisition module. The composite fault simulation module is used to generate physical faults in the circuit, the virtual-real fusion module is used for the expansion of soft and hard collaborative faults in the circuit, and the status acquisition module is used to provide real-time feedback of circuit data.

[0026] Student terminal system: As the operation interaction layer, it consists of a dynamic interactive interface, a timing unit and an answer submission unit. The dynamic interactive interface provides students with a visual circuit diagram operation interface, the timing unit is used to record the operation process, and the answer submission unit is used to submit the student's operation results for the circuit fault.

[0027] Teacher terminal system: As the management and evaluation layer, it consists of a teacher terminal interaction module and an AI evaluation module. The teacher terminal interaction module issues circuit fault commands, and the AI ​​evaluation module is used to intelligently score the students' operation results.

[0028] Two-way wireless access system: Based on the MODBUS TCP / IP protocol, it realizes three-terminal data interaction, adopts full-duplex communication mode, supports simultaneous uploading of operation data and sending of control commands, and ensures that the teacher can monitor the operation status of multiple student terminals in real time.

[0029] In this embodiment, the fault setting subsystem uploads circuit parameters (such as relay pull-in voltage and signal timing) to the teacher terminal system through the status acquisition module. The teacher terminal system dynamically adjusts the fault difficulty of the student terminal (such as superimposing FPGA virtual faults) based on the evaluation results. The operation data of the student terminal system is encrypted and then transmitted back through the two-way wireless access system, forming a closed-loop feedback.

[0030] The composite fault simulation module in this embodiment adopts a parallel design of normally closed / normally open relays and solid-state relays (SSRs), supporting 8 types of fault modes such as open circuit, short circuit, and loose connection. The relay state switching is controlled by a microcontroller. At each fault point, a normally closed relay (model: JQX-13F) and a solid-state relay (SSR-40DA) are connected in parallel. The normally closed relay is responsible for simulating mechanical faults (such as open circuits), and the SSR simulates poor contact (such as loose connection with an adjustable conduction rate of 30-70%) through PWM voltage regulation.

[0031] The microcontroller (STM32F407) controls the relay on and off through GPIO, and outputs a PWM signal to adjust the SSR conduction state. It supports 8 types of fault mode encoding (such as F01 = complete open circuit, F02 = intermittent loose connection).

[0032] The control logic is as follows: receive hexadecimal instructions (such as 0xA1 indicating F01 fault) sent by the teacher terminal system, drive the corresponding relay combination to act, and control the duration of the fault through timer interrupt (such as automatically recovering after a 5-second period of intermittent connection fault).

[0033] The virtual-real fusion module of this embodiment integrates FPGA chip to simulate soft faults such as timing disorder and relay sticking, and links with physical faults to expand the fault types to more than 30. The physical relays and FPGA virtual faults work together to cover the full-scenario teaching needs from basic circuit breakers to signal timing abnormalities.

[0034] Timing anomalies in analog signals using a Xilinx Artix-7 FPGA, for example:

[0035] Timing disorder: A random delay (±200ms) is inserted into the standard response period (typically 560ms) of the 64D circuit;

[0036] Relay sticking: The relay is forced to remain in the energized state in the virtual relay state machine inside the FPGA, ignoring the actual disconnection signal of the physical circuit.

[0037] Hardware and software integration mechanism:

[0038] When a physical relay experiences an open circuit, the FPGA synchronously injects virtual signal interference (such as superimposed 10kHz noise) to form a composite fault scenario.

[0039] The ratio of virtual to physical faults is adjustable: the teacher terminal system can be set to allow for a virtual fault ratio (e.g., 70% physical faults + 30% virtual faults) to suit the needs of different teaching stages.

[0040] The status acquisition module in this embodiment captures circuit parameters in real time through a high-precision voltage / current sensor to obtain relay status data. Combined with CRC check, it ensures data reliability. The voltage acquisition uses a TIADS1115 16-bit ADC chip with a range of ±15V and an accuracy of ±0.1%. The current acquisition uses an AllegroACS712 Hall sensor with a range of 0 to 5A and an error of ±1.5%.

[0041] The data verification mechanism is as follows:

[0042] CRC verification process: The collected data is packaged into a 64-byte data frame and a CRC-16 checksum (polynomial 0x8005) is attached. The retransmission mechanism is triggered when the receiving end fails to verify the data.

[0043] Anti-interference design: The sensor signal is connected to the microcontroller after being filtered by RC (cutoff frequency 1kHz) and opto-isolated (TLP521-4).

[0044] The dynamic interactive interface of this embodiment is based on a 64D complete circuit diagram. It uses GDI+ graphics device interface technology to draw the circuit diagram into the control window. The mouse can be used to zoom in, zoom out and drag, which makes it convenient to view the circuit diagram and select and set fault points.

[0045] 64D circuit symbols (such as relays and track sections) are stored as SVG vector graphics. The rendering resolution is dynamically adjusted according to the scaling level. Circuit parameters are read every 200ms via a background thread, and the colors of interface elements are refreshed (e.g., red indicates a fault point, and green indicates normal).

[0046] The teacher-side interaction module in this embodiment adopts the MQTT-TSN hybrid protocol to transmit fault control commands to the fault setting subsystem (latency <50ms), supports automatic channel switching of dual-band Wi-Fi 6AP, and the MQTT-TSN protocol ensures command priority under high concurrency. Combined with the dual-buffered heartbeat packet design, it achieves 99.99% communication availability.

[0047] When the teacher terminal system selects the "interval cable mixing" fault, it issues a command to the fault setting subsystem. The SSR simulates the mixing resistor (adjustable from 10Ω to 1kΩ), and the FPGA synchronously injects signal conflict timing. Students need to use a multimeter to measure and perform logic analysis to locate the fault point.

[0048] The AI ​​evaluation module in this embodiment builds a dynamic scoring model based on fault tree (FTA), and generates a capability profile by combining multiple dimensions such as operation time, logical rationality, and resource consumption. Based on the dynamic scoring mechanism of knowledge graph, it supports the identification of multiple solution paths and weight allocation, breaking through the limitations of manually preset answers.

[0049] Fault Tree Assessment (FTA) weight allocation: Set step weights according to fault type (e.g., "Detect power supply voltage" accounts for 20%, "Check relay timing" accounts for 35%).

[0050] Multi-dimensional scoring: Efficiency score = (standard operating time / actual time) × 40% + Resource score = (number of times tools were used × 10%) + Logic score (reasonableness of steps × 50%).

[0051] Knowledge graph construction:

[0052] Node definition: Includes entities such as fault symptoms, detection tools, possible causes, and troubleshooting steps;

[0053] Path recognition: Graph neural networks (GNNs) are used to match the similarity between student operation sequences and graph paths.

[0054] After the student terminal system in this embodiment submits the operation answer, the AI ​​evaluation module compares the operation sequence with the preset path of the knowledge graph. If an unconventional solution is detected (such as skipping the voltage test and directly reasoning), the LSTM model is started to verify the logical rationality, and finally a comprehensive evaluation report including efficiency score and innovation score is generated.

[0055] LSTM model training:

[0056] Input data: historical operation sequence (timestamp + operation action code), labeled with a reasonableness tag (0-100 points);

[0057] Model structure: Two-layer LSTM (128 neurons) + fully connected layer, outputting the probability value of logical rationality.

[0058] Innovation score calculation:

[0059] If the LSTM output is greater than 85%, then the innovation score = (1 - preset path matching degree) × bonus score (maximum 20 points);

[0060] Report generation: Radar charts and text evaluations are generated for the overall efficiency score, basic score, and innovation score.

[0061] The system also includes a security extension system, consisting of a communication encryption module and a remote collaboration module for remote operation. The communication encryption module combines MAC address binding with dynamic token (TOTP) to achieve two-way authentication, meeting the Level 3 requirements of the Information Security Protection 2.0 standard. When the device connects for the first time, it binds the MAC address. Each communication must carry a dynamic token (generated by the TOTP algorithm and updated every 30 seconds). The system uses the SM4 national cryptographic algorithm to encrypt data transmission with a key length of 256 bits.

[0062] The remote collaboration module supports students across multiple campuses to collaboratively troubleshoot complex circuit faults via a 5G slicing network, and synchronizes the data to VR headsets for immersive training. The 5G slicing network allocates independent slices (bandwidth ≥ 50Mbps, latency < 20ms) for VR data streams, which are transmitted in isolation from ordinary operation data. The Unity3D engine renders the fault scene, which is then pushed to VR headsets (such as HTC ViveFocus3) via WebSocket. The motion data is synchronized in JSON format.

[0063] When it is necessary to train students in troubleshooting 64D semi-automatic block circuits:

[0064] Teachers first select the fault mode (such as "red light band of section signal machine") through the teacher terminal system. The AI ​​evaluation module automatically generates a composite fault command containing physical circuit break (KZ power relay F01 fault) and FPGA virtual timing disorder (cycle offset +15%). After being encrypted by the MQTT-TSN protocol, it is sent to the fault setting subsystem.

[0065] The student-side dynamic interactive interface synchronously displays the abnormal status of the 64D circuit diagram (flashing red light). The student uses a virtual multimeter tool to detect the track voltage and finds that the voltage at the JZXC-480 relay terminal is abnormal. Combined with the timing monitoring window, the student identifies the period offset injected by the FPGA and marks the fault point as "BSA pick-up contact loose connection + signal drive timing abnormality" by dragging. During the operation, the timing unit records the diagnostic time, and the answer submission unit uploads the operation sequence containing the logic reasoning tree.

[0066] The AI ​​evaluation module calls the knowledge graph to compare the standard path and detects that the student skipped the relay resistance test and directly located the loose connection fault. It starts the LSTM model to verify the rationality of the logic, and finally generates a comprehensive evaluation report. The VR fault scene is synchronized to the students in the collaborating campus through the 5G slicing network to complete the multi-terminal joint training.

[0067] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.

Claims

1. A 64D semi-automatic block circuit fault handling practical training system, comprising a fault setting subsystem, a student terminal subsystem, a teacher terminal subsystem and a bidirectional wireless access system, characterized in that: The fault setting subsystem includes a composite fault simulation module for simulating circuit faults, a virtual-real fusion module for expanding circuit fault types, and a state acquisition module for acquiring circuit parameters in real time. The student terminal subsystem includes a dynamic interactive interface for displaying fault circuit diagrams, a timing unit for recording troubleshooting operation time, and an answer submission unit for submitting operation answers. The teacher terminal subsystem includes a teacher terminal interactive module for issuing fault control commands and an AI evaluation module for dynamically evaluating student submitted answer scores. The bidirectional wireless access system uses the MODBUS TCP / IP protocol to provide bidirectional wireless communication functions between the fault setting subsystem, the student terminal subsystem, and the teacher terminal subsystem.

2. The 64D semi-automatic block circuit fault processing practical training system according to claim 1, characterized in that: The composite fault simulation module uses normally closed / normally open relays and solid-state relays in parallel, supports different fault modes including open circuit, short circuit, and virtual connection, and switches relay states through a single-chip microcomputer.

3. The 64D semi-automatic block circuit fault processing practical training system according to claim 1, characterized in that: The virtual-real fusion module integrates soft faults including FPGA chip simulation timing disorder and relay sticking, and expands fault types in conjunction with physical faults.

4. The 64D semi-automatic block circuit fault processing practical training system according to claim 1, characterized in that: The state acquisition module captures circuit parameters in real time through voltage / current sensors and obtains relay state data.

5. The 64D semi-automatic block circuit fault processing practical training system according to claim 1, characterized in that: The dynamic interactive interface is based on a 64D complete circuit diagram, uses GDI+ graphics device interface technology to draw the circuit diagram into the control window, and the circuit diagram can be zoomed in, zoomed out, and dragged using a mouse.

6. The 64D semi-automatic block circuit fault processing practical training system according to claim 1, characterized in that: The teacher terminal interactive module uses the MQTT-TSN hybrid protocol to transmit fault control instructions to the fault setting subsystem and supports dual-frequency Wi-Fi 6AP automatic channel switching.

7. The 64D semi-automatic block circuit fault processing practical training system according to claim 1, characterized in that: The AI evaluation module builds a dynamic scoring model based on a fault tree, generates an ability portrait based on multi-dimensional data including operation time, logical rationality, and resource consumption, and supports multi-solution path recognition and weight allocation based on a dynamic scoring mechanism of a knowledge graph.

8. The 64D semi-automatic block circuit fault processing practical training system according to claim 1, characterized in that: After the student terminal subsystem submits operation answers, the AI evaluation module compares operation sequences with preset paths in the knowledge graph, verifies logical rationality using an LSTM model if an irregular solution is detected, and generates a comprehensive evaluation report including efficiency points and innovation points.

9. The 64D semi-automatic block circuit fault processing practical training system according to claim 1, characterized in that: It also includes a security expansion system, which includes a communication encryption module for encrypted communication and a remote collaboration module for remote operation. The communication encryption module realizes bidirectional authentication by combining MAC address binding and dynamic tokens. The remote collaboration module supports multi-campus student collaboration in troubleshooting circuit faults through a 5G slice network.

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