Method for improving white pixels of CMOS image sensor

Abstract

A method for improving white pixels of a CMOS image sensor. The method comprises: forming a pad oxide layer (102) on a substrate (101); sequentially forming an advanced thin film (104) and an anti-reflection coating (105) on the pad oxide layer (102); forming a photoresist layer (103) on the anti-reflection coating (105), opening the photoresist layer (103) by means of photolithography to define an implantation area, and then opening the exposed anti-reflection coating (105) and the advanced thin film (104) therebelow by means of etching; performing ion implantation of a photodiode region within the implantation area; and performing an annealing treatment. The method can improve the white pixels of the CMOS image sensor, thereby improving the performance of a device.

Description

Methods to improve white pixels in CMOS image sensors Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a method for improving white pixels in CMOS image sensors. Background Technology

[0002] White pixels (WP) are a key indicator of the performance of CMOS image sensors. As CIS (CMOS image sensor) technology advances towards tiny pixels (such as 0.7 micrometers and below), further reducing white pixels is crucial for the development of CMOS image sensors.

[0003] Existing ion implantation methods for photodiode regions include:

[0004] Step 1: Form a pad oxide layer 102 on the substrate 101;

[0005] Step 2: Form a photoresist layer 103 on the substrate oxide layer 102, and use photolithography to open the photoresist layer 103 to define the injection region;

[0006] Step 4: Perform ion implantation of the photodiode region within the implantation area (as shown in Figure 1);

[0007] Step 5: Annealing.

[0008] Existing technologies, through methods such as controlling metal ion contamination on the equipment, adding anti-metal coatings to the equipment, and lowering the annealing temperature, are insufficient to further reduce the white pixel density. Furthermore, lowering the annealing temperature may affect the reliability of the device due to insufficient thermal budget.

[0009] In nanoscale processes, the diffusion of metallic impurities is more pronounced, making it difficult for existing structures to effectively suppress the increase of white pixels.

[0010] To address the aforementioned issues, a novel method for improving the white pixels of CMOS image sensors is needed. Summary of the Invention

[0011] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method for improving white pixels in CMOS image sensors, in order to solve the problem that it is difficult to effectively suppress the increase of white pixels in the prior art.

[0012] To achieve the above and other related objectives, the present invention provides a method for improving white pixels in a CMOS image sensor, comprising:

[0013] Step 1: Form a pad oxide layer on the substrate;

[0014] Step 2: Sequentially form an advanced technology thin film and an anti-reflective coating on the substrate oxide layer;

[0015] Step 3: Form a photoresist layer on the anti-reflective coating, use photolithography to open the photoresist layer to define the injection area, and then etch to open the exposed anti-reflective coating and the advanced technology film below it;

[0016] Step 4: Perform ion implantation of the photodiode region within the implantation area;

[0017] Step 5: Annealing.

[0018] Preferably, the lining oxide layer in step one is formed by a dry oxygen process in the furnace tube.

[0019] Preferably, the formation temperature of the substrate oxide layer in step one is 700 to 1000°C.

[0020] Preferably, the thickness of the pad oxide layer in step one is 100 to 120 nm.

[0021] Preferably, the thickness of the advanced technology film in step two is 500 to 5000 angstroms.

[0022] Preferably, the thickness of the anti-reflective coating in step two is 200 to 3000 angstroms.

[0023] Preferably, the ion implantation in step four is used to form a P-type doped region or an N-type doped region.

[0024] Preferably, the implanted ion in the P-type doped region in step four is boron.

[0025] Preferably, the implanted ions in the N-type doped region in step four are phosphorus or arsenic.

[0026] Preferably, the pixel size of the CMOS image sensor is 0.7 micrometers or less.

[0027] As described above, the method for improving white pixels in a CMOS image sensor according to the present invention has the following beneficial effects:

[0028] This invention can improve the white pixels of CMOS image sensors and enhance device performance. Attached Figure Description

[0029] Figure 1 shows a schematic diagram of ion implantation in a prior art CMOS image sensor;

[0030] Figure 2 shows a schematic diagram of the process flow of the present invention;

[0031] Figure 3 shows a schematic diagram of ion implantation in the CMOS image sensor of the present invention;

[0032] Figure 4 shows a schematic diagram comparing the white pixel results of the CMOS image sensor prepared by ion implantation of the prior art and the present invention. Detailed Implementation

[0033] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0034] Please refer to Figure 2. This invention provides a method for improving white pixels in a CMOS image sensor, comprising:

[0035] Step 1: Form a pad oxide layer 102 on the substrate 101;

[0036] In some embodiments, the liner oxide layer 102 in step one is formed by a furnace tube dry oxidation process.

[0037] In some embodiments, the formation temperature of the oxide layer on the substrate 101 in step one is 700 to 1000°C.

[0038] In some embodiments, the thickness of the pad oxide layer 102 in step one is 100 to 120 nm, for example 100 nm.

[0039] Step 2: An advanced technology thin film 104 and an anti-reflective coating 105 are sequentially formed on the oxide layer of substrate 101. In semiconductor manufacturing, the advanced technology thin film 104 specifically refers to a hard mask material based on amorphous carbon, used for pattern definition in advanced processes. Its main component is an amorphous carbon structure generated by the pyrolysis of acetylene (C₂H₂) under high-temperature plasma conditions. The anti-reflective coating 105 is a silicon-oxygen-nitrogen compound. In semiconductor manufacturing, the anti-reflective coating 105 acts as an anti-reflective layer, effectively preventing standing wave effects, thereby improving the precision and reliability of photolithography.

[0040] In some embodiments, the thickness of the advanced technology film 104 in step two is 500 to 5000 angstroms.

[0041] In some embodiments, the thickness of the antireflective coating 105 in step two is 200 to 3000 angstroms.

[0042] Step 3: A photoresist layer 103 is formed on the anti-reflection coating 105. The photoresist layer 103 is opened by photolithography to define the implantation area. Then, the exposed anti-reflection coating 105 and the underlying advanced technology film 104 are etched to form the structure shown in Figure 3. This structure helps to reduce metal contamination in subsequent ion implantation.

[0043] Step 4: Perform ion implantation of the photodiode region within the implantation area;

[0044] In some embodiments, the ion implantation in step four is used to form a P-type doped region or an N-type doped region.

[0045] In some embodiments, the implanted ions in the P-type doped region in step four are boron.

[0046] In some embodiments, the implanted ions in the N-type doped region in step four are phosphorus or arsenic.

[0047] Step 5: Annealing.

[0048] In some embodiments, the pixel size of the CMOS image sensor is 0.7 micrometers or less.

[0049] Please refer to Figure 4, which shows a comparison of the white pixel results of CMOS image sensors fabricated by ion implantation of the prior art and the present invention: the white pixel of the present invention can be improved by about 10% compared with the BSL (baseline process) of the prior art.

[0050] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0051] In summary, this invention can improve the white pixels of CMOS image sensors and enhance device performance. Therefore, this invention effectively overcomes the various shortcomings of existing technologies and has high industrial applicability.

[0052] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for improving white pixels in a CMOS image sensor, characterized in that, At least including: Step 1: Form a pad oxide layer on the substrate; Step 2: Sequentially form an advanced technology thin film and an anti-reflective coating on the substrate oxide layer; Step 3: Form a photoresist layer on the anti-reflective coating, use photolithography to open the photoresist layer to define the injection area, and then etch to open the exposed anti-reflective coating and the advanced technology film below it; Step 4: Perform ion implantation of the photodiode region within the implantation area; Step 5: Annealing.

2. The method for improving white pixels in a CMOS image sensor according to claim 1, characterized in that: The oxide layer of the lining in step one is formed by the dry oxygen process of the furnace tube.

3. The method for improving white pixels in a CMOS image sensor according to claim 2, characterized in that: The formation temperature of the substrate oxide layer in step one is 700 to 1000°C.

4. The method for improving white pixels in a CMOS image sensor according to claim 1, characterized in that: The thickness of the pad oxide layer in step one is 100 to 120 nm.

5. The method for improving white pixels in a CMOS image sensor according to claim 1, characterized in that: The thickness of the advanced technology film in step two is 500 to 5000 angstroms.

6. The method for improving white pixels in a CMOS image sensor according to claim 1, characterized in that: The thickness of the anti-reflective coating in step two is 200 to 3000 angstroms.

7. The method for improving white pixels in a CMOS image sensor according to claim 1, characterized in that: The ion implantation in step four is used to form a P-type doped region or an N-type doped region.

8. The method for improving white pixels in a CMOS image sensor according to claim 8, characterized in that: The implanted ion in the P-type doped region in step four is boron.

9. The method for improving white pixels in a CMOS image sensor according to claim 8, characterized in that: The implanted ions in the N-type doped region in step four are phosphorus or arsenic.

10. The method for improving white pixels in a CMOS image sensor according to claim 1, characterized in that: The pixel size of the CMOS image sensor is 0.7 micrometers or less.

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