Signal trace structure, MIPI interface and electronic device
Patent Information
- Application Number
- PCT/CN2025/125417
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2025-04-16
- Filing Date
- 2025-09-29
- Publication Date
- 2026-10-22
Smart Images

Figure CN2025125417_22102026_PF_FP_ABST
Abstract
Description
Signal routing structure, MIPI interface and electronic equipment Technical Field
[0001] This application relates to the field of chip technology, and in particular to a signal routing structure, a MIPI interface, and an electronic device. Background Technology
[0002] With the development of electronic devices, higher demands are being placed on data transmission within these devices. The Mobile Industry Processor Interface (MIPI) Alliance has developed open standards for mobile application processors, aiming to standardize interfaces within electronic devices (such as camera interfaces and display interfaces) to improve the speed and quality of data transmission between processors and these interfaces.
[0003] The hardware of MIPI, or Port Physical Layer (PHY), currently includes various MIPI PHY protocols. Among them, the MIPI Three-Wire Differential Signal Transmission Physical Layer (C-PHY) protocol uses a three-signal-line transmission mode. At the transmitting end, data is transmitted in each group of three signal lines using three-phase symbol encoding. At the receiving end, data transmission is completed by differentially dividing the signal lines pairwise.
[0004] In physical implementation, the impedance and differential impedance of each group of three signal lines have a significant impact on data transmission and must meet certain impedance requirements. How to design the signal line routing structure to ensure data transmission quality is a pressing issue that needs to be addressed. Summary of the Invention
[0005] In view of this, embodiments of this application provide a signal routing structure, a MIPI interface, and an electronic device, which improve the quality of signal transmission through the signal routing structure.
[0006] According to a first aspect of the embodiments of this application, a signal routing structure is provided, including: a top layer, a bottom layer, and two differential signal routing layers disposed between the top layer and the bottom layer, wherein the top layer and the bottom layer are both ground reference layers; one trace and two traces are respectively disposed in the two differential signal routing layers, and any two of the one trace and the two traces form a differential signal routing pair.
[0007] According to a second aspect of the embodiments of this application, a MIPI interface is provided, including the signal routing structure as provided in the first aspect.
[0008] According to a third aspect of the embodiments of this application, an electronic device is provided, including a signal routing structure as provided in the first aspect, or a MIPI interface as provided in the second aspect.
[0009] According to the signal routing structure provided in this application embodiment, the differential signal routing structure includes four layers: a top layer, a bottom layer, and two differential signal routing layers, with the two differential signal routing layers located between the top and bottom layers. Both the top and bottom layers are ground reference layers. One trace and two traces are respectively provided in the two differential signal routing layers, and any two of the one or two traces form a differential signal routing pair. By providing one trace and two traces in the two differential signal routing layers, the positions of the traces in the same layer or different layers, as well as the spacing between the traces, can be flexibly adjusted. Therefore, the impedance of the traces and the differential impedance of the differential signal routing pairs can be flexibly adjusted to meet certain impedance requirements, thereby improving the signal transmission quality of the signal routing structure. Attached Figure Description
[0010] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings.
[0011] Figure 1 is a schematic diagram of an electronic device provided in an embodiment of this application;
[0012] Figure 2A is a schematic diagram of a signal routing structure provided in an embodiment of this application;
[0013] Figure 2B is a cross-sectional view of the signal trace structure shown in Figure 2A;
[0014] Figure 2C is a schematic diagram of the trace impedance in the signal trace structure shown in Figure 2A.
[0015] Figure 2D is another schematic diagram of the principle of trace impedance in the signal trace structure shown in Figure 2A;
[0016] Figure 3A is a schematic diagram of another signal routing structure provided in an embodiment of this application;
[0017] Figure 3B is a cross-sectional view of the signal trace structure shown in Figure 3A;
[0018] Figure 4A is a schematic diagram of another signal routing structure provided in an embodiment of this application;
[0019] Figure 4B is a cross-sectional view of the signal trace structure shown in Figure 4A;
[0020] Figure 4C is a schematic diagram of the trace impedance in the signal trace structure shown in Figure 4A.
[0021] Figure 4D is another schematic diagram of the principle of trace impedance in the signal trace structure shown in Figure 4A.
[0022] Figure 4E is another schematic diagram of the principle of trace impedance in the signal trace structure shown in Figure 4A;
[0023] Figure 5A is a schematic diagram of another signal routing structure provided in an embodiment of this application;
[0024] Figure 5B is a cross-sectional view of the signal trace structure shown in Figure 5A. Detailed Implementation
[0025] To enable those skilled in the art to better understand the technical solutions in the embodiments of this application, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art should fall within the protection scope of the embodiments of this application.
[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.
[0027] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.
[0028] It should also be noted that the terms "first, second, and third" used in the embodiments of this application are only used to distinguish similar objects and do not represent a specific order of objects. It is understood that "first, second, and third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.
[0029] This application provides a signal routing structure and a MIPI interface and electronic device using the signal routing structure. To facilitate understanding of this application, the application scenarios and related concepts of MIPI are first explained.
[0030] For example, Figure 1 is a schematic diagram of an electronic device provided in an embodiment of this application. As shown in Figure 1, the electronic device includes a signal routing structure 100, a processor 200, and a functional module 300. Optionally, the functional module 300 includes, but is not limited to, a camera, a display screen, and an RF / baseband interface. Taking a camera as an example, the image or video data captured by the camera needs to be transmitted to the processor 200 for processing. Correspondingly, the processor 200 also needs to send shooting-related instructions and data to the camera. The processor 200 and the camera are connected through the signal routing structure 100, and data between the processor 200 and the camera is transmitted through the signal routing structure 100. The signal routing structure 100 conforms to the MIPI protocol or MIPI specification.
[0031] It should be noted that the names and types of electronic devices are not limited in the embodiments of this application. For example, electronic devices are also called terminal devices, communication devices, etc., and electronic devices include mobile phones, tablet computers, wearable devices, etc.
[0032] MIPI (Mobile Industry Processor Interface) is an open standard and specification for mobile application processors initiated by the MIPI Alliance. Members of the MIPI Alliance include mobile device manufacturers, semiconductor manufacturers, software vendors, system vendors, peripheral equipment manufacturers, intellectual property providers, and more. MIPI includes various interfaces, such as the Display Serial Interface (DSI), Camera Serial Interface (CSI), Low Voltage Differential Signaling (LVDS), RF Front End Interface (RFFE), and System Power Management Interface (SPMI). DSI and CSI are widely used in mobile phones.
[0033] The MIPI protocol comprises a set of protocols and standards, which, according to the protocol stack, mainly include the physical layer, protocol layer, and application layer from bottom to top. The application layer describes how higher-level protocols encode and decode data in the data stream. The protocol layer describes the data packet-related content when sending and receiving data. When sending data, it specifies the packet assembly method, defines the packet header, etc., to generate a complete data packet; when receiving data, it parses the valid data according to the data packet format and removes the packet header, etc. The physical layer (PHY) refers to the MIPI hardware, used to specify the transmission medium, input / output circuits, and transmit data on signal lines according to the clock.
[0034] Currently, the MIPIPHY protocol includes A-PHY, C-PHY, D-PHY, and M-PHY protocols. This application's embodiments relate to the C-PHY protocol, also known as the CPHY protocol or MIPI CPHY protocol.
[0035] The MIPI CPHY protocol uses a three-signal-line transmission mode. At the transmitting end, data is transmitted using three-phase symbol encoding on each of the three signal lines. At the receiving end, the three signal lines are differentially divided pairwise. For example, if the three signal lines are represented as a, b, and c, then signal lines a and b form one differential signal pair, signal lines a and c form another, and signal lines b and c form yet another. Data transmission is completed by differentially dividing the signal lines pairwise and altering the transmission path.
[0036] In physical implementation, to ensure data transmission quality, certain requirements are placed on the impedance of each individual signal line and the differential impedance of the differential signal trace pair in each group of three signal lines. The impedance of a single signal line refers to the impedance formed by the single signal line relative to the ground terminal, while the differential impedance of the differential signal trace pair refers to the impedance formed between the two signal lines in the differential signal trace pair. This application does not limit the calculation method for the impedance of a single signal line and the differential impedance of the differential signal trace pair; existing calculation formulas can be used. To ensure data transmission quality, the impedance of a single signal line needs to be within a first preset impedance range, and the differential impedance of the differential signal trace pair needs to be within a second preset impedance range. This application does not limit the specific values of the first and second preset impedance ranges. Furthermore, the smaller the difference in impedance between different signal lines and the smaller the difference in differential impedance between different groups of differential signal trace pairs, the better. For example, the impedance of a single signal line is approximately 50 ohms, and the differential impedance of the differential signal trace pair is approximately 100 ohms.
[0037] Therefore, how to design the routing structure of signal lines to ensure data transmission quality is an urgent problem to be solved.
[0038] This application provides a signal routing structure, which includes four layers: a top layer, a bottom layer, and two differential signal routing layers. The top and bottom layers are both ground reference layers. One and two traces are respectively provided in the two differential signal routing layers. By providing one and two traces in the two differential signal routing layers, the positions of the traces in the same or different layers, as well as the spacing between the traces, can be flexibly adjusted. This allows for flexible adjustment of the trace impedance and the differential impedance of the differential signal trace pairs, ensuring they meet certain impedance requirements and thus improving the signal transmission quality of the signal routing structure.
[0039] The specific implementation of the embodiments of this application will be further described below with reference to the accompanying drawings.
[0040] It should be noted that, for ease of description, in the various embodiments of this application, the three traces included in the differential signal trace structure are referred to as trace a, trace b, and trace c. The three traces can form three sets of differential signal trace pairs, represented as: differential signal trace pair ab formed by trace a and trace b (ab pair for short), differential signal trace pair bc formed by trace b and trace c (bc pair for short), and differential signal trace pair ac formed by trace a and trace c (ac pair for short).
[0041] Figure 2A is a schematic diagram of a signal trace structure provided in an embodiment of this application. Figure 2B is a cross-sectional view of the signal trace structure shown in Figure 2A. Figure 2C is a schematic diagram of a principle of trace impedance in the signal trace structure shown in Figure 2A. Figure 2D is a schematic diagram of another principle of trace impedance in the signal trace structure shown in Figure 2A. Figure 3A is a schematic diagram of another structure of the signal trace structure provided in an embodiment of this application. Figure 3B is a cross-sectional view of the signal trace structure shown in Figure 3A.
[0042] As shown in Figures 2A to 2D and Figures 3A to 3B, the signal routing structure provided in this embodiment includes a top layer 11, a bottom layer 12, and two differential signal routing layers 13 disposed between the top layer and the bottom layer. Both the top layer 11 and the bottom layer 12 are ground reference layers.
[0043] In the two differential signal routing layers 13, one routing line and two routing lines are respectively set. Any two of the one routing line and two routing lines form a differential signal routing pair.
[0044] The signal routing structure provided in this embodiment is a four-layer structure, with two differential signal routing layers 13 disposed between the top layer 11 and the bottom layer 12. One differential signal routing layer 13 contains one trace, and the other contains two traces. Since the three traces in the differential signal routing structure are distributed across two differential signal routing layers 13, compared to having three traces located in the same differential signal routing layer, the signal routing structure provided in this embodiment makes it easier to adjust the relative positions and spacing between the three traces. The impedance of a single trace is at least related to the spacing between the trace and the ground terminal, and the differential impedance of a differential signal routing pair is at least related to the spacing between the two traces in the differential signal routing pair. Therefore, by flexibly setting the positions of the three traces in the differential signal routing layers, the spacing between the traces can be flexibly adjusted, ensuring that the impedance of the traces and the differential impedance of the differential signal routing pair meet preset impedance requirements, thus improving the signal transmission quality of the signal routing structure.
[0045] The differential signal routing structure provided in this application embodiment can form part of a printed circuit board (PCB), and the PCB may include one or more differential signal routing structures.
[0046] Optionally, in one implementation, as shown in Figures 2A and 2B, the differential signal routing structure includes a top layer 11, a bottom layer 12, a differential signal routing layer 131, and a differential signal routing layer 132. The differential signal routing layer 131 contains one trace, namely trace a. The differential signal routing layer 132 contains two traces, namely trace b and trace c.
[0047] In this implementation, the differential signal routing layer 131 with one trace is located above the differential signal routing layer 132 with two traces.
[0048] Optionally, in another implementation, as shown in Figures 3A and 3B, the differential signal routing structure includes a top layer 11, a bottom layer 12, a differential signal routing layer 131, and a differential signal routing layer 132. The differential signal routing layer 131 contains two traces, namely trace b and trace c. The differential signal routing layer 132 contains one trace, namely trace a.
[0049] In this implementation, the differential signal routing layer 131 with two traces is located above the differential signal routing layer 132 with one trace.
[0050] The traces have attribute parameters, including but not limited to the material used, width, and metal thickness. The material used is a conductive metallic material, such as copper. As shown in Figure 2C, the width of the trace is denoted as W, and the widths of traces a, b, and c are denoted as Wa, Wb, and Wc, respectively. The metal thickness of the trace is denoted as T, and the metal thicknesses of traces a, b, and c are denoted as Ta, Tb, and Tc, respectively.
[0051] This embodiment does not limit the attribute parameters of the traces. The attribute parameters of different traces can be the same or different.
[0052] Optionally, in order to simplify the implementation of signal trace structures and improve structural uniformity, the dimensional parameters of two traces located in the same differential signal trace layer are set to be the same, that is, the width and metal thickness of two traces located in the same differential signal trace layer are the same.
[0053] Optionally, in order to further simplify the implementation of the signal trace structure and improve the uniformity of the structure, the dimensional parameters of the three traces in the differential signal trace structure are set to be the same, that is, the width and metal thickness of the three traces are the same.
[0054] In this embodiment, the differential signal trace structure includes a dielectric layer, which comprises a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is located between the top layer and the adjacent differential signal trace layer, the second dielectric layer is located between the bottom layer and the adjacent differential signal trace layer, and the third dielectric layer is located between two differential signal trace layers. For example, as shown in Figures 2A-2B and 3A-3B, the portion located between the top layer 11 and the differential signal trace layer 131 is called the first dielectric layer 141, the portion located between the differential signal trace layer 131 and the differential signal trace layer 132 is called the third dielectric layer 142, and the portion located between the differential signal trace layer 132 and the bottom layer 12 is called the second dielectric layer 143.
[0055] This embodiment does not limit the dielectric materials and dimensional parameters used for different dielectric layers. Dimensional parameters include, but are not limited to, the thickness and dielectric constant of the dielectric. For example, as shown in Figure 2B, the dielectric materials used for the first dielectric layer 141, the third dielectric layer 142, and the second dielectric layer 143 can be the same or different. When the dielectric materials used are the same, the corresponding dielectric constants are the same. As shown in Figure 2C, the dielectric constant of the dielectric is denoted as e, and the dielectric constants of the first dielectric layer 141, the third dielectric layer 142, and the second dielectric layer 143 are denoted as e1, e2, and e3, respectively. The thickness of the dielectric is denoted as H, and the thicknesses of the first dielectric layer 141, the third dielectric layer 142, and the second dielectric layer 143 are denoted as H1, H2, and H3, respectively.
[0056] Optionally, in order to simplify the implementation of signal trace structures and improve structural uniformity, the dielectric layer of the signal trace structures can use the same dielectric material.
[0057] Optionally, to simplify the implementation of the signal trace structure and improve structural uniformity, the dielectric layers of the signal trace structure can adopt a symmetrical structure, that is, as shown in Figure 2B, the first dielectric layer 141 and the second dielectric layer 143 use the same dielectric material and thickness. The dielectric material and thickness of the third dielectric layer 142 can be the same as or different from the first dielectric layer 141 and the second dielectric layer 143.
[0058] The factors affecting the impedance of a single trace and the factors affecting the differential impedance of a differential signal trace pair are explained below with reference to Figure 2C.
[0059] Specifically, the impedance of a single trace is related to the trace width, the trace metal thickness, and the thickness and dielectric constant of the dielectric layer in the differential signal trace structure. By setting and adjusting the above parameters, the impedance difference among the three traces in the differential signal trace structure is made less than a first preset difference; and / or, by setting and adjusting the above parameters, the impedance of each trace in the differential signal trace structure is made within a first preset impedance range.
[0060] For example, as shown in Figure 2C, for trace a, the impedance of trace a is related to the width Wa of trace a, the metal thickness Ta of trace a, and the thickness and dielectric constant of the dielectric layer in the differential signal trace structure. The dielectric layer includes at least the dielectric layer between the trace a and the ground reference layer, i.e., the first dielectric layer 141. Therefore, the impedance of trace a is related to the width Wa of trace a, the metal thickness Ta of trace a, the thickness H1 of the first dielectric layer 141, and the dielectric constant e1 of the first dielectric layer 141. Optionally, the impedance of trace a may also be related to the thickness and dielectric constant of other dielectric layers, such as the third dielectric layer 142 and the second dielectric layer 143.
[0061] Similarly, for trace b, the impedance of trace b is related to the width Wb of trace b, the metal thickness Tb of trace b, and the thickness and dielectric constant of the dielectric layer in the differential signal trace structure. The dielectric layer includes at least the dielectric layer between the trace b and the ground reference layer, i.e., the second dielectric layer 143. Therefore, the impedance of trace b is related to the width Wb of trace b, the metal thickness Tb of trace b, the thickness H3 of the second dielectric layer 143, and the dielectric constant e3 of the second dielectric layer 143. Optionally, the impedance of trace b is also related to the thickness and dielectric constant of other dielectric layers, such as the first dielectric layer 141 and the third dielectric layer 142.
[0062] It should be noted that this embodiment does not limit the value of the first preset difference. It can be understood that the smaller the first preset difference is set, the smaller the difference in impedance between the three traces, the closer the impedances of the three traces are to being equal, the more balanced the impedances are, and the better the quality of data transmission of the signal trace structure.
[0063] The first preset impedance range can be found in the description above, and will not be repeated here.
[0064] Specifically, the differential impedance of the differential signal trace pair includes a first trace and a second trace. The differential impedance of the differential signal trace pair is related to the width and metal thickness of the first trace, the width and metal thickness of the second trace, the spacing between the first and second traces, and the dielectric constant of the dielectric layer in the differential signal trace structure. By setting and adjusting the above parameters, the difference in differential impedance between different sets of differential signal trace pairs in the differential signal trace structure is made less than a second preset difference; and / or, by setting and adjusting the above parameters, the differential impedance of the differential signal trace pairs in the differential signal trace structure is within the second preset impedance range.
[0065] For example, as shown in Figure 2C, for a differential signal trace pair ab formed by traces a and b, the first trace is trace a and the second trace is trace b, or vice versa. The differential impedance of the differential signal trace pair ab is related to the following parameters: the width Wa of trace a, the metal thickness Ta of trace a, the width Wb of trace b, the metal thickness Tb of trace b, the spacing Sab between traces a and b, and the dielectric constant of the dielectric layer in the differential signal trace structure. The dielectric layer includes at least the dielectric layer between the differential signal trace layer containing trace a and the differential signal trace layer containing trace b, i.e., the third dielectric layer 142. The differential impedance of the differential signal trace pair ab is related to the dielectric constant e2 of the third dielectric layer 142. In this example, traces a and b in the differential signal trace pair ab are located on different differential signal trace layers, therefore the spacing between the two differential signal trace layers needs to be set and adjusted.
[0066] Similarly, as shown in Figure 2C, for the differential signal trace pair bc formed by traces c and b, the first trace is trace c and the second trace is trace b, or vice versa. The differential impedance of the differential signal trace pair bc is related to the following parameters: the width Wc of trace c, the metal thickness Tc of trace c, the width Wb of trace b, the metal thickness Tb of trace b, the spacing Sbc between traces c and b, and the dielectric constant of the dielectric layer in the differential signal trace structure. In this example, traces c and b in the differential signal trace pair bc are located in the same differential signal trace layer, therefore, it is necessary to set and adjust the spacing between different traces in the same differential signal trace layer.
[0067] The second preset impedance range can be found in the description above, and will not be repeated here.
[0068] Optionally, to simplify the implementation of signal routing structures and improve structural uniformity, in a differential signal routing structure, the spacing between one trace in one differential signal routing layer and the spacing between two traces in another differential signal routing layer are the same. In this case, the three traces in the differential signal routing structure can form an isosceles triangle, ensuring that the impedance of the traces and the differential impedance of the differential signal trace pairs meet preset impedance requirements, thus improving the signal transmission quality of the signal routing structure.
[0069] For example, Figure 2D is another schematic diagram of the trace impedance in the signal trace structure shown in Figure 2A. As shown in Figure 2D, trace a is located in differential signal trace layer 131, and traces b and c are located in differential signal trace layer 132. The widths of traces a, b, and c are all the same, W. The metal thicknesses of traces a, b, and c are all the same, T. The spacing between trace a and traces b and c is the same, S1.
[0070] In this example, setting some parameters of the three traces in the signal trace structure to be the same further simplifies the implementation of the signal trace structure and improves the uniformity of the structure. Moreover, by setting and adjusting the trace width and metal thickness, dielectric layer thickness and dielectric constant, the impedances of traces a, b, and c can be made approximately the same, around 50 ohms. This also makes the differential impedances of the three differential signal trace pairs formed by traces a, b, and c approximately the same, around 100 ohms, thereby improving the data transmission quality of the signal trace structure.
[0071] Based on the embodiments shown in Figures 2A-2D and 3A-3B, this application also provides a signal routing structure. In this embodiment, the differential signal routing layer further includes a ground line, which may be distributed on at least one side of the routing lines in the differential signal routing layer.
[0072] Figure 4A is a schematic diagram of another signal trace structure provided in an embodiment of this application. Figure 4B is a cross-sectional view of the signal trace structure shown in Figure 4A. Figure 4C is a schematic diagram of one principle of trace impedance in the signal trace structure shown in Figure 4A. Figure 4D is another schematic diagram of the principle of trace impedance in the signal trace structure shown in Figure 4A. Figure 4E is yet another schematic diagram of the principle of trace impedance in the signal trace structure shown in Figure 4A. Figure 5A is a schematic diagram of another signal trace structure provided in an embodiment of this application. Figure 5B is a cross-sectional view of the signal trace structure shown in Figure 5A.
[0073] As shown in Figures 4A to 4E and Figures 5A to 5B, the signal routing structure provided in this embodiment includes M ground lines 21 in the differential signal routing layer, where M is a positive integer.
[0074] For the three traces in the differential signal trace structure, a ground line 21 is provided on the left and / or right sides of the trace.
[0075] For example, in Figure 4A, the signal routing structure from top to bottom includes: a top layer 11, a first dielectric layer 141, a differential signal routing layer 131, a third dielectric layer 142, a second dielectric layer 143, and a bottom layer 12. The differential signal routing layer 131 includes two ground lines 21, located on the left and right sides of routing a, respectively. The differential signal routing layer 132 includes three ground lines 21; ground lines are located on the left and right sides of routing b and routing c. Furthermore, a ground line is located between routing b and routing c.
[0076] The structural difference between Figure 5A and Figure 4A is that the upper and lower layer relationships of the differential signal trace layers with one trace and with two traces are different.
[0077] The structural difference between Figure 4E and Figure 4A is that in Figure 4E, the differential signal trace layer 132 includes two ground lines 21. A ground line is provided on the left side of trace b, and a ground line is provided on the right side of trace c. There is no ground line between trace b and trace c.
[0078] By setting a ground wire, electromagnetic shielding can be formed on the traces in the differential signal trace layer, protecting the traces to work normally and thus improving the quality of data transmission in the signal trace structure.
[0079] The signal routing structure provided in this embodiment is a four-layer differential signal routing structure, with two differential signal routing layers between the top and bottom layers. One differential signal routing layer contains one trace, and the other contains two traces. Furthermore, a ground wire is included in each differential signal routing layer to provide electromagnetic shielding and protect the traces for normal operation. Since the three traces in the differential signal routing structure are distributed across the two differential signal routing layers, they can form a triangular shape, making it easier to adjust their relative positions and spacing. The impedance of a single trace is at least related to the spacing between the trace and the ground terminal, and the differential impedance of a differential signal routing pair is at least related to the spacing between the two traces in the pair. Therefore, by flexibly setting the positions of the three traces in the differential signal routing layers, the spacing between the traces can be flexibly adjusted, ensuring that the impedance of the traces and the differential impedance of the differential signal routing pair meet preset impedance requirements, thus improving the signal transmission quality of the signal routing structure.
[0080] It should be noted that this embodiment does not limit the value of the spacing between the trace and the ground line. For example, in Figure 4C, the differential signal trace layer 131 includes two ground lines, GND11 and GND12, located on the left and right sides of trace a, respectively. The spacing between trace a and the left-side GND11 is GAP11, and the spacing between trace a and the right-side GND12 is GAP12. The values of GAP11 and GAP12 can be the same or different.
[0081] Similarly, the differential signal trace layer 132 includes three ground lines: GND21, GND22, and GND23. GND21 is located to the left of trace b, GND22 is located between trace b and trace c, and GND23 is located to the right of trace c. The spacing between trace b and the left-side GND21 is GAP21, and the spacing between trace b and the right-side GND22 is GAP22. The values of GAP21 and GAP22 can be the same or different. The spacing between trace c and the left-side GND22 is GAP23, and the spacing between trace c and the right-side GND22 is GAP24. The values of GAP23 and GAP24 can be the same or different.
[0082] Optionally, in order to simplify the implementation of the signal routing structure and improve the uniformity of the structure, if ground wires are provided on both the left and right sides of the routing, the spacing between the routing and the ground wires on the left and right sides shall be the same.
[0083] For example, in Figure 4C, for trace a, the values of GAP11 and GAP12 are the same. For trace b, the values of GAP21 and GAP22 are the same. For trace c, the values of GAP23 and GAP24 are the same.
[0084] The factors affecting the impedance of a single trace and the factors affecting the differential impedance of a differential signal trace pair will be explained below with reference to Figure 4C.
[0085] Specifically, the impedance of a single trace is related to the trace width, the trace metal thickness, the thickness and dielectric constant of the dielectric layer in the differential signal trace structure, and the spacing between the traces and the ground lines placed on their left and / or right sides. By setting and adjusting the above parameters, the impedance difference among the three traces in the differential signal trace structure is made less than a first preset difference; and / or, by setting and adjusting the above parameters, the impedance of each trace in the differential signal trace structure is made to be within the first preset impedance range.
[0086] The first preset difference and the first preset impedance range can be found in the description above, and will not be repeated here.
[0087] It is understandable that the smaller the first preset difference is set, the smaller the difference in impedance between the three traces, the closer the impedances of the three traces are to being equal, the more balanced the impedances are, and the better the quality of data transmission from the signal trace structure.
[0088] For example, as shown in Figure 4C, for trace a, the impedance of trace a is related to the width Wa of trace a, the metal thickness Ta of trace a, the thickness and dielectric constant of the dielectric layer in the differential signal trace structure, the spacing GAP11 between trace a and the left ground line, and the spacing GAP12 between trace a and the right ground line. The dielectric layer includes at least the dielectric layer between the trace a and the ground reference layer closest to it, i.e., the first dielectric layer 141. The impedance of trace a is related to the thickness H1 of dielectric layer 141 and the dielectric constant e1 of the first dielectric layer 141. Optionally, the impedance of trace a may also be related to the thickness and dielectric constant of other dielectric layers, such as the third dielectric layer 142 and the second dielectric layer 143.
[0089] Similarly, for trace b, the impedance of trace b is related to the width Wb of trace b, the metal thickness Tb of trace b, the thickness and dielectric constant of the dielectric layer in the differential signal trace structure, the spacing GAP21 between trace b and the left ground line, and the spacing GAP22 between trace b and the right ground line. The dielectric layer includes at least the dielectric layer between the trace b and the ground reference layer closest to it, i.e., the second dielectric layer 143. The impedance of trace b is related to the thickness H3 of dielectric layer 143 and the dielectric constant e3 of the second dielectric layer 143. Optionally, the impedance of trace b may also be related to the thickness and dielectric constant of other dielectric layers, such as the first dielectric layer 141 and the third dielectric layer 142.
[0090] Specifically, the differential impedance of the differential signal trace pair includes a first trace and a second trace. The differential impedance of the differential signal trace pair is related to the width and metal thickness of the first trace, the width and metal thickness of the second trace, the spacing between the first trace and the second trace, and the dielectric constant of the dielectric layer in the differential signal trace structure.
[0091] Please refer to the relevant descriptions in the embodiments shown in Figures 2A to 2D and Figures 3A to 3B, which will not be repeated here.
[0092] For example, Figure 4D is another schematic diagram of the trace impedance in the signal trace structure shown in Figure 4A. As shown in Figure 4D, trace a is located in differential signal trace layer 131, and traces b and c are located in differential signal trace layer 132. Trace a, trace b, and trace c have the same width, W. Trace a, trace b, and trace c have the same metal thickness, T. The spacing between trace a and traces b and c is the same, S1. The spacing between trace a and the ground lines on both sides is equal, GAP1. The spacing between trace b and the ground lines on both sides is equal, GAP2. The spacing between trace c and the ground lines on both sides is equal, GAP3. Optionally, GAP2 and GAP3 have the same value.
[0093] In this example, setting some parameters of the three traces in the signal trace structure to be the same further simplifies the implementation of the signal trace structure and improves the uniformity of the structure. Moreover, by setting and adjusting the trace width and metal thickness, dielectric layer thickness and dielectric constant, the impedances of traces a, b, and c can be made approximately the same, around 50 ohms. This also makes the differential impedances of the three differential signal trace pairs formed by traces a, b, and c approximately the same, around 100 ohms, thereby improving the data transmission quality of the signal trace structure.
[0094] Based on the above embodiments, this application also relates to space-constrained scenarios for signal trace structures. In this scenario, due to space constraints, it is necessary to further reduce the size of the signal trace structure. According to the description of the factors affecting the impedance of a single trace and the factors affecting the differential impedance of a differential signal trace pair, at least one parameter can be reduced simultaneously to ensure that the impedance of the trace and the differential impedance of the differential signal trace pair meet preset impedance requirements. For example, for three traces in a signal trace structure, the distance between each pair of traces can be reduced simultaneously. For example, in the scenario shown in Figure 2C, Sab, Sbc, and Sac can be reduced simultaneously; in the scenario shown in Figure 2D, S1 and S2 can be reduced simultaneously.
[0095] This application also provides an electronic device. For example, as shown in FIG1, the electronic device may include a signal routing structure 100 and a processor 200. Optionally, the electronic device may further include memory, a communication bus, and a communication interface.
[0096] The components include: processor, memory, and communication interface, which communicate with each other via a communication bus.
[0097] A communication interface is used to communicate with other electronic devices or servers.
[0098] A program may include program code, which includes computer operation instructions.
[0099] A processor is used to execute programs.
[0100] The processor may be a central processing unit (CPU), an application-specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of this application. The one or more processors included in the smart device may be processors of the same type, such as one or more CPUs; or they may be processors of different types, such as one or more CPUs and one or more ASICs.
[0101] Memory is used to store programs. Memory may include high-speed RAM, and may also include non-volatile memory, such as at least one disk drive.
[0102] It should be noted that, depending on the implementation needs, the various components / steps described in the embodiments of this application can be broken down into more components / steps, or two or more components / steps or parts of the operation of components / steps can be combined into new components / steps to achieve the purpose of the embodiments of this application.
[0103] Those skilled in the art will recognize that the units and method steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the embodiments of this application.
[0104] The above embodiments are only used to illustrate the embodiments of this application, and are not intended to limit the embodiments of this application. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the embodiments of this application. Therefore, all equivalent technical solutions also fall within the scope of the embodiments of this application, and the patent protection scope of the embodiments of this application should be defined by the claims.
Claims
1. A signal routing structure, characterized in that, include: The system comprises a top layer, a bottom layer, and two differential signal routing layers disposed between the top layer and the bottom layer, wherein both the top layer and the bottom layer are ground reference layers. The two differential signal routing layers are respectively provided with one routing line and two routing lines, and any two of the one routing line and the two routing lines form a differential signal routing line pair.
2. The signal trace structure according to claim 1, characterized in that, The impedance difference between the one trace and the two traces is less than the first preset difference. The impedance of the trace is related to the width of the trace, the metal thickness of the trace, the thickness of the dielectric layer, and the dielectric constant of the dielectric layer. The dielectric layer includes a first dielectric layer disposed between the top layer and the adjacent differential signal trace layer, a second dielectric layer disposed between the bottom layer and the adjacent differential signal trace layer, and a third dielectric layer disposed between the two differential signal trace layers.
3. The signal trace structure according to claim 1, characterized in that, The difference in differential impedance between the different sets of differential signal trace pairs formed by the one trace and the two traces is less than the second preset difference. The differential signal trace pair includes a first trace and a second trace. The differential impedance of the differential signal trace pair is related to the width and metal thickness of the first trace, the width and metal thickness of the second trace, the spacing between the first trace and the second trace, and the dielectric constant of the dielectric layer. The dielectric layer includes a first dielectric layer disposed between the top layer and the adjacent differential signal trace layer, a second dielectric layer disposed between the bottom layer and the adjacent differential signal trace layer, and a third dielectric layer disposed between the two differential signal trace layers.
4. The signal trace structure according to any one of claims 1-3, characterized in that, The two traces have the same width and metal thickness.
5. The signal trace structure according to any one of claims 1-3, characterized in that, The spacing between each of the two traces is the same.
6. The signal trace structure according to any one of claims 1-3, characterized in that, The differential signal routing layer also includes M ground lines, where M is a positive integer; For the one or two traces, a ground wire is provided on the left and / or right side of the trace.
7. The signal trace structure according to claim 6, characterized in that, The impedance difference between the one trace and the two traces is less than the first preset difference. The impedance of the trace is related to the width of the trace, the metal thickness of the trace, the thickness of the dielectric layer, the dielectric constant of the dielectric layer, and the spacing between the trace and the ground line disposed on the left and / or right side of the trace. The dielectric layer includes a first dielectric layer disposed between the top layer and the adjacent differential signal trace layer, a second dielectric layer disposed between the bottom layer and the adjacent differential signal trace layer, and a third dielectric layer disposed between the two differential signal trace layers.
8. The signal trace structure according to claim 6, characterized in that, For the single trace and the two traces, ground wires are provided on both the left and right sides of the trace, and the spacing between the trace and the ground wires on the left and right sides is the same.
9. A MIPI interface, characterized in that, include: The signal routing structure as described in any one of claims 1-8.
10. An electronic device, characterized in that, include: The signal routing structure as described in any one of claims 1-8, or including the MIPI interface as described in claim 9.