Image sensor structure

Abstract

An image sensor structure, comprising: pixel units, a peripheral circuit, and auxiliary capacitor modules, wherein the peripheral circuit comprises a transfer transistor, a reset transistor, a source follower, and a row selection transistor; each pixel unit comprises a photodiode and a floating diffusion node; the photodiodes and the floating diffusion nodes are all located in a substrate; the transfer transistor is fixed onto an upper surface of the substrate and is provided directly facing a position between the photodiodes and the floating diffusion nodes; each photodiode is connected to the corresponding floating diffusion node by means of the transfer transistor; the other end of each floating diffusion node is connected to a source of the reset transistor and a gate of the source follower; a drain of the source follower and a drain of the reset transistor are both connected to a bias voltage VDD, a source of the source follower is connected to a drain of the row selection transistor, and a source of the row selection transistor serves as a column-level output of a signal; and each floating diffusion node is connected to an auxiliary capacitor module in parallel; and a control unit integrated in the peripheral circuit. By dynamically adjusting the capacity of floating diffusion nodes, blooming is reduced and a dynamic range is improved.

Description

Image sensor structure Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an image sensor structure. Background Technology

[0002] Please refer to Figure 1. In the traditional 4T pixel structure (including the transmission transistor TG, reset transistor RST, source follower SF, and row select transistor RS), the charge capacity of the FD node is limited by the area and process technology, making it difficult to meet the requirements of high dynamic range.

[0003] Please refer to Figure 2. As the pixel size of image sensors continues to shrink, in strong light or high-sensitivity scenes, the insufficient charge capacity of floating diffusion nodes (FD) can easily cause photoelectrons to overflow into adjacent pixel areas, resulting in a blooming phenomenon.

[0004] To address the aforementioned issues, a novel image sensor structure is required. Summary of the Invention

[0005] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide an image sensor structure to solve the problem that, as the size of image sensors continues to decrease, the floating diffusion area capacity is insufficient and photoelectrons overflow during daily shooting under high light sensitivity, thus affecting the quality of the surrounding image.

[0006] To achieve the above and other related objectives, the present invention provides an image sensor structure, comprising:

[0007] Pixel unit, peripheral circuit and auxiliary capacitor module;

[0008] The peripheral circuitry includes a transmission transistor, a reset transistor, a source follower, and a row select transistor.

[0009] The pixel unit includes a photodiode and a floating diffusion node;

[0010] Both the photodiode and the floating diffusion node are located in the substrate, and the transmission tube is fixed to the upper surface of the substrate, directly between the photodiode and the floating diffusion node;

[0011] The photodiode is connected to the floating diffusion node through the transmission tube, and the other end of the floating diffusion node is connected to the source of the reset tube and the gate of the source follower.

[0012] The drains of the source follower and the reset transistor are both connected to the bias voltage VDD. The source of the source follower is connected to the drain of the row select transistor, and the source of the row select transistor is the column-level output of the signal.

[0013] Each of the aforementioned floating diffusion nodes is connected in parallel with one of the aforementioned auxiliary capacitor modules;

[0014] The control unit integrated into the peripheral circuit is configured to monitor the charge level of the floating diffusion node and control the connection status of the auxiliary capacitor module.

[0015] Preferably, shallow trench isolation is formed on the substrate to define an active region, and the pixel unit is located on the active region.

[0016] Preferably, the shallow trench isolation forms a shallow trench isolation structure between adjacent sensor pixel units to prevent crosstalk between adjacent pixel units.

[0017] Preferably, the substrate is P-type doped.

[0018] Preferably, the floating diffusion node is an N-type heavily doped region.

[0019] Preferably, the photodiode is composed of a top-to-bottom surface P-type heavily doped region, an N-type buried layer as a charge collection region, and the substrate.

[0020] Preferably, the reset transistor, the source follower, and the row select transistor are all implemented using NMOS transistors.

[0021] Preferably, the auxiliary capacitor module is a MIM capacitor or a MOM capacitor.

[0022] Preferably, the auxiliary capacitor module is connected in series with a switch structure, and both are connected in parallel with the floating diffusion node. The switch structure is used to control whether the auxiliary capacitor module is connected in parallel with the floating diffusion node.

[0023] Preferably, when the number of photoelectrons in the floating diffusion node is greater than 80% of its capacity, the switch structure is turned on, and the auxiliary capacitor module is connected in parallel with the floating diffusion node.

[0024] As described above, the image sensor structure of the present invention has the following beneficial effects:

[0025] This invention reduces haloing and improves dynamic range by dynamically adjusting the capacity of floating diffusion nodes; the capacitor module reuses the back metal layer, eliminating the need for additional masking steps and reducing manufacturing costs; it is suitable for small pixel size designs, balancing high resolution and high photosensitivity. Attached Figure Description

[0026] Figure 1 shows a schematic diagram of an image sensor structure in the prior art;

[0027] Figure 2 shows a schematic diagram of how insufficient charge capacity of the existing floating diffusion node (FD) can easily lead to photoelectron overflow into adjacent pixel areas.

[0028] Figure 3 shows a schematic diagram of the image sensor circuit structure of the present invention;

[0029] Figure 4 shows a schematic diagram of the image sensor device structure of the present invention. Detailed Implementation

[0030] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0031] Please refer to Figures 3 and 4. This invention provides an image sensor structure, including:

[0032] Pixel unit, peripheral circuit and auxiliary capacitor module;

[0033] The peripheral circuitry includes a transmission transistor, a reset transistor, a source follower, and a row select transistor. All of the reset transistor, source follower, and row select transistor are implemented using NMOS transistors.

[0034] Pixel units include photodiodes and floating diffusion nodes;

[0035] Both the photodiode and the floating diffusion node are located in the substrate, and the transmission tube is fixed on the upper surface of the substrate, directly opposite the photodiode and the floating diffusion node;

[0036] In some embodiments, the substrate is a P-type doped silicon substrate, and the floating diffusion node is an N-type heavily doped region. The photodiode is composed of a surface P-type heavily doped region (P+), an N-type buried layer (N), and a substrate from top to bottom, forming a PIN structure to improve charge collection efficiency.

[0037] In some embodiments, a shallow trench isolation structure is formed on the substrate using a shallow trench isolation (STI) process to define the active region of the pixel unit and prevent crosstalk between adjacent pixels.

[0038] The photodiode is connected to the floating diffusion node through the transmission tube, and the other end of the floating diffusion node is connected to the source of the reset tube and the gate of the source follower.

[0039] The drains of both the source follower and the reset transistor are connected to the bias voltage VDD. The source of the source follower is connected to the drain of the row select transistor, and the source of the row select transistor is the column output of the signal.

[0040] Each floating diffusion node is connected in parallel with an auxiliary capacitor module;

[0041] The auxiliary capacitor module can be dynamically connected when the FD charge is close to saturation. By expanding the total capacitance of the FD, it significantly reduces photoelectron overflow, thereby suppressing the halo phenomenon and improving the dynamic range.

[0042] In some embodiments, the auxiliary capacitor module can be a MIM (metal-insulator-metal) capacitor or a MOM (metal-oxide-metal) capacitor. The capacitor module reuses the back-end metal layers, eliminating the need for additional masking steps and reducing manufacturing costs. MIM capacitors are formed by depositing high-dielectric-constant materials (such as HfO₂ or Al₂O₃) between the back-end metal layers; MOM capacitors utilize the edge capacitance effect between multiple metal layers.

[0043] The control unit, integrated into the peripheral circuitry, monitors the charge level of the floating diffusion node and controls the connection status of the auxiliary capacitor module according to a preset threshold (e.g., 80% of the FD capacity). The control unit includes a charge detection circuit and a logic switching circuit. When the detected charge exceeds the threshold, it outputs a control signal to close the series switch of the auxiliary capacitor, thereby expanding the capacity.

[0044] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0045] In summary, this invention reduces halo effects and improves dynamic range by dynamically adjusting the capacity of floating diffusion nodes; the capacitor module reuses the back-end metal layer, eliminating the need for additional masking steps and reducing manufacturing costs; it is suitable for small pixel size designs, balancing high resolution and high photosensitivity. Therefore, this invention effectively overcomes the various shortcomings of existing technologies and has high industrial applicability.

[0046] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. An image sensor structure, characterized by, include: Pixel unit, peripheral circuit and auxiliary capacitor module; The peripheral circuitry includes a transmission transistor, a reset transistor, a source follower, and a row select transistor. The pixel unit includes a photodiode and a floating diffusion node; Both the photodiode and the floating diffusion node are located in the substrate, and the transmission tube is fixed to the upper surface of the substrate, directly between the photodiode and the floating diffusion node; The photodiode is connected to the floating diffusion node through the transmission tube, and the other end of the floating diffusion node is connected to the source of the reset tube and the gate of the source follower. The drains of the source follower and the reset transistor are both connected to the bias voltage VDD. The source of the source follower is connected to the drain of the row select transistor, and the source of the row select transistor is the column-level output of the signal. Each of the aforementioned floating diffusion nodes is connected in parallel with one of the aforementioned auxiliary capacitor modules; The control unit integrated into the peripheral circuit is configured to monitor the charge level of the floating diffusion node and control the connection status of the auxiliary capacitor module.

2. The image sensor structure of claim 1, wherein: Shallow trench isolation is formed on the substrate to define an active region, and the pixel unit is located on the active region.

3. The image sensor structure of claim 2, wherein: The shallow trench isolation creates a shallow trench isolation structure between adjacent sensor pixel units, preventing crosstalk between adjacent pixel units.

4. The image sensor structure of claim 1, wherein: The substrate is P-type doped.

5. The image sensor structure of claim 4, wherein: The floating diffusion node is an N-type heavily doped region.

6. The image sensor structure according to claim 5, characterized in that: The photodiode is composed of a P-type heavily doped region on the surface, an N-type buried layer as a charge collection region, and the substrate, from top to bottom.

7. The image sensor structure according to claim 1, characterized in that: The reset transistor, the source follower, and the row select transistor are all implemented using NMOS transistors.

8. The image sensor structure according to claim 1, characterized in that: The auxiliary capacitor module is a MIM capacitor or a MOM capacitor.

9. The image sensor structure according to claim 1, characterized in that: The auxiliary capacitor module is connected in series with a switch structure, and both are connected in parallel with the floating diffusion node. The switch structure is used to control whether the auxiliary capacitor module is connected in parallel with the floating diffusion node.

10. The image sensor structure according to claim 9, characterized in that: When the number of photoelectrons in the floating diffusion node is greater than 80% of its capacity, the switch structure is turned on, and the auxiliary capacitor module is connected in parallel with the floating diffusion node.

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