Inverter and control method therefor

Abstract

An inverter and a control method therefor. The inverter comprises: at least one Buck circuit, wherein an output terminal of the Buck circuit is connected to a DC bus; a buck-boost DC-AC conversion circuit, which is connected to the DC bus, and is used for performing step-up or step-down inversion on the basis of the voltage of the DC bus and an output voltage of the inverter; and a control circuit, which is connected to the Buck circuit and the DC-AC conversion circuit, and is used for controlling the Buck circuit and the DC-AC conversion circuit, wherein the control circuit controls the Buck circuit to achieve a controlled upper limit of the voltage of the DC bus.

Description

Inverters and their control methods

[0001] Related applications

[0002] This application claims priority to Chinese patent application filed on April 16, 2025, with application number 202510483838.9 and entitled "Inverter and Control Method Thereof", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of power electronics technology, and in particular to an inverter and its control method. Background Technology

[0004] Due to the renewable and clean nature of solar energy, photovoltaic (PV) power generation technology has developed rapidly. Inverters, as power devices that can convert direct current (DC) to alternating current (AC), are widely used in PV power generation systems. A typical inverter consists of a front-end boost circuit and a rear-end buck DC-AC converter circuit. The boost circuit first increases the DC voltage supplied by the input PV module, which is then converted to AC voltage by the rear-end buck DC-AC converter circuit. However, when the PV module is affected by high temperatures and its output voltage decreases, the boost ratio of the boost circuit increases, leading to increased losses, decreased efficiency, and higher system heat dissipation requirements. Furthermore, due to the diode effect of the boost circuit, the PV module is connected to the DC bus capacitor. Therefore, the withstand voltage of the DC-side components in the rear-end DC-AC converter circuit needs to be designed based on the open-circuit voltage of the PV module, resulting in higher component selection costs. Summary of the Invention

[0005] According to various embodiments of this application, an inverter and its control method are provided.

[0006] In a first aspect, embodiments of this application propose an inverter, comprising:

[0007] At least one Buck circuit, the output of which is connected to a DC bus;

[0008] A step-up / step-down DC-AC converter circuit is connected to the DC bus and is used to perform step-up or step-down inversion based on the voltage of the DC bus and the output voltage of the inverter.

[0009] A control circuit, connected to the Buck circuit and the DC-AC conversion circuit, is used to control the Buck circuit and the DC-AC conversion circuit, wherein the control circuit controls the Buck circuit to achieve control over the upper limit of the DC bus voltage.

[0010] In some embodiments, the control circuit provides a first control quantity and a second control quantity to control the Buck circuit and the DC-AC conversion circuit, respectively.

[0011] In some embodiments, when the voltage gain of the DC-AC conversion circuit is greater than 1, the control circuit adjusts the second control quantity to control the DC-AC conversion circuit to achieve voltage boost.

[0012] In some embodiments, the control circuit includes a voltage limiting loop that provides a first duty cycle signal to limit the output voltage of the Buck circuit to no more than a preset value.

[0013] In some embodiments, the control circuit further includes:

[0014] The first MPPT control loop provides a second duty cycle signal for controlling the Buck circuit to perform maximum power point tracking.

[0015] The selection unit selects the minimum value between the first duty cycle signal and the second duty cycle signal as the first control quantity.

[0016] In some embodiments, the control circuit further includes:

[0017] The second MPPT control loop provides a control command for controlling the DC-AC conversion circuit to perform maximum power point tracking.

[0018] The predictive control module is used to calculate the second control quantity based on the control command, the electrical parameters of the inverter, and the voltage gain of the DC-AC conversion circuit.

[0019] In some embodiments, the DC-AC conversion circuit includes a primary bridge arm, a secondary bridge arm, a transformer connected between the primary bridge arm and the secondary bridge arm, and a resonant circuit connected to the transformer.

[0020] The second control quantity includes the first phase shift angle between the primary side bridge arm and the secondary side bridge arm.

[0021] In some embodiments, the DC-AC conversion circuit includes a flyback converter circuit and a flip-flop circuit connected to the flyback converter circuit;

[0022] The second control quantity includes the duty cycle of the switching transistor in the flyback converter circuit.

[0023] In some embodiments, when the voltage gain is less than or equal to 1, the DC-AC conversion circuit achieves voltage boosting through the transformer.

[0024] In some embodiments, when the voltage gain is greater than 1, the control circuit controls the absolute value of the first phase shift angle to be greater than zero in order to control the DC-AC conversion circuit to achieve voltage boost.

[0025] In some embodiments, when there is a second phase shift angle between the primary side bridge arms, the second control quantity further includes the second phase shift angle. When the voltage gain is greater than 1, the control circuit controls the absolute value of the first phase shift angle to be greater than half of the second phase shift angle to control the DC-AC conversion circuit to achieve voltage boost.

[0026] In some embodiments, when the input voltage of the Buck circuit is below a threshold, the control circuit controls the Buck circuit to operate in a pass-through mode.

[0027] Secondly, this application provides a control method for an inverter, applied to the inverter described in the first aspect. The method includes: controlling the Buck circuit and the DC-AC conversion circuit respectively, and controlling the upper limit of the DC bus voltage by controlling the Buck circuit.

[0028] In some embodiments, a second control quantity is provided to control the DC-AC conversion circuit. When the voltage gain of the DC-AC conversion circuit is greater than 1, the second control quantity is adjusted to control the DC-AC conversion circuit to achieve voltage boost.

[0029] In some embodiments, the Buck circuit is subjected to voltage limiting control to limit the output voltage of the Buck circuit from exceeding a preset value.

[0030] In some embodiments, when the input voltage of the Buck circuit is below a threshold, the Buck circuit is controlled to operate in pass-through mode.

[0031] Details of one or more embodiments of this application are set forth in the following drawings and description to make other features, objects and advantages of this application more readily apparent. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the published drawings without creative effort.

[0033] Figure 1 is a schematic diagram of the inverter structure in some embodiments of this application.

[0034] Figure 2 is a schematic diagram of the inverter structure in an example embodiment of this application.

[0035] Figure 3 is a circuit diagram of the inverter in the first example embodiment of this application.

[0036] Figure 4 is a circuit diagram of the inverter in the second example embodiment of this application.

[0037] Figure 5 is a circuit diagram of the inverter in the third example embodiment of this application.

[0038] Figure 6 is a circuit diagram of the inverter in the fourth example embodiment of this application.

[0039] Figure 7 is a schematic diagram of the inverter structure in another example embodiment of this application.

[0040] Figure 8 is a circuit diagram of the inverter in the fifth exemplary embodiment of this application.

[0041] Figure 9 is a circuit diagram of the inverter in the sixth example embodiment of this application.

[0042] Figure 10 is a circuit diagram of the inverter in the seventh exemplary embodiment of this application.

[0043] Figure 11 is a schematic diagram of the specific circuit structure of the m-channel Buck circuit in the eighth example embodiment of this application.

[0044] Figure 12 is a schematic diagram of the control circuit controlling the Buck circuit in one embodiment of this application.

[0045] Figure 13 is a schematic diagram of the control circuit for the DC-AC converter circuit in one embodiment of this application. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of this application clearer, the application is described and illustrated below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the application. All other embodiments obtained by those skilled in the art based on the embodiments provided in this application without inventive effort are within the scope of protection of this application. Furthermore, it is understood that although the efforts made in such a development process may be complex and lengthy, for those skilled in the art related to the content disclosed in this application, modifications to design, manufacturing, or production based on the technical content disclosed in this application are merely conventional technical means and should not be construed as insufficient disclosure of the content of this application.

[0047] In this application, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment that is mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this application may be combined with other embodiments without conflict.

[0048] Unless otherwise defined, the technical or scientific terms used in this application shall have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms “a,” “an,” “an,” “the,” and similar words used in this application do not indicate quantity limitation and may indicate singular or plural. The terms “comprising,” “including,” “having,” and any variations thereof used in this application are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units not listed, or may include other steps or units inherent to these processes, methods, products, or devices. The terms “connected,” “linked,” “coupled,” and similar words used in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The term “multiplex” used in this application means two or more. “And / or” describes the relationship between related objects, indicating that three relationships may exist; for example, “A and / or B” can represent: A alone, A and B simultaneously, and B alone. The terms “first,” “second,” “third,” etc., used in this application are merely to distinguish similar objects and do not represent a specific ordering of the objects.

[0049] Figure 1 is a schematic diagram of an inverter structure according to an embodiment of this application. The inverter includes at least one Buck circuit 100, a step-up / step-down DC-AC converter circuit 200, and a control circuit. The output terminal of the Buck circuit 100 is connected to the DC bus; the step-up / step-down DC-AC converter circuit 200 is connected to the DC bus and is used to perform step-up or step-down inversion according to the voltage of the DC bus and the output voltage of the inverter; the control circuit is connected to the Buck circuit 100 and the DC-AC converter circuit 200 and is used to control the Buck circuit 100 and the DC-AC converter circuit 200, wherein the control circuit controls the upper limit of the DC bus voltage by controlling the Buck circuit 100.

[0050] The inverter outputs an AC current I at its output terminal. ac and AC voltage V ac .

[0051] A photovoltaic DC power supply (PV) is used to provide direct current (DC) power. A photovoltaic DC power supply (PV) can be, for example, any one of a single photovoltaic module, a single photovoltaic cell substring, multiple photovoltaic modules connected in series and / or in parallel, or multiple photovoltaic cell substrings connected in series and / or in parallel.

[0052] The inverter in this embodiment has the following beneficial effects:

[0053] 1. Under conditions where the output voltage of the photovoltaic DC power supply decreases due to high temperature, the front-end Buck circuit can still operate at a high efficiency, which is beneficial to improving the thermal performance of the system under extreme conditions.

[0054] 2. Since the upper limit of the DC bus voltage is controlled by the preceding Buck circuit, the withstand voltage of the low-voltage devices on the DC side of the subsequent buck-boost DC-AC converter circuit can be designed according to the set upper limit of the DC bus voltage. Therefore, devices with relatively low withstand voltage can be selected, which can reduce costs.

[0055] In some other embodiments, the front-end of the inverter can employ a multi-channel Buck circuit. The input terminals of the multi-channel Buck circuit 100 are respectively connected to the corresponding photovoltaic DC power supply PV, and the output terminals of the multi-channel Buck circuit 100 are connected in series to output voltages V1, V2, ..., V1 respectively. m Where m≥2, the voltage of the DC bus is equal to the sum of the output voltages of the multi-channel Buck circuit 100.

[0056] In this embodiment, the series output of multiple Buck circuits 100 can increase the voltage of the DC bus, reduce the boost ratio of the subsequent DC-AC converter circuit, and improve the efficiency of the subsequent buck-boost DC-AC converter circuit 200. At the same time, the forward blocking function of the Buck circuit 100 can quickly disconnect the connection between the photovoltaic DC power supply and the inverter, which is beneficial to fire safety.

[0057] Figure 2 is a schematic diagram of the inverter structure in some example embodiments of this application. The inverter consists of two-stage circuits. Specifically, the inverter includes: multiple Buck circuits 100 and a DC bus capacitor C. dc A step-up / step-down DC-AC converter circuit 200 is also included. The Buck circuit 100 is used for step-down conversion. The outputs of multiple Buck circuits 100 are connected in series and connected to the input of the step-up / step-down DC-AC converter circuit 200 via a DC bus. The inputs of the multiple Buck circuits 100 can be connected to corresponding photovoltaic DC power supplies PV. The DC bus capacitor C... dcIt is connected in parallel to the input terminal of the buck-boost DC-AC converter circuit 200; the buck-boost DC-AC converter circuit 200 is used to invert the DC power provided by the Buck circuit 100 into AC power, according to the voltage V of the DC bus. dc and the inverter's output voltage V ac Perform boost or buck inverter operation.

[0058] In some embodiments, the buck-boost DC-AC converter circuit 200 includes a primary bridge arm 201, a transformer 202, a resonant circuit 203, and a secondary bridge arm 204.

[0059] Specifically, the primary side bridge arm 201 will convert the DC bus voltage V dc The high-frequency AC voltage is converted into a low-frequency AC voltage. The transformer 202 is connected to the primary side bridge arm 201 and can perform voltage boosting and isolation. The secondary side bridge arm 204 is connected to the transformer 202 and converts the high-frequency AC voltage into a low-frequency AC voltage. The resonant circuit 203 can be connected between the primary side bridge arm 201 and the transformer 202 or between the transformer 202 and the secondary side bridge arm 204 to achieve soft switching.

[0060] The resonant circuit 203 includes any one of the circuit forms such as LC, L, and LCL circuits.

[0061] It should be noted that transformer 202 and resonant circuit 203 are optional and can be selected according to actual needs.

[0062] In some embodiments, the DC-AC conversion circuit 200 further includes a filter circuit 205 connected to the output of the secondary bridge arm 204.

[0063] In some embodiments, the DC-AC conversion circuit can be an isolated or non-isolated DC-AC conversion circuit.

[0064] Figure 3 is a circuit diagram of the inverter in the first example embodiment of this application. In this example embodiment, the inverter includes m-channel Buck circuits 100, and the buck-boost DC-AC conversion circuit 200 includes a primary-side bridge arm 201, a transformer 202, a resonant circuit 203, a secondary-side bridge arm 204, and a filter circuit 205.

[0065] Taking the first Buck circuit 100 as an example, it includes switching transistors Q11 and Q21, inductor L1, and capacitor C1. The first terminal of switching transistor Q11 is connected to one input terminal of Buck circuit 100, and its second terminal is connected to the first terminal of inductor L1. The second terminal of inductor L1 is connected to the positive output terminal of Buck circuit 100. The first terminal of switching transistor Q21 is connected to the second terminal of switching transistor Q11, and its second terminal is connected to the negative output terminal of Buck circuit 100. Capacitor C1 is connected in parallel between the positive and negative output terminals of Buck circuit 100. The negative output terminal of the first Buck circuit 100 is connected to the positive output terminal of the second Buck circuit 100.

[0066] The primary-side bridge arm 201 of the buck-boost DC-AC converter circuit 200 adopts an H-bridge structure (i.e., a full-bridge circuit), including switching transistors Q1H, Q1L, Q2H, and Q2L. Specifically, switching transistors Q1H and Q1L are connected in series at the input terminal of the primary-side bridge arm 201 to form a half-bridge arm. The midpoint of this half-bridge arm provides the output voltage v to ground. 11 Switches Q2H and Q2L are connected in series at the input of the primary side bridge arm 201 to form another half-bridge arm. The midpoint of this half-bridge arm provides the output voltage v to ground. 12 The output voltage v of the primary side bridge arm 201 x The voltage difference between the output voltages of the two half-bridge arms is the voltage at the port connected to transformer 202. The secondary bridge arm 204 includes a half-bridge frequency converter circuit composed of two sets of common-source connected transistors connected in series. Specifically, the two sets of transistors are connected in series between the two output terminals of the secondary bridge arm 204, forming a half-bridge arm. The first set of transistors in the secondary bridge arm 204 includes common-source connected transistors Q3 and Q4, and the second set includes common-source connected transistors Q5 and Q6. Both sets of transistors are connected to the midpoint of the secondary bridge arm 204. One end of the secondary winding of transformer 202 is connected to the midpoint of the secondary bridge arm 204 through resonant circuit 203, and the other end is connected to one output terminal of the secondary bridge arm 204. The output voltage of the secondary bridge arm 204 is v. y This is the voltage between the midpoint of its bridge arm and one output terminal of the secondary bridge arm 204, i.e., the voltage at the port connected to the transformer 202. The two output terminals of the secondary bridge arm 204 are connected to the filter circuit 205, which includes a capacitor C. f and inductor L f The resonant circuit 203 includes an inductor L connected in series. r Capacitor C r Among them, i rs For the resonant cavity current, the turns ratio of the primary and secondary windings of transformer 202 is 1:n.

[0067] Generally, the inverter is controlled by phase shift, that is, by controlling the output voltage v of the primary side bridge arm 201. x The fundamental component crosses zero at the same point as the output voltage v of the secondary bridge arm 204. y The phase difference between the zero-crossing points of the fundamental component (denoted as the first phase shift angle) ), and the output voltages (output voltages v) of the two half-bridge arms of the primary side bridge arm 201. 11 and output voltage v 12 The phase difference between the two phases (denoted as the second phase shift angle θ) is used to achieve control purposes such as soft switching of the inverter.

[0068] It should be noted that when the primary bridge arm 201 is a half-bridge circuit, it can be understood that the second phase shift angle θ is 0 or does not exist. Of course, when the primary bridge arm 201 is a full-bridge circuit, phase shift control may not be used, that is, the primary bridge arm 201 does not have a second phase shift angle θ.

[0069] Figure 4 is a circuit diagram of the inverter in the second exemplary embodiment of this application. The difference from the first exemplary embodiment is that the secondary bridge arm 204 in the second exemplary embodiment adopts a full-bridge Hz converter circuit. The secondary bridge arm 204 includes four sets of common-source connected switching transistors: the first set includes transistors Q31 and Q41, the second set includes transistors Q51 and Q61, the third set includes transistors Q32 and Q42, and the fourth set includes transistors Q52 and Q62.

[0070] Figure 5 is a circuit diagram of the inverter in the third exemplary embodiment of this application. The difference from the first exemplary embodiment is that the secondary bridge arm 204 in the third exemplary embodiment provides a three-phase AC output. Specifically, the secondary bridge arm 204 includes switching transistors Q3a, Q4a, Q3b, Q4b, Q3c, Q4c, and capacitor C. a C b C c The three-phase half-bridge frequency converter circuit is constructed with inductor L. r and capacitor C a C b C c This can form a resonant circuit 203. The midpoint of the first phase bridge arm is connected to an inductor L. a The midpoint of the second phase bridge arm is connected to inductor L. b The midpoint of the third phase bridge arm is connected to inductor L. c .

[0071] Figure 6 is a circuit diagram of the inverter in the fourth example embodiment of this application. The difference from the third example embodiment is that the secondary bridge arm 204 includes a three-phase full-bridge frequency conversion circuit, which converts the capacitor C of the lower half-bridge arm in the third example embodiment...a C b C c Replace them respectively with switching transistors Q5a, Q6a, Q5b, Q6b, Q5c, and Q6c. At this time, the resonant circuit 203 includes an inductor L connected in series. r Capacitor C r .

[0072] Figure 7 is a schematic diagram of the inverter structure in some other example embodiments of this application. The DC-AC conversion circuit 200 includes a flyback converter circuit 206, a switching circuit 207 connected to the flyback converter circuit 206, and a filter circuit 205 connected to the switching circuit 207. The flyback converter circuit 206 is used to convert the voltage V of the DC bus... dc The voltage is boosted and converted into a pulsating DC high voltage; the flip circuit 207 is used to shape the half-wave of the pulsating DC high voltage into the AC voltage V. ac .

[0073] Figure 8 is a circuit diagram of the inverter in the fifth exemplary embodiment of this application. Switch Q1, transformer T1, and secondary diode D1 are connected to form a flyback converter circuit 206. In this embodiment, the switching circuit can be an H-bridge switching circuit 207, with switches Q2a, Q2b, Q2c, and Q2d connected to form the H-bridge switching circuit 207. The midpoints of the two arms of the H-bridge switching circuit 207 are connected by an inductor L. f and capacitor C f The filter circuit 205 is composed of an H-bridge switching circuit. Based on the polarity of the mains voltage, the switching devices of the H-bridge enable bidirectional power transfer from the DC side to the mains during the positive and negative half-cycles of the mains voltage. Specifically, during the positive half-cycle, the H-bridge flips positively, i.e., Q2a and Q2d are turned on, and Q2c and Q2b are turned off; during the negative half-cycle, the H-bridge flips negatively, i.e., Q2c and Q2b are turned on, and Q2a and Q2d are turned off.

[0074] Figure 9 is a circuit diagram of the inverter in the sixth exemplary embodiment of this application. The difference from the fifth exemplary embodiment is that the transformer T1 of the flyback converter circuit 206 includes two parallel-connected primary windings. Specifically, the flyback converter circuit 206 is composed of switching transistors Q1s and Q1h, transformer T1, primary-side diode D2, and secondary-side diode D1 connected together. Switching transistors Q1s and Q1h are respectively connected to the upper and lower primary windings of transformer T1. In this embodiment, the flyback converter circuit 206 selects different switching transistors for switching under different inverter output currents, reducing the switching frequency and improving efficiency compared to the fifth exemplary embodiment.

[0075] Figure 10 is a schematic diagram of the specific circuit structure of the inverter in the seventh exemplary embodiment of this application. The difference from the fifth exemplary embodiment is that the DC-AC conversion circuit 200 in the seventh exemplary embodiment provides a three-phase AC output. Specifically, the flyback converter circuit 206 includes at least one flyback converter unit 2061 for converting the DC bus voltage into multiple different intermediate voltages. The flip-flop circuit 207 includes multiple commutation units 2071 connected in parallel with their output terminals for flipping and combining the multiple intermediate voltages into one of the three-phase AC voltages for output. Each output terminal of the flyback converter circuit 206 and each commutation unit 2071 are connected in a one-to-one correspondence.

[0076] The flyback converter unit 2061 can be a single-output flyback topology or a multi-output flyback topology.

[0077] The diagram illustrates an example of a flyback converter unit 2061 with four input terminals connected in parallel and a commutation unit 2071 with four output terminals connected in parallel. Taking one flyback converter unit 2061 as an example, it is composed of a switching transistor Q1a, a transformer T1, a diode D1, and a capacitor Cout1. Taking one commutation unit 2071 as an example, it includes thyristors SCR11, SCR12, and SCR13 with their cathodes connected in a common manner. The anodes of thyristors SCR11, SCR12, and SCR13 are respectively connected to the inductor L in the filter circuit 205. a Inductor L b Inductor L c .

[0078] At different AC voltages V ac / Alternating current I ac Within the range, each flyback converter unit 2061 performs DC-DC conversion, and the design parameters of each flyback converter sub-circuit 2061 are set according to different voltage / current values, respectively suitable for operation at different AC voltages V. ac / Alternating current I ac Down.

[0079] Figure 11 is a schematic diagram of the specific circuit structure of the m-channel Buck circuit in the eighth example embodiment of this application. The difference from the above example embodiment is that the m-channel Buck circuit adopts a different topology. The m-channel Buck circuits 100 are grouped in pairs, m is an even number, and the Buck circuits in each group are connected in series. The two Buck circuits in each group are symmetrically arranged and connected in series through an inductor.

[0080] Taking the first Buck circuit 100 as an example, it includes switching transistor Q31, switching transistor Q41, and capacitor C. 11The first terminal of switching transistor Q31 is connected to one input terminal of Buck circuit 100, and the second terminal is connected to the negative output terminal of Buck circuit 100. The first terminal of switching transistor Q41 is connected to the second terminal of switching transistor Q31, and the second terminal is connected to the positive output terminal of Buck circuit 100. Capacitor C1 is connected in parallel between the two input terminals of Buck circuit 100. The negative output terminal of the first Buck circuit 100 is connected to the positive output terminal of the second Buck circuit 100 through inductor L11.

[0081] The inverters in the above example embodiments can all achieve the aforementioned technical effects.

[0082] Furthermore, for the inverter in the embodiments of Figures 1-11 above, the control circuit can control the upper limit of the DC bus voltage by controlling the Buck circuit 100, and the DC bus voltage is within a preset range.

[0083] Since the upper limit of the DC bus voltage is controlled by the preceding Buck circuit 100, the design capacity of the DC bus capacitor can be utilized to the maximum extent. Based on the set upper limit of the DC bus voltage, the withstand voltage of the low-voltage devices on the DC side of the subsequent buck-boost DC-AC converter circuit 200 can be designed. Therefore, devices with relatively low withstand voltage can be selected, reducing costs. For example, taking a common 72-cell photovoltaic module as an example, its open-circuit voltage typically reaches around 50V. Considering voltage spikes, in engineering applications, the DC-AC converter circuit 200 needs to use switching devices with a withstand voltage of 80V. However, in this embodiment, the Buck circuit limits the upper limit of the DC bus voltage to around 50V, so the DC-AC converter circuit 200 can use switching devices with a withstand voltage of 60V, greatly improving the utilization rate of the switching devices.

[0084] Specifically, in some embodiments, the control circuit provides a first control quantity and a second control quantity to control the Buck circuit 100 and the DC-AC conversion circuit 200, respectively.

[0085] Figure 12 is a schematic diagram of the control circuit for the Buck circuit 100 in one embodiment of this application. As shown in Figure 12, the control circuit includes a voltage limiting loop, which provides a first duty cycle signal to limit the output voltage of the Buck circuit 100 in the inverter in the embodiments of Figures 1-11 to not exceed a preset value.

[0086] Specifically, taking the m-th Buck circuit 100 as an example, the voltage limiting loop limits the output voltage V of the Buck circuit 100. m With maximum output voltage V m_maxThe difference is processed by PI control (proportional-integral control) to obtain a first duty cycle signal. The control circuit can generate a control signal for the Buck circuit 100 based on the first duty cycle signal to control the duty cycle of the switching transistors in the Buck circuit 100, thereby limiting the output voltage of the m-th Buck circuit 100 to not exceed a preset value. The preset value can be the maximum allowable output voltage V of the Buck circuit 100. m_max .

[0087] In some embodiments, the control circuit can also control the Buck circuit 100 to track the maximum output power of the photovoltaic DC power supply connected to its input terminal, thereby improving the photovoltaic power generation efficiency. The Buck circuit 100 can switch between two operating modes, as shown in Figure 12. The control circuit further includes: a first MPPT (Maximum Power Point Tracking) control loop, which provides a second duty cycle signal for controlling the Buck circuit 100 to perform maximum power point tracking; and a selection unit, which selects the minimum value between the first duty cycle signal and the second duty cycle signal as the first control quantity.

[0088] Taking the m-th Buck circuit 100 as an example, V pvm The input voltage of the m-th Buck circuit 100 (which is also the output voltage of the corresponding connected photovoltaic DC power supply PV), P om For the input power of the m-th Buck circuit 100 (i.e., the output power of the photovoltaic DC power supply PV), the first MPPT control loop first bases the input voltage V... pvm and input power P om The reference value V of the input voltage of Buck circuit 100 is calculated using the MPPT algorithm. pvm_ref Then the input voltage V pvm The reference value V of the input voltage pvm_ref The difference is controlled by PI to obtain the second duty cycle signal.

[0089] The selection unit selects the minimum value between the first duty cycle signal and the second duty cycle signal as the first control quantity to select the operating mode of the Buck circuit 100. The first control quantity can be the duty cycle signal D of the switching transistor Q1m of the m-th Buck circuit 100. 1m In Buck circuit 100, switching transistors Q1m and Q2m are complementary in conduction. The selection unit may include a selector or selection circuit implemented in hardware.

[0090] In some other embodiments, the output voltage V of the photovoltaic DC power supply can also be used. pvmThe MPPT algorithm is used to calculate the reference value V of the input voltage of the Buck circuit 100 by combining the output current of the photovoltaic DC power supply or the output voltage and output current of the Buck circuit 100. pvm_ref This application does not impose any restrictions on this.

[0091] In some embodiments, when the input voltage of the Buck circuit 100 is lower than a threshold, the control circuit can also control the Buck circuit 100 to operate in a pass-through mode.

[0092] The pass-through mode refers to the switch Q1m of the Buck circuit 100 being turned on for an extended period or operating at a near full duty cycle (duty cycle close to 1), while simultaneously reducing the switching frequency.

[0093] In this embodiment, when the output voltage of the photovoltaic DC power supply PV decreases due to high temperature or other factors, the system efficiency is further improved by controlling the Buck circuit 100 to operate in direct mode, which is beneficial to improving the system's heat dissipation performance.

[0094] Figure 13 is a schematic diagram of the control circuit for the DC-AC converter circuit 200 in one embodiment of this application. As shown in Figure 13, the control circuit further includes: a second MPPT control loop, which provides a control command for controlling the DC-AC converter circuit 200 to perform maximum power point tracking; and a predictive control module for calculating the second control quantity based on the control command, the electrical parameters of the inverter, and the voltage gain M of the inverter.

[0095] As shown in Figure 13, the second MPPT control loop first uses the DC bus voltage V dc and the current I of the DC bus dc The reference voltage V of the DC bus is calculated using the MPPT algorithm. dc_ref Then the reference voltage V of the DC bus is... dc_ref Voltage V of DC bus dc The difference is used for PI control to obtain a control command. The predictive control module calculates the second control quantity based on the control command, the inverter's electrical parameters, and the voltage gain M using a predictive model. The predictive control module may include a microprocessor or other control circuitry for predictive control.

[0096] The control commands can be power commands or current commands.

[0097] The electrical parameters of the inverter include the DC bus voltage V. dc The output voltage V of the inverter ac At least one of the following: transformer turns ratio n, resonance parameter, etc.

[0098] The prediction model can be the relationship between the inverter's instantaneous power or instantaneous current and the inverter's electrical parameters and the second control quantity, obtained from the equivalent circuit model based on fundamental wave analysis.

[0099] The voltage gain M is a voltage V relative to the DC bus. dc The inverter's output voltage and transformer turns ratio are related control parameters used to implement various inverter controls. Specifically, they are related to the DC bus voltage V. dc It is negatively correlated with the amplitude of the inverter's output voltage, and positively correlated with the amplitude of the inverter's output voltage.

[0100] For example, in the embodiment shown in Figure 3, the voltage gain Where n is the turns ratio of the secondary winding to the primary winding of transformer 202; for the embodiment shown in Figure 4, or when the primary bridge arm 201 is a half-bridge circuit and the secondary bridge arm 204 is a half-bridge Hz converter circuit, the voltage gain is... When the primary bridge arm 201 is a half-bridge circuit and the secondary bridge arm 204 is a full-bridge Hz converter circuit, the voltage gain... Furthermore, if the DC-AC conversion circuit 200 is non-isolated, that is, does not include the transformer 202, then n = 1 in the aforementioned expression for voltage gain M.

[0101] For the embodiment shown in Figure 8, voltage gain Where, n ps This is the ratio of the number of turns in the secondary winding to the number of turns in the primary winding of the flyback converter circuit 206.

[0102] When the voltage gain M of the DC-AC converter circuit 200 is greater than 1, the control circuit adjusts the second control quantity to control the DC-AC converter circuit 200 to achieve voltage boost.

[0103] In this embodiment, by adjusting the second control quantity to control the DC-AC conversion circuit 200 to achieve voltage boost, the voltage V on the DC bus can be increased. dc When the transformer's turns ratio is too low to meet the voltage step-up requirements, this method enables voltage step-up and is applicable to a wide range of DC bus voltages. dc For example, in a single-input scenario where the photovoltaic DC power supply is a single 72-cell photovoltaic module, the DC bus voltage V... dc It can be 22V to 80V.

[0104] In some embodiments, when the voltage gain M is less than or equal to 1, the DC-AC conversion circuit 200 boosts the voltage through the transformer 202.

[0105] For the embodiments related to Figures 2-6, the second control quantity includes the first phase shift angle between the primary side arm 201 and the secondary side arm 204. At least one of the second phase shift angle θ between the arms of the primary side bridge arm 201 and the switching frequency of the switching transistor in the primary side bridge arm 201 and the secondary side bridge arm 204.

[0106] In some embodiments, when the voltage gain M is greater than 1, the control circuit controls the first phase shift angle. The absolute value of the value is greater than zero to control the DC-AC converter circuit 200 to achieve voltage boost.

[0107] Specifically, when the inverter is operating in inverter mode, i.e., when power flows from the DC side to the AC side, the control circuit controls the first phase shift angle. The value is greater than zero, and power transfer under boost voltage is achieved through reactive power circulation; when the inverter operates in rectification mode, i.e., when power flows from the AC side to the DC side, the control circuit controls the first phase shift angle. If the voltage is less than zero, power transfer under boosted voltage is achieved through reactive power circulation.

[0108] Furthermore, in some embodiments, in order to simultaneously achieve soft switching of each switching transistor in the primary bridge arm 201 and the secondary bridge arm 204, when there is a second phase shift angle θ between the bridge arms in the primary bridge arm 201, for example, when the primary bridge arm 201 is a full-bridge circuit and phase shift control is used, when the voltage gain M is greater than 1, the control circuit can control the first phase shift angle. The absolute value of the voltage gain M is greater than half of the second phase shift angle θ. When the voltage gain M is less than or equal to 1, the control circuit can control the first phase shift angle. The absolute value of θ is equal to half of the second phase shift angle θ.

[0109] In this embodiment, while achieving voltage boost, soft switching of each switching transistor in the primary side bridge arm 201 and the secondary side bridge arm 204 can be achieved simultaneously, reducing switching losses and improving system efficiency.

[0110] For the embodiments related to Figures 7-10, the second control quantity includes at least one of the duty cycle of the switching transistor in the flyback converter circuit 206 and the switching frequency.

[0111] In some embodiments, when the voltage gain is greater than 1, the control circuit achieves voltage boost by controlling the duty cycle of the switch transistor in the flyback converter circuit 206.

[0112] Specifically, taking Figure 8 as an example, when the voltage gain is greater than 1, the duty cycle of the control switch Q1 is greater than 0.5 to achieve voltage boost; when the voltage gain is less than 1, the duty cycle of the control switch Q1 is less than 0.5, and the voltage boost is achieved through the transformer.

[0113] The control circuit in the above embodiment not only realizes the MPPT function of the front-end Buck, but also realizes the power balance between the front-end circuit and the back-end circuit, maintaining the voltage stability of the DC bus.

[0114] This application also proposes a control method for the above-mentioned inverter, which is used to control the Buck circuit and the DC-AC conversion circuit respectively, and to control the upper limit of the DC bus voltage by controlling the Buck circuit.

[0115] In some embodiments, a first control quantity and a second control quantity are provided to control the Buck circuit and the DC-AC conversion circuit, respectively.

[0116] In some embodiments, when the voltage gain of the DC-AC conversion circuit is greater than 1, the DC-AC conversion circuit is controlled to achieve voltage boost by adjusting the second control quantity.

[0117] In some embodiments, a first duty cycle signal is provided to perform voltage limiting control on the Buck circuit to limit the output voltage of the Buck circuit from not exceeding a preset value.

[0118] In some embodiments, a second duty cycle signal is provided for controlling the Buck circuit to perform maximum power tracking, and the minimum value of the first duty cycle signal and the second duty cycle signal is selected as the first control quantity.

[0119] In some embodiments, a control command is provided for controlling the DC-AC conversion circuit to perform maximum power point tracking, and the second control quantity is calculated based on the control command, the electrical parameters of the inverter, and the voltage gain of the DC-AC conversion circuit.

[0120] In some embodiments, the DC-AC conversion circuit includes a primary bridge arm, a secondary bridge arm, a transformer connected between the primary bridge arm and the secondary bridge arm, and a resonant circuit connected to the transformer.

[0121] The second control quantity includes the first phase shift angle between the primary side bridge arm and the secondary side bridge arm.

[0122] In some embodiments, the DC-AC conversion circuit includes a flyback converter circuit and a flip-flop circuit connected to the flyback converter circuit;

[0123] The second control quantity includes the duty cycle of the switching transistor in the flyback converter circuit.

[0124] In some embodiments, when the voltage gain is less than or equal to 1, the DC-AC conversion circuit achieves voltage boosting through the transformer.

[0125] In some embodiments, when the voltage gain is greater than 1, the absolute value of the first phase shift angle is controlled to be greater than zero to control the DC-AC conversion circuit to achieve voltage boost.

[0126] In some embodiments, when there is a second phase shift angle between the primary side bridge arms, the second control quantity further includes the second phase shift angle. When the voltage gain is greater than 1, the absolute value of the first phase shift angle is controlled to be greater than half of the second phase shift angle to control the DC-AC conversion circuit to achieve voltage boost.

[0127] In some embodiments, when the input voltage of the Buck circuit is below a threshold, the Buck circuit is controlled to operate in pass-through mode.

[0128] Since the control method of the inverter in the above embodiments corresponds to the aforementioned embodiments, principles and examples of the inverter, any details not covered in this embodiment can be found in the relevant descriptions in the aforementioned embodiments, and will not be repeated here.

[0129] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0130] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. An inverter, characterized in that, include: At least one Buck circuit, the output of which is connected to a DC bus; A step-up / step-down DC-AC converter circuit is connected to the DC bus and is used to perform step-up or step-down inversion based on the voltage of the DC bus and the output voltage of the inverter. A control circuit, connected to the Buck circuit and the DC-AC conversion circuit, is used to control the Buck circuit and the DC-AC conversion circuit, wherein the control circuit controls the Buck circuit to achieve control over the upper limit of the DC bus voltage.

2. The inverter according to claim 1, wherein, The control circuit provides a first control quantity and a second control quantity to control the Buck circuit and the DC-AC conversion circuit, respectively.

3. The inverter according to claim 2, wherein, When the voltage gain of the DC-AC converter circuit is greater than 1, the control circuit adjusts the second control quantity to control the DC-AC converter circuit to achieve voltage boost.

4. The inverter according to claim 2, wherein, The control circuit includes a voltage limiting loop that provides a first duty cycle signal to limit the output voltage of the Buck circuit to no more than a preset value.

5. The inverter according to claim 4, wherein, The control circuit also includes: The first MPPT control loop provides a second duty cycle signal for controlling the Buck circuit to perform maximum power point tracking. The selection unit selects the minimum value between the first duty cycle signal and the second duty cycle signal as the first control quantity.

6. The inverter according to claim 4 or 5, wherein, The control circuit also includes: The second MPPT control loop provides a control command for controlling the DC-AC conversion circuit to perform maximum power point tracking. The predictive control module is used to calculate the second control quantity based on the control command, the electrical parameters of the inverter, and the voltage gain of the DC-AC conversion circuit.

7. The inverter according to claim 3, wherein, The DC-AC conversion circuit includes a primary bridge arm, a secondary bridge arm, a transformer connected between the primary bridge arm and the secondary bridge arm, and a resonant circuit connected to the transformer. The second control quantity includes the first phase shift angle between the primary side bridge arm and the secondary side bridge arm.

8. The inverter according to claim 3, wherein, The DC-AC conversion circuit includes a flyback converter circuit and a flip-flop circuit connected to the flyback converter circuit. The second control quantity includes the duty cycle of the switching transistor in the flyback converter circuit.

9. The inverter according to claim 7, wherein, When the voltage gain is less than or equal to 1, the DC-AC conversion circuit achieves voltage boosting through the transformer.

10. The inverter according to claim 7, wherein, When the voltage gain is greater than 1, the control circuit controls the absolute value of the first phase shift angle to be greater than zero so as to control the DC-AC conversion circuit to achieve voltage boost.

11. The inverter according to claim 7 or 10, wherein, When there is a second phase shift angle between the primary side bridge arms, the second control quantity also includes the second phase shift angle. When the voltage gain is greater than 1, the control circuit controls the absolute value of the first phase shift angle to be greater than half of the second phase shift angle to control the DC-AC conversion circuit to achieve voltage boost.

12. The inverter according to claim 1, wherein, When the input voltage of the Buck circuit is lower than a threshold, the control circuit controls the Buck circuit to operate in pass-through mode.

13. A control method for an inverter, characterized in that, The inverter includes at least one Buck circuit and a step-up / step-down DC-AC converter circuit. The output of the Buck circuit is connected to the step-up / step-down DC-AC converter circuit via a DC bus. The step-up / step-down DC-AC converter circuit is used to perform step-up or step-down inversion based on the voltage of the DC bus and the output voltage of the inverter. The method includes: controlling the Buck circuit and the DC-AC converter circuit respectively, and controlling the upper limit of the DC bus voltage by controlling the Buck circuit.

14. The method according to claim 13, wherein, The method further includes: providing a second control quantity to control the DC-AC conversion circuit, wherein when the voltage gain of the DC-AC conversion circuit is greater than 1, the second control quantity is adjusted to control the DC-AC conversion circuit to achieve voltage boost.

15. The method according to claim 13, wherein, The method further includes: performing voltage limiting control on the Buck circuit to limit the output voltage of the Buck circuit from exceeding a preset value.

16. The method according to claim 13, wherein, The method further includes: when the input voltage of the Buck circuit is lower than a threshold, controlling the Buck circuit to operate in a pass-through mode.

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