Component carrier with an interconnection structure

Abstract

The invention relates to a component carrier (1) comprising a stack (2) with at least one electrically conductive layer structure (3) and a plurality of electrically insulating layer structures (4), said at least one electrically conductive layer structure (3) being provided on a main surface (5) of one of the plurality of electrically insulating layer structures (4). A cavity (6) is formed in the stack (2), wherein the cavity (6) exposes a portion (7) of the at least one electrically conductive layer structure (3); and wherein the exposed portion (7) by said cavity (6) of the at least one electrically conductive layer structure (3) forms an interconnection structure (9) provided on a bottom wall (10) of said cavity (6), wherein a lateral wall (11) of the exposed portion (7) is different from a lateral wall (12) of a non-exposed portion (8) of said at least one electrically conductive layer structure (3) that is covered by electrically insulating layer structure (4).

Description

[0001] COMPONENT CARRIER WITH AN INTERCONNECTION STRUCTURE

[0002] The invention relates to a component carrier assembly comprising a stack of a plurality of layers forming at least one electrically conductive layer structure and a plurality of electrically insulating layer structures. The invention also relates to a method for manufacturing a component carrier.

[0003] The component carriers according to the prior art have the disadvantage that they are limited with respect to their designs of the conductive element inside the cavity and whereby the quality these elements and the cavity itself is often reduced caused by the manufacturing process, resulting in an imprecise connection of further components in the cavity.

[0004] It has been the object of the present invention to overcome the disadvantages of the prior art and to provide a component carrier and method by means of which a cavity with an improved electrically conductive structure can be provided to accommodate an electric component.

[0005] This object is achieved by a component carrier comprising a stack, wherein the stack comprises at least one electrically conductive layer structure and a plurality of electrically insulating layer structures, said at least one electrically conductive layer structure being provided on a main surface of one of the plurality of electrically insulating layer structures. A cavity is formed in the stack, the cavity exposes a portion of the at least one electrically conductive layer structure wherein the exposed portion by said cavity of the at least one electrically conductive layer structure forms an interconnection structure provided on a bottom wall of said cavity and wherein a lateral wall of the exposed portion is different from a lateral wall of a non-exposed portion of said at least one electrically conductive layer structure.

[0006] By providing an interconnection structure that is exposed by a cavity; it is possible to implement said interconnection structure in the stack and build up the layers of the stack, whereby the interconnection structure can be exposed after building the stack, so that its mechanical electrical connection is established in the component carrier and at the same time the interconnection structure can be protected from further manufacturing steps and is only exposed through the cavity, which makes it possible to provide a qualitatively improved structure.

[0007] A further advantage can be that the interconnection structure is not in contact with wet process chemistry, which may further enhance its quality and accuracy, since the interconnectionstructure may be protected from at least one, in particular the plurality, of electrically insulating layer structure during manufacturing. Preferably, the cavity formation exposing the interconnection structure may be one of the last process steps.

[0008] An advantage of the invention is that the interconnection structure in the cavity can be used to bond with an electric component or the like that can be accommodated in the cavity; wherein the interconnection structure provides a different wall design with respect to the other parts of the same conductive layer structure that are not exposed. Therefore, the exposed portion of the conductive layer structure can be designed in a specific way for its function with respect to its lateral walls, wherein the non-exposed portions can be designed without the specific design rule and yet the exposed portion and non-exposed portion belong to the same conductive layer structure, so that their electrically conductive functions to each other are guaranteed without a need for additional elements.

[0009] Preferably, the bottom wall of the cavity may be flat and perpendicular to thickness direction.

[0010] The interconnection structure itself may comprise a plurality of interconnection structure elements that can be similar compared from one to each other, preferably with respect to their layers.

[0011] However, at least one of the interconnection structure elements may be different with respect to their geometry and / or width. For example, a greater interconnection structure element may be used for providing current, whereas at least a further, preferably smaller one, may be used for signal transmission

[0012] It should be said that the exposed portion forming the interconnection structure may be a temporary exposed portion, as it is intended to bond or connect with further (electric) elements; so that it may be covered at least by the accommodated element when it is in use.

[0013] The exposed portion may comprise at least one conductive element on a surface that is configured to be connected with a component. The exposed portion may further comprise a plurality of conductive elements forming the respective lateral wall(s) of the exposed portion.

[0014] Furthermore, the exposed portion can protrude in a perpendicular direction from the cavity bottom wall in a direction to an outer surface of the stack.in particular, the exposed portion may comprise at least one, in particular a plurality of structures (i.e. traces, pads) each one being delimited by one or more lateral walls, said lateral walls being different from the structures of the not exposed portion.

[0015] The non-exposed portion may comprise electrically conductive structures that can be covered by the insulating layer structure (or are not exposed by the cavity). The non-exposed portion may comprise conductive structures, as an example, for providing functions for a signal transfer, or also for heat dissipation.

[0016] Furthermore, at least parts of the non-exposed portion and the exposed portion may be electrically connected to each other at least partially.

[0017] Preferably, the number of layers of the exposed portion of the at least one electrically conductive layer structure may be higher than the number of layers of the non-exposed portion of the at least one electrically conductive layer structure. This may be a “finger print” feature of the provided manufacturing method, since an additional manufacturing step providing an electrically conductive layer structure / electrically conductive material may be used to create the interconnection structure. And one of the layer can be configured as the laser stop layer for preventing the burning of the dielectric material in the cavity bottom during cavity formation

[0018] Since the exposed portion can be bonded with at least one component, the more layer especially a surface finish layer which may be deposited on the exposed portion as interconnection structure, can protect the metal of the exposed portion from the corrosion and oxidation. Therefore, it can insure the reliability performance between the component carrier and component in a long run. Additionally, it can also improve the bonding performance such as promotion of the adhesion between the exposed portion and the connection structure of component. Such kind of design is applicable for the high performance computing.

[0019] Additionally or alternatively, the number of layers of the exposed portion of the at least one electrically conductive layer structure may be the same as or lower than the number of layers of the non-exposed portion of the at least one electrically conductive layer structure, as an example, when the final application is not that demanding

[0020] According to one embodiment, a thickness of at least one layer of the exposed portion may be different from the thickness of the correspondent layer of the non-exposed portion. This maybe a “finger print” feature of the provided manufacturing method, since an additional manufacturing step providing an electrically conductive layer structure / electrically conductive material is used to create the interconnection structure.

[0021] The correspondent layer(s) may have a same grain structure, preferably with respect to their dimensions and / or shape.

[0022] The correspondent layer(s) may be provided by the same production process to form the respective correspondent layer(s).

[0023] The different thickness of the exposed portion may be associated to the interconnection structure. Additionally, or alternatively, the different thickness of the interconnection structure may ensure a reliable electrical connection to a component, which may be hosted by the cavity and in direct contact with the interconnection structure.

[0024] The (overall) thickness of the exposed portion may be higher than the (overall) thickness of the non-exposed portion. Additionally, or alternatively, thickness of at least one layer of the exposed portion may be the same as or lower than the thickness of the correspondent layer of the non-exposed portion. Preferably, the (overall) thickness of the exposed portion may be higher than the (overall) thickness of the non-exposed portion structure may ensure a reliable electrical connection to a component, which may be hosted by the cavity and in direct contact with the interconnection structure.

[0025] The thickness of at least one layer of the non-exposed portion may correspond to the thickness of a correspondent layer of the exposed portion and wherein the exposed portion may be thicker than the not-exposed portion.

[0026] Generally, the different thickness can also impact the warpage performance of the component carrier. Considering the CTE mismatch due to the different density or metal volume deposited in different area of dielectric material, the different thickness between the exposed portion and non-exposed portion may compensate the warpage in one layer or more layers, so that the warpage of the whole component carrier might be controlled better. Therefore, the quality of product in the high volume manufacturing can be improved in sequence.In one embodiment, the at least one electrically conductive layer structure may comprise at least one base layer and at least one top layer. In an example, the base layer may be a metallic layer, in particular a copper layer.

[0027] In General, the base layer may have a thickness smaller than 10 pm, in particular smaller than 5 pm. Preferably the base layer may have a thickness in the range from 0.5 pm to 3 pm.

[0028] The at least one top layer may be a metallic layer. Preferably, the top layer may comprise the same material as the base layer. For example, the at least one top layer may be a copper layer. Additionally or alternatively, the at least one top layer may comprise material being different than the material of the base layer; for example, the at least one top layer may comprise nickel and / or tin and / or gold for a better soldering and bonding with the component. Preferably, between the base layer and the at least one top layer may be an oxide-free interface and / or interface free. This may ensure a reliable mechanical interaction, for example adhesion / cohesion between the different layers of the electrically conductive layer structure and thus may ensure electrical current and / or signal transmission having low losses.

[0029] Furthermore, the at least one base layer and at least one top layer may be provided in the exposed portion and / or in the non-exposed portion. This may ensure a reliable formation of electrically conductive traces.

[0030] According to a preferred embodiment, the electrically conductive layer structure may comprise an intermediate layer. This may give the advantage of precisely adjusting the thickness of the electrically conductive layer structure, especially when the electrically conductive layer structure has a thickness larger than 15 pm, in particular 25 pm.

[0031] In an example, the intermediate layer may be electrically plated on the base layer and may comprise the same material as the base layer and / or the top layer. Additionally or alternatively the intermediate layer may comprise copper. In an example, the at least one top layer may comprise the intermediate layer. In another example, the intermediate layer may be in direct contact with the base layer and / or the top layer. Preferably, the intermediate layer may be sandwiched between the base layer and the top layer. The intermediate layer may be configured as a laser stop layer to avoid the laser energy damaging the dielectric material below the base laser during cavity formation, in particular the portion exposed at the sidewall of the cavity-Furthermore, the intermediate layer may only be provided in the exposed portion. This may bring the advantage of flexibly adjusting the thickness of the electrically conductive layer structure in regard to the needed height / thickness of the intermediate layer in order to create a reliable mechanical and / or electrical connection to the component to be hosted inside the cavity and compensate a CTE mismatch between the dielectric material and the metal in order to reduce the warpage.

[0032] Additionally or alternatively, the intermediate layer may be provided in the non-exposed portion. Furthermore, such kind of design may reduce the process step of manufacturing with only one-time intermediate layer formation, so that the product manufacturing cost can be reduced and the quality of product can be improved.

[0033] According to a possible embodiment; the thickness of the intermediate layer may be higher than the thickness of the base layer and / or may be lower than the thickness of the top layer. Additionally or alternatively, the thickness of the base layer and / or the thickness of the top layer may be larger than the thickness of the intermediate layer. This may bring the advantage of providing the largest portion of the electrical current though the intermediate layer.

[0034] The at least one base layer may comprise at least one seed layer, or may consist of the seed layer. A seed layer may be an electrodeless deposit layer, for example, electrodeless copper. The seed layer can improve the application of other layer such as the intermediate layer, which may be electrically plated on the seed layer. This may bring the advantage that the intermediate layer and / or the top layer may be provided by a galvanic plating step, which make the manufacturing of the electrically conductive layer structure easy and straight forward.

[0035] The intermediate and / or the top layer may comprise a plated layer, in particular a galvanic layer. Additionally or alternatively, the top layer and / or the intermediate layer may comprise a layer provided by a chemical vapor deposition process step and / or a physical vapor deposition process step. Layers having a thickness larger than 3 pm may be fast and efficiently provided by a galvanic plating step and thus a plated layer may be the preferred choice. Therefore, the intermediate and / or the top layer can be formed with the other electrically conductive layer structure (preferably the non-exposed portion) at the same time, so that the less effort and cost needed for the manufacturing.According to a further embodiment, the thickness of the base layer of the exposed portion may correspond to the thickness of the base layer of the non-exposed portion and / or may differ from the thickness of the base layer of the non-exposed portion at max 10%. Preferably, the thickness of the base layer of the exposed portion and the thickness of the base layer of the non-exposed portion may be the same.

[0036] Also, the thickness of the base layer may be smaller than 5 pm, in particular smaller than 1 um, a small deviation between the thickness of the base layer of the exposed portion and the thickness of the base layer of the non-exposed portion can be crucial in order to reliable provide the intermediate layer and / or the top layer within one / the same process step by galvanic plating in the exposed portion and the non-exposed portion.

[0037] Furthermore, the thickness of the top layer of the exposed portion may correspond to the thickness of a layer of the non-exposed portion.

[0038] The different or the same thickness of the exposed portion and the non-exposed portion provide the flexibility of the product design based on different requirement and different application.

[0039] According to one embodiment, the lateral wall of the interconnection structure may comprise at least two portions having a different vertical extension with respect to each other. This may be related to the thickness of the respective base layer / intermediate later / top layer. This is related to the etching rate difference as well.

[0040] According to one embodiment, the lateral wall of the interconnection structure may comprise at least two portions having a different horizontal extension with respect to each other. This may be a “finger print” feature of the provided manufacturing method, since different manufacturing steps may be used, for example (semi) additive process step, e.g. plating step, and / or subtractive process step, e.g. laser drilling / ablation

[0041] Additionally, at least one of the two different vertical extensions may be associated to a respective layer composing the interconnection structure.

[0042] According to a possible embodiment, the lateral wall of the exposed portion of the interconnection structure may have a convex shape. Additionally or alternatively, the lateral wall of the exposed portion of the interconnection structure may have a substantially straight shapeand / a concave shape. This may be a “finger print” feature of the related manufacturing process such as the etching process and thus may create a larger surface to interact with adjacent material. This may ensure a reliable interaction with adjacent electrically insulating material, in particular electrically insulating layer structure.

[0043] Preferably a vertical undercut may be formed in the lateral wall of the exposed portion towards the bottom of the cavity. The vertical undercut may be created by an etching, in particular wet chemical etching which only etch the exposed portion not the bottom of the dielectric material. Therefore, there will not be only no delamination issue, the vertical undercut may also act as an anchoring feature and thus may enhance the interaction between the material to fill the cavity and the lateral wall of the exposed portion.

[0044] Each of the different vertical extensions of the at least two portions may comprise different inclinations to each other. In an example, a direction of the side wall of one the at least two portions may be parallel to thickness direction, whereas a direction of the side wall of the other of the at least two portions may be inclined to thickness direction.

[0045] The inclination in a thickness direction (from the top of the interconnection structure to the bottom of the cavity wall and the inclined portion may be associated to the base layer and the intermediate layer, whereas the substantially straight portion may be associated to the top layer) may bring a tapered overall shape of the interconnection structure and thus may enhance the contact with the component (for example connection pads) which may be relatively small.

[0046] Preferably the different vertical extensions of the at least two portions may comprise different shapes. In an example, a first portion may have a tapered shape, whereas a second portion may have a non -tapered / straight shape. In another example, the first portion may have a regular shape, for example a cylindrical shape, whereas the second portion may have an irregular shape. Since the different process manufacturing the two portions is able to bring the different shapes based on the final requirement and it provides the flexibility of design.

[0047] According to a further embodiment, the different vertical extensions (of the interconnection structure) may be planarly shifted one to each other. A planarly shift may be used to provide an offset position of the respective vertical extensions to each other in order to provide adecentered contact portion on the top of the interconnection structure. The offset may be used to ensure a contacting area on a predetermined area / side of the interconnection structure.

[0048] A planar extension of the interconnection structure that is delimited by the lateral wall of the exposed portion may increase towards the bottom wall of said cavity (in a vertical direction). In other words, a top diameter of the interconnection structure may be lower with respect to a lower diameter (at the cavity bottom wall) of the interconnection structure. The increase of the planar extension may be regular or irregularly.

[0049] Alternatively, the planar extension of the interconnection structure that is delimited (or defined) by the lateral wall of the exposed portion can be uniform towards the bottom wall of said cavity. In other words, the top diameter of the interconnection structure may be equal to the lower diameter of the interconnection structure. Such kind of design may provide a advantage of reducing the pitch of the interconnection structure for realization of fine line structuring and increasing the conductivity with the component by reducing the resistance of the interconnection structure. Meanwhile it can also provide a function of heat dissipation.

[0050] Furthermore, a recess may be provided in the bottom wall of said cavity. The recess may be formed in the whole extension of the cavity bottom wall between the lateral wall(s) of the interconnection structure. The recess may have a higher surface roughness, preferably provided by a laser. It will promote the adhesion between the encapsulated material and the cavity bottom to avoid the delamination.

[0051] In one embodiment, the lateral wall of the exposed portion compared to the lateral wall of the non-exposed portion may have at least one of the following properties:

[0052] - a different shape,

[0053] - a different inclination,

[0054] - different roughness of the respective wall,

[0055] - different structure, for example grain size and / or material properties.

[0056] This may be related to a feature of the exposed portion which undergoes different process steps in comparison the non-exposed portion. Additionally, the different features between the exposed portion and the non-exposed portion may have different function for the product.According to one embodiment, the interconnection structure may comprise an irregular top surface. Preferably the irregular top surface may comprise a dimple in the interconnection structure. Additionally or alternatively, the irregular top surface may comprise a bump and / or the top surface may have a regular / flat shape. This may bring the advantage of reliably providing a solder connection to the top surface, since the solder material may be hosted in the dimple of the irregular top surface. The irregular top surface may provide more surface area for the connection or bonding with the component, so the adhesion between the top surface and the component will be improved.

[0057] According to a further embodiment, the interconnection structure may have a lateral wall roughness that may be different from a surface roughness of a top surface of the interconnection structure. This may be related to different process steps. For example, the roughness of the lateral wall may be defined by a laser process step and / or etching process, whereas the roughness of the top surface may be defined by a galvanic plating step and / or etching process. Thus, a different roughness of the lateral wall compared with the roughness of the top surface may be advantageous, since the lateral wall shall have a good adhesion of the lateral adjacent material, in particular electrically insulating material, which is created by a high roughness of the lateral wall. Whereas a lower roughness of the top surface may be preferred is it reduces signal transmission losses to the component.

[0058] Preferably, the cavity may extend up to the one main surface of the one of the plurality of electrically insulating layer structures or may extend beyond the one main surface of the one of the plurality of electrically insulating layer structures This may simplify the connection of a component which may be hosted by the cavity, since the component may be exposed due to the fact that the cavity is extending beyond the main surface of one of the plurality of electrically insulating layer structures.

[0059] The cavity may extend up to the one main surface of more than one of the plurality of electrically insulating layer structures or may extend beyond more than of one main surface of the one of the plurality of electrically insulating layer structures. A deeper cavity may be provided, preferably for accommodating some active components like logic die for high performance computing application or it can be also advantageous for Silicon Photonics products

[0060] In one embodiment, the layers of the interconnection structure may comprise the same (preferably metallic) composition / material with respect to each other. This may be achieved bymanufacturing steps carried out and thus may simplify the manufacturing of the (plurality of the) interconnection structures, since all of them may be created within the same process steps. The same composition may provide an advantage that the CTE can be the same and the molecular structure can also be the same, so that it can improve the layers adhesion and the bonding performance among the material in different layers.

[0061] Additionally or alternatively, the layers of the interconnection structure may comprise different (preferably metallic) composition / material with respect to each other.

[0062] Furthermore, the layers of interconnection structure may comprise different internal structures. Preferably, even with the same composition in the layers, the base layer may have different crystal texture from the intermediate layer. The different internal structure may preferably be depending on the respective deposition process, preferably with different chemistry and reaction and / or its parameters.

[0063] The different internal structures may refer to different function in the product. The base layer can be configured as a seed layer with very thin layer as a base layer to support a further electrical plating layer growing with a thicker layer, for example, to provide a routing layer in order to transmit a signal.

[0064] In one embodiment, the layers of the interconnection structure may comprise the different (preferably metallic) composition / material with respect to each other. So, the layers of the interconnection structure may comprise different internal structures. The different composition may refer to different function of the layers. One layer can be different (e.g. the layer can be nickel) from the other layer (e.g. copper) may compensate or reduce the overall thickness with a lower effort, preferably by not forming one very thick layer which with respect to the costs of the process and complicated technology. Also, one layer can protect the shape or morphology of other layers. Additionally the different layer may provide a better signal transmission by using a better conductor material.

[0065] The different internal structures may be provided between the layers of the respective interconnection structure.Furthermore, the different internal structures may be provided between the layers of the exposed portion with respect to those of the non-exposed portion. Therefore, such kind of design can overall make the effort and cost lower for manufacturing.

[0066] According to a possible embodiment, the lateral wall of the exposed portion may comprise conductive and dielectric materials. The conductive material can be a laser stop layer to protect the bottom area from the damage due to the laser energy. Additionally, the conductive material can also avoid the over etching which may results in the void during encapsulation and the delamination of layers. Preferably, the conductive materials may be electrically and / or thermally conductive.

[0067] Preferably, each of the conductive and dielectric materials may correspond to a respective layer structure of the conductive layer structure of the stack. Preferably, the conductive material may comprise the at least one electrically conductive layer structure. Additionally or alternatively, the dielectric material may comprise at least one layer of the electrically insulating layer structures and / or an electrically insulating filling material.

[0068] According to a preferred embodiment, at least one material of an external layer on the exposed portion may be not provided on the non-exposed portion. As the exposed portion will be connected with the component, external layer is to ensure the solderability and protect the exposed portion However the non-exposed portion is in the dielectric layer of the stack and it is not necessary to connect with other element. Additionally or alternatively, at least one material of the external layer of the interconnection structure may be not provided on the nonexposed portion. This may safe additional effort and / or material and thus may the production of the component carrier faster.

[0069] The interconnection structure may comprise a surface finishing layer, which may be provided partially, preferably on the interconnection structure.

[0070] A surface finish can ensure the solderability for component bonding on and protect the exposed portion. In an example the top layer may comprise the surface finish. The surface finish may comprise nickel, silver, and / or gold. The surface finish may protect the interconnection structure of environmental impact, for example oxidation. The surface finish may be provided at least on the top layer. The surface finish layer may cover the sidewall of the interconnection or may not cover the sidewall of interconnection structure.According to one embodiment, a conductive material of the exposed portion may be different from a conductive material of the non-exposed portion by at least one of the following properties;

[0071] - density of the conductive material;

[0072] - different dimensions of an arrangement of resulting pads

[0073] - a planar extension of the conductive material

[0074] - a amount of pads per unit with respect to an arrangement of resulting pads.

[0075] Since the conductive material of the exposed portion may form the direct connection to a component, the properties may be different compared to the conductive material of the nonexposed portion, since the connection to the component may have to fulfill special requirements. The difference from the design point of view is a lean structure for the product and manufacturing. According to the invention, it can realize the different design by different solutions disclosed based on the final product application and requirement with efficiency

[0076] According to a preferred embodiment; a stepped portion may be provided between the bottom wall and a side wall of the cavity. The step portion can provide a further „finger print“ of the cavity formation by at least two steps. Alternatively, that stepped portion may be provided at the side wall or the bottom wall of the cavity only. The stepped portion may provide a further mechanical function to the stack.

[0077] The stepped portion may protrude inside the cavity. The stepped portion that protrudes inside the cavity may protect the damage of the upper sidewall of the cavity since the protrusion can shield the laser light reflect to the upper sidewall. Therefore, the upper sidewall may have a more straight shape which provide a better align between the cavity to other pattern of the stack and better encapsulation. Additionally, or alternatively, an indentation into the cavity may form the stepped portion. The stepped portion may comprise at least a portion of the exposed portion. Additionally, or alternatively, the stepped portion may comprise at least a portion of the non-exposed portion.

[0078] Furthermore, the stepped portion may comprise a conductive material. The conductive material can be configured as a laser stop layer at the lower side cavity formation to protect the bottom wall of the cavity from the damage of the laser energy, in particular an electrically conductive layer structure. Additionally or alternatively, the stepped portion may comprise the interconnection structure, in particular at least one layer of the interconnection structure, forexample the base layer and / or the intermediate layer and / or the top layer. This may bring the advantage of establishing a good mechanical connection of the bottom of the cavity and / the side wall of the cavity with an electrically conductive layer structure.

[0079] The stepped portion may also be composed of a stack of several layers. The stepped portion can be adapted based on the requirement of the product and production. The adaption of the stepped portion may not only ensure the quality of product during production, but can also change the structure of layers to finally impact the warpage performance.

[0080] Preferably, at least one layer, preferably all layers of the stack; may correspond to that layer / those layers forming the interconnection structure.

[0081] For the sake of completeness, it should be mentioned that the respective layers of the stack can correspond to the respective layers of the interconnection structure, wherein the interconnection preferably do not comprise all layers of the stack.

[0082] In one embodiment, the stepped portion may be an extension of the cavity beyond its side wall, preferably based on the design of the product and the final application. It can also provide an enhanced tolerance for the cavity size.

[0083] Preferably, an undercut may be formed in a planar direction by said stepped portion. The undercut may provide the extension of the cavity, preferably fully circumferential. The undercut may be a ’’finger print” of etching the electrically conductive structure at the sidewall of cavity. The undercut may be less than 20 pm, to control the undercut size to ensure there is no delamination and void after the encapsulation.

[0084] Furthermore, a protruding portion may be provided above the stepped portion (along a stack thickness direction), wherein the protruding portion extends inside the cavity, in particular in a planar direction. The protruding portion may be partially arranged in the cavity, or circumferentially arranged. The protruding portion may be a „fmger print“ of the cavity formation or designed on purpose. The protruding portion may protect the damage of the upper sidewall of the cavity since the protrusion can shield the laser light reflect to the upper sidewall. In an example, the protruding portion may comprise electrically insulating material, in particular at least one electrically insulating layer structure.The protruding portion may be used to position or center at least one component, which can be mount on the exposed portion. Therefore, the protruding portion may be designed geometrically with respect to a outer contour of a component that has to be inserted in the cavity.

[0085] According to a further embodiment, a further peripheral side wall of the cavity may be provided above the protruding portion. The side wall of the cavity may be divided by the protruding portion. The upper portion of the sidewall may have a bigger taper, and a bigger cross section (in a top view) compared with the lower portion of the sidewall.

[0086] The further peripheral side wall may be inclined or vertical, preferably perpendicular.

[0087] Independent of that, the side wall of the cavity may be delimited by a layer structure of the stack. Preferably, the side wall of the cavity may be delimitated by a plurality of layer structure, in particular a plurality of electrically insulating layer structures based on product design and final application

[0088] The layer structure delimiting the side wall of the cavity, which side wall is in contact with the bottom of the cavity may be an electrically insulating layer structure.

[0089] Alternatively, the layer structure delimiting the side wall of the cavity that is in contact with the bottom of the cavity may also be an electrically conductive layer structure.

[0090] The solutions in the invention may provide different possibilities to produce the product with efficiency and good quality.

[0091] According to a possible embedment, at least one component may be assembled with the interconnection structure. Preferably the cavity can be designed to accommodate the component, preferably in a form-fit manner. The interconnection structure may be designed to electrically contact the component. The interconnection structure may provide electrically current and / or electric signal to the component. The direct connection between the component and the component carrier by the interconnection structure can provide a short electrical signal transmission path, so that the integrity of the signal will be improved and the loss of the signal will be reduced, meanwhile the transmission speed between the component and the component carrier will be increased, which is advantageous for the high performance computing such as for the application or Al , server.Furthermore, a bridge may be provided, wherein the bridge is configured to connect at least two components one to each other. The connection may be provided directly, for example instead of connecting more than two components in the package by the component carrier. Therefore, the signal transmission path or the communication path among the components in the package can be reduced significantly, then the integrity of the electricity will be improved in the whole package. Besides that, the bridge can have a high density and very fine line structuring. This may reduce the density and the width / space of the component carrier, I which the bridge can be embedded. As usually the bridge is preferably made of silicon or glass which has a big advantage to realize the high density and fine line structuring with very good electrical performance compared the organic material that is used in the component carrier, so that it can improve the yield for the high density with fine line structuring package. Therefore, it is very suitable for the high performance computing.

[0092] Preferably, the two components are connected on a side of the bridge that is opposed to the interconnection structure.

[0093] A bridge may be provided by an element configured for providing electric interconnections. It may comprise a plurality of electrically conductive structure with high density, preferably configured for establishing an electrically conductive connection among the components which will be mounted on the component carrier and / or an upper side of an interposer. The bridge can be made of inorganic material such as silicon, ceramic, glass or other inorganic material or organic materials. The bridge can have a high density and very fine line structuring, in order to reduce the density and the width / space of the component carrier, in which the bridge will be embedded. As usually, the bridge can preferably be made of silicon or glass which has a big advantage to realize the high density and fine line structuring with very good electrical performance compared the organic material which is used in the component carrier.

[0094] In general, the stack may comprise a core layer-. The core layer may further comprise glass. With respect to a core or a core layer, the plurality of the electrically insulating layers can be provided on one side of the core. Optionally, a further plurality of electrically insulating layer structure and / or electrically conductive layer structure can be provided on an opposed side of the core. The opposed side may not comprise a cavity or interconnection structure.

[0095] An overall thickness of the interconnection structure may be higher than a thickness of one electrically conductive layer structure and / or one electrically insulating layer structure.The invention also relates to a method for manufacturing a component carrier according to one of the preceding claims, comprising the steps;

[0096] - providing a plurality electrically insulating layer structures,

[0097] - providing at least one electrically conductive layer structure on a main surface of one of the plurality electrically insulating layer structures;

[0098] - forming a cavity in the stack to expose a portion of the at least one electrically conductive layer structure;

[0099] wherein the exposed portion by said cavity of the at least one electrically conductive layer structure forms an interconnection structure provided on a bottom wall of said cavity, wherein a lateral wall of the exposed portion is different from a second lateral wall of a non-exposed portion) of said at least one electrically conductive layer structure.

[0100] A further advantage of the invention is that when the cavity is formed to expose the interconnection structure; the exposed portion can be provided after manufacturing the layers of the component carrier. Therefore, the interconnection structure can be covered by the layers of stack while performing individual steps in order to manufacture the component carrier, so the quality of the interconnection structure can be improved and the interconnection structure may not be affected during the production steps. Additionally, the base layer and / or intermediate layer of the interconnection structure can be formed while the electrically conductive structure is formed. In this case, no additional effort to form the layers may be needed, wherein the cost of manufacturing and yield of the product can be improved.

[0101] Another advantage is that the geometry of the cavity and subsequent its bottom can also be shaped afterwards, which allows a greater freedom of design, preferably based on the tolerance of cavity in the product Such kind of flexibility can provide a big tolerance for the cavity formation during manufacturing, so that the accuracy of control could request less effort, and the quality of product can be still improved.

[0102] The step of providing at least one electrically conductive layer structure may comprise the step of providing a base layer of the electrically conductive layer structure. Therefore, it may need no additional effort to form the layer. And the cost of manufacturing and yield of product can be insured as there may be no need to go through the further process afterwards.

[0103] Preferably, at least one additional layer of conductive material may be partially provided on at the least one electrically conductive layer structure; in an area of said cavity to be formed. Theadditional layer of conductive material may need different specification as the additional layer may be configured with different function. For example, a different function may comprise a laser stopper with thicker thickness than the base layer to efficiently insure no damage of the cavity bottom wall and / or the sidewall due to the laser energy. From the whole product point of view, the solution can achieve a good quality of product with lower cost.

[0104] The method may comprise a step of providing a temporary layer (structure) on the at least one electrically conductive layer structure. The temporary layer may be a dry film or the like; preferably laminated; which can act as a mask to apply a (further)conductive structure.

[0105] The method may also comprise at least one step of laminating a temporary layer that is formed on a conductive layer, wherein the temporary layer may be partially removed to expose the conductive layer and wherein parts of the conductive layer structure that are exposed by the removed temporary layer, may also be removed, preferably by stripping

[0106] For example, a base layer may be partially etched during the manufacturing process.

[0107] Alternatively, the base layer may be provided only partially, for example in openings of a temporary layer, preferably by a plating step.

[0108] According to one embodiment at least one opening in the temporary layer structure may only partially expose the additional layer of conductive material, so that the additional layer may be not exposed on at least one peripheral edge of the additional layer.

[0109] The method may preferably comprise a further step of partially removing material of the temporary layer to form openings in the temporary layer structure; and providing at least one further layer of the electrically conductive layer structure in the openings in the temporary layer.

[0110] It should be mentioned that further temporary layer(s) may be provided, as well as further openings may also be provided in the further temporary layer(s) (to be filled with conductive material).

[0111] After providing the further conductive layer on the conductive layer structure in the openings of the temporary layer, preferably by plating, the temporary layer may preferably be removed, in particular by stripping.Furthermore, at least one layer of the insulating layer structure may be provided on the electrically conductive layer structure. A plurality of insulating layers may be provided on the conductive layer structure.

[0112] At least one further conductive layer may be also provided. Preferably, no further conductive layer may be provided in the area of the cavity to be formed. So it can reduce the effort to form the conductive layer on the whole layer.

[0113] Preferably the insulating material of the electrically insulating layer structures can be partially removed to form the cavity and provide the exposed portion of the electrically conductive layer structure.

[0114] According to a further embodiment, the insulating material may be only removed within a first depth, preferably by a CO2 laser, with respect to an upper plane that is arranged above a top surface of the electrically conductive layer structure.

[0115] The conductive layer structure in said cavity to be formed may be used as a laser stopper with respect to a laser cutting depth into the stack.

[0116] A protruding portion may be formed in the insulating layer structure below the upper plane that is arranged above the top surface of the electrically conductive layer structure and wherein the protruding portion may be formed towards the cavity.

[0117] The step of partially removing the insulating material may be performed by a CO2 laser and / or an excimer laser.

[0118] In an embodiment, the insulating material may be removed within a second depth to a lower plane that is arranged corresponding to a lower surface of a layer of the electrically conductive layer structure.

[0119] The step of partially removing the insulating material may be performed by a CO2 laser with at least to different power modes.

[0120] The method may comprise a step of partially removing the electrically conductive layer structure, preferably by etching, preferably with the additional layer, in the cavity to partially expose the bottom wall of said cavity, in particular to form the lateral wall of the exposed portion.The conductive layer structure can further be used as a laser stopper while removing the insulating material, which may further enhance the quality of the manufacturing process.

[0121] According to one embodiment, a part of the electrically conductive layer structure may extend into a side wall of the cavity and forms the step portion inside the side wall. This can further be provided in order to avoid an over-etching of the side wall and a possible incomplete encapsulation in the etched sidewall area.

[0122] Furthermore, the part of the electrically conductive layer structure that extends into the side wall of the cavity may also be removed, wherein an undercut may be formed in the side wall preferably in a planar direction.

[0123] The partially removal of the electrically conductive layer structure may be carried out by etching, and / or also by a laser (as described before), preferably by an excimer laser.

[0124] Furthermore, the partially removal of the electrically conductive layer may be carried out by a laser within a partial thickness of the conductive layer, wherein the further removal may be carried out by etching.

[0125] There may also be a big pattern of the conductive layer structure in the cavity to be formed, wherein after forming the cavity side wall, the excimer laser may be used to etch the big pattern and in order to provide the interconnection structure.

[0126] Therefore, a dry etching process may be used to form the cavity; carried out by laser etching.

[0127] In general, an advantage of using a laser to form the interconnection structure at least partially (and maybe also the cavity) is the precision of a laser, as well as the controllable geometry based on the positioning / movement of the laser. Since laser step is a dry process, it can be much easier to adjust the parameter and control the accuracy than the wet process by using the chemistry in a plurality of tanks, beside that the laser process can also avoid the risk of contamination from the chemistry tank. The laser may have an alignment from + / - 3 pm, whereby the interconnection structure can be formed much more precisely and the interconnection design can be flexibly changed based on the requirement. The laser used may be a CO2 laser or CO2 laser and excimer laser (two steps).Generally, the laser that may be used to remove the material to form the cavity and / or the bottom wall of the cavity may comprise a mask that can be used to protect individual layers from being damaged, for example the cavity bottom.

[0128] For the sake of completeness, it should be mentioned that the laser can be movable along at least two directions in one plane. This enables a very flexible method to form any kind of design.

[0129] A glass mask may be provided, wherein the glass mask may be used to cover the parts of the cavity that have not to be ablated by the laser.

[0130] The glass mask may comprise a mask structure that corresponds to a shape of the interconnection structure and / or the cavity bottom in a top view on the cavity. The glass mask may have a breakthrough with respect to a shape of the cavity bottom wall that has to be formed.

[0131] This embodiment enables a plurality of individually designs of the cavity and its bottom wall.

[0132] The interconnection structure may also be formed by excimer etching a big pattern into different small pattern.

[0133] The interconnection structure may have a straight lateral wall (preferably with a top and a bottom diameter that can be equal to each other). The side wall may have a roughness formed by the excimer laser and the top of the interconnection can have a low roughness (preferably due to no etching of the excimer). The low roughness may reduce the resistance of the interconnection structure to improve the signal integrity.

[0134] According to a further embodiment a top diameter of the interconnection structure can be smaller than a bottom diameter of the interconnection structure.

[0135] There may be an etching step (from the excimer) on the cavity bottom wall, preferably of a dielectric material. The cavity bottom wall may have a higher roughness, preferably on the dielectric material. The roughness can improve the adhesion between an encapsulated material and bottom material of the bottom wall.

[0136] The interconnection structure may also have a straight lateral wall, wherein the lateral wall may have a roughness formed by the excimer laser and wherein the top of the interconnection has a lower roughness, preferably due to no etching of an excimer laser.Furthermore, a top diameter of the interconnection structure (in an area opposed to the cavity bottom wall) can be smaller than a diameter of the interconnection structure in the area of the cavity bottom wall.

[0137] As mentioned before, there may be an etching step from the excimer laser on the material of the cavity bottom wall, preferably a dielectric material, wherein the provided roughness of the material of the cavity bottom wall can improve the adhesion between an encapsulated material and the material of the cavity bottom wall.

[0138] A recess may be formed at the cavity bottom wall. The excimer laser may also be used to form the recess in the cavity bottom wall.

[0139] The cavity bottom wall may be roughened by means of an excimer laser.

[0140] In general, the excimer laser may comprise an UV-laser, preferably with mixed gas source, for example F2, Ne, Kr, N2, He, which can comprises different wavelength such as, (but not limited to) F2 (157nm), ArF (193nm), KrF (248nm), XeCI (308nm).

[0141] The excimer laser may be applied with a low wavelength which has high photon energy. The photon energy is preferably higher than a bond energy of most organic chemical bonds, in order the be able to break the chemical bond by the treatment of UV light. Meanwhile, the excimer laser me also be provided by a “cold laser” which can comprise short laser pulse duration, so the heat generated during processing is low compared to other types of lasers. Therefore, it can also have a lower impact on the surrounding area of the target position, which can be desirable with respect to the invention. In a conclusion, the excimer can accurately treat the target position of a subject by breaking the chemical bond with low impact on the area of the subject due to its property, so that it is particularly suitable for a circuit layer, a trench, or the cavity formation of the component carrier.

[0142] It is understood that a “material” in the sense of the present application may comprise one or more type(s) of element(s). It is further understood, that even if two of the (first, second and third) materials comprise the same element, but differ in another element and / or in composition and / or in element ratio, they are considered as being different from each other. For example, if the first material is a TiW alloy and second material is Ti, they are of course different toeach other. The material can comprise the insulating material the insulating material can be dielectric material and / or photosensitive material and / or photosensitive dielectric material

[0143] In the context of the present application, the term “component carrier assembly” is understood as a combination of a component carrier and at least one electronic component, preferably the component or other element embedded in or mounted on the component carrier with the encapsulated material or molding material to mold them,

[0144] In the context of the present application, the term “component carrier” may particularly denote any support structure which is capable of accommodating one or more components thereon and / or therein for providing mechanical support and / or electrical connectivity. In other words, a component carrier may be configured as a mechanical and / or electronic carrier for components. In particular, a component carrier may be one of a printed circuit board, an organic interposer, and an IC (integrated circuit) substrate. A component carrier may also be a hybrid board combining different ones of the above-mentioned types of component carriers.

[0145] In the context of the present application, the term “component” may particularly denote an electronic component which is configured to be mounted on and / or to be embedded into a component carrier, wherein the component may further in particular be configured to be electrically connected to the component carrier. A component can be an inorganic component (such as, for example, a semiconductor component) or a component comprising inorganic material and / or metal material and / or a combination thereof or consisting thereof. Additionally or alternatively, a component may be a physical body configured to be mounted on and / or to be embedded into a component carrier. For example, said physical body may be one of: a copper block, a glass block, a ceramic block, an inlay, a bridge, a PCB, an IC substrate, an interposer.

[0146] A component may in particular be selected from a group consisting of an electrically non-con-ductive inlay, an electrically conductive inlay (such as a metal inlay, preferably comprising copper or aluminum), a heat transfer unit (for example a heat pipe), a light guiding element (for example an optical waveguide or a light conductor connection), an electronic component, or combinations thereof. An inlay can be for instance a metal block, with or without an insulating material coating (IMS-inlay), which could be either embedded or surface mounted for the purpose of facilitating heat dissipation. Suitable materials are defined according to their thermal conductivity, which should be at least 2 W / mK. Such materials are often based, but not limited to metals, metal-oxides and / or ceramics as for instance copper, aluminum oxide(A12O3) or aluminum nitride (AIN). In order to increase the heat exchange capacity, other geometries with increased surface area are frequently used as well. Furthermore, a component can be an active electronic component (having at least one p-n-junction implemented), a passive electronic component such as a resistor, an inductance, or capacitor, an electronic chip, a storage device (for instance a DRAM or another data memory), a filter, an integrated circuit (such as field-programmable gate array (FPGA), programmable array logic (PAL), generic array logic (GAL) and complex programmable logic devices (CPLDs)), a signal processing component, a power management component (such as a field-effect transistor (FET), metal-oxide-semi conductor field-effect transistor (MOSFET), complementary metal-oxide-semi-conductor (CMOS), junction field-effect transistor (JFET), or insulated-gate field-effect transistor (IGFET), all based on semiconductor materials such as silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), gallium oxide (Ga2O3), indium gallium arsenide (In-GaAs) and / or any other suitable inorganic compound), an optoelectronic interface element, a light emitting diode, a photocoupler, a voltage converter (for example a DC / DC converter or an AC / DC converter), a cryptographic component, a transmitter and / or receiver, an electromechanical transducer, a sensor, an actuator, a microelectromechanical system (MEMS), a microoptoelectromechanical system (MOEMS), a microprocessor, a capacitor, a resistor, an inductance, a battery, a switch, a camera, an antenna, a logic chip, and an energy harvesting unit. However, in addition or alternatively, other components may be embedded in the component carrier. For example, a magnetic element can be used as a component. Such a magnetic element may be a permanent magnetic element (such as a ferromagnetic element, an antiferromagnetic element, a multiferroic element or a ferrimagnetic element, for instance a ferrite core) or may be a paramagnetic element. However, the component may also be an IC substrate, an interposer or a further component carrier, for example in a board-in-board configuration. The component may be surface mounted on the component carrier and / or may be embedded in an interior thereof. Moreover, also other components, in particular those which generate and emit electromagnetic radiation and / or are sensitive with regard to electromagnetic radiation propagating from an environment, may be used as component. Additionally or alternatively, the component may comprise a polymer waveguide and / or (optical) lenses and / or collimators and / or ferrules.

[0147] In the context of the present application, the term “stack” may particularly denote an arrangement of multiple planar layer structures which are mounted in parallel on top of one another.It may comprise at least one electrically insulating layer structure and at least one electrically conductive layer structure. For example, the stack may be a laminate of the mentioned electrically insulating layer structure(s) and electrically conductive layer structure(s), in particular formed by applying mechanical pressure and / or thermal energy. The mentioned stack may provide a plate-shaped component carrier capable of providing a large mounting surface for further components. In an example, the stack may be nevertheless very thin and compact. In another example, the stack may be very thick for a high-density product. The stacking direction (height / thickness) may be arranged in the vertical direction z. Further, the stacking direction may be perpendicular to the two directions of main extension (along x and y) of the (pl ate- shaped) component carrier.

[0148] In the context of the present application, the term “layer structure” may particularly denote a continuous or discontinuous layer, a patterned layer or a plurality of non-consecutive islands within a common plane. A plurality of such layers, parallel stacked one upon the other, may form the stack in the vertical direction.

[0149] In the context of the present application, the term “main surface” of a body may particularly denote one of two largest opposing surfaces of the body. The main surfaces may be connected by circumferential side walls. The thickness of a body, such as a stack, may be defined by the distance between the two opposing main surfaces.

[0150] Preferably, the component carrier assembly is a printed circuit board (PCB) and / or a substrate (such as an IC substrate) and / or an interposer.

[0151] In the context of the present application, the term “printed circuit board” (PCB) may particularly denote a plate-shaped component carrier which is formed by laminating several electrically conductive layer structures with several electrically insulating layer structures, for instance by applying pressure and / or by the supply of thermal energy. As preferred materials for PCB technology, the electrically conductive layer structures are made of copper, whereas the electrically insulating layer structures may comprise resin and / or glass fibers, so-called prepreg or FR4 material. The various electrically conductive layer structures may be connected to one another in a desired way by forming holes through the laminate, for instance by laser drilling or mechanical drilling, and by partially or fully filling them with electrically conductive material (in particular copper), thereby forming vias or any other through-hole connections. The filled hole either connects the whole stack, (through-hole connections extendingthrough several layers or the entire stack), or the filled hole connects at least two electrically conductive layers, called via. Similarly, optical interconnections can be formed through individual layers of the stack in order to receive an electro-optical circuit board (EOCB). Apart from one or more components which may be embedded in a printed circuit board, a printed circuit board is usually configured for accommodating one or more components on one or both opposing surfaces of the plate-shaped printed circuit board. They may be connected to the respective main surface by soldering. A dielectric part of a PCB may be composed of resin with reinforcing fibers (such as glass fibers).

[0152] In an embodiment, the at least one electrically insulating layer structure comprises at least one of the group, consisting of a resin or a polymer, such as epoxy resin, cyanate ester resin, benzocyclobutene resin, bismaleimidetriazine resin, polyphenylene derivate (for example based on polyphenylenether, PPE), polyimide (PI), polyamide (PA), liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE) and / or a combination thereof. Reinforcing structures such as webs, fibers, spheres or other kinds of filler particles, for example made of glass (multilayer glass) in order to form a composite, could be used as well. A semi-cured resin in combination with a reinforcing agent, for example fibers impregnated with the above-mentioned resins is called prepreg. These prepregs are often named after their properties for example FR4 or FR5, which describe their flame retardant properties. Although prepreg particularly FR4 are usually preferred for rigid PCBs, other materials, in particular epoxy -based build-up materials (such as build-up films) or photoimageable dielectric materials, may be used as well. For high frequency applications, high-frequency materials such as polytetrafluoroethylene, liquid crystal polymer and / or cyanate ester resins, may be preferred. Besides these polymers, low temperature cofired ceramics (LTCC) or other low, very low or ultra-low DK materials may be applied in the component carrier as electrically insulating structures.

[0153] In an embodiment, the at least one electrically conductive layer structure comprises at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, tungsten and magnesium. Although copper is usually preferred, other materials or coated versions thereof are possible as well, in particular coated with supra-conductive material or conductive polymers, such as graphene or poly(3,4-ethylenedioxythiophene) (PEDOT), respectively.

[0154] It is also possible to apply a surface finish selectively to exposed electrically conductive surface portions of the component carrier in terms of surface treatment. Such a surface finishmay be an electrically conductive cover material on exposed electrically conductive layer structures (such as pads, conductive tracks, etc., in particular comprising or consisting of copper) on a surface of a component carrier. If such exposed electrically conductive layer structures are left unprotected, then the exposed electrically conductive component carrier material (in particular copper) might oxidize, making the component carrier less reliable. A surface finish may then be formed for instance as an interface between a surface mounted component and the component carrier. The surface finish has the function to protect the exposed electrically conductive layer structures (in particular copper circuitry) and enable a joining process with one or more components, for instance by soldering. Examples for appropriate materials for a surface finish are Organic Solderability Preservative (OSP), Electroless Nickel Immersion Gold (ENIG), Electroless Nickel Immersion Palladium Immersion Gold (ENIPIG), gold (in particular hard gold), chemical tin, nickel-gold, nickel-palladium, etc.

[0155] According to a further possible embodiment, an electrically insulating solder resist may be applied to one or both opposing main surfaces of the layer stack or component carrier in terms of surface treatment. For instance, it is possible to form such a solder resist on an entire main surface and to subsequently pattern the layer of solder resist so as to expose one or more electrically conductive surface portions which shall be used for electrically coupling the component carrier to an electronic periphery. The surface portions of the component carrier remaining covered with solder resist may be efficiently protected against oxidation or corrosion, in particular surface portions containing copper.

[0156] To provide better understanding of the invention, the invention is explained in more detail with the aid of the following figures.

[0157] The following is shown in a strongly simplified, schematic representation:

[0158] Fig. 1 a first embodiment of a component carrier;

[0159] Fig. 2 a second embodiment of a component carrier;

[0160] Fig. 3 a first possible step of producing an intermediate product;

[0161] Fig. 4 a second possible step of producing an intermediate product;

[0162] Fig. 5 a third possible step of producing an intermediate product;Fig. 6 a fourth possible step of producing an intermediate product;

[0163] Fig. 7 a fifth possible step of producing an intermediate product;

[0164] Fig. 8 a sixth possible step of producing an intermediate product;

[0165] Fig. 9 a first embodiment of an intermediate product;

[0166] Fig. 10 a second embodiment of an intermediate product;

[0167] Fig. 11 a third embodiment of a component carrier;

[0168] Fig. 12 a fourth embodiment of a component carrier;

[0169] Fig. 13 a further possible step of producing an intermediate product;

[0170] Fig. 14 a fifth embodiment of a component carrier;

[0171] Fig. 15 a sixth embodiment of a component carrier;

[0172] Fig. 16 embodiments of an interconnection structure;

[0173] Fig. 17 a first embodiment of a cavity from a top view;

[0174] Fig. 18 a second embodiment of a cavity from a top view;

[0175] Fig. 19 a further embodiment of a component carrier;

[0176] Fig. 20 a detail of a possible embodiment of the interconnection structure.

[0177] As an introduction, it should be noted that in the embodiments described in different ways, identical parts or method steps are indicated with identical reference numbers or identical component designations; at the same time, the disclosures contained in the entire description may be analogously applied to identical parts with identical reference numbers or identical component designations. Moreover, the position indications chosen in the description, such as at the top, at the bottom, laterally, etc. refer to the figure which is directly represented and described; and if a position changes, said position indications are to be applied analogously to the new position.For the sake of good order, it should finally be noted that, for better understanding, some of the facts shown in the figures have been represented unsealed and / or enlarged and / or in reduced size.

[0178] Fig. 1 shows a possible embodiment of a component carrier 1 according to the invention. The component carrier 1 comprises a stack 2 with at least one electrically conductive layer structure 3 and a plurality of electrically insulating layer structures 4, said at least one electrically conductive layer structure 3 being provided on a main surface 5 of one of the plurality of electrically insulating layer structures 4.

[0179] A cavity 6 is formed in the stack 2, the cavity 6 exposes a portion 7 of the at least one electrically conductive layer structure 3.

[0180] The exposed portion 7 by said cavity 6 of the at least one electrically conductive layer structure 3 forms an interconnection structure 9 provided on a bottom wall 10 of said cavity 6, wherein a lateral wall 11 of the exposed portion 7 is different from a lateral wall 12 of a nonexposed portion 8 of said at least one electrically conductive layer structure 3. In the shown Figure 1, three interconnection structures 9 are provided. Each of the three interconnection structures 9 can have the same extension with respect to their width and / or height.

[0181] The stack 2 may comprise a central structure, preferably a core. According to the embodiment shown, the conductive layer structures may comprise 3 conductive layer structures on each respective side of the core.

[0182] In general, the electrically conductive layer structures can be interconnected with each other by vertical interconnections, preferably by filled interconnections, especially in the non-ex-posed portion 8.

[0183] According to a further embodiment the cavity can be formed in one side of a core or may be formed at least partially in the core and my further be formed through one side of the stack or formed from the other side of the core and through the core at least partially in the opposite of the stack (not shown).

[0184] The non-exposed portion 8 is preferably covered by the electrically insulating layer structures 4. The non-exposed portion may be covered at the lateral walls and / or one the main surface.The number of layers of the exposed portion 7 of the at least one electrically conductive layer structure 3 may be higher than the number of layers of the non-exposed portion 7 of the at least one electrically conductive layer structure 3.

[0185] As shown, the exposed portion 7 may comprise three electrically conductive layer structure, in particular a base layer 13, an intermediate layer 15 and a top layer 14, whereas the non-ex-posed portion 8 can comprise two electrically conductive layer structures, in particular the base layer 13 and the top layer 14.

[0186] Furthermore; the thickness dl of at least one layer of the exposed portion 7 may be different from the thickness d2 of the correspondent layer of the non-exposed portion 8.

[0187] The thickness d3 of the exposed portion 7 may be higher than the thickness d4 of the non-exposed portion 8.

[0188] It should be said that a thickness may refer to an extension in a vertical direction of the stack; preferably perpendicular, to the main extension of the layers of the stack.

[0189] The thickness dl of at least one layer of the non-exposed portion 8 may correspond to the thickness d2 of a correspondent layer of the exposed portion 7 and wherein the exposed portion 7 may be thicker than the non-exposed portion 7.

[0190] Preferably the at least one electrically conductive layer structure 3 may comprise at least one base layer 13 and at least one top layer 14. The at least one base layer 13 and at least one top layer 14 may be provided in the exposed portion 7 and / or in the non-exposed portion 8.

[0191] According to a preferred embodiment, the electrically conductive layer structure 3 may comprise an intermediate layer 15. The intermediate layer 15 may only be provided in the exposed portion 7. In general, the intermediate layer may comprise copper and / or nickel.

[0192] A thickness d5 of the intermediate layer 15 may be higher than the thickness d6 of the base layer 13 and / or may be lower than the thickness d7 of the top layer 14.

[0193] The at least one base layer 13 may comprise at least one seed layer.

[0194] The intermediate layer 15 and / or the top layer 14 may comprises a plated layer, in particular a galvanic layer.The thickness d6a of the base layer 13 of the exposed portion 7 may correspond to the thickness d6b of the base layer 13 of the non-exposed portion 8 and / or may differ from the thickness d6b of the base layer 13 of the non-exposed portion 8 at max 10%. The thickness d6a may be the same to the thickness d6b.

[0195] The thickness d7a of the top layer 14 of the exposed portion 7 may correspond to a thickness d2 of a layer of the non-exposed portion 8, preferably to the thickness d7b of the top layer 14 of the non-exposed portion 8. The thickness d7a may be the same to the thickness d7b.

[0196] In one embedment the interconnection structure 9 may have an irregular top surface 18. The irregular top surface 18 can comprise a dimple that is formed in the interconnection structure 9. A possible dimple is indicated with dashed lines on the top surface 18 of the interconnection structure, in the detail B in Fig. 1

[0197] The interconnection structure 9 may have a lateral wall roughness that may be different from a surface roughness of a top surface of the interconnection structure 9. The roughness may also depend on a manufacturing process. A schematic example of a lateral wall roughness can also be seen in the detail B, independent of the embodiment shown.

[0198] According to one embodiment, the cavity 6 may extend up to the one main surface 5 of the one of the plurality electrically insulating layer structures 4 or extend beyond the one main surface 5 of the one of the plurality electrically insulating layer structures 4.

[0199] The layers of the interconnection structure 9 may comprise the same composition / material, preferably metallic, with respect to each other. The layers of interconnection structure 9 may comprise the different composition / material preferably metallic, with respect to each other.

[0200] The layer of interconnection structure 9 may comprise different internal structures. The different internal structures can preferably depend on the deposition process and parameters. The different internal structures may be provided between the layers of the respective interconnection structure 9. Furthermore, the different internal structures may be provided between the layers of the exposed portion 7 with respect to those layers of the non-exposed portion 8.

[0201] According to a further embodiment, the lateral wall of the exposed portion 11 may comprise conductive and dielectric materials. Each of the conductive and dielectric materials may correspond to a respective layer structure of the conductive layer structure 3.According to a preferred embodiment, at least one material of an external layer on the exposed portion 7 may be not provided on the non-exposed portion 8. According to one embodiment, the intermediate layer may not be provided in the non-exposed portion 8 as mentioned before.

[0202] The interconnection structure 9 may also comprise a surface finishing layer, in particular a nickel, palladium, gold layer; that is arranged on the interconnection structure 9 at the top surface and / or the lateral surface for a soldering bump bonding on the surface. .

[0203] According to one embodiment a conductive material of the exposed portion 7 may be different from a conductive material of the non-exposed portion 8 by at least one of the following properties; density of the respective conductive material; different dimensions of possible arrangement of resulting pads; a planar extension of the respective conductive material; an amount of pads per unit with respect to an arrangement of resulting pads.

[0204] The exposed electrically portion 7 may comprise at least one, in particular a plurality of structures (for example traces, pads) each one being delimited by one or more lateral walls, said lateral walls being different from the structures of the non-exposed portion 8.

[0205] According to a preferred embodiment, a stepped portion 19 may be provided between the bottom wall 10 and a side wall 20 of the cavity 6. The stepped portion 19 may protrude inside the cavity 6. The stepped portion 19 can also extend inside the side wall 20 of the cavity, as shown in Fig. 1 The stepped portion may comprise the electrically insulating layer structure 4 and the electrically conductive layer structure 3.

[0206] According to one possible embodiment, as shown in the detail A in Fig. 1, the stepped portion 19 may be an extension of the cavity 6 beyond its side wall 20. The extension can be formed preferably circumferentially.

[0207] Preferably an undercut 21 in a planar direction may be formed by etching said stepped portion 19.

[0208] According to a further embodiment, also independent of the embodiment shown, a protruding portion 22 may be provided above the stepped portion 19, wherein the protruding portion 22 extends inside the cavity 6, in particular in a planar direction. A further peripheral side wall23 of the cavity 6 may be provided above the protruding portion 22. Furthermore, the further peripheral side wall 23 may be inclined, as it can be seen in Fig. 1, or also maybe vertical.

[0209] As indicated with dashed lines in Fig. 1, the side wall 20 may alternatively extend down to the step without a protruding portion (independent of the step).

[0210] In one embodiment, the side wall 20 of the cavity 6 may be delimited by a layer structure of the stack 2. Preferably, the layer structure delimiting the side wall 20 of the cavity 6, that is in contact with the bottom wall of the cavity 6, may be an electrically insulating layer structure 4. Alternatively, the layer structure delimiting the side wall 20 of the cavity 6 that is in contact with the bottom of the cavity 6 may be an electrically conductive layer structure 3.

[0211] Preferably at least one component 24 may be assembled with the interconnection structure 9.

[0212] A vertical undercut 41 may be formed in the lateral wall of the exposed portion 11 towards the bottom of the cavity 6, as indicated with dashed lines in the detail B in Fig. 1.

[0213] Independent of the embodiment shown, the interconnection structure 9 may comprise a plurality of interconnection structures (or interconnection structure elements) being similar one to each other (preferably in term of layers).

[0214] Fig. 2 shows a further possible embodiment of the component carrier; wherein equal reference numbers / component designations are used for equal parts as before in Fig.l. In order to avoid unnecessary repetitions, it is pointed to / reference is made to the detailed description in Fig. 1 preceding it.

[0215] The stepped portion 19 may comprise a conductive material. Furthermore, the stepped portion 19 may be composed of a stack of several layers. Preferably at least one layer, preferably all layers of the stack of the stepped portion 19 may correspond to that layer / those layers forming the interconnection structure 9.

[0216] According to one embodiment, independent of the embodiment shown, at least one lateral wall of the interconnection structure 9 may comprise at least two portions having a different vertical extension 16a, 16b with respect to each other. At least one of the two different vertical extensions 16 may be associated to a respective layer composing the interconnection structure 9.In one embodiment, the lateral wall of the exposed portion 11 of the interconnection structure 9 may have a convex shape.

[0217] Each of the different vertical extensions 16 may comprise different inclinations to each other. Alternatively, or additionally; the different vertical extension sl6 may also comprise different shapes. However, the vertical extension may be the same for all the layers or may be consistent.

[0218] According to a further embodiment a bridge 37 may be provided, wherein the bridge 37 is configured to connect at least two components 24 one to each other by a further interconnection structure, preferably provided on the top surface of the bridge and the component carrier . The two components may be connected on a side of the bridge 37 that is opposed to the interconnection structure 9. The two components 24 (shown) may be inserted one behind the other in the cavity 6 with respect to the image plane to be viewed in Fig. 2.

[0219] As it can be seen, in general the bottom wall of the cavity may be flat and perpendicular to a thickness direction.

[0220] Independent of the embodiment shown in Fig. 2, the cavity side wall may comprise different inclinations with respect to a vertical direction (independent of a protruding portion).

[0221] Further independent of the embodiment shown, at least one of the plurality of elements E of the interconnection structure 9 may be different to the other elements E of the interconnection structure 9.

[0222] For example, a geometry and / or width of an element E2 may be different with respect to the other Elements El and E3, in such way that the element E2 may a bigger cross section.

[0223] The bigger element E2 may be used for providing current, whereas the other elements El, E3 may be used for signal transmission.

[0224] As further indicated, independent from the embodiment shown, the different vertical extensions of the interconnections structure may be planarly shifted one to each other, as it can be seen by the element E3 with respect to its (shifted) center axis’ of its vertical extensions.

[0225] It should be mentioned that each of the elements can provide the lateral walls of the exposed portion 11.As it can be further seen in Fig. 1 and 2, the planar extension of the interconnection structure 9 that is delimited (or defined) by the lateral wall of the exposed portion 11 may increase towards the bottom wall 10 of said cavity 6 (in a vertical direction). In other words, a top diameter of the interconnection structure may be lower with respect to a lower diameter (at the cavity bottom wall) of the interconnection structure. The increase of the planar extension may be regular or irregularly.

[0226] Furthermore, the surface of the cavity bottom wall 10 may be roughened, preferably by a laser. Preferably a recess may be formed in the cavity bottom wall, in particular between the elements E of the interconnection structure 9, which will be described later.

[0227] Fig. 3 to 15 show different intermediate products of a component carrier 1 with respect the method for manufacturing a component carrier as described before, wherein equal reference numbers / component designations are used for equal parts as before in Fig.l and 2. In order to avoid unnecessary repetitions, it is pointed to / reference is made to the detailed description in Fig. 1 and 2 preceding it.

[0228] According to Fig. 3, the step of providing at least one electrically conductive layer structure 3 may comprise the step of providing a base layer 13 of the electrically conductive layer structure 3. As mentioned before, the base layer may be a seed layer.

[0229] Preferably at least one additional layer 26 of conductive material can be partially provided by plating on at the least one electrically conductive layer structure 3; in an area of said cavity 6 to be formed. Providing a temporary layer 27a (dry film) on the base layer 13 is configured to form pattern on the dry film. Afterwards, taking using of exposure forms a big opening 28a in the temporary layer 27a, then forming an additional layer 26 in the opening of temporary layer 27a which may be configured as laser stop layer.

[0230] As it can be seen in Fig. 4, there may be a step of providing a further temporary layer 27bto expose the at least one electrically conductive layer structure 3 with the opening 28b.

[0231] As it can be seen in Fig. 5, material of the temporary layer 27 (including 27a and 27b) may be removed to form (further) openings 28b in the temporary layer 27 structure by exposing and developing the material, preferably after providing the additional layer 26 of conductive material, to partially expose the conductive layer structure. The temporary layer may be a dry film.As it can be seen in Fig. 5, At least one further layer of the electrically conductive layer structure 3 may be provided in the openings 28 in the temporary layer 27by applying conductive material 35, preferably also on the additional layer 26 of conductive material, as shown in Fig.

[0232] 5.

[0233] Independent of the embodiment shown, at least one of the openings 28b in the temporary layer 27 structure may only partially expose the additional layer 26 of conductive material, so that the additional layer 26 may be not exposed on at least one peripheral edge 36 of the additional layer 26, before applying the at least one layer of the electrically conductive layer structure 3, as it can be seen in Fig. 5 and 6.

[0234] According to the intermediate product in Fig. 7, the temporary layer has been removed by stripping with the chemistry to loose the connection between the temporary layer and the electrically conductive layer structure 3 and then use high pressure rinse removing it finally. A part of the conductive layer structure (preferably also parts of the conductive material 35) may have also been removed, preferably to be formed as the top layer 14, for example by etching.

[0235] According to the intermediate product in Fig. 8 at least one layer of the insulating layer structure may be provided on the electrically conductive layer structure 3. Preferably, a plurality of insulating layers 25 may be formed to build the stack. At least on further electrically conductive layer 17 may also be provided.

[0236] According to a possible embodiment, an intermediate product of the stack may be provided, by adding further insulating layers and / or conductive layers, preferably on both sides as it can be seen in Fig. 3 to 8. The second side may comprise the same layer structures, or different.

[0237] Independent of the embodiment shown, the interconnection structure to be formed which has not yet been exposed, preferably may already comprise its build up layers. The interconnection structure may be covered by the insulating layer structure as it can be seen in Fig. 8.

[0238] The insulating material in the electrically insulating layer structures 4 may be partially removed to form the cavity 6 and provide the exposed portion 7 of the electrically conductive layer structure 3.

[0239] The step of partially removing the electrically insulating layer structures 4 may be carried out in several sub-steps, preferably by different methods.According to one embodiment, the insulating material of the electrically insulating layer structure 4 may only be removed within a first depth 29 with respect to an upper plane 30 that is arranged on or above a top surface 31 of the electrically conductive layer structure 3 in said cavity to be formed as it can be seen in Fig. 9. The cavity 6 may be formed partially by that step, wherein the electrically conductive structure 3 may be partially exposed, or not exposed.

[0240] With respect to the cavity, the protruding portion may be formed partially by each of the steps. The upper plane 30 may define an upper plane of the protruding portion.

[0241] The protruding portion 22 may be formed in the insulating layer structure 4 under the upper plane 30 that is arranged on or above the top surface 31 of the electrically conductive layer structure 3 and wherein the protruding portion 22 is formed towards the cavity.

[0242] According to an embodiment, the insulating material may be further partially removed within a second depth 32 to a lower plane 33 at a lower surface 34 of a layer of the electrically conductive layer structure 3, as shown in Fig. 10. The lower surface 34 can preferably be provided by the additional layer.

[0243] As said before, the steps of partially removing the insulating material with respect to the upper plane 30 and the lower plane 33 may be subsequent steps. The subsequent steps may be carried out by different methods.

[0244] The step(s) of partially removing the insulating material may be performed by a CO2 laser and / or an excimer laser. Therefore, a schematic Laser L is indicated in the figures as a possible forming step. Preferably the excimer laser can be used for removing material to the lower plane 33. The CO2 Laser may be used for removing material in the depth to the upper plane 30.

[0245] The step of partially removing the insulating material may also be performed by a CO2 laser with at least to different power modes, wherein a higher power mode may be used for the material above the upper plane 30 and a lower power mode may be used for the material between the upper plane 30 lower plane 33.

[0246] As it can be seen in Fig. 9 to 10, the insulating material can be removed within an offset (with respect to a side wall to be formed) to the material that may has been removed in a possiblefirst step within a first depth to an upper plane, preferably in order to provide the protruding portion 22.

[0247] Independent of the embodiment shown, the additional layer of conductive layer structure 3 may further be used as a laser stopper in the cavity 6.

[0248] Fig. 11 and Fig. 12 show possible embodiments of a component carrier 1, comprising an exposed portion 7 by said cavity 6 forming an interconnection structure 9.

[0249] The method may further comprise a step of partially removing the electrically conductive layer structure 3 in the cavity 6, preferably also partially removing the additional layer 15 and base layer 13, to partially expose the bottom wall 10 of said cavity 6, in particular in order to build the lateral wall of the exposed portion 11.

[0250] The step of partially removing the electrically conductive layer structure 3 to partially expose the bottom wall 10 may be carried out by etching (flash etching), as it can be seen in Fig. 11.

[0251] Furthermore, the part of the electrically conductive layer structure 3 that extends into the side wall 20 of the cavity may also be removed, preferably by etching. Furthermore, an undercut 21 may be formed in the side wall 20.

[0252] The step of partially removing the electrically conductive layer structure 3 to partially expose the bottom wall 10 can also be carried out by a laser, as it can be seen in Fig. 12, preferably an excimer laser.

[0253] By using a laser L to expose the bottom wall 10, the laser may also be used to form an individual design of the lateral wall of the exposed portion 11.

[0254] The lateral wall of the exposed portion 11 may be shaped as mentioned according to the embodiments above. At least one lateral wall of the interconnection structure may have at least two portions with different vertical extensions 16; as described before.

[0255] According to a further embodiment, as it can be also seen in Fig. 12, the conductive layer structure 3 may partially remain in an area of the side wall of the cavity 6.A part of the electrically conductive layer structure 3 may extend into a side wall 20 of the cavity and form a step portion 19 inside the side wall 20. Preferably, the part of the electrically conductive layer structure 3 that extend into a side wall 20 may be arranged at least partially under the protruding portion 22.

[0256] According to the Figures 13 to 15; the conductive layer structure 3 may comprise at least one layer that is provided in the area of the cavity to be formed; wherein the at least one conductive layer may be formed by a conductive portion 38 that may have a uniform thickness. The conductive portion 38 may be formed on a base layer 13 described before. The conductive portion 38 may comprise a single pad that extends planarly over the area the cavity to be formed.

[0257] The insulating material of the insulating layer structure 4 may be partially removed, preferably by a Laser, preferably in order to form at least the side wall of the cavity, as indicated by dashed lines in Fig. 13.

[0258] According to Fig 14 and 15 the conductive material of the conductive layer structure 3 may be partially removed to expose the bottom wall of the cavity and form the interconnection structure 9. The conductive material may be removed by an excimer laser, as described before.

[0259] Independent of the embodiments shown, a glass mask G may be used, whereby the glass mask G is indicated in a rough schematic representation in Fig. 14 and 15.

[0260] As shown in Fig. 14, the conductive material at the edge of the cavity 6 may be at least partially removed (as it can be seen at the right side of the cavity). As it can be seen in Fig. 14 (at the left side of the cavity) the conductive material at the edge of the cavity 6 may be removed.

[0261] As further shown in Fig. 14, the material of the (remaining) conductive layer structure may also form a part of the side wall, at least partially, as it can be seen on the right side of the cavity

[0262] Independent of the embodiment shown, the cavity may have different side wall inclinations, with respect to opposite side walls and / or in a vertical direction of the side wall.

[0263] As shown in Fig. 15, the conductive material may form a step portion 19 protruding inside the cavity. Furthermore, the step may be provided circumferential in the cavity, or partially.Independent of the embodiment shown; the side wall may comprise different shapes, for example different inclinations, preferably with respect to a vertical direction. A laser may be used to form the different shapes of the side wall of the cavity when removing the insulating material.

[0264] Independent of the embodiments shown, the roughness of the cavity bottom may be increased by the laser L.

[0265] Further independent of the embodiment shown in Fig. 15, the side wall of the cavity may extend down to the step portion without a protruding portion.

[0266] Fig. 16 a) to d) show embodiments of further possible shapes of the interconnection structure and its lateral walls - independent of the number of layers and their arrangement in the interconnection structure.

[0267] As also indicated in Fig. 16 b) and c) the bottom wall 10 of the cavity may extend beyond the surface of the insulating layer structure 4, wherein the lateral wall of the exposed portion 11 may also comprise a insulating material.

[0268] Preferably a recess may be formed at the cavity bottom wall 10. The recess may extend between the lateral wall of the exposed portion 11. In other words, the recess may be provided in the parts of bottom wall 10 that are exposed between the interconnection structure. The recess may extend under a lowest layer of the interconnection structure, for example the base layer.

[0269] The recess can be formed by the excimer laser in order to provide a higher roughness at the cavity bottom wall 10.

[0270] Independent of the embodiment shown, the interconnection structure may have a straight lateral wall. Therefore, the planar extension of the interconnection structure 9 that is delimited by the lateral wall of the exposed portion 11 can be uniform towards the bottom wall 10 of said cavity 6 (in a vertical direction).

[0271] The lateral wall may have a roughness formed by the excimer laser described before and the top of the interconnection structure may have a low roughness due to no etching of the excimer laser.Independent of the embodiment shown, a further adaption of the cavity bottom wall 10 is enabled, which may be performed while forming the cavity bottom. As also mentioned before, a glass mask may be used while forming the cavity bottom by a laser.

[0272] As further shown in Fig. 16 a) and c) the lateral wall of the exposed portion 11 may be inclined to a top surface of the interconnection structure. Therefore, a top diameter of the interconnection structure can be smaller than a bottom diameter of the interconnection structure.

[0273] As further shown in Fig. 16, the bottom wall 10 of the cavity may have a roughened surface which can be carried out by the respective process that has been used to expose the bottom.

[0274] There may be an etching step (from the excimer) on the cavity bottom wall, preferably of a dielectric material. The cavity bottom wall may have a higher roughness, preferably on the dielectric material. The roughness can improve the adhesion between an encapsulated material and bottom material of the bottom wall.

[0275] Fig. 17 and 18 each show a top view of a possible embodiment of a cavity 6 exposing an interconnection structure 9.

[0276] As it can be seen in Fig. 17, the lateral wall(s) of the exposed portion 11 may form pads with a circular shape. The pads may also have to different geometry than a circular shape.

[0277] Independent of the embodiment shown, the side wall 20 of the cavity 6 may be inclined a whole circumference of the cavity.

[0278] Furthermore, the stepped portion 19 may remain, for example as laser stop layer, that can protrude inside the cavity and may also be arranged circumferentially, or only partially, as schematic indicated by dashed lines in Fig. 18.

[0279] As further indicated in Fig. 18, the side wall 20 of the cavity may be perpendicular to the bottom wall 10, or may or arranged parallel to a vertical plane.

[0280] Independent of the embodiment show; the excimer laser that may be used for forming the interconnection structure 9 and the bottom wall 10 of the cavity may comprise a glass mask for pattern formation.As only schematic indicated by a dashed line in the area of the interconnection structure 9; the glass mask may be arranged in a parallel plane with respect to the cavity bottom wall 10.

[0281] The glass mask may be provided inside a device that may also comprise a laser source, lenses etc.

[0282] Preferably an individual glass mask may be provided for each possible cavity design and / or interconnection structure design.

[0283] Fig. 19 shows a further possible embodiment of a component carrier, wherein equal reference numbers / component designations are used for equal parts as before in Fig.l to 18. In order to avoid unnecessary repetitions, it is pointed to / reference is made to the de-tailed description in Fig. 1 to 18 preceding it.

[0284] As indicated in Fig. 19 the interconnection structure 9 may comprise four elements of interconnection structure El to E4 from a frontal view.

[0285] As indicated by dashed lines; a bridge 37 may be provided, wherein the bridge 37 is configured to connect at least two components 24 one to each other, in particular by a further interconnection structure 39, preferably provided on the top surface of the bridge and the component carrier.

[0286] Independent of the embodiment shown, the step portion 19 may be partially removed by etching, when the electrically conductive layer structure 3 may be formed by etching in the cavity, therefore, the sidewall may have an undercut at the bottom edge, whereby the step portion may be not exposed (from a top view with respect to the cavity), as it can be seen by the Detail C in Fig. 19.

[0287] As it can be further seen in the Detail C in Fig. 19, independent of the embodiment shown; a vertical undercut 41 may be formed in the lateral wall of the exposed portion 11 towards the bottom wall 10 of the cavity 6.

[0288] Also independent of the embodiment shown, the interconnection structure 9 may comprise a surface finishing (layer) 40, in particular a nickel, palladium, gold layer; that is arranged on the interconnection structure 9 at the top surface and / or at the lateral surface, preferably for a soldering bump bonding on the surface.Fig. 20 a) and b) show further possible embodiments of the interconnection structure, wherein equal reference numbers / component designations are used for equal parts as before in Fig.l to 18. In order to avoid unnecessary repetitions, it is pointed to / reference is made to the detailed description in Fig. 1 to 19 preceding it.

[0289] With respect to Fig, 20a) the lateral wall of the exposed portion 11 of the interconnection structure 9 may have a convex shape.

[0290] Independent from its lateral wall; a top surface 18 of the interconnection structure may have a convex shape. The convex shape may have an advantage for a connection with components.

[0291] Alternatively, as shown in Fig. 20 b) the top surface 18 of the interconnection structure 9 may have a concave shape. The shape may be provided by the chemistry of plating, for example a leveling agent and the plating process configuration.

[0292] Independent from its top surface; the lateral wall of the exposed portion 11 of the interconnection structure 9 may have a vertical undercut, towards the bottom wall 10 of the cavity.

[0293] Furthermore, a different surface roughness may be provided with respect to the top surface and the lateral walls of the interconnection structure.

[0294] It should be mentioned that the possible geometry of the interconnection structure as shown in Fig. 20 a) and / or b) may be provided in the previous embodiments of the figures 1 to 19.L i s t o f r ef e r e n c e

[0295] 1 component carrier 27 temporary layer

[0296] 2 stack 28 opening

[0297] 3 electrically conductive layer 29 first depth

[0298] structure 30 plane

[0299] 4 electrically insulating layer 40 31 top surface

[0300] structure 32 second depth

[0301] 5 main surface 33 plane

[0302] 6 cavity 34 lower surface

[0303] 7 exposed portion 35 conductive material

[0304] 8 not exposed portion 45 36 peripheral edge

[0305] 9 interconnection structure 37 bridge

[0306] 10 bottom wall 38 conductive portion

[0307] 11 lateral wall of the exposed portion 39 further interconnection structure 12 lateral wall of the non-exposed 40 surface finishing layer portion 50 41 vertical undercut

[0308] 13 base layer

[0309] L Laser

[0310] 14 top layer

[0311] E elements of the interconnection 15 intermediate layer

[0312] structure

[0313] 16 vertical extension

[0314] 55 G glass mask

[0315] 17 conductive layer

[0316] 18 top surface dl thickness of at least one layer of 19 stepped portion the exposed portion

[0317] 20 side wall d2 thicknes of at least one layer of 21 undercut 60 the non-exposed portion

[0318] 22 protruding portion d3 thickness of the exposed portion 23 further peripheral side wall d4 thicknes of non-exposed portion 24 component d5 thickness of the intermediate layer 25 insulating layer d6 thickness of the base layer 26 additional layer 65 d7 thickness of the top layer

Claims

- 45 - C l a i m s1. A component carrier (1) comprising a stack (2) wherein the stack comprises;at least one electrically conductive layer structure (3) and a plurality of electrically insulating layer structures (4), said at least one electrically conductive layer structure (3) being provided on a main surface (5) of one of the plurality of electrically insulating layer structure (4); wherein a cavity (6) is formed in the stack (2), the cavity (6) exposing a portion (7) of the at least one electrically conductive layer structure (3);wherein the exposed portion (7) by said cavity (6) of the at least one electrically conductive layer structure (3) forms an interconnection structure (9) provided on a bottom wall (10) of said cavity (6), wherein a lateral wall (11) of the exposed portion (7) is different from a lateral wall (12) of a non-exposed portion (8) of said at least one electrically conductive layer structure (3).

2. A component carrier (1) according to claim 1, wherein the number of layers of the exposed portion (7) of the at least one electrically conductive layer structure (3) is higher than the number of layers of the non-exposed portion (8) of the at least one electrically conductive layer structure (3).

3. A component carrier (1) according to claim 1 or 2, wherein the thickness (dl) of at least one layer of the exposed portion (7) is different from the thickness (d2) of the correspondent layer of the non-exposed portion (8); in particular, the thickness (d3) of the exposed portion (7) is higher than the thickness (d4) of the non-exposed portion.

4. A component carrier (1) according to one of the claims 1 to 3, wherein the at least one electrically conductive layer structure (3) comprises at least one base layer (13) and at least one top layer (14); in particular, the at least one base layer (13) and at least one top layer (14) is provided in the exposed portion (7) and / or in the non-exposed portion (8); and / or the electrically conductive layer structure (3) comprises an intermediate layer (15); preferably the intermediate layer (15) is only provided in the exposed portion (7).

5. A component carrier (1) according to claim 4 wherein the thickness (d5) of the intermediate layer (15) is higher than the thickness (d6) of the base layer (13) and / or is lower than the thickness (d7) of the top layer (14).- 46 - 6. A component carrier (1) according to one of the claims 1 to 5, wherein a lateral wall of the interconnection structure (9) comprises at least two portions having a different vertical extension (16) with respect to each other; in particular at least one of the two different vertical extensions (16) is associated to a respective layer composing the interconnection structure (9); and / or each of the different vertical extensions (16) comprise different inclinations to each other; and / or the different vertical extensions (16) comprise different shapes; and / or the different vertical extensions (16) are planarly shifted one to each other.

7. A component carrier (1) according to one of the claims 1 to 6, wherein the lateral wall of the exposed portion (11) of the interconnection structure (9) has a convex shape.

8. A component carrier (1) according to one of the claims 1 to 7, wherein a vertical undercut is formed in the lateral wall of the exposed portion (11) towards the bottom of the cavity (6).

9. A component carrier (1) according to one of the claims 1 to 8, wherein a recess is provided in the bottom wall (10) of said cavity (6).

10. A component carrier (1) according to one of the claims 1 to 9, wherein the lateral wall of the exposed portion (11) compared to the lateral wall of the non-exposed portion (12) has at least one of the following properties;- different shape,- different inclination,-different roughness,- different structure.

11. A component carrier (1) according to one of the claims 1 to 10, wherein the interconnection structure (9) comprises an irregular top surface (18); in particular the irregular top surface (18) comprises a dimple in the interconnection structure (9).

12. A component carrier (1) according to one of the claims 1 to 11, wherein the interconnection structure (9) has a lateral wall roughness that is different from a surface roughness of a top surface of the interconnection structure (9).

13. A component carrier (1) according to one of the claims 1 to 12, wherein the lateral wall of the exposed portion (11) comprises conductive and dielectric materials; in- 47 -particular each of the conductive and dielectric materials corresponds to a respective layer structure of the conductive layer structure (3).

14. A component carrier (1) according to one of the claims 1 to 13, wherein a conductive material of the exposed portion (7) is different from a conductive material of the nonexposed portion (8) by at least one of the following properties;- density of the conductive material;- different dimensions of an arrangement of resulting pads- a planar extension of the conductive material- a amount of pads per unit with respect to an arrangement of resulting pads.

15. A component carrier (1) according to one of the claims 1 to 14, wherein a stepped portion (19) is provided between the bottom wall (10) and a side wall (20) of the cavity (6).

16. A component carrier (1) according to claim 15, wherein the stepped portion (19) comprises a conductive material.

17. A component carrier (1) according to claim 15 or 16, wherein the stepped portion (19) is composed of a stack of several layers; in particular at least one layer, preferably all layers of the stack of the stepped portion (19), correspond to that layer / those layers forming the interconnection structure (9).

18. A component carrier (1) according to one of the claims 15 to 17, wherein a protruding portion (22) is provided above the stepped portion (19), wherein the protruding portion (22) extends inside the cavity (6); in particular a further peripheral side wall (23) of the cavity (6) is provided above the protruding portion (22); preferably the further peripheral side wall (23) is inclined or vertical.

19. A component carrier (1) according to one of the claims 1 to 18, wherein a side wall (20)of the cavity (6) is delimited by a layer structure of the stack (2); in particular the layer structure delimiting the side wall (20) of the cavity (6) that is in contact with the bottom wall (10) of the cavity (6), is an electrically insulating layer structure (4); and / or the layer structure delimiting the side wall (20) of the cavity (6) that is in contact with the bottom wall (10) of the cavity (6) is an electrically conductive layer structure (3).

20. A component carrier (1) according to one of the claims 1 to 19, wherein at least one component (24) is assembled with the interconnection structure (9); in particular a bridge (37) is provided, wherein the bridge (37) is configured to connect at least two components (24) one to each other; preferably the two components are connected on a side of the bridge (37) that is opposed to the interconnection structure (9).

21. A method for manufacturing a component carrier (1) according to one of the preceding claims, comprising the steps;- providing a plurality electrically insulating layer structures (4),- providing at least one electrically conductive layer structure (3) on a main surface (5) of one of the plurality electrically insulating layer structures (4);- forming a cavity (6) in the stack (2) to expose a portion (7) of the at least one electrically conductive layer structure (3);wherein the exposed portion (7) by said cavity (6) of the at least one electrically conductive layer structure (3) forms an interconnection structure (9) provided on a bottom wall (10) of said cavity (6), wherein a lateral wall (11) of the exposed portion (7) is different from a second lateral wall (12) of a non-exposed portion (8)) of said at least one electrically conductive layer structure (3).

22. A method according to claim 21, comprising the steps;- providing at least one layer of the insulating layer structure on the electrically conductive layer structure;- partially removing insulating material in the electrically insulating layer structures (4) to form the cavity (6) and provide the exposed portion (7) of the electrically conductive layer structure (3);in particular, the insulating material is only removed within a depth (29) with respect to an upper plane (30) that is arranged on or above a top surface (31) of the electrically conductive layer structure; preferably a protruding portion (22) is formed in the insulating layer structure under the upper plane (30) of the electrically conductive layer structure and wherein the protruding portion (22) is formed towards the cavity.

23. A method according to claim 22, wherein the step of partially removing the insulating material is performed by a CO2 laser and / or an excimer laser.

24. A method according to one of the claims 22 to 23, wherein the insulating material is removed within a depth (29) to a lower plane (33) that is arranged on a lower surface (34) of a layer of the electrically conductive layer structure; in particular the step of partially removing the insulating material is performed by a CO2 laser with at least to different power modes.

25. A method according to one of the claims 21 to 24, comprising the steps;- partially removing the electrically conductive layer structure in the cavity (6) to partially expose the bottom wall (10) of said cavity (6), in particular to build the lateral wall of the exposed portion (11); in particular, a part of the electrically conductive layer structure extends into a side wall (20) of the cavity and forms a step portion inside the side wall (20); and / or the part of the electrically conductive layer structure that extends into the side wall (20) of the cavity is also removed, wherein an undercut (21) is formed in the side wall (20).

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