Display device

Abstract

A display device (50a) comprises a substrate (10), a circuit layer (30a) provided on the substrate (10), and a light-emitting element layer (40a) which is provided on the circuit layer (30a) and in which a light-emitting element (39) is formed in each of a plurality of sub-pixels constituting a display region (D). The circuit layer (30a) is provided with a laminated structure (27a) in which organic resin films (19, 21, 23, 25) and inorganic insulating films (20, 22, 24) are alternately laminated on the light-emitting element layer (40a) side.

Description

Display device

[0001] The present invention relates to a display device.

[0002] In recent years, as display devices replacing liquid crystal display devices, for example, self-luminous display devices using organic light emitting diodes (Organic Light Emitting Diode, hereinafter also referred to as "OLED"), quantum dot light emitting diodes (Quantum dot Light Emitting Diode, hereinafter also referred to as "QLED") and the like have attracted attention.

[0003] For example, Patent Document 1 discloses an organic EL lighting device in which a plurality of organic electroluminescence (electroluminescence, hereinafter also referred to as "EL") elements are provided between an element substrate and a sealing substrate.

[0004] International Publication No. 2011 / 039911

[0005] By the way, in a display device in which a cover glass such as the sealing substrate disclosed in Patent Document 1 is attached to the surface, for example, if a foreign matter such as glass cullet is mixed in when attaching the cover glass, stress concentrates due to the foreign matter, which may cause cracks or the like in the constituent films forming the wirings, elements, and the like in the display device. Further, in a flexible display device, for example, in the step of peeling the resin substrate from the support substrate after forming the resin substrate on the support substrate and forming wirings, elements and the like on the resin substrate, an external impact (external stress) is applied, so there is a risk of cracks or the like occurring in the constituent films forming the wirings, elements and the like formed on the resin substrate. In that case, in the display device, defects such as dot-like or line-like defects occur in the display region for displaying images. In addition to the concentration of the externally acting stress described above, internal stresses such as compressive stress and tensile stress also act on the constituent films such as wirings and elements in the display device, which affects the warpage of the entire device. Therefore, in display devices, it is important to suppress stress concentration regardless of whether it is external or internal.

[0006] The present invention has been made in view of such points, and an object thereof is to suppress the concentration of stress acting on a display device.

[0007] To achieve the above objective, the present invention provides a display device comprising a substrate, a circuit layer provided on the substrate, and a light-emitting layer provided on the circuit layer, wherein light-emitting elements are formed on each of a plurality of subpixels constituting a display area, characterized in that the circuit layer is provided with a laminated structure in which an organic resin film and an inorganic insulating film are alternately laminated on the side of the light-emitting layer.

[0008] According to the present invention, it is possible to suppress the concentration of stress acting on the display device.

[0009] Figure 1 is a plan view showing the schematic configuration of a QLED display device according to the first embodiment of the present invention. Figure 2 is a plan view of the display area of ​​a QLED display device according to the first embodiment of the present invention. Figure 3 is a cross-sectional view of the display area of ​​a QLED display device according to the first embodiment of the present invention. Figure 4 is an equivalent circuit diagram of the thin-film transistor layer constituting the QLED display device according to the first embodiment of the present invention. Figure 5 is a cross-sectional view of the display area of ​​a QLED display device according to the second embodiment of the present invention, and corresponds to Figure 3. Figure 6 is a plan view of the first inorganic insulating film constituting the QLED display device according to the second embodiment of the present invention. Figure 7 is a plan view of the second inorganic insulating film constituting the QLED display device according to the second embodiment of the present invention. Figure 8 is a plan view of the third inorganic insulating film constituting the QLED display device according to the second embodiment of the present invention. Figure 9 is a plan view of a modified example of the second inorganic insulating film constituting the QLED display device according to the second embodiment of the present invention. Figure 10 is a plan view of a modified example of the third inorganic insulating film constituting the QLED display device according to the second embodiment of the present invention.

[0010] The embodiments of the present invention will be described in detail below with reference to the drawings. However, the present invention is not limited to the following embodiments.

[0011] 《First Embodiment》 Figures 1 to 4 show a first embodiment of the display device according to the present invention. In the following embodiments, a QLED display device equipped with a QLED element layer is exemplified as a display device equipped with a light-emitting element layer. Here, Figure 1 is a plan view showing the schematic configuration of the QLED display device 50a of this embodiment. Figures 2 and 3 are a plan view and a cross-sectional view of the display area D of the QLED display device 50a. Figure 4 is an equivalent circuit diagram of the thin-film transistor layer 30a constituting the QLED display device 50a.

[0012] As shown in Figure 1, the QLED display device 50a includes, for example, a rectangular display area D for displaying images and a frame-shaped frame area F surrounding the display area D. In this embodiment, a rectangular display area D is used as an example, but this rectangular shape also includes substantially rectangular shapes such as shapes with arc-shaped sides, shapes with arc-shaped corners, and shapes with notches in part of the sides.

[0013] In the display area D, as shown in Figure 2, a plurality of subpixels P are arranged in a matrix. The plurality of subpixels P include a first subpixel Pr, a second subpixel Pg, and a third subpixel Pb, each displaying a different color. In the display area D, as shown in Figure 2, for example, a first subpixel Pr having a red light-emitting region Lr for displaying red, a second subpixel Pg having a green light-emitting region Lg for displaying green, and a third subpixel Pb having a blue light-emitting region Lb for displaying blue are arranged adjacent to each other. In the display area D, for example, one pixel is composed of three adjacent first subpixels Pr, second subpixel Pg, and third subpixel Pb, each having a red light-emitting region Lr, a green light-emitting region Lg, and a blue light-emitting region Lb, respectively, and displaying different colors.

[0014] A terminal portion T is provided at the positive end of the frame region F in the Y direction in Figure 1, extending in one direction (the X direction in Figure 1).

[0015] As shown in Figure 3, the QLED display device 50a comprises a glass substrate 10 provided as a substrate, a thin film transistor (hereinafter also referred to as "TFT") layer 30a provided as a circuit layer on the glass substrate 10, a QLED element layer 40a provided as a light-emitting layer on the TFT layer 30a, and a sealing film 45 provided on the QLED element layer 40a.

[0016] The glass substrate 10 is configured to have a thickness of, for example, 0.1 mm to 0.5 mm. In this embodiment, a glass substrate 10 is used as an example substrate, but the substrate may be, for example, a resin substrate or a silicon substrate.

[0017] As shown in Figure 3, the TFT layer 30a comprises a base coat film 11 provided on a glass substrate 10, a plurality of first TFTs 9a (see Figure 4), a plurality of second TFTs 9b and a plurality of capacitors 9c (see Figure 4) provided on the base coat film 11, and a planarization film 17 and a laminated structure 27a sequentially provided on each first TFT 9a, each second TFT 9b and each capacitor 9c. Here, as shown in Figure 2, the TFT layer 30a is provided with a plurality of gate lines 14g extending parallel to each other in the X direction in the figure. Also, as shown in Figure 2, the TFT layer 30a is provided with a plurality of source lines 16f extending parallel to each other in a direction that intersects (orthogonal to) the plurality of gate lines 14g, i.e., in the Y direction in the figure. Also, as shown in Figure 2, the TFT layer 30a is provided with a plurality of power lines 16g extending parallel to each other in the Y direction in the figure. As shown in Figure 2, each power line 16g is provided adjacent to each source line 16f. In addition, in the TFT layer 30a, as shown in Figure 4, a first TFT 9a, a second TFT 9b, and a capacitor 9c are provided at each subpixel P. In the TFT layer 30a, as shown in Figure 3, a base coat film 11, a semiconductor film which will be described later as a semiconductor layer 12a, a first metal film which will be a gate insulating film 13a, a gate line 14g, an interlayer insulating film 15, a second metal film which will be a source line 16f and power line 16g, a planarization film 17, a third metal film which will be a relay electrode 18a, and a laminated structure 27a are stacked in order on the glass substrate 10.

[0018] The base coat film 11, gate insulating film 13a, interlayer insulating film 15, and the first inorganic insulating film 20, second inorganic insulating film 22, and third inorganic insulating film 24, which will be described later, are composed of single-layer or multilayer films of inorganic insulating films such as silicon nitride, silicon oxide, and silicon oxynitride.

[0019] As shown in Figure 4, the first TFT 9a is electrically connected to the corresponding gate line 14g, source line 16f, and second TFT 9b at each sub-pixel P. Here, the first TFT 9a has substantially the same structure as the second TFT 9b, which will be described later.

[0020] As shown in Figure 4, the second TFT 9b is electrically connected to the corresponding first TFT 9a, power line 16g, and QLED element 39 (described later) at each subpixel P. Here, as shown in Figure 3, the second TFT 9b comprises a semiconductor layer 12a provided on the base coat film 11, a gate electrode 14a provided on the semiconductor layer 12a via a gate insulating film 13a, and a source electrode 16a and a drain electrode 16b provided on the interlayer insulating film 15 spaced apart from each other.

[0021] The semiconductor layer 12a is formed from a semiconductor film made of an oxide semiconductor such as an In-Ga-Zn-O system, and comprises a source region and a drain region defined to be spaced apart from each other, and a channel region defined between the source region and the drain region.

[0022] The gate electrode 14a is provided so as to overlap the channel region of the semiconductor layer 12a and is configured to control conductivity between the source region and the drain region of the semiconductor layer 12a. Here, the gate electrode 14a is formed of a first metal film, similar to the gate wire 14g, etc.

[0023] As shown in Figure 3, the source electrode 16a and the drain electrode 16b are electrically connected to the source region and drain region of the semiconductor layer 12a, respectively, through contact holes formed in the interlayer insulating film 15. Here, the source electrode 16a and the drain electrode 16b are formed from a second metal film, similar to the source wire 16f and the power supply wire 16g.

[0024] In this embodiment, a semiconductor layer 12a formed from a semiconductor film made of an oxide semiconductor is exemplified, but the semiconductor layer 12a may be formed from a semiconductor film made of polysilicon, such as LTPS (low temperature polysilicon). Furthermore, the TFT layer 30a may have a hybrid structure in which a TFT having a semiconductor layer made of polysilicon and a TFT having a semiconductor layer made of an oxide semiconductor are provided.

[0025] As shown in Figure 4, the capacitor 9c is electrically connected to the corresponding first TFT 9a and power line 16g at each subpixel P. Here, the capacitor 9c comprises, for example, a lower conductive layer formed of a first metal film, an upper conductive layer formed of a second metal film, and an interlayer insulating film 15 provided between the lower and upper conductive layers.

[0026] The planarization film 17 has a flat surface in the display area D and is made of an organic resin material such as polyimide resin or acrylic resin that is relatively thick, for example, about 2 μm to 3 μm in thickness. Here, between the planarization film 17 and the laminated structure 27a, a relay electrode 18a formed of a third metal film is provided, as shown in Figure 3.

[0027] As shown in Figure 3, the laminated structure 27a comprises a first organic resin film 19, a first inorganic insulating film 20, a second organic resin film 21, a second inorganic insulating film 22, a third organic resin film 23, a third inorganic insulating film 24, and a fourth organic resin film 25, which are sequentially laminated on the planarized film 17. The first organic resin film 19, the second organic resin film 21, the third organic resin film 23, and the fourth organic resin film 25 are made of relatively thin organic resin materials such as polyimide resin or acrylic resin with a thickness of about 0.5 μm. Here, as shown in Figure 3, the first inorganic insulating film 20, the second inorganic insulating film 22, and the third inorganic insulating film 24 are provided in a solid form over the entire display area D. Therefore, inside the laminated structure 27a, as shown in Figure 3, the first inorganic insulating film 20, the second inorganic insulating film 22, and the third inorganic insulating film 24 are arranged facing each other along the thickness direction of the glass substrate 10. As a result, the stress on the first inorganic insulating film 20, the second inorganic insulating film 22, and the third inorganic insulating film 24 can be relieved by the first organic resin film 19, the second organic resin film 21, the third organic resin film 23, and the fourth organic resin film 25, thereby relieving internal stress and dispersing external impacts (external stress).

[0028] In this embodiment, a configuration in which three inorganic insulating films, a first inorganic insulating film 20, a second inorganic insulating film 22, and a third inorganic insulating film 24, are provided inside the laminated structure 27a is illustrated. However, the number of inorganic insulating film layers may be two or four or more, as long as there are multiple layers.

[0029] In the QLED element layer 40a, as shown in Figure 3, a QLED element 39 is provided in each of the multiple subpixels P(Pr, Pg, Pb) P(Pr, Pg, Pb).

[0030] As shown in Figure 3, the QLED element 39 is provided by stacking a first electrode 33, a hole transport layer 35, a light-emitting layer 36, an electron transport layer 37, and a second electrode 38 in that order.

[0031] As shown in Figure 3, the first electrode 33 is electrically connected to the drain electrode 16b of the second TFT 9b of each subpixel P via a contact hole formed in the lower organic resin film 17, a relay electrode 18a, and contact holes formed in the first organic resin film 19, the first inorganic insulating film 20, the second organic resin film 21, the second inorganic insulating film 22, the third organic resin film 23, the third inorganic insulating film 24, and the fourth organic resin film 25. The first electrode 33 also has the function of injecting holes into the light-emitting layer 36. Furthermore, to improve the hole injection efficiency into the light-emitting layer 36, it is more preferable to form the first electrode 33 from a material with a large work function. As shown in Figure 3, the first electrode 33 comprises a reflective electrode 31a provided on the laminated structure 27a (the fourth organic resin film 25) and a transparent electrode 32a provided on the reflective electrode 31a, and has light reflectivity. Here, the reflective electrode 31a is formed by a laminated film in which a transparent conductive film such as an indium tin oxide (ITO) film or an indium zinc oxide (IZO) film and a metal film such as a silver film or a silver alloy film (e.g., APC (Ag-Pd-Cu)) are sequentially laminated. The transparent electrode 32a is formed by a transparent conductive film such as an ITO film or an IZO film. The peripheral end of the first electrode 33 is covered by an edge cover 34a formed by a single-layer or laminated film of an inorganic insulating film such as silicon nitride, silicon oxide, or silicon oxynitride, as shown in Figure 3.

[0032] The hole transport layer 35 has the function of improving the efficiency of hole transport from the first electrode 33 to the light-emitting layer 36. In addition, although the hole transport layer 35 is provided in common for multiple sub-pixels P, multiple layers may be provided for multiple sub-pixels P. Examples of materials constituting the hole transport layer 35 include porphyrin derivatives, aromatic tertiary amine compounds, styrylamine derivatives, polyvinylcarbazole, poly-p-phenylenevinylene, polysilane, triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, arylamine derivatives, amine-substituted chalcone derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, stilbene derivatives, hydrogenated amorphous silicon, hydrogenated amorphous silicon carbide, zinc sulfide, zinc selenide, and the like. Furthermore, examples of materials that constitute the hole transport layer 35 include functional polymer materials such as poly[(9,9-dioctylfluorenyl-2,7-diyl)-co-(4,4'-(N-(4-sec-butylphenyl))diphenylamine)] (abbreviated as "TFB"), poly[N,N'-bis(4-butylphenyl)-N,N'-bis(phenyl)-benzidine] (abbreviated as "poly-TPD"), and polyvinylcarbazole (abbreviated as "PVK"). The material that constitutes the hole transport layer 35 may consist of only one of the above-mentioned materials, or may consist of two or more as appropriate.

[0033] Furthermore, a hole injection layer may be provided between the first electrode 33 and the hole transport layer 35, which has the function of bringing the energy levels of the first electrode 33 and the light-emitting layer 36 closer together and improving the hole injection efficiency from the first electrode 33 to the light-emitting layer 36. Examples of materials constituting the hole injection layer include organic materials such as triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, phenylenediamine derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, and stilbene derivatives. Examples of materials constituting the hole injection layer include inorganic materials such as nickel oxide (NiO) and molybdenum oxide (MoOx) (where x is any positive number). The inorganic material may also contain nanoparticles. Furthermore, the hole injection layer may be provided in common or in multiple locations corresponding to multiple sub-pixels P.

[0034] The light-emitting layer 36 is a region in which holes and electrons are injected from the first electrode 33 and the second electrode 38, respectively, when a voltage is applied by the first electrode 33 and the second electrode 38, and where the holes and electrons recombine. Here, the light-emitting layer 36 is formed of a material with high luminescence efficiency. The light-emitting layer 36 contains, for example, a plurality of quantum dots as the light-emitting material. Furthermore, each quantum dot constituting the light-emitting layer 36 may have a core / shell structure including a core that emits light when excitons are used and a shell formed around the core to protect it. In this embodiment, the light-emitting layer 36 may also contain organic or inorganic ligands that coordinate to each quantum dot by forming coordination bonds with the outermost surface of each quantum dot.

[0035] In this embodiment, "quantum dot" refers to a semiconductor particle that exhibits the quantum size effect. Here, the quantum size effect typically manifests in semiconductor structures with a maximum width of 100 nm or less. Furthermore, the shape of the quantum dot is not particularly restricted and is not limited to a spherical three-dimensional shape (circular cross-sectional shape), as long as it satisfies the above maximum width. Moreover, the shape of the quantum dot may be, for example, a polygonal cross-sectional shape, a rod-shaped three-dimensional shape, a branch-shaped three-dimensional shape, a three-dimensional shape with irregularities on the surface, or a combination thereof.

[0036] The quantum dots preferably have a constant band gap. The semiconductor constituting the quantum dots may be any material that can emit light, and preferably contains at least the materials described below. The semiconductor is preferably capable of emitting blue, green and red light respectively. The semiconductor includes, for example, at least one selected from the group consisting of II-VI group compounds, III-V group compounds, chalcogenide compounds and perovskite compounds. The II-VI group compound means a compound containing a Group II element and a Group VI element, and the III-V group compound means a compound containing a Group III element and a Group V element. The Group II elements include Group 2 elements and Group 12 elements, the Group III elements include Group 3 elements and Group 13 elements, the Group V elements include Group 5 elements and Group 15 elements, and the Group VI elements may include Group 6 elements and Group 16 elements.

[0037] The II-VI group compound includes, for example, at least one selected from the group consisting of MgS, MgSe, MgTe, CaS, CaSe, CaTe, SrS, SrSe, SrTe, BaS, BaSe, BaTe, ZnS, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, HgSe and HgTe.

[0038] The III-V group compound includes, for example, at least one selected from the group consisting of GaAs, GaP, InN, InAs, InP and InSb.

[0039] The chalcogenide compound is a compound containing a VIA (16) group element, and includes, for example, CdS or CdSe. The chalcogenide compound may also include mixed crystals of these.

[0040] The perovskite compound has, for example, the general formula CsPbX ３ and has a composition represented by the formula. The constituent element X includes, for example, at least one selected from the group consisting of Cl, Br and I.

[0041] Note that the Roman numeral notation for element group numbers is based on the old IUPAC (International Union of Pure and Applied Chemistry) system or the old CAS (Chemical Abstracts Service) system, while the Arabic numeral notation for element group numbers is based on the current IUPAC system.

[0042] The electron transport layer 37 has the function of efficiently transporting electrons to the light-emitting layer 36. Examples of materials constituting the electron transport layer 37 include organic compounds such as oxadiazole derivatives, triazole derivatives, benzoquinone derivatives, naphthoquinone derivatives, anthraquinone derivatives, tetracyanoanthraquinodimethane derivatives, diphenoquinone derivatives, fluorenone derivatives, silole derivatives, and metal oxynoide compounds. The electron transport layer 37 may also contain inorganic materials such as zinc oxide (ZnO) and magnesium zinc oxide (MgZnO). Furthermore, the electron transport layer 37 may contain only one of the above-mentioned materials, or it may contain two or more as appropriate. While the electron transport layer 37 is commonly provided for multiple sub-pixels P, multiple electron transport layers may be provided for multiple sub-pixels P.

[0043] As shown in Figure 3, the second electrode 38 is provided on the electron transport layer 37. The second electrode 38 also has the function of injecting electrons into the light-emitting layer 36. Furthermore, to improve the electron injection efficiency into the light-emitting layer, it is more preferable that the second electrode 38 be made of a material with a small work function. Here, the second electrode 38 is formed of a transparent conductive film such as an ITO film or an IZO film, and has high light transmittance. In addition, the second electrode 38 is provided in common for multiple sub-pixels P.

[0044] Note that between the electron transport layer 37 and the second electrode 38, an electron injection layer having the function of bringing the energy levels of the second electrode 38 and the light-emitting layer 36 closer to each other and improving the efficiency of electron injection from the second electrode 38 to the light-emitting layer 36 may be provided. Here, examples of the material constituting the electron injection layer include lithium fluoride (LiF), magnesium fluoride (MgF ２ ), calcium fluoride (CaF ２ ), strontium fluoride (SrF ２ ), barium fluoride (BaF ２ ), inorganic alkaline compounds such as aluminum oxide (Al ２ O ３ ), strontium oxide (SrO), and the like. In addition, the electron injection layer is provided commonly or in plurality corresponding to the plurality of sub-pixels P.

[0045] Furthermore, in the present embodiment, a top-emission structure QLED element 39 including the light-reflective first electrode 33 and the light-transmissive second electrode 38 is illustrated, but the QLED element 39 may have a bottom-emission structure in which the first electrode 33 has light transmissivity and the second electrode 38 has light reflectivity.

[0046] As shown in FIG. 3, the sealing film 45 is provided so as to cover the second electrode 38, and includes a first inorganic sealing film 41, an organic sealing film 42, and a second inorganic sealing film 43 sequentially stacked on the second electrode 38, and has a function of protecting the light-emitting layer 36 of the QLED element 39 from moisture, oxygen, and the like. Here, the first inorganic sealing film 41 and the second inorganic sealing film 43 are constituted by, for example, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film. The organic sealing film 42 is constituted by an organic resin material such as acrylic resin, epoxy resin, silicone resin, polyurea resin, parylene resin, polyimide resin, or polyamide resin.

[0047] In this embodiment, a QLED display device 50a is illustrated in which the light-emitting layer 36 of the QLED element 39 is protected from moisture, oxygen, etc. by a sealing film 45. However, the sealing performance may be improved by attaching a glass sealing substrate so as to be positioned on the upper side of the sealing film 45 and facing the glass substrate 10. In this case, since the QLED display device 50a can disperse external impacts (external stress), it is not necessary to provide a recessed counterbore on the back surface of the sealing substrate, for example, as a measure against foreign matter contamination.

[0048] The QLED display device 50a described above is configured such that, at each subpixel P, a gate signal is input to the first TFT 9a via the gate line 14g, thereby turning on the first TFT 9a, and a voltage corresponding to the source signal is written to the gate electrode 14b and capacitor 9c of the second TFT 9b via the source line 16f. A current from the power line 16g, defined based on the gate voltage of the second TFT 9b, is supplied to the QLED element 39, causing the light-emitting layer 36 of the QLED element 39 to emit light and display an image. In addition, in the QLED display device 50a, even if the first TFT 9a is turned off, the gate voltage of the second TFT 9b is maintained by the capacitor 9c, so the light emission from the light-emitting layer 36 is maintained until the gate signal for the next frame is input.

[0049] Next, an example of a method for manufacturing the QLED display device 50a of this embodiment will be described. The method for manufacturing the QLED display device 50a of this embodiment comprises a TFT layer formation step, a QLED element layer formation step, and a sealing film formation step.

[0050] <TFT Layer Formation Process> First, a base insulating film 11 is formed on the glass substrate 10 by sequentially depositing a silicon nitride film (approximately 325 nm thick) and a silicon oxide film (approximately 50 nm thick) on the glass substrate 10, for example, by a plasma CVD (Chemical Vapor Deposition) method.

[0051] Next, on the substrate surface on which the base coat film 11 is formed, for example, by sputtering, InGaNO ４After forming a semiconductor film made of an oxide semiconductor (approximately 30 nm thick), the semiconductor layer 12a and the like are formed by patterning the semiconductor film.

[0052] Subsequently, a silicon oxide film (approximately 150 nm thick) is deposited on the substrate surface on which the semiconductor layer 12a, etc., is formed, for example by plasma CVD. Then, a titanium film (approximately 30 nm thick), an aluminum film (approximately 100 nm thick), and another titanium film (approximately 30 nm thick) are sequentially deposited by sputtering to form a first metal film. The gate wire 14g, gate electrode 14a, etc., are then formed by patterning the first metal film.

[0053] Furthermore, the gate insulating film 13a, etc., is formed by etching the silicon oxide film exposed from the gate electrode 14a, etc.

[0054] Next, an interlayer insulating film 15 is formed on the substrate surface on which the gate insulating film 13a etc. is formed, for example by plasma CVD, after which an interlayer insulating film 15 is formed by patterning the silicon oxide film.

[0055] Subsequently, a second metal film is formed on the substrate surface on which the interlayer insulating film 15 is formed by sequentially depositing, for example, a titanium film (approximately 10 nm thick), an aluminum film (approximately 300 nm thick), and a titanium film (approximately 50 nm thick) by sputtering. After that, the source wire 16f, power line 16g, source electrode 16a, drain electrode 16, etc., are formed by patterning the second metal film.

[0056] Furthermore, a photosensitive polyimide resin (approximately 2.5 μm thick) is applied to the substrate surface on which the source lines 16f, etc., are formed, for example, by a spin coating method or a slit coating method. Then, a planarization film 17 is formed by pre-baking, exposure, development, and post-baking of the coated film.

[0057] Next, a third metal film is formed on the substrate surface on which the planarized film 17 is formed by sequentially depositing a titanium film (approximately 10 nm thick), an aluminum film (approximately 300 nm thick), and a titanium film (approximately 50 nm thick) by, for example, a sputtering method. After that, the third metal film is patterned to form a relay electrode 18a, etc.

[0058] Subsequently, a photosensitive polyimide resin (approximately 0.5 μm thick) is applied to the substrate surface on which the relay electrode 18a, etc., is formed, for example, by a spin coating method or a slit coating method. Then, the coated film is subjected to pre-baking, exposure, development, and post-baking to form the first organic resin film 19.

[0059] Furthermore, on the substrate surface on which the first organic resin film 19 is formed, a silicon nitride film (approximately 50 nm thick) is deposited, for example, by plasma CVD, and then the silicon nitride film is patterned to form the first inorganic insulating film 20.

[0060] Next, a photosensitive polyimide resin (approximately 0.5 μm thick) is applied to the substrate surface on which the first inorganic insulating film 20 is formed, for example, by a spin coating method or a slit coating method. Then, the second organic resin film 21 is formed by pre-baking, exposure, development, and post-baking of the coated film.

[0061] Subsequently, a silicon nitride film (approximately 50 nm thick) is formed on the substrate surface on which the second organic resin film 21 is formed, for example, by plasma CVD, and then the silicon nitride film is patterned to form the second inorganic insulating film 22.

[0062] Furthermore, a photosensitive polyimide resin (approximately 0.5 μm thick) is applied to the substrate surface on which the second inorganic insulating film 22 is formed, for example, by a spin coating method or a slit coating method. Then, a third organic resin film 23 is formed by pre-baking, exposure, development, and post-baking of the coated film.

[0063] Next, a silicon nitride film (approximately 50 nm thick) is formed on the substrate surface on which the third organic resin film 23 is formed, for example, by plasma CVD, and then the silicon nitride film is patterned to form the third inorganic insulating film 24.

[0064] Finally, a photosensitive polyimide resin (approximately 0.5 μm thick) is applied to the substrate surface on which the third inorganic insulating film 24 is formed, for example, by a spin coating method or a slit coating method. Then, the coated film is subjected to pre-baking, exposure, development, and post-baking to form the fourth organic resin film 25.

[0065] As described above, a TFT layer 30a having the laminated structure 27a of this embodiment can be formed.

[0066] <QLED element layer formation process> First, on the substrate surface on which the fourth organic resin film 25 was formed in the TFT layer formation process described above, a transparent conductive film such as an ITO film (thickness about 10 nm) and a metal film such as an Ag film (thickness about 95 nm) are sequentially formed by, for example, sputtering, and then the laminated conductive films are patterned to form a reflective electrode 31a, etc.

[0067] Next, transparent conductive films such as an ITO film (approximately 100 nm thick) are sequentially deposited on the substrate surface on which the reflective electrode 31a, etc., are formed, for example by sputtering. Then, the transparent conductive films are patterned to form transparent electrodes 32a, etc., and thus the first electrode 33, etc.

[0068] Subsequently, a silicon nitride film (approximately 300 nm thick) is formed on the substrate surface on which the first electrode 33, etc., is formed, for example by plasma CVD. After that, the silicon nitride film is patterned to form an edge cover 34a, etc.

[0069] Furthermore, a solution (dispersion) containing the constituent materials of the hole transport layer 35 described above is applied to the substrate surface on which the edge cover 34a is formed, for example, by a spin coating method or a slit coating method. The coated film is then dried to form the hole transport layer 35 to a thickness of approximately 30 nm.

[0070] Next, after forming a resist pattern on the substrate surface on which the hole transport layer 35 is formed, a solution (dispersion) containing nanoparticles in which the above-mentioned constituent materials are dissolved (dispersed) is applied, and by the lift-off method, a red light-emitting layer 36 is sequentially formed on the first subpixel Pr, a green light-emitting layer 36 on the second subpixel Pg, and a blue light-emitting layer 36 on the third subpixel Pb, thereby forming a light-emitting layer 36 with a thickness of about 20 nm in the central part.

[0071] Subsequently, on the substrate surface on which the light-emitting layers 36 of each color are formed in the first subpixel Pr, the second subpixel Pg, and the third subpixel Pb, a solution (dispersion) in which the constituent materials of the electron transport layer 37 described above are dissolved (dispersed) is applied, for example, by a spin coating method or a slit coating method, and then the coated film is dried to form the electron transport layer 37 to a thickness of about 50 nm.

[0072] Finally, a transparent conductive film such as an ITO film (approximately 100 nm thick) is deposited on the substrate surface on which the electron transport layer 37 is formed, for example, by sputtering using a film deposition mask, to form the second electrode 38.

[0073] As described above, the QLED element layer 40a of this embodiment can be formed.

[0074] <Encapsulation Film Formation Process> First, on the substrate surface on which the QLED element layer 40a was formed in the above QLED element layer formation process, a silicon nitride film (approximately 50 nm), a silicon oxynitride film (approximately 1500 nm), and a silicon oxide film (approximately 50 nm) are sequentially deposited using a film deposition mask, for example, by plasma CVD, to form a first inorganic encapsulation film 41.

[0075] Next, an organic encapsulation film 42 is formed on the substrate surface on which the first inorganic encapsulation film 41 is formed by applying, for example, an acrylic resin (about 10 μm thick) using an inkjet method.

[0076] Finally, a second inorganic encapsulation film 43 is formed on the substrate surface on which the organic encapsulation film 42 is formed by depositing a silicon nitride film (approximately 500 nm thick) or the like using a film deposition mask, for example, by plasma CVD, thereby forming the encapsulation film 45.

[0077] As described above, the QLED display device 50a of this embodiment can be manufactured.

[0078] As described above, according to the QLED display device 50a of this embodiment, the first inorganic insulating film 20, the second inorganic insulating film 22, and the third inorganic insulating film 24 are provided in a solid form over the entire display area D between the first organic resin film 19, the second organic resin film 21, the third organic resin film 23, and the fourth organic resin film 25 that constitute the laminated structure 27a. Therefore, inside the laminated structure 27a, the first inorganic insulating film 20, the second inorganic insulating film 22, and the third inorganic insulating film 24 are arranged facing each other along the thickness direction of the glass substrate 10. As a result, the stress on the first inorganic insulating film 20, the second inorganic insulating film 22, and the third inorganic insulating film 24 can be relieved by the first organic resin film 19, the second organic resin film 21, the third organic resin film 23, and the fourth organic resin film 25, thereby relieving internal stress and dispersing external impacts (external stress), and suppressing the concentration of stress acting on the QLED display device 50a.

[0079] Furthermore, according to the QLED display device 50a of this embodiment, since the planarization film 17 is provided on the glass substrate 10 side of the laminated structure 27a for stress relief, the flatness of the display area D can be ensured.

[0080] 《Second Embodiment》 Figures 5 to 10 show a second embodiment of the display device according to the present invention. Here, Figure 5 is a cross-sectional view of the display area D of the QLED display device 50b of this embodiment, and corresponds to Figure 3 of the first embodiment described above. Figure 6 is a plan view of the first inorganic insulating film 20a constituting the QLED display device 50b. Figure 7 is a plan view of the second inorganic insulating film 22a constituting the QLED display device 50b. Figure 8 is a plan view of the third inorganic insulating film 24a constituting the QLED display device 50b. Figure 9 is a plan view of the second inorganic insulating film 22b as a modified example of the second inorganic insulating film 22a. Figure 10 is a plan view of the third inorganic insulating film 24b as a modified example of the third inorganic insulating film 24a. In the following embodiments, the same reference numerals are used for parts that are the same as in Figures 1 to 4, and their detailed descriptions are omitted.

[0081] In the first embodiment described above, a QLED display device 50a was illustrated in which a solid first inorganic insulating film 20, a second inorganic insulating film 22, and a third inorganic insulating film 24 were arranged within a laminated structure 27a. However, in this embodiment, a QLED display device 50b is illustrated in which a first inorganic insulating film 20a, a second inorganic insulating film 22a, and a third inorganic insulating film 24a, each having a slit S formed thereon, are arranged within a laminated structure 27b.

[0082] The QLED display device 50b, like the QLED display device 50a of the first embodiment described above, includes, for example, a display area D for displaying an image, which is provided in a rectangular shape, and a frame area F provided in a frame shape around the display area D. Furthermore, as shown in Figure 5, the QLED display device 50b includes a glass substrate 10 provided as a substrate, a TFT layer 30b provided as a circuit layer on the glass substrate 10, a QLED element layer 40b provided as a light-emitting element layer on the TFT layer 30b, and a sealing film 45 provided on the QLED element layer 40b.

[0083] The TFT layer 30b, similar to the TFT layer 30a of the first embodiment, comprises a base coat film 11 provided on a glass substrate 10, a plurality of first TFTs 9a (see Figure 4), a plurality of second TFTs 9b and a plurality of capacitors 9c (see Figure 4) provided on the base coat film 11, and a planarization film 17 and a laminated structure 27b sequentially provided on each first TFT 9a, each second TFT 9b and each capacitor 9c, as shown in Figure 5. Here, the TFT layer 30b is provided with a plurality of gate lines 14g, a plurality of source lines 16f and a plurality of power lines 16g, similar to the TFT layer 30a of the first embodiment. Also, the TFT layer 30b is provided with a first TFT 9a, a second TFT 9b and a capacitor 9c, similar to the TFT layer 30a of the first embodiment. In the TFT layer 30b, similar to the TFT layer 30a in the first embodiment described above, as shown in Figure 5, a base coat film 11, a semiconductor film such as a semiconductor layer 12a, a first metal film such as a gate insulating film 13a and a gate line 14g, an interlayer insulating film 15, a second metal film such as a source line 16f and a power line 16g, a planarization film 17, a third metal film such as a relay electrode 18a, and a laminated structure 27b are sequentially laminated on the glass substrate 10.

[0084] As shown in Figure 5, the laminated structure 27b comprises a first organic resin film 19, a first inorganic insulating film 20a, a second organic resin film 21, a second inorganic insulating film 22a, a third organic resin film 23, a third inorganic insulating film 24a, and a fourth organic resin film 25, which are sequentially laminated on the planarized film 17. Therefore, as shown in Figure 5, the first inorganic insulating film 20a, the second inorganic insulating film 22a, and the third inorganic insulating film 24a are arranged inside the laminated structure 27b so as to face each other along the thickness direction of the glass substrate 10. This allows the stress on the first inorganic insulating film 20a, the second inorganic insulating film 22a, and the third inorganic insulating film 24a to be relieved by the first organic resin film 19, the second organic resin film 21, the third organic resin film 23, and the fourth organic resin film 25, thereby relieving internal stress and dispersing external impacts (external stress).

[0085] As shown in Figures 5 and 6, the first inorganic insulating film 20a has multiple slits S formed therein so as to extend parallel to each other. Similarly, as shown in Figures 5 and 7, the second inorganic insulating film 22a has multiple slits S formed therein so as to extend parallel to each other. Similarly, as shown in Figures 5 and 8, the third inorganic insulating film 24a has multiple slits S formed therein so as to extend parallel to each other. Here, as shown in Figures 6 to 8, the direction in which each slit S formed in the first inorganic insulating film 20a extends, the direction in which each slit S formed in the second inorganic insulating film 22a extends, and the direction in which each slit S formed in the third inorganic insulating film 24a extends are the same. Furthermore, as shown in Figure 5, the slits S formed in the second inorganic insulating film 22a are arranged so as not to overlap with the slits S formed in the first inorganic insulating film 20a and the slits S formed in the third inorganic insulating film 24a in a plan view.

[0086] In this embodiment, a configuration is illustrated in which the slits S formed in the first inorganic insulating film 20a, the second inorganic insulating film 22a, and the third inorganic insulating film 24a extend in the same direction. However, the slits S formed in the first inorganic insulating film 20a, the second inorganic insulating film 22b (see Figure 9), and the third inorganic insulating film 24b (see Figure 9) may extend in different directions. Specifically, as shown in Figures 9 and 10, the slits S formed in the second inorganic insulating film 22b and the third inorganic insulating film 24b are provided to intersect diagonally with the slits S formed in the first inorganic insulating film 20a.

[0087] Furthermore, in this embodiment, a configuration in which three inorganic insulating films, a first inorganic insulating film 20a, a second inorganic insulating film 22a, and a third inorganic insulating film 24a, are provided inside the laminated structure 27b is illustrated. However, the number of inorganic insulating film layers may be two or four or more, as long as there are multiple layers.

[0088] In the QLED element layer 40b, as in the QLED element layer 40a of the first embodiment described above, a QLED element 39 is provided for each sub-pixel P (Pr, Pg, Pb) as shown in Figure 5. Also in the QLED element layer 40b, as shown in Figure 5, an edge cover 34b is provided so as to cover the peripheral ends of each first electrode 33. Here, the edge cover 34b is formed of a single layer or multilayer film of an inorganic insulating film such as silicon nitride, silicon oxide, or silicon oxynitride. Furthermore, as shown in Figure 5, a plurality of through holes H are provided in the edge cover 34b so as to extend parallel to each other without overlapping with the first electrode 33. Note that each through hole H formed in the edge cover 34b is arranged so as not to overlap with each slit S formed in the third inorganic insulating film 24a in a plan view.

[0089] The QLED display device 50b described above is configured to display an image in the same way as the QLED display device 50a of the first embodiment, by appropriately emitting light from the light-emitting layer 36 of the QLED element 39 via the first TFT 9a and the second TFT 9b at each subpixel P.

[0090] The QLED display device 50b of this embodiment can be manufactured by changing the pattern shapes of the first inorganic insulating film 20, the second inorganic insulating film 22, and the third inorganic insulating film 24, as well as the pattern shape of the edge cover 34a, in the manufacturing method of the QLED display device 50a of the first embodiment described above.

[0091] As described above, according to the QLED display device 50b of this embodiment, a first inorganic insulating film 20a, a second inorganic insulating film 22a, and a third inorganic insulating film 24a are provided between the first organic resin film 19, the second organic resin film 21, the third organic resin film 23, and the fourth organic resin film 25 that constitute the laminated structure 27b. Therefore, inside the laminated structure 27b, the first inorganic insulating film 20a, the second inorganic insulating film 22a, and the third inorganic insulating film 24a are arranged facing each other along the thickness direction of the glass substrate 10. As a result, the stress on the first inorganic insulating film 20a, the second inorganic insulating film 22a, and the third inorganic insulating film 24a can be relieved by the first organic resin film 19, the second organic resin film 21, the third organic resin film 23, and the fourth organic resin film 25, thereby relieving internal stress and dispersing external impacts (external stress), and suppressing the concentration of stress acting on the QLED display device 50b.

[0092] Furthermore, according to the QLED display device 50b of this embodiment, a planarization film 17 is provided on the glass substrate 10 side of the laminated structure 27b for stress relief, so the flatness of the display area D can be ensured.

[0093] Furthermore, according to the QLED display device 50b of this embodiment, since multiple slits S are formed in the first inorganic insulating film 20a, the second inorganic insulating film 22a, and the third inorganic insulating film 24a, impurity components contained within the planarization film 17 and the laminated structure 27b can be released, and the deterioration of the characteristics of the first TFT 9a and the second TFT 9b, which are equipped with a semiconductor layer 12a made of an oxide semiconductor, can be suppressed.

[0094] Furthermore, according to the QLED display device 50b of this embodiment, since multiple through holes H are formed in the edge cover 34b, impurity components contained in the planarization film 17 and the laminated structure 27b can be released even more effectively, and the degradation of the characteristics of the first TFT 9a and second TFT 9b, which are equipped with a semiconductor layer 12a made of an oxide semiconductor, can be further suppressed.

[0095] <Other Embodiments> In the above embodiments, a configuration in which a plurality of inorganic insulating films are arranged within the upper organic resin film has been illustrated, but inorganic insulating films may also be arranged within the lower organic resin film as long as flatness is ensured.

[0096] Furthermore, while the above embodiments illustrate QLED display devices in which the first electrode is the anode and the second electrode is the cathode, the present invention can also be applied to QLED display devices in which the stacked structure of the QLED elements is reversed, with the first electrode being the cathode and the second electrode being the anode.

[0097] Furthermore, while the above embodiments illustrate QLED display devices in which the electrode of the TFT connected to the first electrode is used as the drain electrode, the present invention can also be applied to QLED display devices in which the electrode of the TFT connected to the first electrode is called the source electrode.

[0098] Furthermore, although the above embodiments illustrate QLED display devices equipped with top-gate TFTs, the present invention can also be applied to QLED display devices equipped with bottom-gate TFTs, multi-gate TFTs such as double-gate TFTs, TFTs having multiple semiconductor layers, and the like.

[0099] Furthermore, although the above embodiments have described a QLED display device as an example, the present invention can be applied to a display device equipped with multiple light-emitting elements driven by electric current. For example, it can be applied not only to an organic EL display device equipped with OLED elements, but also to liquid crystal display devices and the like.

[0100] As described above, the present invention is useful for self-illuminating display devices.

[0101] D Display area H Through hole P Subpixel S Slit 10 Glass substrate 17 Planarization film 19 First organic insulating film 20, 20a First inorganic insulating film 21 Second organic insulating film 22, 22a Second inorganic insulating film 23 Third organic insulating film 24, 24a Third inorganic insulating film 25 Fourth organic insulating film 27a, 27b Laminated structure 30a, 30b TFT layer (circuit layer) 33 First electrode 34a, 34b Edge cover 39 QLED element (quantum dot light-emitting diode element, light-emitting element) 40a, 40b QLED element layer (light-emitting element layer) 45 Encapsulation film 50a, 50b QLED display device

Claims

1. A display device comprising a substrate, a circuit layer provided on the substrate, and a light-emitting layer provided on the circuit layer, wherein light-emitting elements are formed on each of a plurality of subpixels constituting a display area, wherein the circuit layer is provided with a laminated structure in which an organic resin film and an inorganic insulating film are alternately laminated on the side of the light-emitting layer.

2. A display device according to claim 1, characterized in that the circuit layer is provided with a planarization film made of an organic resin material on the substrate side of the laminated structure.

3. A display device according to claim 1 or 2, characterized in that the inorganic insulating film is provided in a solid form over the display area.

4. A display device according to claim 1 or 2, characterized in that a plurality of inorganic insulating films are provided facing each other, and each of the plurality of inorganic insulating films has a plurality of slits formed in it so as to extend parallel to each other.

5. A display device according to claim 4, characterized in that the directions in which the slits formed in each of the inorganic insulating films extend are the same.

6. A display device according to claim 5, characterized in that the plurality of slits formed in one of the plurality of inorganic insulating films are arranged so as not to overlap with the plurality of slits formed in an inorganic insulating film adjacent to the inorganic insulating film on which the plurality of slits are formed.

7. A display device according to claim 4, characterized in that the directions in which the slits formed in each of the inorganic insulating films extend are different from each other.

8. A display device according to any one of claims 1 to 7, wherein the light-emitting element has a first electrode provided on each of the subpixels, the light-emitting element layer is provided with an edge cover so as to cover the peripheral end of the first electrode of each subpixel, and the edge cover is provided with a plurality of through holes so as not to overlap with the first electrode.

9. A display device according to any one of claims 1 to 8, characterized in that it comprises a sealing film provided on the light-emitting layer.

10. A display device according to any one of claims 1 to 9, characterized in that the light-emitting element is a quantum dot light-emitting diode element.

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