Electrical component unit and air conditioner

Abstract

This electrical component unit comprises: a first inverter circuit (36) that converts direct current to alternating current by pulse width modulation; and a control circuit (38) that controls the first inverter circuit (36). The control circuit (38) includes: a first generation unit (71) that generates a carrier interrupt that is an interrupt for generating a pulse for the pulse width modulation; and a second generation unit (72) that generates a monitor interrupt for determining an abnormality of the carrier interrupt. An occurrence cycle of the monitor interrupt is longer than an occurrence cycle of the carrier interrupt.

Description

Electrical component unit and air conditioner

[0001] The present disclosure relates to an electrical component unit and an air conditioner.

[0002] Patent Document 1 describes a semiconductor device that includes a circuit for generating an interrupt request, a processor, a volatile memory, an interrupt counter unit, a determination unit, and a memory unit, in order to reliably save application information even when software has a defect. The processor performs processing in response to the interrupt request, and the application information generated by the processor is stored in the volatile memory. The interrupt counter unit counts the number of interrupts for a predetermined period, and the determination unit determines the count value. When the count value exceeds a predetermined determination value, the application information stored in the volatile memory is stored in the memory unit.

[0003] Japanese Unexamined Patent Application Publication No. 2020-60949

[0004] Even when there is no defect in the software, the number of interrupts may vary depending on the situation. For this reason, the method described in Patent Document 1 may erroneously determine that an abnormality has occurred.

[0005] The present disclosure aims to improve the accuracy of abnormality determination.

[0006] (1) An electrical component unit according to an embodiment of the present disclosure includes a first inverter circuit that converts direct current to alternating current by pulse width modulation, and a control circuit that controls the first inverter circuit, wherein the control circuit includes a first generation unit that generates a carrier interrupt which is an interrupt for generating a pulse of the pulse width modulation, and a second generation unit that generates a monitor interrupt for determining an abnormality of the carrier interrupt, and a generation cycle of the monitor interrupt is longer than a generation cycle of the carrier interrupt.

[0007] As a result, the monitor unit determines the abnormality of the carrier interrupt at a cycle longer than the carrier interrupt generation cycle, so that variations in the number of carrier interrupts are averaged, and the accuracy of abnormality determination can be improved.

[0008] (2) In (1) above, the control circuit further comprises a monitor unit that determines an abnormality in the carrier interrupt, the monitor unit is activated when the monitor interrupt occurs, and if it determines that the carrier interrupt is abnormal, the control circuit may be reset.

[0009] This allows the electrical component unit to restore the control circuit from an abnormal state to a normal state.

[0010] (3) In (1) or (2) above, the occurrence period of the monitor interrupt may be five times or more the occurrence period of the carrier interrupt.

[0011] By setting the monitor interrupt period to a relatively long duration, it is possible to suppress misjudgments caused by fluctuations in the carrier interrupt occurrence period.

[0012] (4) In (3) above, the second generation unit may determine the generation period of the monitor interrupt based on the generation period of the carrier interrupt.

[0013] The carrier interrupt occurrence cycle may change depending on the circumstances. By determining the monitor interrupt occurrence cycle accordingly, misidentification of carrier interrupt anomalies is suppressed.

[0014] (5) In any one of (2) to (4) above, the monitoring unit may determine whether the carrier interrupt is abnormal based on the number of carrier interrupts that occur during the monitoring period from one monitor interrupt to the next monitor interrupt.

[0015] By making a determination based on the number of carrier interrupts, abnormalities can be detected more reliably.

[0016] (6) In (5) above, the monitoring unit may determine that the carrier interrupt is abnormal if the number of carrier interrupts is outside a predetermined range.

[0017] By determining that an abnormality occurs when the number of carrier interrupts falls outside a predetermined range, abnormalities can be detected more reliably.

[0018] (7) In the above (5), the monitoring unit may determine that the carrier interrupt is abnormal if the number of carrier interrupts during the current monitoring period is outside a predetermined range compared to the number of carrier interrupts during the previous monitoring period.

[0019] By comparing it with the number of carrier interrupts in the previous instance, the monitoring unit can detect an anomaly without setting an excessive margin in the judgment criteria.

[0020] (8) In the above (5), the monitoring unit may determine that the carrier interrupt is abnormal if the number of carrier interrupts during the current monitoring period is outside a predetermined range compared to the number of carrier interrupts during the monitoring period when the control circuit is started.

[0021] By comparing it with the number of carrier interrupts during the initial cycle, the monitoring unit can detect an anomaly without setting an excessive margin in the judgment criteria.

[0022] (9) In any one of (5) to (8) above, the monitoring unit may determine a threshold number of carrier interrupts to determine whether the carrier interrupt is abnormal or not, based on the carrier interrupt occurrence cycle.

[0023] The carrier interrupt occurrence cycle may be changed depending on the circumstances. Since the threshold is determined based on the occurrence cycle, the accuracy of detecting carrier interrupt anomalies is improved.

[0024] (10) In any one of (1) to (9) above, the first MCU (Micro Controller Unit) including the first generation unit may be a different MCU from the second MCU including the second generation unit.

[0025] As a result, even if the monitored first MCU itself is abnormal, the monitoring second MCU will not be affected by the abnormality of the first MCU. This allows the second MCU to execute monitor interrupts without being affected by the abnormality of the first MCU. Consequently, abnormalities in carrier interrupts can be reliably detected.

[0026] (11) In the above (10), the second MCU further includes a monitoring unit that determines an abnormality in the carrier interrupt, the monitoring unit is activated when the monitor interrupt occurs, and if it determines that the carrier interrupt is abnormal, the first MCU may be reset.

[0027] Since the second MCU includes a monitoring unit, even if the first MCU malfunctions, the monitoring unit is not affected by the malfunction of the first MCU and is not at risk of ceasing to function.

[0028] (12) In the above (10) or (11), the first MCU may control the first inverter circuit, and the second MCU may control a second inverter circuit different from the first inverter circuit.

[0029] This eliminates the need to provide a separate MCU for detecting abnormalities in carrier interrupts in the first MCU.

[0030] (13) In the above (10), the second MCU may be an MCU that controls the refrigerant circuit of the air conditioner.

[0031] The inverter circuit of an air conditioner is susceptible to noise interference due to the high drive voltage and current of the compressor and other components. Furthermore, the outdoor unit, being installed outdoors, is vulnerable to surges caused by lightning strikes and cloud-to-cloud discharges. On the other hand, the MCU (Mechanical Control Unit) that controls the air conditioner is less affected. By using a second MCU to control the refrigerant circuit of the air conditioner, inverter abnormalities in the air conditioner can be reliably detected.

[0032] (14) In the above (10), the second MCU may output a signal indicating an abnormality if the number of resets of the first MCU during a predetermined period is equal to or greater than a predetermined value.

[0033] If a reset occurs more than a predetermined number of times, there is a possibility that a serious malfunction has occurred. In such cases, an abnormality signal can be output to inform the user that there is a possibility of a serious malfunction in the air conditioner.

[0034] (15) In any one of (1) to (14) above, the carrier interrupt may activate the pulse generation unit that generates the pulse in the first inverter circuit that drives the motor.

[0035] The electrical component unit of this disclosure can be applied to an inverter circuit that drives a motor.

[0036] (16) An air conditioner including an electrical component unit as described in any one of (1) to (15) above.

[0037] The electrical component unit of this disclosure can be applied to an air conditioner.

[0038] Figure 1 is a circuit diagram showing an example of a refrigerant circuit for an air conditioner. Figure 2 is a schematic diagram showing an example of the internal structure of an outdoor unit. Figure 3 is a circuit diagram showing an example of the circuit configuration of an electrical component unit. Figure 4 is a circuit diagram showing an example of an inverter circuit. Figure 5 is an explanatory diagram illustrating the method of pulse generation in pulse width modulation. Figure 6 is a block diagram showing the internal configuration of a control circuit. Figure 7 is a functional block diagram showing an example of the functions of a control circuit according to Embodiment 1. Figure 8 is a state transition diagram illustrating the operation of the control circuit 38. Figure 9 is a functional block diagram showing an example of the functions of a control circuit according to Embodiment 2. Figure 10 is a functional block diagram showing an example of the functions of a control circuit according to Embodiment 3. Figure 11 is a functional block diagram showing an example of the functions of a control circuit according to Embodiment 4.

[0039] The embodiments of this disclosure will be described in detail below with reference to the drawings. At least some of the embodiments described below may be combined in any way.

[0040] [1. Embodiment 1] [1-1. Overall Configuration of the Air Conditioner] Figure 1 is a circuit diagram showing an example of the refrigerant circuit of the air conditioner 1. As shown in Figure 1, the air conditioner 1 of this embodiment is a multi-type air conditioner in which multiple indoor units (two in the illustrated example) 3A and 3B are connected to one outdoor unit 2. Specifically, one of the two indoor units 3A and 3B, indoor unit 3A, is connected to the outdoor unit 2 by a first pipe P1, and the other indoor unit 3B is connected to the outdoor unit 2 by a second pipe P2 separate from the first pipe P1.

[0041] In the following description, one of the two indoor units 3A and 3B, i.e., the indoor unit 3A, is referred to as the "first indoor unit 3A", and the other indoor unit 3B is referred to as the "second indoor unit 3B". Each of the first indoor unit 3A and the second indoor unit 3B includes an indoor heat exchanger 4 and an indoor fan 5 as components of the refrigerant circuit. These components are respectively housed in casings (not shown) of the indoor units 3A and 3B.

[0042] The outdoor unit 2 includes, as components of the refrigerant circuit, a compressor 6, a four-way switching valve 7 connected to the discharge side of the compressor 6, an accumulator 8 connected to the suction side of the compressor 6, and an outdoor heat exchanger 9 connected to the four-way switching valve 7. The outdoor unit 2 further includes first and second expansion valves VE1 and VE2 respectively connected to the outdoor heat exchanger 9, and an outdoor fan 10. These components are housed in a casing 20 (see FIG. 2) of the outdoor unit 2.

[0043] The first expansion valve VE1 is an expansion valve for the first indoor unit 3A. The second expansion valve VE2 is an expansion valve for the second indoor unit 3B. The outdoor unit 2 has a liquid shutoff valve VL1 for the first indoor unit 3A and a liquid shutoff valve VL2 for the second indoor unit 3B. The liquid shutoff valve VL1 is connected to the first expansion valve VE1 via a liquid refrigerant pipe P1L, and the liquid shutoff valve VL2 is connected to the second expansion valve VE2 via a liquid refrigerant pipe P2L.

[0044] The outdoor unit 2 has a gas shutoff valve VG1 for the first indoor unit 3A and a gas shutoff valve VG2 for the second indoor unit 3B. The gas shutoff valve VG1 is connected to the four-way switching valve 7 via a gas refrigerant pipe P1G, and the gas shutoff valve VG2 is connected to the four-way switching valve 7 via a gas refrigerant pipe P2G. The operation modes of the air conditioner 1 of the present embodiment include "cooling operation", "heating operation", and "dehumidification operation".

[0045] In "cooling operation" and "dehumidification operation", the refrigerant flows in the direction of the solid-line arrows in Fig. 1. That is, in the cooling cycle or dehumidification cycle, the refrigerant discharged from the compressor 6 flows through the four-way switching valve 7, the outdoor heat exchanger 9, each of the expansion valves VE1 and VE2, and the indoor heat exchanger 4 in this order. The refrigerant that has passed through the indoor heat exchanger 4 returns to the compressor 6 through the four-way switching valve 7. In this case, the outdoor heat exchanger 9 serves as a condenser, and the indoor heat exchanger 4 functions as an evaporator.

[0046] In "heating operation", the refrigerant flows in the direction of the dashed-line arrows in Fig. 1. That is, in the heating cycle, the refrigerant discharged from the compressor 6 flows through the four-way switching valve 7, the indoor heat exchanger 4, each of the expansion valves VE1 and VE2, and the outdoor heat exchanger 9 in this order. The refrigerant that has passed through the outdoor heat exchanger 9 returns to the compressor 6 through the four-way switching valve 7. In this case, the indoor heat exchanger 4 serves as a condenser, and the outdoor heat exchanger 9 functions as an evaporator.

[0047] [1-2. Internal Structure of Outdoor Unit] Fig. 2 is a schematic diagram showing an example of the internal structure of the outdoor unit 2. As shown in Fig. 2, the outdoor unit 2 includes a substantially rectangular parallelepiped-shaped casing 20. The interior of the casing 20 is partitioned by a partition plate 21 into a heat exchange chamber 22 and a device chamber 23.

[0048] The heat exchange chamber 22 accommodates the outdoor heat exchanger 9, the outdoor fan 10, and the like. The device chamber 23 accommodates the compressor 6, the accumulator 8, the expansion valves VE1 and VE2 (see Fig. 1), liquid refrigerant pipes P1L and P2L, gas refrigerant pipes P1G and P2G, and the like. The device chamber 23 further accommodates an electrical component unit 24. The electrical component unit 24 has a housing 25 in which a plurality of circuit boards 30, 31 (see Fig. 3) for power control are collectively installed. Hereinafter, an example of the circuit configuration and structure of the electrical component unit 24 according to the present embodiment will be described.

[0049] [1-3. Circuit Configuration of the Electrical Components Unit] Figure 3 is a circuit diagram showing an example of the circuit configuration of the electrical components unit 24. As shown in Figure 3, the electrical components unit 24 comprises a housing 25 and a plurality of circuit boards 30, 31 mounted on the housing 25. These circuit boards 30, 31 are all made up of printed circuit boards on which a plurality of electronic components are mounted. The circuit boards 30, 31 mounted on the electrical components unit 24 of this embodiment include, for example, the following boards.

[0050] First board 30: A circuit board on which electronic components constituting the inverter device 32 are mounted. Second board 31: A circuit board on which the inverter device 32 and the refrigerant control microcontroller 33 that controls the refrigerant circuit are mounted.

[0051] <First Substrate> As shown in Figure 3, the first substrate 30 is equipped with an inverter device 32 and a noise filter 34. The noise filter 34 is composed of, for example, a power supply EMC (Electromagnetic Compatibility) filter. The inverter device 32 includes a converter circuit 35, inverter circuits 36 and 37, and a control circuit 38. Note that inverter circuit 36 ​​corresponds to the first inverter circuit, and inverter circuit 37 corresponds to the second inverter circuit.

[0052] The converter circuit 35 converts the AC supplied from the commercial power supply CP via the noise filter 34 into DC of a predetermined voltage. The inverter circuit 36 ​​converts the DC of the predetermined voltage into AC of a predetermined frequency and supplies it to the motor M1. Motor M1 is, for example, a three-phase motor and is the motor for the compressor 6. The inverter circuit 37 converts the DC of the predetermined voltage into AC of a predetermined frequency and supplies it to the motor M2. Motor M2 is, for example, a three-phase motor and is the motor for the outdoor fan 10.

[0053] <Configuration of the Inverter Circuit> Figure 4 is a circuit diagram showing an example of an inverter circuit. Inverter circuits 36 and 37 have the same configuration, although their driving capabilities differ. An example is shown in Figure 4. The inverter circuit 36 ​​and motor M1 will be described below, but the inverter circuit 37 and motor M2 are similar. In Figure 4, the inverter circuit 36 ​​is connected to the motor M1 via three output lines 41u, 41v, and 41w, and rotates the motor M1.

[0054] The inverter circuit 36 ​​receives DC power from the converter circuit 35 through two lines (42p, 42n) of the DC circuit 42.

[0055] The inverter circuit 36 ​​has three legs connected between two lines of the DC circuit 42, which are designated as the first leg, second leg, and third leg from left to right. The first leg consists of an upper arm switching element Qu and a lower arm switching element Qx connected in series with the switching element Qu. A diode du is connected in antiparallel to the switching element Qu. A diode dx is connected in antiparallel to the switching element Qx. The circuit drawn from the interconnection point between the switching element Qu and the switching element Qx becomes the output circuit 41u.

[0056] The second leg consists of a switching element Qv on the upper arm and a switching element Qy on the lower arm connected in series with the switching element Qv. A diode dv is connected in antiparallel to the switching element Qv. A diode dy is connected in antiparallel to the switching element Qy. The circuit drawn from the interconnection point between the switching elements Qv and Qy becomes the output circuit 41V.

[0057] The third leg consists of a switching element Qw on the upper arm and a switching element Qz on the lower arm connected in series with the switching element Qw. A diode dw is connected in antiparallel to the switching element Qw. A diode dz is connected in antiparallel to the switching element Qz. The circuit drawn from the interconnection point between the switching elements Qw and Qz becomes the output circuit 41w.

[0058] In Figure 4, the switching elements Qu, Qv, Qw, Qx, Qy, and Qz are IGBTs (Insulated Gate Bipolar Transistors), but MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) can be used instead. The on / off state of the switching elements Qu, Qv, Qw, Qx, Qy, and Qz is controlled by the control circuit 38.

[0059] <Operation of the Inverter Circuit> The inverter circuit 36 ​​converts the DC input from the DC circuit 42 into AC output (three-phase AC) and supplies it to the motor M1. The control mode for the conversion is three-phase PWM (Pulse Width Modulation) control. The control circuit 38 generates the pulses necessary for three-phase PWM control. Hereinafter, these pulses will be referred to as PWM pulses. The generation of PWM pulses is performed by the pulse generation unit 73 (see Figure 7), which is a functional block included in the control circuit 38. Details of pulse width modulation will be described later.

[0060] Figure 5 is an explanatory diagram illustrating the pulse generation method in pulse width modulation (PWM). The pulses shown in the lower part of Figure 5 represent the on / off changes of one phase of a three-phase PWM control, for example, the switching element Qu in the upper arm. Note that the figure is conceptual, and the actual frequency of on / off changes is much higher. In PWM control, as described above, the command value of the sine wave which is the fundamental wave component of the phase voltage is compared with the carrier signal, and the on / off state is determined by the relative magnitudes of the two. This modulates the pulse width of the switching element Qu, allowing it to output a sine wave. Other switching elements Qv operate similarly with a phase shift of 120 degrees. Further switching elements Qw operate similarly with a phase shift of 240 degrees.

[0061] The switching element Qx on the lower arm operates in the inverse of the operation of the switching element Qu on the upper arm. The switching element Qy on the lower arm operates in the inverse of the operation of the switching element Qv on the upper arm. The switching element Qz on the lower arm operates in the inverse of the operation of the switching element Qw on the upper arm. However, a slight dead time is provided between the switching element on the upper arm and the switching element on the lower arm connected in series with it to prevent them from turning on simultaneously, even momentarily, when the on / off state is reversed.

[0062] <Pulse Width Modulation (PWM)> Pulse width modulation uses a digital signal to adjust the amplitude of an analog signal. The average output is controlled by changing the pulse width of the digital signal. Specifically, the ratio of ON to OFF time of the digital signal, i.e., the duty cycle, is controlled. When the duty cycle is high (e.g., 80%), the ON time is long and the average output is high. On the other hand, when the duty cycle is low (e.g., 20%), the ON time is short and the average output is low.

[0063] This section explains how to generate the voltage waveform shown by the solid line in the upper part of Figure 5. Since the circuit operates aiming for the value indicated by the solid line, the solid line is also called the voltage command value.

[0064] First, a carrier signal, shown by the dashed line in the upper part of Figure 5, is generated independently of the voltage command value. The carrier signal is, for example, a triangular wave. A triangular wave is a waveform that rises and falls continuously at a constant frequency. The triangular wave serves as the reference for comparing voltage commands. The carrier signal may also be a sawtooth wave. Separately from the carrier signal, a voltage command value is generated. The control circuit 38 generates the voltage command value so that the motor M1 rotates at a predetermined rotational speed while monitoring the current waveform and other parameters flowing through the motor M1. The voltage command value is, for example, a value representing a sine wave.

[0065] Next, the carrier signal and the voltage command value are compared. As a result of the comparison, a pulse is generated that turns ON the moment the voltage command value falls below the carrier signal and turns OFF the moment it rises above it (see Figure 5, lower panel). The generated PWM pulse is output to the inverter circuit 36 ​​described above. The inverter circuit 36 ​​operates according to the generated PWM pulse.

[0066] <Control Circuit> Figure 6 is a block diagram showing the internal configuration of the control circuit 38. The control circuit 38 generates the PWM pulses required by the inverter circuits 36 and 37. As shown in Figure 6, the control circuit 38 includes, for example, a processor 61, a memory 62, an input / output interface (hereinafter referred to as "input / output I / F") 63, and timers 64a and 64b.

[0067] The processor 61 is, for example, a CPU (Central Processing Unit). However, the processor 61 is not limited to a CPU. The processor 61 may also be a GPU (Graphics Processing Unit). The processor 61 may be, for example, a multi-core processor. The processor 61 may also be a single-core processor. The processor 61 may be, for example, an ASIC (Application Specific Integrated Circuit), or a programmable logic device such as a gate array or FPGA (Field Programmable Gate Array).

[0068] Memory 62 includes volatile memory and non-volatile memory. Volatile memory is semiconductor memory such as SRAM (Static Random Access Memory) and DRAM (Dynamic Random Access Memory). Non-volatile memory is such as flash memory, hard disk, and ROM (Read Only Memory). The non-volatile memory stores a control program for controlling the control circuit 38, which is a computer program, and data used to execute the control program. Each function of the processor 61 is performed when the control program is executed by the processor 61. The control program can be stored in a recording medium such as flash memory, ROM, or CD-ROM.

[0069] The input / output interface 63 is a circuit that outputs a predetermined signal to the outside of the control circuit 38. The input / output interface 63 is connected to the inverter circuits 36 and 37 via signal wiring. The input / output interface 63 outputs PWM pulses necessary for the operation of the inverter circuits 36 and 37 to the inverter circuits 36 and 37.

[0070] Timers 64a and 64b are circuits that generate interrupt signals at predetermined time intervals. A timer includes, for example, a comparison register and a counter. The counter counts the clock supplied to the timer. The clock is, for example, a pulse signal generated by a high-precision crystal oscillator. The comparison register is set to a predetermined value by the processor 61. The count comparison register compares the set value with the value of the counter, and generates an interrupt signal and resets the counter when the values ​​match. The reset counter then counts the clock again. This process is repeated thereafter. For example, if the clock is a signal with a period of 1 μs and the value set in the comparison register is 100, the timer generates an interrupt signal every 100 μs.

[0071] <Second Board> The second board 31 is equipped with a refrigerant control microcontroller 33 and a converter circuit 39. The converter circuit 35 converts the AC supplied from the commercial power supply CP into DC of a predetermined voltage and supplies the converted DC to the refrigerant control microcontroller 33. The refrigerant control microcontroller 33 consists of, for example, a programmable IC chip and includes at least one of a CPU and an FPGA. The refrigerant control microcontroller 33 generates control signals to be supplied externally and transmits the generated control signals to the first board 30. The generated control signals include, for example, interrupt signals to the control circuit 38.

[0072] [1-4. Functions of the Control Circuit] Figure 7 is a functional block diagram showing an example of the functions of the control circuit 38 according to Embodiment 1. The control circuit 38 includes a first generation unit 71 and a second generation unit 72 as functional blocks.

[0073] <First Generation Unit> The first generation unit 71 generates a carrier interrupt. The carrier interrupt functions as a trigger for the pulse generation unit 73, which will be described later, to start the pulse generation operation. First, the first generation unit 71 sets a predetermined value in the timer 64a. Since the generation period of the carrier interrupt is the period of the carrier signal, the value set is the period of the carrier signal (triangular wave) (the period from (a) to (e) in Figure 5) divided by the period of the clock input to the timer 64a. For example, if the period of the triangular wave is 200 μs and the period of the clock is 2 μs, the value set in the timer 64a is 100. With the value 100 set and a clock with a period of 2 μs input, the timer 64a generates a carrier interrupt every 200 μs. Then, the pulse generation unit 73, which receives the carrier interrupt generated by the first generation unit 71, continuously generates pulse-width modulated PWM pulses.

[0074] <Second Generation Unit> The second generation unit 72 generates a monitor interrupt to determine abnormalities in carrier interrupts. The monitor interrupt functions as a trigger for the monitor unit 74, which will be described later, to start the abnormality detection operation. First, the second generation unit 72 sets a predetermined value in the timer 64b. The generation period of the monitor interrupt is longer than the generation period of the carrier interrupt.

[0075] Abnormalities in carrier interrupts can occur for various reasons. For example, a surge voltage caused by a lightning strike may enter the control circuit 38, overwriting the values ​​of the registers included in the control circuit 38. When the register values ​​are overwritten, programs that refer to the register values ​​may malfunction, preventing carrier interrupts from occurring or causing abnormal carrier interrupt cycles. If a carrier interrupt malfunctions, the PWM pulses driving motor M1 become abnormal, resulting in abnormal operation of motor M1. A monitor interrupt is generated to detect such malfunctions.

[0076] An interrupt is input to the interrupt input of processor 61. Upon receiving the interrupt, processor 61 saves the currently executing address and the values ​​of its internal registers, and then sets the starting address in memory of the judgment program that determines whether the carrier interrupt is abnormal in the program counter. As a result, the judgment program is executed by processor 61. When the execution of the judgment program is completed, processor 61 restores the previously saved address and internal register values ​​and resumes processing that was in progress before the interrupt was received. In other words, an interrupt is a powerful mechanism that interrupts whatever processing processor 61 is doing and forces it to execute the interrupt processing. If the interrupt determines that the carrier interrupt is abnormal, the control circuit 38 starts operations corresponding to the abnormality of the carrier interrupt.

[0077] On the other hand, the carrier interrupt occurrence cycle may fluctuate slightly. For example, the carrier interrupt occurrence cycle is determined based on the cycle of the required carrier signal. If the load on motor M1 changes rapidly, the rotational speed of motor M1 may change, which necessitates a change in the cycle of the carrier signal, and the carrier interrupt occurrence cycle may fluctuate slightly. If a fluctuation in the carrier interrupt occurrence cycle is immediately judged as a carrier interrupt abnormality, then transient load fluctuations will also be judged as abnormal. Such a judgment is incorrect, and such misjudgments need to be suppressed.

[0078] Since the occurrence period of monitor interrupts is longer than that of carrier interrupts, the control circuit 38 determines abnormalities in carrier interrupts at a longer period than that of carrier interrupts. As a result, even if the occurrence period of carrier interrupts fluctuates somewhat within one cycle of monitor interrupts, the fluctuations are absorbed. This improves the accuracy of determining whether or not a carrier interrupt is abnormal. Furthermore, the occurrence period of monitor interrupts may be five times or more the occurrence period of carrier interrupts. The inventors have found that by setting the occurrence period of monitor interrupts to five times or more the occurrence period of carrier interrupts, misjudgments can be almost completely suppressed. In other words, by setting the period of monitor interrupts to a relatively long period, misjudgments caused by fluctuations in the occurrence period of carrier interrupts can be suppressed.

[0079] The second generation unit 72 may determine the generation period of the monitor interrupt based on the generation period of the carrier interrupt. The generation period of the carrier interrupt may be changed depending on the situation. For example, if the load on the motor M1 becomes light load and power consumption is reduced, the generation period of the carrier interrupt may be changed to a longer period than usual. If the generation period of the monitor interrupt is maintained, the number of carrier interrupts that occur between the previous monitor interrupt and the current monitor interrupt will change in accordance with the change in the generation period of the carrier interrupt. In other words, the range in which the generation period of the carrier interrupt should be judged as abnormal will also change. Therefore, by determining the generation period of the monitor interrupt in accordance with the change in the generation period of the carrier interrupt, misjudgments of abnormal carrier interrupts are suppressed.

[0080] <Pulse Generation Unit> The control circuit 38 may include a pulse generation unit 73, which is a functional block. The pulse generation unit 73 has the function of generating PWM pulses to drive the inverter circuit 36 ​​when triggered by a carrier interrupt. A voltage command value indicating a sine wave signal to rotate the motor M1 at a predetermined rotational speed is generated separately. When the pulse generation unit 73 receives a carrier interrupt, it starts the process of generating a triangular wave (see Figure 5), which is the carrier signal.

[0081] The pulse generation unit 73 compares the value indicated by the carrier signal with the voltage command value. If the voltage command value is lower than the carrier signal, the pulse generation unit 73 outputs a low-level PWM pulse. Conversely, if the voltage command value is higher than the carrier signal, the pulse generation unit 73 outputs a high-level PWM pulse.

[0082] Specifically, when the pulse generation unit 73 starts the generation process, it begins generating a carrier signal from, for example, the peak of a triangular wave (Figure 5(a)). As time passes, the carrier signal decreases. When the value of the carrier signal falls below the voltage command value (Figure 5(b)), the pulse generation unit 73 inverts the level of the output PWM pulse from a Low level to a High level.

[0083] As time progresses, the carrier signal continues to decline until it reaches its lower limit (Figure 5(c)), at which point it begins to rise. This timing corresponds to the trough of a triangular wave. When the rising carrier signal exceeds the voltage command value (Figure 5(d)), the pulse generation unit 73 inverts the level of the output PWM pulse from High to Low. Finally, when the value of the carrier signal reaches its upper limit (Figure 5(d)), one pulse generation cycle is completed.

[0084] As a result of the above, the pulse generation unit 73 outputs a PWM pulse having a duty cycle corresponding to the voltage command value. The pulse generation unit 73 may also start processing from the trough of the triangular wave. Furthermore, the pulse generation unit 73 may process the above results as an analog value or as a digital value.

[0085] <Monitoring Unit> The control circuit 38 may include a monitoring unit 74, which is a functional block. The monitoring unit 74 determines abnormalities in carrier interrupts. The monitoring unit 74 is activated when the second generation unit 72 generates a monitor interrupt. If the monitoring unit 74 determines that the carrier interrupt is abnormal, it resets the control circuit 38.

[0086] An abnormality in carrier interrupts may also be determined based on the number of carrier interrupts during the monitoring period. The monitoring period is the period from the current monitor interrupt to the next monitor interrupt. Therefore, the monitoring period coincides with the cycle of monitor interrupts. When the air conditioner 1 is operating normally, the cycle of carrier interrupts is constant. For this reason, the number of carrier interrupts is constant, calculated by dividing the cycle of monitor interrupts by the cycle of carrier interrupts. The monitoring unit 74 counts the number of carrier interrupts that occur during the monitoring period. If the counted value is abnormal, the monitoring unit 74 determines that the carrier interrupt is abnormal. By making the determination based on the number of carrier interrupts, the monitoring unit 74 can more reliably determine the abnormality.

[0087] If the monitor unit 74 determines that a carrier interrupt is abnormal, it resets the control circuit 38. For example, if the control circuit 38 is composed of a single IC (Integrated Circuit), the monitor unit 74 generates a reset interrupt to reset the control circuit 38. A reset interrupt is a type of interrupt processing that has the function of returning the processor to its initial state. When a reset interrupt occurs, the processor executes an initialization routine and initializes the system. That is, the reset control circuit 38 will execute the program that is executed when the power is turned on. As a result, the control circuit 38, which was operating abnormally due to register overwriting or the like, returns to normal operation.

[0088] If the control circuit 38 is composed of multiple ICs, and a second IC (not shown) separate from the first IC (not shown) which includes the monitor unit 74 includes the first generation unit 71, the monitor unit 74 controls the input / output interface of the first IC to output a reset signal. The reset signal is input to the reset terminal of the second IC. Upon receiving the reset signal, the second IC executes an initialization routine and initializes the system. That is, the reset second IC executes a program that is executed when the power is turned on. As a result, the second IC, which was malfunctioning due to register overwriting or the like, returns to normal operation.

[0089] The monitoring unit 74 may determine whether the number of carrier interrupts occurring during the counted monitoring period is abnormal based on whether the counted number is outside a predetermined range. As described above, the carrier interrupt occurrence cycle fluctuates due to various causes. Therefore, if the criterion for determining whether the counted number is abnormal does not have a margin of error, the monitoring unit 74 may make a false determination due to fluctuations in the carrier interrupt occurrence cycle. Therefore, if the determination criterion has a margin of error of, for example, + / - 10%, false determinations can be suppressed. In other words, the monitoring unit 74 can more reliably determine abnormalities.

[0090] The monitoring unit 74 may determine whether a carrier interrupt is abnormal based on whether the number of carrier interrupts during the current monitoring period is outside a predetermined range compared to the number of carrier interrupts during the previous monitoring period. When the air conditioner 1 is operating normally, the carrier interrupt occurrence cycle is constant. Therefore, if the number of carrier interrupts during the current monitoring period is outside a predetermined range compared to the number of carrier interrupts during the previous monitoring period, it may be immediately determined that the carrier interrupt is abnormal. Since the determination can be made immediately, the monitoring unit 74 can determine the abnormality without setting an excessive margin in the determination criteria.

[0091] The monitoring unit 74 may determine that the carrier interrupt is abnormal if the number of carrier interrupts during the current monitoring period is outside a predetermined range compared to the number of carrier interrupts during the monitoring period when the control circuit is started. In most cases, the control circuit starts up normally when the air conditioner 1 is started up. The carrier interrupt occurrence cycle at this startup is normal. Therefore, if the number of carrier interrupts during the current monitoring period is outside a predetermined range compared to the number of carrier interrupts during the monitoring period when the control circuit is started up, the monitoring unit 74 may immediately determine that the carrier interrupt is abnormal. Since the determination can be made immediately, the monitoring unit 74 can determine the abnormality without setting an excessive margin in the determination criteria.

[0092] The monitor unit 74 may determine a threshold for the number of carrier interrupts at which it determines whether a carrier interrupt is abnormal, based on the carrier interrupt occurrence cycle. As described above, the carrier interrupt occurrence cycle may change depending on the circumstances. If the monitor interrupt occurrence cycle is maintained, the number of carrier interrupts that occur during one monitoring period will change in accordance with the change in the carrier interrupt occurrence cycle. In other words, if the threshold for determining whether a carrier interrupt is abnormal remains constant, the monitor unit 74 may make a false determination. Therefore, the threshold for determining whether a carrier interrupt is abnormal is changed in accordance with the change in the carrier interrupt occurrence cycle. This suppresses false determinations by the monitor unit 74. Furthermore, since only the threshold is changed, the monitor unit 74 can change the threshold with only a few program steps.

[0093] [1-5. Operation of the Control Circuit] Figure 8 is a state transition diagram illustrating the operation of the control circuit 38. The first loop, which includes the generation of a carrier interrupt (step S11), and the second loop, which includes the generation of a monitor interrupt (step S21), operate independently. First, the loop including the first generation unit 71 will be explained.

[0094] [1-5-1. First Loop] <Step S11> When power is supplied to the control circuit 38, the first generation unit 71 generates a carrier interrupt at predetermined intervals, for example, every 200 μs (Step S11). Specifically, the first generation unit 71 sets the timer 64a to, for example, 100. When the clock period is 2 μs, the timer 64a generates a carrier interrupt every 200 μs. When a carrier interrupt is generated, the control circuit 38 proceeds to step S12.

[0095] <Step S12> Upon receiving a carrier interrupt, the pulse generation unit 73 generates a pulse-width modulated PWM pulse to drive the inverter circuit 36, triggered by the carrier interrupt (Step S12). The generated PWM pulse is output to the inverter circuit 36. Once the PWM pulse is output, the pulse generation unit 73 proceeds to Step S13.

[0096] <Step S13> After the pulse output, the pulse generation unit 73 adds 1 to the value in the register or memory that stores the number of carrier interrupts n. After adding 1 to n, the control circuit 38 returns to step S11. As a result, steps S11 to S13 included in the first loop are executed every 200 μs. That is, the control circuit 38 outputs a pulse-width modulated PWM pulse to the inverter circuit 36 ​​every 200 μs.

[0097] [1-5-2. Second Loop] <Step S21> When power is supplied to the control circuit 38, the second generation unit 72 generates a monitor interrupt at predetermined intervals, for example, every 20 ms (Step S21). Specifically, the second generation unit 72 sets the timer 64b to, for example, 10000. When the clock period is 2 μs, the timer 64b generates a monitor interrupt every 20 ms. When a monitor interrupt is generated, the control circuit 38 proceeds to step S22.

[0098] <Step S22> Upon receiving a monitor interrupt, the monitor unit 74 uses the monitor interrupt as a trigger to determine whether or not the carrier interrupt is abnormal. Specifically, the monitor unit 74 obtains information indicating the number of carrier interrupts n from a register or memory that stores this information (Step S22). Having obtained the information indicating the number of carrier interrupts n, the monitor unit 74 proceeds to Step S23.

[0099] <Step S23> The monitor unit 74, having acquired information indicating the number of carrier interrupts n, determines whether n is within a predetermined range. When the control circuit 38 is functioning normally, carrier interrupts occur every 200 μs. On the other hand, if monitor interrupts occur every 20 ms, the number of carrier interrupts n that occur during one monitoring period should be the monitor interrupt occurrence period divided by the carrier interrupt occurrence period, i.e., n = 20 ms / 200 μs = 100. If the judgment criterion has a margin of + / - 10%, for example, the predetermined range for determining whether the carrier interrupt is abnormal will be from 90 to 110. If the number of carrier interrupts n is 90 or more and 110 or less, the monitor unit 74 determines that the carrier interrupt is normal (YES in Step S23). On the other hand, if the number of carrier interrupts n is less than 90 or greater than 110, the monitor unit 74 determines that the carrier interrupt is abnormal (NO in Step S23). If the monitoring unit 74 determines that the result is YES, it proceeds to step S24; if the monitoring unit 74 determines that the result is NO, it proceeds to step S25.

[0100] <Step S24> The monitor unit 74, having determined that the carrier interrupt is normal, clears the carrier interrupt count n. That is, the monitor unit 74 writes "0" to the register or memory that stores the carrier interrupt count n. After the carrier interrupt count n is cleared, the control circuit 38 returns to step S21. As a result, steps S21 to S24 included in the second loop are executed every 20ms. That is, the control circuit 38 determines every 20ms whether or not the carrier interrupt is abnormal.

[0101] <Step S25> The monitoring unit, having determined that the carrier interrupt is abnormal, resets the control circuit 38. If the control circuit 38 is composed of a single IC, the monitoring unit 74 generates a reset interrupt to reset the control circuit 38. When a reset interrupt occurs, the processor executes an initialization routine and initializes the system. That is, the reset control circuit 38 will execute the program that is executed when the power is turned on. As a result, the control circuit 38, which was operating abnormally due to register overwriting or the like, returns to normal operation.

[0102] [1-6. Summary] Since the occurrence period of monitor interrupts is longer than that of carrier interrupts, the control circuit 38 determines abnormalities in carrier interrupts at a longer period than that of carrier interrupts. As a result, even if the occurrence period of carrier interrupts fluctuates somewhat within one cycle of the monitor interrupt, the fluctuation is absorbed. This improves the accuracy of the determination.

[0103] Furthermore, in addition to generating a carrier interrupt for pulse width modulated pulses, the control circuit 38 also generates a monitor interrupt to determine if the carrier interrupt is abnormal. Interrupts are a powerful mechanism that interrupts whatever processing the processor is doing and forces it to execute the interrupt handler. If the monitor interrupt determines that the carrier interrupt is abnormal, the control circuit 38 starts an operation corresponding to the abnormal carrier interrupt, namely a reset operation. As a result, the control circuit 38, which was operating abnormally due to register overwriting or the like, can return to normal operation.

[0104] The above explanation uses an inverter circuit and a control circuit for controlling it implemented in an air conditioner as an example. This disclosure is not limited to air conditioners. A carrier interrupt may activate a pulse generation unit 73 that generates PWM pulses in the inverter circuit that drives the motor. In other words, the electrical component unit of this disclosure can be applied to an inverter circuit that drives a motor used in refrigerators, washing machines, electric vehicles, etc.

[0105] [2. Embodiment 2] Figure 9 is a functional block diagram showing an example of the functions of the control circuit 38 according to Embodiment 2. In Embodiment 1, the control circuit 38 could be configured with a single IC. In Embodiment 2, the first MCU (microcontroller unit) 91 including the first generation unit 71 and the second MCU 92 including the second generation unit 72 are different MCUs. Note that the first MCU 91 and the second MCU 92 each include at least a processor and may further include memory, input / output I / F, and timers.

[0106] If the control circuit 38 is configured by a single MCU, an event that causes abnormal carrier interrupts may disrupt the operation of the MCU, potentially causing all multiple information processing processes running within the MCU to malfunction or terminate abnormally. If the second generation unit 72 operates on the same MCU as the first generation unit 71, both the first generation unit 71 and the second generation unit 72 may cease to function. If the second generation unit 72 ceases to function, the monitor interrupt used to determine abnormal carrier interrupts will also cease to occur, and the control circuit 38 may be unable to determine abnormal carrier interrupts.

[0107] Therefore, the control circuit 38 is configured as a separate MCU from the second MCU 92, which includes the second generation unit 72, and the first MCU 91, which includes the first generation unit 71. As a result, even if the first MCU 91, which executes the functions of the first generation unit 71, malfunctions or stops abnormally due to, for example, a surge voltage caused by a lightning strike, which overwrites the register values, the monitor interrupt for determining abnormalities in carrier interrupts will continue to be generated as long as the second MCU 92, which executes the functions of the second generation unit 72, is operating normally. As a result, the monitor unit 74 determines that the carrier interrupt is abnormal and resets the control circuit 38.

[0108] The second MCU 92 may be an MCU that controls the refrigerant circuit of the air conditioner. Air conditioners usually have a refrigerant control MCU that controls the refrigerant circuit in addition to the MCU that controls the inverter of the compressor motor. The inverter circuit of an air conditioner is susceptible to noise because the drive voltage and drive current of the compressor and other components are large. Also, since the outdoor unit is installed outdoors, it is susceptible to surges caused by lightning strikes and cloud-to-cloud discharges. For this reason, by generating a monitoring interrupt in the second MCU 92, which is different from the first MCU 91, the accuracy of abnormality detection can be improved. In the example in Figure 3, the refrigerant control microcontroller 33 corresponds to the second MCU 92.

[0109] The second MCU 92 may output a signal indicating an abnormality if the number of resets of the first MCU 91 during a predetermined period exceeds a predetermined value. A reset of the first MCU 91 occurs when there is an abnormality in the carrier interrupt. If the number of resets exceeds a predetermined value, there is a high probability that a serious malfunction has occurred in the air conditioner. The signal indicating an abnormality is, for example, a signal that lights up the LED of the indoor unit to notify the user of the abnormality. This allows the user to be informed that a serious malfunction has occurred in the air conditioner. Various methods can be used for notification. Notification may be sent to the user's smartphone. If the air conditioner 1 is monitored by a management company via an internet connection, notification may be sent to the management company. Also, since resets can be easily monitored from the outside, notification is easy.

[0110] [3. Embodiment 3] Figure 10 is a functional block diagram showing an example of the functions of the control circuit 38 according to Embodiment 3. In Embodiment 2, the first MCU 91 included a first generation unit 71, a pulse generation unit 73, and a monitor unit 74, and the second MCU 92 included a second generation unit 72. In Embodiment 3, the monitor unit 74 that determines abnormalities in carrier interrupts is included in the second MCU 92.

[0111] [3-1. Operation of the control circuit] In the third embodiment, steps S22, S24, and S25 of the operation of the control circuit 38 are slightly different, but the other steps are the same.

[0112] <Step S22> Upon receiving a monitor interrupt, the monitor unit 74 uses the monitor interrupt as a trigger to determine whether or not the carrier interrupt is abnormal. Specifically, the monitor unit 74 obtains information indicating the number of carrier interrupts n from the register or memory of the first MCU 91 that stores this information.

[0113] <Step S24> The monitor unit 74, having determined that the carrier interrupt was normal, clears the carrier interrupt count n. Specifically, the monitor unit 74 outputs a signal to the first MCU 91 indicating that it should write "0" to the register or memory that stores the carrier interrupt count n. The first MCU 91, having received the signal indicating that it should write "0", writes "0" to the register or memory that stores the carrier interrupt count n.

[0114] <Step S25> The monitor unit 74, having determined that the carrier interrupt is abnormal, resets the first MCU 91. When a reset interrupt occurs, the first MCU 91 executes an initialization routine and initializes the system. That is, the reset first MCU 91 will execute the program that is executed when the power is turned on. As a result, the first MCU 91, which was operating abnormally due to register overwriting or the like, returns to normal operation.

[0115] The above description includes a register or memory for counting the number of carrier interrupts n in the first MCU 91, but is not limited to this; the second MCU 92 may also include a register or memory for counting the number of carrier interrupts n. In this case, the first MCU 91 outputs a signal to the second MCU 92 indicating that a carrier interrupt has occurred each time a carrier interrupt occurs. The second MCU 92, on the other hand, counts the signal indicating that the input carrier interrupt has occurred and stores the count in a register or memory. The monitor unit 74 of the second MCU 92 determines whether there is a carrier interrupt abnormality based on the count stored in the register or memory.

[0116] [3-2. Summary] In the case of Embodiment 2, for example, if a surge voltage enters due to a lightning strike and the first MCU 91 malfunctions or stops malfunctioning, the monitoring unit 74's functions are executed by the first MCU 91, so there was a risk that the monitoring unit 74's functions would be stopped due to being caught up in the malfunction of the first MCU 91.

[0117] On the other hand, in the third embodiment, the function of the monitor unit 74 is performed by the second MCU 92. Even if a surge voltage enters due to a lightning strike and the first MCU 91 malfunctions, if the second MCU 92 is operating normally, the monitor unit 74 of the second MCU 92 will determine if there is an abnormality in the carrier interrupt, and if it determines that there is an abnormality, it will output a reset signal to the first MCU 91. As a result, the first MCU 91 can be reset and return to normal operation.

[0118] [4. Embodiment 4] Figure 11 is a functional block diagram showing an example of the functions of the control circuit 38 according to Embodiment 4. In Embodiment 4, the first MCU 91 controls the inverter circuit 36, and the second MCU 92 controls an inverter circuit 37 that is different from the inverter circuit 36. The second MCU 92 is an MCU that outputs PWM pulses to the inverter circuit 37. In Figure 11, the first MCU 91 includes a monitor unit 74, but the second MCU 92 may also include a monitor unit 74.

[0119] As a result, for example, if an air conditioner has two inverter circuits and an MCU that controls each of them, it is not necessary to prepare a separate MCU that determines abnormalities in carrier interrupts. In the above configuration, the second MCU 92 determines abnormalities in the carrier interrupts of the first MCU 91, but conversely, the first MCU 91 may be configured to determine abnormalities in the carrier interrupts of the second MCU 92. Furthermore, the second MCU 92 may be configured to determine abnormalities in the carrier interrupts of the first MCU 91, while the first MCU 91 also determines abnormalities in the carrier interrupts of the second MCU 92. In other words, the first MCU 91 and the second MCU 92 mutually determine abnormalities in the carrier interrupts of the other MCU. In this case, if either MCU is operating normally, even if the other MCU operates abnormally, the normally operating MCU will determine the abnormality in the other MCU's carrier interrupt, reset the other MCU, and restore the other MCU to normal operation, thus improving the robustness of the system.

[0120] The embodiments disclosed herein are illustrative in all respects and are not restrictive. The scope of the present invention is not limited to the embodiments described above and includes all modifications within the scope of equivalence to the configurations described in the claims.

[0121] 1 Air conditioner 2 Outdoor unit 3A, 3B Indoor unit 4 Indoor heat exchanger 5 Indoor fan 6 Compressor 7 Four-way switching valve 8 Accumulator 9 Outdoor heat exchanger 10 Outdoor fan 20 Casing 21 Partition plate 22 Heat exchange chamber 23 Equipment room 24 Electrical components unit 25 Enclosure 30, 31 Circuit board 32 Inverter device 33 Refrigerant control microcontroller 34 Noise filter 35, 39 Converter circuit 36, 37 Inverter circuit 38 Control circuit 41u, 41v, 41w Output circuit 42p, 42n DC circuit 61 Processor 62 Memory 63 Input / output I / F 64a, 64b Timer 71 First generation unit 72 Second generation unit 73 Pulse generation unit 74 Monitor unit 91 1st MCU 92 2nd MCU CP Commercial power supply M1, M2 Motor P1 1st piping P2 2nd piping P1L Liquid refrigerant piping P2L Liquid refrigerant piping P1G Gas refrigerant piping P2G Gas refrigerant piping VE1 1st expansion valve VE2 2nd expansion valve VL1 Liquid shut-off valve VL2 Liquid shut-off valve VG1 Gas shut-off valve VG2 Gas shut-off valve

Claims

1. An electrical component unit comprising: a first inverter circuit (36) that converts DC to AC by pulse width modulation; and a control circuit (38) that controls the first inverter circuit (36), wherein the control circuit (38) includes: a first generation unit (71) that generates a carrier interrupt, which is an interrupt that generates pulses of the pulse width modulation; and a second generation unit (72) that generates a monitor interrupt for determining an abnormality in the carrier interrupt, wherein the generation period of the monitor interrupt is longer than the generation period of the carrier interrupt.

2. The electrical component unit according to claim 1, wherein the control circuit (38) further comprises a monitor unit (74) that determines an abnormality in the carrier interrupt, the monitor unit (74) is activated when the monitor interrupt occurs, and resets the control circuit (38) when it determines that the carrier interrupt is abnormal.

3. The electrical component unit according to claim 1 or claim 2, wherein the occurrence period of the monitor interrupt is five times or more than the occurrence period of the carrier interrupt.

4. The electrical component unit according to claim 3, wherein the second generation unit (72) determines the generation period of the monitor interrupt based on the generation period of the carrier interrupt.

5. The electrical component unit according to claim 2, wherein the monitoring unit (74) determines whether the carrier interrupt is abnormal based on the number of carrier interrupts that occur during the monitoring period from one monitor interrupt to the next monitor interrupt.

6. The electrical component unit according to claim 5, wherein the monitoring unit (74) determines that the carrier interrupt is abnormal when the number of carrier interrupts is outside a predetermined range.

7. The electrical component unit according to claim 5, wherein the monitoring unit (74) determines that the carrier interrupt is abnormal if the number of carrier interrupts during the current monitoring period is outside a predetermined range compared to the number of carrier interrupts during the previous monitoring period.

8. The electrical component unit according to claim 5, wherein the monitoring unit (74) determines that the carrier interrupt is abnormal if the number of carrier interrupts during the current monitoring period is outside a predetermined range compared to the number of carrier interrupts during the monitoring period when the control circuit (38) is started.

9. The monitoring unit (74) determines a threshold number of carrier interrupts for determining whether the carrier interrupt is abnormal, based on the carrier interrupt occurrence cycle, as described in any one of claims 5 to 8.

10. The electrical component unit according to claim 1, wherein the first MCU (microcontroller unit) (91) including the first generation unit (71) is a different MCU from the second MCU (92) including the second generation unit (72).

11. The electrical component unit according to claim 10, wherein the second MCU (92) further includes a monitor unit (74) that determines an abnormality in the carrier interrupt, the monitor unit (74) is activated when the monitor interrupt occurs, and resets the first MCU (91) when it determines that the carrier interrupt is abnormal.

12. The electrical component unit according to claim 10 or claim 11, wherein the first MCU (91) controls the first inverter circuit (36), and the second MCU (92) controls a second inverter circuit (37) that is different from the first inverter circuit (36).

13. The electrical component unit according to claim 10, wherein the second MCU (92) is an MCU (33) that controls the refrigerant circuit of the air conditioner (1).

14. The electrical component unit according to claim 10, wherein the second MCU (92) outputs a signal indicating an abnormality when the number of resets of the first MCU (91) during a predetermined period exceeds a predetermined value.

15. The electrical component unit according to any one of claims 1 to 14, wherein the carrier interrupt activates the pulse generation unit (73) that generates the pulse in the first inverter circuit (36) that drives the motor (M1).

16. An air conditioner comprising an electrical component unit (24) according to any one of claims 1 to 15.

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