Method for forming via hole having high aspect ratio

Abstract

Disclosed is a via hole forming method which increases adhesion of a copper film to a substrate and implements uniform deposition of a primer layer. According to one aspect, provided is a method for forming a via hole, the method comprising the steps of: (S1) preparing a substrate having a hole formed therein; (S2) depositing a primer layer on the substrate; and (S3) forming a preliminary copper film on the primer layer, wherein step (S2) comprises a step of depositing the primer layer by spatial atomic layer deposition under normal pressure or positive pressure conditions.

Description

Method for forming via holes with a high aspect ratio

[0001] The present invention relates to a method for forming via holes having a high aspect ratio.

[0002] In the manufacturing of semiconductor devices, a method of depositing a copper film into holes formed in a glass substrate to connect wiring is commonly used.

[0003] However, due to the difference in surface energy between the glass substrate and the copper film, the copper film had low adhesion to the glass substrate, leading to a problem of easy delamination. In particular, in structures with a high hole aspect ratio, the surface tension of the copper film increased further, making uniform deposition difficult, and stress concentrated at the interface between the copper film and the glass substrate, causing the copper film to delaminate easily.

[0004] Furthermore, due to the characteristic that the diffusion coefficient of copper materials with respect to glass substrates becomes very high at high temperatures, there was a problem where copper easily diffused into the glass substrate. This resulted in leakage current, leading to performance degradation and a shortened lifespan of semiconductor devices.

[0005] To solve these problems, methods of coating mainly with tantalum nitride (TaN) or titanium nitride (TiN) have been proposed; however, while tantalum nitride (TaN) and titanium nitride (TiN) have excellent contact resistance, they have the disadvantage of poor barrier properties.

[0006] In addition, sputtering or chemical vapor deposition (CVD) methods using TaN / Ta, TiN / Ti, or mixtures thereof have been proposed prior to copper plating, but they still suffer from problems such as reduced barrier properties and contact resistance.

[0007] According to one aspect of the present invention, a method for forming a via hole that can increase the adhesion between copper and a glass substrate or a silicon substrate is provided.

[0008] According to another aspect of the present invention, a method for forming via holes is provided that effectively prevents the diffusion of copper into a glass substrate or a silicon substrate.

[0009] According to another aspect of the present invention, a via hole formation method is provided that can deposit a uniform primer layer even in a high aspect ratio structure.

[0010] According to another aspect of the present invention, a via hole formation method is provided that can improve process efficiency and reduce costs by implementing a fast deposition rate suitable for mass production.

[0011] The objects of the present invention are not limited to those mentioned above, and other unmentioned objects and advantages of the present invention may be understood from the following description and will be more clearly understood by the embodiments of the present invention. Furthermore, it will be readily apparent that the objects and advantages of the present invention can be realized by the means and combinations thereof described in the specification.

[0012] According to one aspect of the present invention, a method for forming a via hole is provided, comprising: (S1) preparing a substrate having a hole formed therein; (S2) depositing a primer layer on the substrate; and (S3) forming a preliminary copper film on the primer layer, wherein step (S2) includes depositing the primer layer by spatial atomic layer deposition under atmospheric pressure or positive pressure conditions.

[0013] According to one aspect of the present invention, the substrate may include a glass substrate or a silicon substrate.

[0014] According to one aspect of the present invention, the aspect ratio of the hole may be 10 or more.

[0015] According to one aspect of the present invention, the step of depositing a primer layer on the substrate may further include the step of controlling the lower pressure of the substrate through an exhaust module.

[0016] According to one aspect of the present invention, the primer layer may be formed from a primer material comprising a precursor and a reaction gas.

[0017] According to one aspect of the present invention, the precursor may be any one selected from the group consisting of metal-organic precursors, metal-inorganic precursors, organic silane compounds, and combinations thereof.

[0018] According to one aspect of the present invention, the primer layer may include one or more selected from the group consisting of Al2O3, TiO2, SiO2, ZnO, and organic silane compounds.

[0019] According to one aspect of the present invention, the step coverage of the primer layer may be 90% or more.

[0020] In some embodiments of the present invention, a via hole formation method may be provided, further comprising the step (S4) of etching the primer layer and the preliminary copper film to form the primer layer and the copper film.

[0021] The means for solving the above problem are not all of the features of the present invention and may be combined with some embodiments of this specification. Various features of the present invention and the advantages and effects derived therefrom may be understood in more detail by referring to the specific description below.

[0022] According to one aspect of the present invention, a via hole formation method can be implemented that increases the adhesion between copper and a glass substrate or a silicon substrate while effectively preventing the diffusion of copper into the glass substrate or the silicon substrate.

[0023] According to another aspect of the present invention, a via hole formation method can be implemented that reduces costs by depositing a uniform primer layer even in a high aspect ratio structure and simultaneously achieving a fast deposition rate suitable for mass production.

[0024] In addition to the effects described above, specific effects of the present invention are described together with the following explanation of specific details for implementing the invention. Furthermore, the effects of the present invention are not limited to those mentioned above and can be easily realized by means and combinations thereof described in the specification.

[0025] FIG. 1 is a schematic diagram of a space-divided atomic layer deposition apparatus according to one embodiment of the present invention.

[0026] FIG. 2 shows one step of a via hole formation method according to one embodiment of the present invention.

[0027] FIG. 3 shows a step in a via hole formation method according to one embodiment of the present invention.

[0028] FIG. 4 shows a step in a via hole formation method according to one embodiment of the present invention.

[0029] In this specification, singular expressions include plural expressions unless the context clearly indicates otherwise.

[0030] In this specification, the terms “comprise” and / or “comprising” specify the presence of the mentioned features, steps, numbers, actions, parts, elements, and / or groups thereof, and do not exclude the presence or addition of one or more other features, steps, numbers, actions, parts, elements, and / or groups thereof.

[0031] In this specification, expressions such as "first," "second," "(S1)," "(S2)," etc. may modify various components regardless of order and / or importance, and do not limit such components. These expressions may be used to distinguish one component from another. For example, without departing from the scope of the rights of this disclosure, the first component may be named the second component, and similarly, the second component may be renamed the first component.

[0032] In this specification, "at least one of a, b and c" is defined as one or more selected from the group consisting of a, b and c.

[0033] Where various embodiments are described in this specification, each embodiment may be combined unless specifically stated otherwise. In this case, the effects of the present invention may be defined as including effects derived from each embodiment and effects resulting from the organic combination of each embodiment. For example, even if embodiments 1 and 2 are described independently in this specification, unless the context clearly indicates otherwise, embodiments 1 and 2 may be organically combined with each other, and the effects of the present invention may include effects resulting from the combination of embodiments 1 and 2.

[0034] In this specification, a range of numerical values ​​indicated by the term 'to' represents a range of numerical values ​​that includes the values ​​listed before and after the term as the lower and upper limits, respectively. For example, if 'a to b' is described in the specification, it may be understood that 'a to b' (a to b) is described.

[0035] In the present specification, if multiple numerical values ​​are disclosed for the upper and lower limits of any numerical range, the numerical range disclosed in the present specification may be understood as a range of any numerical values ​​in which any one of the multiple lower limit values ​​and any one of the multiple upper limit values ​​are respectively the lower limit value and the upper limit value. For example, if a or greater, or b or greater; and c or less, or d or less is described, it may be understood as a or greater and c or less, a or greater and d or less, b or greater and c or less, or b or greater and d or less.

[0036] In this specification, terms such as “about” or “substantially” refer to a reasonable amount of variation of a term modified so as not to significantly alter the final result. Such terms may be interpreted to include a variation of at least ±5% or at least ±10% to the extent that the variation does not alter or invalidate the meaning of the word.

[0037] According to one aspect of the present invention, a method for forming a via hole is provided, comprising: (S1) preparing a substrate having a hole formed therein; (S2) depositing a primer layer on the substrate; and (S3) forming a preliminary copper film on the primer layer, wherein step (S2) includes depositing the primer layer by spatial atomic layer deposition under atmospheric pressure or positive pressure conditions.

[0038] According to one aspect of the present invention, by including the step of depositing the primer layer by spatial atomic layer deposition under atmospheric or positive pressure conditions, the adhesion between copper and glass or silicon can be increased, and at the same time, the diffusion of copper into the glass or silicon substrate can be effectively prevented. According to another aspect of the present invention, a via hole formation method can be implemented that reduces costs by depositing a uniform primer layer even in a high aspect ratio structure and achieving a fast deposition rate suitable for mass production.

[0039] Hereinafter, the configuration of the present invention will be described in more detail with reference to the drawings.

[0040] In this specification, spatial atomic layer deposition refers to a method of deposition in which precursors and reaction gases are spatially separated, unlike conventional time-division atomic layer deposition. That is, spatial atomic layer deposition is a method of creating different reaction zones within a single chamber and moving the substrate and head to sequentially induce reactions in each zone. For example, the spatial atomic layer deposition can be implemented through a spatial atomic layer deposition apparatus.

[0041] FIG. 1 is a schematic diagram of a space-divided atomic layer deposition apparatus according to one embodiment of the present invention.

[0042] Referring to FIG. 1, the space-divided atomic layer deposition apparatus according to the present invention may include a substrate (10) to be deposited.

[0043] A substrate (10) according to the present invention may be placed on a support (100). Specifically, the substrate (10) may be placed directly on the support. For example, the substrate (10) may be connected to the support (1), specifically directly connected. In some examples, the substrate (10) may represent a deposition target.

[0044] In some embodiments of the present invention, the space-divided atomic layer deposition apparatus may further include an inlet for introducing precursors (R1, R2), a reaction gas (R2), and an inert gas (G1) into a chamber, and an outlet for discharging exhaust gas (E1) discharged from the chamber. For example, one or more inlets may be formed, and specifically, they may be formed separately for the precursor (R1), the reaction gas (R2), and the inert gas (G1).

[0045] (S1) Step of preparing a substrate with a hole formed therein

[0046] Referring to FIG. 2, the via hole formation method according to the present invention includes the step (S1) of preparing a substrate (10) having a hole (h) formed therein.

[0047] In some examples, the maximum thickness of the substrate (10) on which the hole (h) is formed is not particularly limited, but may be 0.1 mm or more, 0.2 mm or more, 0.3 mm or more, 0.4 mm or more, or 0.5 mm or more, or 0.2 mm or less, 0.3 mm or less, 0.4 mm or less, 0.5 mm or less, 0.6 mm or less, or 0.7 mm or less.

[0048] In some examples, the substrate is not particularly limited but may be any one selected from the group consisting of glass, silicon, and combinations thereof, and specifically may include a glass substrate or a silicon substrate.

[0049] In some examples, the substrate (10) may include a hole (h), specifically one or more holes (h). For example, a method of etching a non-etched substrate may be used to form the substrate (10) having the hole (h) formed therein.

[0050] Meanwhile, the aspect ratio is defined as the depth (H1) relative to the width (W1) of the hole (h).

[0051] In some embodiments of the present invention, the aspect ratio of the hole (h) may be 10 or more. Specifically, as the aspect ratio of the hole (h) increases, the effect of the present invention may be further enhanced. In some embodiments of the present invention, even though the aspect ratio of the hole (h) is controlled to the above numerical range, by depositing the primer layer using spatial atomic layer deposition, a via hole formation method can be implemented that increases the adhesion between copper and glass or silicon while effectively preventing the diffusion of copper into the glass or silicon substrate, and reduces costs by achieving a fast deposition rate suitable for mass production.

[0052] In some embodiments of the present invention, the depth (H1) of the hole (h) may be 20 μm or more, 30 μm or more, 40 μm or more, 45 μm or more, or 50 μm or more, or 200 μm or less, 150 μm or less, 130 μm or less, or 100 μm. In some embodiments of the present invention, by adjusting the depth of the hole to the above numerical range, the effect of increasing the adhesion between copper and glass or silicon while effectively preventing the diffusion of copper into the glass or silicon substrate can be further improved.

[0053] In some embodiments of the present invention, the diameter (H1) of the hole (h) may be 2㎛ or more and 10㎛ or less.

[0054] In some examples, the type of the hole (h) is not particularly limited and may be one or more selected from the group consisting of through hole, buried via hole, and blind via hole.

[0055] In some embodiments of the present invention, the temperature of the substrate (10) may be 80°C or higher and 150°C or lower. Specifically, by controlling the temperature of the substrate to the above numerical range, the reaction between the precursor and the reaction gas can be promoted, thereby further increasing the deposition rate of the primer layer.

[0056] (S2) Step of depositing a primer layer on the substrate

[0057] The via hole formation method according to the present invention includes the step (S2) of depositing a primer layer on the substrate to increase the adhesion between the copper film and the substrate. Specifically, by depositing the primer layer on the surface of the substrate, not only is the adhesion between the copper and the glass or silicon substrate strengthened, but a barrier effect that prevents the diffusion of copper into the glass or silicon substrate can also be achieved. In addition, the primer layer can achieve stable bonding strength between the copper and the glass or silicon substrate even under high temperature and mechanical stress.

[0058] In this specification, a “layer” or “film” may include cases where, when observing the region in which the layer or film exists, it is formed over the entire region, or cases where it is formed only in a part of the region. For example, the surface of the layer or film may be defined as having a flat shape, a non-flat shape, and combinations thereof; or a continuous shape, a discontinuous shape, and combinations thereof. For example, when another member is composed of a layer or film directly on a member, the coverage of the other member on the surface of the member may be defined as 1% or more, 5% or more, 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 85% or more, 90% or more, 95% or more, or 99% or more. For example, it may also be defined as a “layer” or “film” when a plurality of particles form a clustered structure.

[0059] Step (S2) according to the present invention includes the step of depositing the primer layer by spatial atomic layer deposition under atmospheric pressure (760 mmHg) or positive pressure conditions. According to one aspect of the present invention, even if the pressure inside the chamber is controlled to atmospheric pressure or positive pressure, the primer layer can be uniformly formed inside the hole, and the efficiency of the process can be improved by reducing costs since vacuum conditions are not used. For example, the positive pressure may be 1 atmosphere (atmospheric pressure).

[0060] FIG. 2 shows one step of a via hole formation method according to one embodiment of the present invention.

[0061] Referring to FIGS. 1 and 2, a precursor (R1), a reaction gas (R2), and an inert gas (G1) can be introduced onto the surface of a substrate (10) in a separated state. For example, nitrogen (N2), which is an inert gas, and TMA gas, which is a precursor (R1), can be sprayed onto the substrate (10). This TMA gas can be deposited on the surface of the substrate (10). Next, the remaining TMA gas can be sucked in and removed from the surface of the substrate (10) by a purge operation. Then, nitrogen (N2), which is an inert gas, and H2O gas, which is an additional precursor or reaction gas, can be sprayed onto the substrate (10). This H2O gas can chemically bond with the TMA, which is a precursor, on the substrate (10) to form a primer layer (2Op), such as an aluminum oxide (Al2O3) film.

[0062] In some embodiments of the present invention, the primer layer (20p) may be formed from a primer material comprising a precursor (R1) and a reaction gas (R2). In some embodiments of the present invention, by forming the primer layer with a primer material comprising a precursor and a reaction gas, the adhesion between copper and glass or silicon can be increased, and at the same time, the diffusion of copper into the glass or silicon substrate can be effectively prevented. Furthermore, by forming the primer layer with the above-described primer material, a uniform primer layer can be deposited even in a high aspect ratio structure, and a fast deposition rate suitable for mass production can be achieved, thereby reducing costs.

[0063] In some examples, the step of depositing the primer layer can control the pressure under the substrate through an exhaust module (not shown) inside the chamber, and by controlling the pressure under the substrate, the primer materials can be effectively penetrated into the via holes.

[0064] In particular, by controlling the pressure at the bottom of the substrate, primer materials can be guided toward the bottom of the chamber, and residual inert gas can also be discharged. Accordingly, the leakage of primer materials outside the via hole can be minimized, and the backflow of inert gas into the area where the top of the substrate (S) is located can be minimized. Therefore, the issue of quality degradation of the atomic layer deposit due to abnormal reactions of the precursor can be further minimized.

[0065] In some examples, the above precursor is not particularly limited but may be any one selected from the group consisting of metal-organic precursors, metal-inorganic precursors, organosilane compounds, and combinations thereof.

[0066] In some examples, the metal-organic precursor may include one or more selected from the group consisting of aluminum precursors, silica precursors, and zinc precursors, and specifically, may include one or more selected from the group consisting of trimethylaluminum, tetraethyl orthosilicate, and diethyl zinc.

[0067] In some examples, the metal inorganic precursor may include a titanium precursor, and specifically, may include titanium tetrachloride.

[0068] In some examples, the organic silane compound may include one or more selected from the group consisting of trimethoxysilane, vinyltrimethoxysilane, aminopropyltrimethoxysilane, and mercaptopropyltrimethoxysilane.

[0069] In some examples, the reaction gas (R2) is a gas capable of reacting with the precursor (R1) to form a primer layer, and is not particularly limited but may be any one selected from the group consisting of water (H2O(g)), ozone, and combinations thereof.

[0070] For example, the reaction between the aforementioned aluminum precursor, trimethylaluminum, and a reaction gas (e.g., water vapor) can proceed according to the following reaction schemes 1 and 2.

[0071] [Reaction Equation 1]

[0072] Al(CH)3+ 3H2O(g) Al(OH)3+ 3CH4(g)

[0073] [Reaction Equation 2]

[0074] 2Al(OH)3 → Al2O3 + 3H2O

[0075] In some embodiments of the present invention, the primer layer (20p) may include one or more selected from the group consisting of Al2O3, TiO2, SiO2, ZnO, and organic silane compounds, and specifically may include Al2O3, TiO2, SiO2, ZnO, and organic silane compounds. In some embodiments of the present invention, Al2O3 and TiO2 can effectively prevent the diffusion of copper within a glass or silicon substrate, and SiO2, ZnO, and organic silane compounds can increase the adhesion of the copper film to the glass or silicon substrate. According to some embodiments of the present invention, by including Al2O3, TiO2, SiO2, ZnO, and organic silane compounds in the primer layer (20p), the adhesion performance of the copper film to the glass or silicon substrate and the performance of preventing the diffusion of copper within the glass or silicon substrate can be achieved simultaneously.

[0076] In some examples, the inert gas may include one or more selected from the group consisting of nitrogen gas, helium, neon, and argon.

[0077] In some examples, the thickness of the primer layer (20p) may be 10 nm to 20 nm.

[0078] In some embodiments of the present invention, the step coverage of the primer layer (20p) may be 90% or more. Here, step coverage may be a parameter indicating how uniformly the primer layer is formed in a three-dimensional trench structure. For example, step coverage can be calculated by the following Equation 1.

[0079] [Mathematical Formula 1]

[0080] Step Coverage (%) = [TH1 / TH2] X 100

[0081] In the above mathematical formula 1, TH2 is the thickness of the primer layer formed on the surface of the substrate where no hole is formed, and TH1 is the thickness of the primer layer formed on the bottom surface inside the hole (see FIG. 2).

[0082] In some embodiments of the present invention, the step coverage of the primer layer is adjusted to the above range, thereby enabling the deposition of a uniform primer layer inside the hole, which increases the adhesion of the copper film to a glass or silicon substrate and simultaneously improves the reliability of the device including the via hole.

[0083] In some examples, while the above (S2) step is in progress, the temperature of the chamber may be maintained at 50°C or higher and 200°C or lower.

[0084] In some examples, for the above (S2) step, the content of the precursor and the content of the reaction gas can be appropriately adjusted to an ideal molar ratio according to the reaction equation.

[0085] In some examples, to control the deposition time of the above (S2) step, a method of controlling the speed at which the substrate passes through each process area may be used.

[0086] (S3) A step of forming a preliminary copper film on the primer layer.

[0087] In this specification, a pre-copper film is defined as a copper film prior to etching. For example, the pre-copper film may have the same composition as the copper film.

[0088] FIG. 3 shows a step in a via hole formation method according to one embodiment of the present invention.

[0089] Referring to FIG. 3, the via hole formation method according to the present invention includes (S3) the step of forming a preliminary copper film (30p) on the primer layer (20p). Specifically, the preliminary copper film (30p) may be formed in parallel according to the profile of the primer layer (20p).

[0090] For example, Physical Vapor Deposition (PVD), Chemical Vapor Deposition (CVD), or Atomic Layer Deposition (ALD) methods may be used to form the aforementioned pre-copper film. PVD is a method that deposits copper atoms onto a substrate surface by applying physical energy using sputtering or evaporation, enabling high deposition rates and uniform film thickness. CVD is a method that deposits copper atoms onto a substrate surface by decomposing a copper precursor gas using heat or plasma. CVD can provide the advantage of achieving uniform film thickness and high purity. ALD is a method that deposits copper in atomic layer units by alternately introducing precursors and reaction gases. ALD can provide the advantage of excellent uniformity and the ability to perform deposition even at low temperatures.

[0091] For example, the deposition time for forming a preliminary copper film can be adjusted according to the type of each process.

[0092] (S4) A step of etching the primer layer and the pre-copper film to form a primer layer and a copper film.

[0093] FIG. 4 shows a step in a via hole formation method according to one embodiment of the present invention.

[0094] Referring to FIG. 4, the via hole formation method according to the present invention includes the step (S4) of etching the primer layer (20p) and the pre-copper film (30p) to form the primer layer (20) and the copper film (30). For example, the etching step described above may include the step of etching the pre-copper film (30p) after etching the primer layer (20p).

[0095] In this specification, the etching method may be any one selected from the group consisting of wet etching, dry etching, and combinations thereof.

[0096] For example, an etching solution composition may be used to etch the primer layer (20p). For example, the etching solution composition may include one or more selected from the group consisting of a fluorine-based compound effective for removing Al2O3, TiO2, and SiO2, a sulfuric acid-based compound effective for removing TiO2, an aqueous ammonia solution effective for removing ZnO, and an organic solvent capable of dissolving an organic silane compound, and specifically may include a fluorine-based compound, a sulfuric acid-based compound, an aqueous ammonia solution, and an organic solvent.

[0097] For example, an etching solution composition comprising nitric acid, hydrogen peroxide, and hydrochloric acid may be used to etch the above-mentioned pre-copper film (30p).

[0098] As another example, a dry etching method such as a reactive ion etching method, which uses plasma to generate ions that react with copper to etch the above-mentioned pre-copper film (30p), may be used.

[0099] In some other embodiments of the present invention, the via hole formation method may further include the step of forming a semiconductor chip that is commercially available in the art on a substrate on which the primer layer and copper film are formed after step (S4).

[0100] For example, the semiconductor chip may be any one selected from the group consisting of memory chips, logic chips, and combinations thereof. In some examples, the memory chip may include one or more selected from the group consisting of DRAM (Dynamic Random Access Memory), SRAM (Static Random Access Memory), NAND Flash, and NOR Flash. For example, the logic chip may be a Field Programmable Gate Array (FPGA) or an Application Specific Integrated Circuit (ASIC).

[0101] [Explanation of the symbol]

[0102] 100: Support

[0103] 10: Substrate

[0104] R1: Precursor

[0105] R2: Reaction gas

[0106] E1: Exhaust gas

[0107] G1: Inert gas

[0108] h: hole

[0109] 20p: Primer layer

[0110] 20: Primer layer

[0111] TH1: Thickness of the primer layer formed on the bottom surface inside the hole

[0112] TH2: Thickness of the primer layer formed on the surface of the substrate where no holes are formed.

[0113] 30p: Preliminary copper film

[0114] 30: Copper film

Claims

1. (S1) A step of preparing a substrate having a hole formed therein; (S2) A step of depositing a primer layer on the substrate; and (S3) A step of forming a preliminary copper film on the primer layer; comprising, The above (S2) step is, A step comprising depositing the primer layer by spatial atomic layer deposition under atmospheric or positive pressure conditions, Method for forming via holes.

2. In Paragraph 1, The above substrate includes a glass substrate or a silicon substrate, Method for forming via holes.

3. In Paragraph 1, The aspect ratio of the above hole is 10 or greater, Method for forming via holes.

4. In Paragraph 1, The step of depositing a primer layer on the substrate further includes the step of controlling the lower pressure of the substrate through an exhaust module. Method for forming via holes.

5. In Paragraph 1, The above primer layer is, formed from a primer material containing a precursor and a reaction gas, Method for forming via holes.

6. In Paragraph 5, The above precursor is: Any one selected from the group consisting of metal-organic precursors, metal-inorganic precursors, organosilane compounds, and combinations thereof, Method for forming via holes.

7. In Paragraph 1, The above primer layer is: Comprising one or more selected from the group consisting of Al2O3, TiO2, SiO2, ZnO, and organosilane compounds, Method for forming via holes.

8. In Paragraph 1, The step coverage of the above primer layer is 90% or more, Method for forming via holes.

9. In Paragraph 1, (S4) A step of etching the primer layer and the preliminary copper film to form a primer layer and a copper film; further comprising, Method for forming via holes.

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