Method and apparatus for probabilistic constellation shaping in wireless communication system

WO2026221388A1PCT designated stage Publication Date: 2026-10-22SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
PCT/KR2026/095565
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2026-04-06
Filing Date
2026-04-06
Publication Date
2026-10-22

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Abstract

Disclosed are a method and an apparatus by which a UE and a base station generate a plurality of information bits, adjust, through a distribution matcher (DM), a probability that a second most significant bit (MSB) among the plurality of information bits becomes 0, generate a plurality of modulation symbols by performing modulation on the plurality of information bits including the second MSB of which the probability that the second MSB becomes 0 has been adjusted, and transmit the plurality of modulation symbols.
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Description

Method and apparatus for stochastic constellation shaping in a wireless communication system

[0001] The present disclosure relates to wireless communication systems (or mobile communication systems). Specifically, the present disclosure relates to a method, apparatus, and system for implementing a non-uniform constellation (NUC), and among non-uniform constellation methods, to probabilistic constellation shaping (PCS).

[0002] Looking back at the evolution of wireless communication through successive generations, technologies have been developed primarily for human-oriented services, such as voice, multimedia, and data. Following the commercialization of 5G (5th Generation) communication systems, connected devices, which have been increasing explosively, are expected to be connected to communication networks. Examples of networked objects include vehicles, robots, drones, home appliances, displays, smart sensors installed in various infrastructures, construction machinery, and factory equipment. Mobile devices are expected to evolve into various form factors, such as augmented reality glasses, virtual reality headsets, and holographic devices. In the 6G (6th Generation) era, efforts are underway to develop improved 6G communication systems to connect hundreds of billions of devices and objects to provide diverse services. For this reason, 6G communication systems are being referred to as "beyond 5G" systems.

[0003] In the 6G communication system predicted to be realized around 2030, the maximum transmission speed is tera (i.e., 1,000 gigabit) bps (bit per second), and the wireless latency is 100 microseconds (μsec). In other words, compared to the 5G communication system, the transmission speed in the 6G communication system is 50 times faster, and the wireless latency is reduced to one-tenth.

[0004] To achieve such high data transmission speeds and ultra-low latency, 6G communication systems are being considered for implementation in the terahertz (THz) band (e.g., the 95 gigahertz (GHz) to 3 terahertz (3THz) band). Due to more severe path loss and atmospheric absorption phenomena compared to the millimeter wave (mmWave) band introduced in 5G, the importance of technologies capable of guaranteeing signal reach, or coverage, is expected to increase in the terahertz band. As key technologies to ensure coverage, new waveforms, beamforming, and multi-antenna transmission technologies such as massive Multiple-Input and Multiple-Output (MIMO), Full Dimensional MIMO (FD-MIMO), array antennas, and large-scale antennas, which are superior in terms of coverage compared to RF (Radio Frequency) devices, antennas, and OFDM (Orthogonal Frequency Division Multiplexing), must be developed. In addition, new technologies such as metamaterial-based lenses and antennas, high-dimensional spatial multiplexing technology using Orbital Angular Momentum (OAM), and Reconfigurable Intelligent Surface (RIS) are being discussed to improve the coverage of terahertz band signals.

[0005] In addition, to improve frequency efficiency and system network, development is underway in 6G communication systems for full duplex technology, in which uplink and downlink simultaneously utilize the same frequency resources at the same time; network technology that integrates satellites and HAPS (High-Altitude Platform Stations); network structure innovation technology that supports mobile base stations and enables network operation optimization and automation; dynamic spectrum sharing technology through collision avoidance based on spectrum usage prediction; AI-based communication technology that utilizes AI (Artificial Intelligence) from the design stage and internalizes end-to-end AI support functions to realize system optimization; and next-generation distributed computing technology that realizes services of complexity exceeding the limits of terminal computing capabilities by utilizing ultra-high performance communication and computing resources (Mobile Edge Computing (MEC), cloud, etc.). In addition, attempts are continuing to further strengthen connectivity between devices, further optimize networks, promote the softwareization of network entities, and increase the openness of wireless communication through the design of new protocols to be used in 6G communication systems, the implementation of hardware-based security environments, the development of mechanisms for the safe utilization of data, and the development of technologies regarding privacy maintenance methods.

[0006] Due to the research and development of such 6G communication systems, it is expected that a new dimension of hyper-connected experience will become possible through the hyper-connectivity of 6G communication systems, which encompasses not only connections between objects but also connections between people and objects. Specifically, it is projected that 6G communication systems will enable the provision of services such as truly immersive eXtended Reality (XR), high-fidelity mobile holograms, and digital replicas. Furthermore, services such as remote surgery, industrial automation, and emergency response, which are provided through 6G communication systems with enhanced security and reliability, will be applied in various fields including industry, healthcare, automotive, and home appliances.

[0007] The present disclosure relates to a constellation arrangement structure of symbols in a modulation scheme used in a digital communication system. More specifically, it relates to a stochastic constellation shaping method for supplementing the problems of uniform constellation, the problems of geometric constellation shaping which is a method for having a non-uniform constellation structure proposed to solve (or mitigate) these problems, and for mitigating systemic problems.

[0008] A method performed by user equipment (UE) according to one embodiment of the present disclosure comprises: generating a plurality of information bits; adjusting the probability of the second most significant bit (MSB) among the plurality of information bits becoming zero through a distribution matcher (DM); performing modulation on the plurality of information bits including the second MSB with adjusted probability of becoming zero to generate a plurality of modulated symbols; and transmitting the plurality of modulated symbols to a base station.

[0009] A method performed by a base station according to one embodiment of the present disclosure comprises: generating a plurality of information bits; adjusting the probability of the second MSB (most significant bit) among the plurality of information bits becoming zero through a distribution matcher (DM); performing modulation on the plurality of information bits including the second MSB with adjusted probability of becoming zero to generate a plurality of modulated symbols; and transmitting the plurality of modulated symbols to user equipment (UE).

[0010] User equipment (UE) according to one embodiment of the present disclosure comprises: at least one transceiver; at least one processor communicatively coupled to the at least one transceiver; and at least one memory communicatively coupled to the at least one processor for storing instructions, wherein the instructions are executed individually or in any combination by the at least one processor, so that the UE: generates a plurality of information bits, adjusts the probability of the second MSB (most significant bit) among the plurality of information bits to become zero through a distribution matcher (DM), performs modulation on the plurality of information bits including the second MSB with the adjusted probability to become zero to generate a plurality of modulated symbols, and transmits the plurality of modulated symbols to a base station.

[0011] A base station according to one embodiment of the present disclosure comprises: at least one transceiver; at least one processor communicatively coupled to the at least one transceiver; and at least one memory communicatively coupled to the at least one processor for storing instructions, wherein the instructions are executed individually or in any combination by the at least one processor, and wherein the base station: generates a plurality of information bits, adjusts the probability of the second most significant bit (MSB) among the plurality of information bits to become zero through a distribution matcher (DM), performs modulation on the plurality of information bits including the second MSB with the adjusted probability to become zero to generate a plurality of modulated symbols, and transmits the plurality of modulated symbols to user equipment (UE).

[0012] The method and apparatus for stochastic non-uniform constellation shaping according to the embodiments of the present disclosure do not include separate operations and apparatus for conventionally proposed techniques for shaping non-uniform constellations.

[0013] In the present disclosure, by converting the information bit probability of only the second most significant bit, a higher capacity than conventional uniform constellation diagram methods can be achieved, and the probabilistic non-uniform constellation diagram shaping method and device according to the embodiments of the present disclosure do not require a new system structure or operation and can be applied to conventional 4G / 5G standard structures.

[0014] The effects obtainable from the present disclosure are not limited to those mentioned above, and other unmentioned effects will be clearly understood by those skilled in the art to which the present disclosure belongs from the descriptions below.

[0015] FIG. 1 illustrates an example of a process for a method of mapping bits and symbols according to the present disclosure.

[0016] Figure 2 shows the probability distribution of symbols in one dimension when the probability of bits is adjusted and formed by a mapping method between symbols in the present disclosure.

[0017] Figure 3a shows the probability distribution of 256-QAM symbols in two dimensions according to a uniform constellation diagram of the prior art.

[0018] FIG. 3b shows the probability distribution of 256-QAM symbols in two dimensions when symbols are mapped by adjusting the probability of the second bit in the present disclosure.

[0019] FIG. 4a illustrates a structure for performing stochastic constellation shaping according to embodiments of the present disclosure.

[0020] FIG. 4b illustrates another structure for performing stochastic constellation shaping according to embodiments of the present disclosure.

[0021] Figures 5a and 5b illustrate the frequency efficiency obtained through the method proposed in the present disclosure.

[0022] FIGS. 6a and 6b illustrate the difference between the Shannon capacity of the present disclosure and the prior art.

[0023] FIG. 7 is a graph showing the relationship between spectral efficiency and relative required SNR according to an embodiment proposed in the present disclosure.

[0024] FIG. 8 shows a table of performance results regarding frequency efficiency for an MCS according to one embodiment of the present disclosure.

[0025] FIG. 9 illustrates the optimal value of the probability that the second MSB (most significant bit) for an MCS is 0 according to one embodiment of the present disclosure.

[0026] FIG. 10 is a block diagram of a terminal or UE (user equipment) according to one embodiment of the present disclosure.

[0027] FIG. 11 is a block diagram of a base station according to one embodiment of the present disclosure.

[0028] FIG. 12 is a block diagram of a network entity performing network functions according to one embodiment of the present disclosure.

[0029] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the attached drawings.

[0030] While various details have been described for the purpose of facilitating understanding in describing the embodiments, it will be understood that some aspects of the present disclosure may be practiced without including all such details. Furthermore, various modifications and alternatives are possible regarding the details presented herein, and all of these should be considered to be included within the scope of the present disclosure. Meanwhile, descriptions of technical content that are widely known in the art and may unnecessarily obscure the understanding of the present disclosure may be appropriately omitted, and such omitted descriptions should also be understood to be included within the scope of the present disclosure.

[0031] For the same reason, some components in the attached drawings have been exaggerated, omitted, or schematically depicted. Additionally, the size of each component does not entirely reflect its actual dimensions. Identical or corresponding components in each drawing have been assigned the same or different reference numbers.

[0032] The advantages and features of the present disclosure, and the methods for achieving them, will become clear through the embodiments described below in conjunction with the accompanying drawings. However, the present disclosure is not limited to the embodiments presented below and may be implemented in various forms. Other features, aspects, and advantages disclosed in the present disclosure will become more clear through the following description of the present disclosure. The following embodiments are merely illustrative to aid in understanding the present disclosure and should not be interpreted in any way as limiting the scope or spirit of the present disclosure. Rather, the present disclosure includes all modifications, changes, and alternatives made within the spirit and scope of the present disclosure as defined by the appended claims and their equivalents. Identical or similar components throughout the disclosure are assigned identical or similar reference numerals. Furthermore, terms described below are defined with consideration of their function in the present disclosure and may be used differently depending on the user, operator, or convention. Accordingly, the definitions of terms should be interpreted based on the content of the entire present disclosure.

[0033] In the present disclosure, it will be understood that each block of the process flow diagrams and combinations of the flow diagrams may be performed based on computer program instructions. Since these computer program instructions may be optionally loaded into at least one processor of a general-purpose computer, a computer for special purposes, or other programmable data processing equipment, the instructions performed through any one or any combination of at least one processor of the computer or other programmable data processing equipment create means for performing the functions described in the flow diagram block(s). Since these computer program instructions may also be stored in computer-available or computer-readable memory that can be directed toward the computer or other programmable data processing equipment to implement the functions in a specific manner, the instructions stored in computer-available or computer-readable memory may also produce a manufactured item containing means of instruction for performing the functions described in the flow diagram block(s). Since computer program instructions can be loaded onto a computer or other programmable data processing equipment, instructions that perform a series of operation steps on the computer or other programmable data processing equipment to create a process executed by the computer can also provide steps for executing the functions described in the flowchart block(s).

[0034] Additionally, each block may represent a module, segment, or part of code containing one or more executable instructions for executing a specified logical function(s). It should also be noted that in some alternative execution examples, the functions mentioned in the blocks may occur out of order. For example, two blocks (or functions) described in succession may actually be executed substantially simultaneously, or the blocks may sometimes be executed in reverse order according to the corresponding function.

[0035] As used in the embodiments of the present disclosure, the term “part / module” refers to a software or hardware component such as a field programmable gate array (FPGA) or an application-specific integrated circuit (ASIC), and the “part / module” performs certain roles. However, the term including “part / module” is not limited to software or hardware. The “part / module” may be configured to reside in an addressable storage medium or may be configured to run one or more processors. Accordingly, by example, the “part / module” includes components such as software components, object-oriented software components, class components, and task components, as well as processes, functions, attributes, procedures, subroutines, segments of program code, drivers, firmware, microcode, circuits, data, databases, data structures, tables, arrays, and variables. The functions provided within the components and 'parts / modules' may be combined into a smaller number of components and 'parts / modules' or further separated into additional components and 'parts / modules'. In addition, the components and 'parts / modules' may be implemented to utilize one or more CPUs (central processing units) within the device or secure multimedia card. Furthermore, in the embodiments, the 'parts / modules' may include one or more processors.

[0036] The entirety of one or more computer programs may be stored in a single memory device, or one or more computer programs may be divided into different parts and stored across multiple memory devices.

[0037] Additionally, any / any function or operation described in this disclosure may be processed by a single processor or a combination of processors. The single processor or combination of processors may be a circuitry that performs processing, and may include an application processor (AP, e.g., a central processing unit (CPU)), a communication processor (CP, e.g., a modem), a graphics processing unit (GPU), a neural network processing unit (NPU) (e.g., an artificial intelligence (AI) chip), a Wi-Fi chip, a Bluetooth® chip, a global positioning system (GPS) chip, a near-field communication (NFC) chip, a connectivity chip, a sensor controller, a touch controller, a fingerprint sensor controller, a display driver integrated circuit (IC), an audio codec (CODEC) chip, a universal serial bus (USB) controller, a camera controller, an image processing IC, a microprocessor, a microcontroller, a digital signal processor, an FPGA, an ASIC, a microprocessor unit (MPU), a system-on-chip (SoC), an IC, or similar circuitry. The single processor or combination of processors described above can control the overall operation of an electronic device by executing instructions, such as an operating system, that can be stored in memory. Additionally, the processor or combination of processors can execute other processes or programs residing in memory (e.g., processes related to the present disclosure).

[0038] Additionally, it should be noted that various embodiments in the claims and description of the present disclosure may be implemented in the form of hardware, software, or a combination of hardware and software.

[0039] Such software may be stored on a non-transitory computer-readable storage medium. A non-transitory computer-readable storage medium stores one or more computer programs (software modules), said one or more computer programs include computer-executable instructions that operate an electronic device to perform a method according to the present disclosure when executed individually or collectively by one or more processors of an electronic device. Alternatively, said software may be a computer program (or product) that includes instructions that operate an electronic device to perform a method according to the present disclosure when executed individually or collectively by one or more processors of an electronic device.

[0040] The software may be stored in a transient or non-transient storage device, for example, in the form of read-only memory (ROM) (whether or not it is erasable or rewritable), or random access memory (RAM), memory chips, devices, or integrated circuits (ICs). Additionally, the software may be stored in the form of an optically or magnetically readable medium, for example, a compact disc (CD), a digital multifunction disc (DVD), a magnetic disc, or a magnetic tape. It should be understood that the storage device and the storage medium are examples of non-transient machine-readable storage media suitable for storing programs for implementing various embodiments of the present disclosure. Accordingly, various embodiments of the present disclosure may provide a program comprising code for implementing an apparatus or method according to any one of the claims of the present disclosure, and a non-transient machine-readable storage medium storing such program.

[0041] In the following disclosure, determining the priority between A and B may be referred to in various ways, such as selecting the one with the higher priority according to a predetermined priority rule and performing the corresponding action, or omitting or dropping the action for the one with the lower priority.

[0042] Hereinafter, 'A or B' as described in the present disclosure may be understood as 'A and / or B', which may be understood as including 'A', or 'B', or 'A and B'.

[0043] Additionally, 'at least one of A, B, and C' described in the present disclosure may be understood to include 'A', or 'B', or 'C', or 'any combination of A, B, and C'.

[0044] Additionally, 'at least one of A, B, or C' described in the present disclosure may be understood to include 'A', or 'B', or 'C', or 'any combination of A, B, and C'.

[0045] Additionally, 'A / B' as described in the present disclosure may be understood as 'A and / or B', which may be understood as including 'A', or 'B', or 'A and B'.

[0046] Additionally, 'A, B' described in the present disclosure may be understood as 'A and / or B', which may be understood as including 'A', or 'B', or 'A and B'.

[0047] Additionally, 'A and B' described in the present disclosure may be understood as 'A and / or B', which may be understood as including 'A', or 'B', or 'A and B'.

[0048] Furthermore, the phrase "when conditions A and B are satisfied" as described in the present disclosure is not necessarily limited to cases where both conditions A and B are satisfied, but may be understood to include cases where either condition A or condition B is satisfied individually, cases where both conditions A and B are satisfied, or cases where one or more additional conditions are satisfied together.

[0049] Furthermore, throughout this disclosure, ordinal terms (and similar modifiers) such as 'first', 'second', 'third', etc. are used solely for the purpose of distinguishing various instances, occurrences, configurations, messages, stages, elements, or aspects of elements, operations, or information, as described below. Unless clearly required otherwise by the context, the use of such ordinal terms does not require that the elements, operations, or information distinguished by such terms be structurally different, numerically distinct, or substantially different. For example, 'first signal' and 'second signal' may represent instances of the same signal transmitted at different times, signals containing the same core information even with some variations, or signals having different content or characteristics depending on the specific context. Similarly, 'first value' and 'second value' may represent the same size measured or applied in different situations, or they may represent different sizes. Such interpretation must be determined based on the specific technical context, function, and relationship described in the relevant parts of the disclosure and claims.

[0050] Furthermore, although terms such as "first," "second," etc., as used in this disclosure are used for various elements such as information, objects, actions, and sequences, they are not intended to limit such elements to a specific order. These terms may be understood merely as distinguishing one element from another. For example, a first element may be referred to as a second element, and likewise, a second element may be referred to as a first element.

[0051] Additionally, the terms 'first' and 'second' described in this disclosure may be understood to refer to identical or different elements. For example, if an element is information, the first information and the second information may both be information, and depending on the case, they may be the same information or different information.

[0052] Furthermore, expressions such as "if" and "in case that" as described in the present disclosure or claims may be interpreted, depending on the context, as meaning "when or upon," "in response to," "based on," or "according to," and these expressions may be used interchangeably. In addition, other expressions having substantially the same meaning may be used as substitutes for these expressions, provided that they do not impair the technical features of the present disclosure. Furthermore, if a method step (e.g., a step of transmitting a signal) is performed in relation to such terms (e.g., "in case that" or similar expressions) in accordance with the disclosure of the present specification, this may be interpreted as the method step being performed in response to a prior determination that a specific element has a specific state (e.g., bit length exceeding X).

[0053] For example, physical layer signaling may be referred to as L1 (Layer 1) signaling and may include downlink control information (DCI). Additionally, upper layer signaling may include at least one of a medium access control (MAC) control message, a radio resource control (RRC) signaling message, a non-access stratum (NAS) signaling message, or an application layer message. The RRC signaling message may be referred to as L3 (Layer 3) signaling. However, upper layer signaling is not limited to the above examples.

[0054] Additionally, the term "not perform" as used in this disclosure or claims may be understood, depending on the context, to mean to omit or skip the corresponding step. Such a term may be replaced with other terms having the same or substantially similar meaning.

[0055] Additionally, the phrase “transmitting a message containing A and B” as described in the present disclosure may be interpreted to include not only (i) cases where A and B are transmitted as a single message, but also (ii) cases where A and B are transmitted individually through multiple messages (e.g., transmitting a first message containing A and a second message containing B). This interpretation may also apply to cases where messages containing two or more items, such as A, B, and C, are transmitted together or individually.

[0056] In addition, 'transmitting a message containing A and transmitting a message containing B' can also be interpreted as transmitting a single message containing A and B.

[0057] In the embodiments described in this disclosure, terms or components included in the disclosure may be expressed in the singular or plural form according to the specific embodiments presented. However, the singular or plural expression is selected to suit the context presented for convenience of explanation, and the disclosure is not limited to singular or plural components; even if a component is expressed in the plural form, it may be composed in the singular form, and even if a component is expressed in the singular form, it may be composed in the plural form.

[0058] The drawings or flowcharts described in this disclosure illustrate exemplary methods that may be implemented according to the principles of this disclosure, and various modifications may be made to the methods illustrated in the flowcharts of this disclosure. For example, although illustrated as a series of steps, the various steps of each drawing or flowchart may overlap, occur in parallel, occur in a different order, or occur multiple times. In other examples, any step may be omitted or replaced with another step.

[0059] Additionally, the process of the flowchart can be performed by an electronic device, and one or more steps of the flowchart can be implemented by one or more processors that execute instructions to perform specific functions.

[0060] The methods and apparatus proposed in the embodiments of the present disclosure may be disclosed together with drawings including flowcharts to illustrate exemplary methods that may be implemented according to the principles of the present disclosure. Such flowcharts may include different branches and / or sub-branches. It should be understood that the principles of the present disclosure are not limited to combinations of all branches and sub-branches disclosed in the embodiments, and may consist of at least one individual branch or individual sub-branch, in particular only a single branch or a single sub-branch.

[0061] The methods and devices proposed in the embodiments of the present disclosure below are not limited to each embodiment and may be utilized as a combination of all or part of the embodiments proposed in the disclosure. Accordingly, the embodiments of the present disclosure may be applied with some modifications within the scope that does not deviate significantly from the scope of the present disclosure, at the judgment of a person skilled in the art.

[0062] In this case, any wording mentioned in different embodiments may be used interchangeably, combined, or substituted if the concepts correspond. For example, regarding the same or corresponding concepts, even if the expression 'A' is used in one embodiment and the expression 'B' is used in another embodiment, they may be understood by interchangeably, substituted, or combined.

[0063] Terms used in the following description to identify connection nodes, terms referring to network entities, terms referring to messages, terms referring to interfaces between network entities, terms referring to various identification information, etc., are examples provided for the convenience of explanation. Accordingly, the present disclosure is not limited to the terms described below, and other terms referring to objects having equivalent technical meanings may be used. Furthermore, where appropriate, such terms may be replaced with terms defined in similar technical specifications of standardization organizations such as 3GPP (3rd generation partnership project) Technical Specifications (TS) or ETSI (European Telecommunications Standards Institute).

[0064] Hereinafter, the base station is an entity that performs resource allocation of the terminal and may be at least one of gNode B, eNode B, Node B, BS (base station), wireless access unit, base station controller, or a node on the network.

[0065] In addition, the base station of the present disclosure may include a structure split into a central unit (CU) and a distributed unit (DU). In such a structure, the CU is responsible for the upper layer of the control and user plane, and the DU is responsible for the processing of wireless resources in the lower layer. The embodiments of the present disclosure can be equally applied to a 5G base station structure in which functions are split into the CU and DU as described above.

[0066] The terminal may include at least one of user equipment (UE), mobile station (MS), cellular phone, smartphone, computer, tablet, wearable device, Internet of Things (IoT) device, or other device / system capable of performing communication functions.

[0067] In the present disclosure, a downlink (DL) refers to a wireless transmission path of a signal transmitted by a base station to a terminal, and an uplink (UL) refers to a wireless transmission path of a signal transmitted by a terminal to a base station.

[0068] In addition, while a 5th generation mobile communication system (5G, new radio, NR) and a 6th generation mobile communication system (6G) may be described below as examples, embodiments of the present disclosure may also be applied to other communication systems having similar technical backgrounds or channel types. For example, new advanced mobile communication systems developed after 5G and 6G may be included therein. Furthermore, the present disclosure may be applied to other communication systems (e.g., Wi-Fi systems) with some modifications made in the judgment of a person with skilled technical knowledge, without significantly departing from the scope of the present disclosure.

[0069] In the following description, the terms "physical channel" and "signal" may be used interchangeably with "data" or "control signal." For example, PDSCH (physical downlink shared channel) is a term referring to a physical channel through which data is transmitted, but PDSCH may also be used to refer to data. That is, in this disclosure, the expression "transmits a physical channel" may be interpreted as equivalent to the expression "transmits data or a signal through a physical channel."

[0070] In describing the present disclosure below, the term "upper layer signaling" may be a signaling corresponding to at least one or a combination of at least one of MIB (master information block), SIB (system information block), SIB M (M=1, 2, ...), RRC, MAC CE, NAS (non-access stratum) signaling, or application layer messages. The RRC signaling may also be referred to as L3 signaling (layer 3 signaling).

[0071] Additionally, L1 signaling may be a signaling method corresponding to at least one or a combination of at least one of the following: a physical layer channel or signaling of a PDCCH (physical downlink control channel), a DCI, a UE-specific DCI, a group common DCI, a common DCI, a scheduling DCI (e.g., a DCI used for the purpose of scheduling downlink or uplink data), a non-scheduling DCI (e.g., a DCI not used for the purpose of scheduling downlink or uplink data), a PUCCH (physical uplink control channel), or an UCI (uplink control information). The above L1 signaling may also be referred to as physical layer signaling.

[0072] Hereinafter, the expression in the present disclosure or claims that information can be configured from a base station may mean that, depending on the context, a terminal receives said information from a base station through physical layer signaling or upper layer signaling, and such expression may be replaced with other terms having the same or substantially similar meaning.

[0073] The operating principle of the present disclosure will be explained in detail below with reference to the attached drawings.

[0074] With the advancement of communication technology, the demand for data transmission speed and efficiency is continuously increasing, a phenomenon that is common across various communication environments, regardless of whether they are wired or wireless. In particular, in application fields such as high-speed internet, video streaming, cloud services, IoT, autonomous vehicles, and recent 5G and next-generation 6G mobile communication technologies, transmitting as much information as possible without errors within a physical channel environment has become a key technological challenge.

[0075] Quadrature Amplitude Modulation (QAM), one of the most common and widely used modulation schemes, modulates data based on a constellation in the complex plane and transmits it modulated into symbols with a uniform constellation having the same probability distribution. In general QAM, it is assumed that all symbols are transmitted with the same probability, and the constellation points are usually arranged in a grid shape at uniform intervals and positions. While this method has the advantages of being simple to implement and easy to analyze, it has the disadvantages of being limited in the signal-to-noise ratio (SNR) and failing to approach Shannon capacity.

[0076] To overcome this, constellation shaping techniques that adjust constellations more precisely are being introduced. Constellation shaping is broadly classified into probabilistic constellation shaping (PCS) and geometric constellation shaping (GCS).

[0077] Stochastic constellation shaping is a method that improves the overall energy efficiency of a system by adjusting the probability distribution of transmitted symbols. In particular, it is based on the information-theoretic background that, theoretically, performance closer to channel capacity can be achieved when the symbol distribution approaches a Gaussian distribution. When applied to an actual system, this allows data to be transmitted with lower energy at the same SNR, and also has the effect of improving communication performance (e.g., BLER).

[0078] Meanwhile, geometric constellation shaping is a method of designing an optimized constellation structure by adjusting geometric positions on the constellation. Geometric constellation shaping maximizes the minimum effective distance by configuring a structure where all symbols are transmitted with equal probability, but the distance between symbols increases or decreases, or the arrangement is asymmetric. Since this method does not change the probability distribution of symbols, implementation can be relatively simple, and in particular, it offers high spectral efficiency and can increase flexibility in physical layer design.

[0079] Here, the uniform constellation refers to the QAM-based uniform constellation method, which is one of the most widely used modulation schemes. In this modulation method, symbols with a constant spacing are arranged in two dimensions. However, the above method fails to approach Shannon capacity. Furthermore, energy inefficiencies arise, such as the need to require higher power or apply more complex error correction codes to maintain the same performance. Additionally, with the advent of 6G, there is a movement to introduce higher-order modulation techniques, such as 4096-QAM, to achieve high communication speeds, and as a result, the performance gap is expected to widen further.

[0080] A non-uniform constellation has been proposed to complement this, and a geometric constellation shaping method has been proposed as one of the methods to have a non-uniform constellation structure. By arranging the distances and positions of symbols non-uniformly, this brings the probability distribution of transmitted symbols closer to a Gaussian distribution, thereby demonstrating performance approaching a higher Shannon capacity. However, if the above method is designed to have an asymmetric constellation, complex mapping and demapping methods are required at the transmitting and receiving ends, which necessitates a complex decoder structure and further leads to limitations in hardware implementation.

[0081] Another technique for achieving a non-uniform constellation structure is the stochastic constellation shaping method. This method generally adjusts the probability distribution of each constellation point to achieve performance closer to the Shannon capacity than a uniform constellation. This method of adjusting the probability distribution of constellation points is generally called a Distribution Matcher (DM), and CCDM (Constant Composition DM) and MPDM (multiset-partition DM) are used as some examples. However, the aforementioned stochastic constellation shaping method has the problem that the transmit and receive structure is not compliant with existing 4G / 5G standard structures.

[0082] The problem to be solved in this disclosure is to overcome the problems of the prior art described above and to utilize it without significant changes (or conflicts) to the 4G / 5G standard structure while having a higher capacity than the uniform constellation method (e.g., a capacity closer to the Shannon capacity).

[0083] The embodiments of the present disclosure propose a method that has a higher capacity than conventional uniform constellations by adjusting only the probability of the second most significant bit (2nd MSB) of a probabilistic non-uniform constellation and is applicable to existing 4G / 5G systems.

[0084] In the present disclosure, certain embodiments are described for specific N-QAMs (e.g., 64-QAM or 256-QAM), but the present disclosure is not limited to the constellation of such embodiments and may be applied to any other form of constellation in which a second most significant bit exists (e.g., 16- / 64- / 256- / 1024-QAM or where N is greater than or equal to that).

[0085] In the relationship of mapping from bits to symbols, 3GPP (3 rd The generation partnership project provides the following two-dimensional (real, imaginary) modulation mapping relationship between bits and symbols for each N-QAM with N constellations.

[0086] [Mathematical Formula 1]

[0087]

[0088] [Mathematical Formula 2]

[0089]

[0090] [Mathematical Formula 3]

[0091]

[0092] [Mathematical Formula 4]

[0093]

[0094] [Mathematical Formula 5]

[0095]

[0096] [Mathematical Formula 6]

[0097]

[0098] [Mathematical Formula 7]

[0099]

[0100] [Equation 1] through [Equation 7] represent the modulation mapping methods for bits and symbols specified in 3GPP TS 38.211. [Equation 1] is a modulation mapping method for π / 2-BPSK (binary phase-shift keying), [Equation 2] is for BPSK, [Equation 3] is for QPSK (quadrature phase shift keying), [Equation 4] is for 16-QAM, [Equation 5] is for 64-QAM, [Equation 6] is for 256-QAM, and [Equation 7] is for 1024-QAM.

[0101] For example, [Equation 4] is an example of a 64-QAM modulation mapping relationship, showing the modulation mapping method between bits and symbols for 64-QAM where N is 64. Here, in a series of bit sequences b, b(x) represents the x-th bit, and d(i) represents the i-th symbol after modulation. In two-dimensional mapping, M (=log2N) bits are mapped to one symbol in the constellation diagram, and in one-dimensional mapping, M / 2 bits can be mapped to one symbol. Taking the example of [Equation 5] above, 6 bits are mapped to one symbol, and in this case, M is 6.

[0102] The above [Equations 1] through [Equations 7] define an M-bit word y having a bit sequence of length M that maps to a symbol, and can be represented as b(0), b(1), b(2), b(3), ..., b(M-1). According to the modulation mapping relationship provided by 3GPP (e.g., 64-QAM follows [Equation 4]), the corresponding bits are divided into two dimensions, namely a real part and an imaginary part, and bit mapping is performed in one dimension, and the bit mapping method defined in one dimension (e.g., the real part) can have the same rules as in the other dimension (e.g., the imaginary part). The indices of b(0), b(2), b(4), ..., b(M-2) are involved in the bit mapping of the real part, and the bits having indices of b(1), b(3), b(5), ..., b(M-1) are involved in the bit mapping of the imaginary part.

[0103] Therefore, if it is defined for one dimension (e.g., the real part), it is mapped to the other dimensions (e.g., the imaginary part) using the same rules, so it can be defined and organized only for one dimension.

[0104] The bit sequence mentioned below in this disclosure refers to a bit sequence used when mapping between an M / 2 bit word and a symbol in one dimension according to the above description (e.g., meaning bit words b(0), b(2), b(4), ..., b(M-2) in the real part). Also, the first most significant bit (1 st MSB), second most significant bit (2 nd MSB) represents a bit for a bit word in one dimension. For example, the second most significant bit represents b(2) of the bit word in the real axis and b(3) in the imaginary axis. For a more detailed example, if the bit mapped to the i-th symbol in one dimension is '101', the most significant bits are from the left, the first most significant bit is '1', and the second most significant bit is '0'.

[0105] FIG. 1 shows an example of a 64-QAM constellation diagram mapping three bits in the real part of one dimension to constellation points. A sequence having an M / 2 bit word is mapped to one dimension, and FIG. 1 shows a constellation diagram corresponding to bit labeling for 64-QAM in one dimension (e.g., the real part). For each bit index, the method of mapping to a symbol differs depending on the value of 0 and 1 (100). The first most significant bit (1 st When the MSB is 0, it is mapped to a symbol with a positive value (1, 3, 5, 7), and when it is 1, it is mapped to a symbol with a negative value (-7, -5, -3, -1) (110). The second most significant bit (2 nd When MSB is 0, it has the middle value (-3, -1, 1, 3) of the symbol index, and when it is 1, it is mapped to one of the outer values ​​(-7, -5, 5, 7) of the symbol index (120). This series of processes is also applied to the least significant bit (LSB) (130) to map the symbol.

[0106] In a uniform constellation, the probability of 0 and 1 occurring at all bit indices is equal to 1 / 2, and the distribution of each symbol is uniform. However, if the probability of 0 and 1 occurring at a single bit index changes, it can no longer have a uniform distribution and will have a non-uniform symbol distribution.

[0107] However, if the probability of the first most significant bit is changed, the distribution of positive and negative numbers becomes unbalanced according to the above example, resulting in an asymmetric structure; therefore, the first most significant bit must maintain the same probability. If the probability of the second most significant bit is adjusted so that the probability of 0 becomes higher than the probability of 1, a distribution similar to a Gaussian distribution can be obtained. For example, in 64-QAM, if the probability of 0 and 1 of the second most significant bit is adjusted to increase the probability of 0, a distribution of the form shown in Fig. 2 can be obtained.

[0108] According to the description of the bit and symbol mapping method above, the mapping in one dimension is the same as the mapping rule in another dimension, and this can be considered by adding another dimension.

[0109] The present disclosure includes adjusting the probability of each bit as described above to change the distribution of symbols into a form of symbol distribution similar to a Gaussian distribution. For example, if the probability of 0 occurring in the second most significant bit is greater than 0.5 and less than 1, the distribution will have a Gaussian distribution similar to a distribution in which symbols have a relatively high probability in the central part of the constellation. As another example, a distribution similar to a Gaussian distribution may be represented by adjusting the probabilities of the second most significant bit and the fourth most significant bit.

[0110] Although the present disclosure deals in detail with the second most significant bit, various symbol distributions can be generated by adjusting the probabilities of the second or more bits (e.g., the third and fourth most significant bits remaining after excluding the first most significant bit). Furthermore, all various distributions that can result from simultaneously adjusting the probabilities of two or more bits (e.g., adjusting the probabilities of the second most significant bit and the third most significant bit, or adjusting the probabilities of the third most significant bit and the fifth most significant bit) rather than adjusting the probability of a single bit can occur and are included in all cases.

[0111] The present disclosure includes a probability distribution of all symbols obtained by adjusting the probability of at least one bit among each bit mapped to a symbol according to an embodiment.

[0112] Figure 3a shows the distribution of 256QAM with a uniform distribution without stochastic constellation shaping. It can be seen that each symbol has a uniform distribution.

[0113] FIG. 3b shows the probability distribution of symbols when stochastic shaping of 256-QAM is applied as an example for understanding the embodiment of the present disclosure. It shows a shaped constellation and the probabilities of each symbol having a symbol distribution changed (e.g., similar to a Gaussian distribution) through the process proposed in the present disclosure. The figure is a constellation when the probability of the second most significant bit 0 is higher than 0.5. The total power of the constellation is generally normalized to 1, and accordingly, in a constellation with a uniform distribution according to conventional methods, the distance between each symbol becomes uniform. On the other hand, in the case of a distribution such as the shaped constellation, the distance between symbols increases through the power normalization process, resulting in better performance (e.g., bit-interleaved coded modulation (BICM) capacity).

[0114] There is a problem in that the structure of the conventional stochastic constellation shaping method is not suitable for the current 4G / 5G standard structure. In order to introduce the conventional stochastic constellation shaping method, it is necessary to redesign the existing LDPC (low density parity check) structure or the structure of 4G / 5G Gray-mapped QAM, which would cause many changes to the standard structure and therefore cannot be applied to the existing standard.

[0115] FIG. 4a illustrates a structure for stochastic constellation shaping according to the embodiment of the present disclosure mentioned above. The structure is designed to be compatible with the standard structure of 4G / 5G systems. Information bits having equal bits are output as encoded bits after undergoing channel encoding (LDPC encoding), and these bits are mapped to symbols through a modulator. Interleaving is performed during this process, and during this process, the second most significant bit (2 ndThe MSB changes the probabilistic distribution of the corresponding bit through distribution matching (DM). For example, the probability that the second most significant bit is 0 can be matched to 0.7, and the probability that the second most significant bit is 1 can be matched to 0.3. And, the remaining bits excluding the second most significant bit (for example, the first most significant bit (1 st The MSB and the remaining bits, including the LSB, have their own channels and are mapped to symbols without this distribution matching process. Here, distribution matching involves a structure where a series of bit sequences is input and a structure that outputs a probabilistically controlled series of bit sequences.

[0116] FIG. 4b illustrates another structure for shaping a probabilistic constellation according to the aforementioned embodiment of the present disclosure. This structure is also designed to be compatible with the standard structure of 4G / 5G systems, and unlike FIG. 4a, distribution matching (DM) is performed before channel encoding. This is applicable when the code rate is high, satisfying the condition that the second most significant bit maintains the probability of the information bit with adjusted probability. According to FIG. 4b, the probability of the bit is adjusted by distribution matching before information bit channel coding, and a parity bit is added to the information bit through channel encoding. As a result of LDPC, the probability of the second most significant bit is maintained while the parity bit is added, thereby allowing the probability of the bit to be adjusted for the second most significant bit. Thus, the distribution of symbols can have a distribution similar to a Gaussian distribution, as shown in FIG. 3b.

[0117] In the description of the present disclosure above, the description is made from the perspective of a single dimension. In the present disclosure, the description of a single dimension can be extended to the dimension of the imaginary part. For example, the description in the real part can be described in the imaginary part, and the structure is applied in the same way.

[0118] In the structure proposed in this disclosure, the Nth most significant bit refers to the Nth most significant bit for the real part and the imaginary part. For example, 2 as referred to in this disclosure nd MSB is 2 in the real part nd It refers to the MSB, and 2 in the imaginary part nd MSB means each.

[0119] In the structure proposed in the present disclosure, the Nth most significant bit probability can be adjusted differently for the real part or the imaginary part, which is at least one dimension, respectively, or can be adjusted to the same probability. For example, in the present disclosure, the probability that the second most significant bit of the real part is 0 can be set to 0.7, and the second most significant bit of the imaginary part can be set to 0.8, or 2 of the real part and the imaginary part nd MSB can be adjusted with the same probability (e.g., equally at 0.7).

[0120] In the structure proposed in the present disclosure, when controlling the probability of at least one bit in one dimension, the bit probabilities of different bit indices in the real part and the imaginary part can be controlled, and the bit probabilities of the same bit index can be controlled. For example, there may be cases where the probability of the second most significant bit in the real part is controlled and the probability of the third bit in the imaginary part is controlled.

[0121] Through this series of processes, the present disclosure follows the standard structure of 4G / 5G systems, and because the distribution of modulated symbols can have a distribution similar to a Gaussian distribution, it is possible to design it in accordance with the standard structure without being more complex.

[0122] By applying the prior art through the method of controlling the distribution of symbols by adjusting the probability of the second most significant bit proposed in the present disclosure, a channel capacity higher than the uniformity of the prior art is obtained, which can be closer to the Shannon capacity.

[0123] FIG. 5a is a simulation result for 64-QAM to verify the effect according to one embodiment of the present disclosure. When comparing the conventional uniform shaping (Uniform QAM) with the technique proposed in the present disclosure (Probabilistic shaping), it can be confirmed that the method of one embodiment of the present disclosure has superior performance. Furthermore, compared to conventional geometric shaping, which exhibits high frequency efficiency when having the same Es / No, the conventional technique may be better in a specific range (e.g., the Es / No < 13 dB range), but in other ranges, it shows nearly similar performance or a slight difference.

[0124] FIG. 5b is a simulation result for 256-QAM to verify the effect according to one embodiment of the present disclosure. As described in FIG. 5, it shows overall superior performance compared to conventional uniform shaping, and although it falls somewhat short of conventional geometric shaping, it shows superior aspects in practical application due to the structural limitations and complexity of geometric shaping.

[0125] FIG. 6a is a graph corresponding to FIG. 5a, illustrating the difference between the Shannon capacitance according to the embodiment of the present disclosure and the conventional techniques in 64QAM. When compared to conventional techniques as frequency efficiency increases, uniform linearity was highest in the Shannon channel and all sections, and subsequently, at low frequency efficiency, geometric constellation shaping showed the lowest difference from the Shannon capacitance, but at a specific point, starting from a frequency efficiency of about 4.5, the difference between the technique proposed in the present disclosure and the Shannon capacitance appeared low.

[0126] FIG. 6b is a graph corresponding to FIG. 5b above, illustrating the difference between the Shannon capacitance according to the embodiment of the present disclosure and the conventional technologies in 256QAM. As explained in FIG. 6a above, the difference with the Shannon capacitance was smaller than with a uniform constellation, and a reversal phenomenon occurred with geometric constellation shaping starting from a point where the frequency efficiency at a specific point is about 7, showing the performance of the embodiment proposed in the present disclosure.

[0127] FIG. 7 is a graph showing the relationship between spectral efficiency and relative required SNR according to an embodiment proposed in the present disclosure.

[0128] Figure 7 illustrates the probability (p_0) of the second most significant bit becoming 0 that is operable according to each frequency efficiency (SE). As previously explained, instead of setting the probability of a specific bit becoming 0 and the probability of it becoming 1 to be equal, the distribution can be adjusted (Distributed Mapping) so that the bit value becomes a specific value to maximize transmission efficiency. Figure 7 illustrates the result of determining the optimal probability (p_0) that can maximize communication performance corresponding to each SE value.

[0129] Meanwhile, when determining the value of p_0, to prevent errors caused by hardware limitations, encoding operations, or the wireless channel environment, p_0 may be determined by considering an arbitrary margin instead of the theoretically optimal value. This margin can be defined as a tolerance range that accounts for variability or uncertainty occurring during the mapping process.

[0130] FIG. 8 illustrates, in a table, the performance results regarding frequency efficiency for an MCS according to an embodiment of the present disclosure. The table shown in FIG. 8 illustrates the performance results regarding frequency efficiencies for an NR MCS when using the structure proposed in the present disclosure. p0, which is the probability of bit 0 of the second most significant bit, is defined in increments of 0.05, ranging from a probability of 0.5 to a probability of 0.95. As shown in FIG. 8, the applicable value of p0 may vary depending on the frequency efficiency, and there may be cases where no performance gain is observed at a specific p0 for a specific frequency efficiency. However, when the constellation shaping method is applied to partial frequency efficiencies, performance gain is observed, and a performance gain of 1 dB or more can be obtained. FIG. 7, which was described earlier, is a graph representing the content defined in the table of FIG. 8. According to this embodiment, the probability of at least the second most significant bit becoming 0 applicable to each frequency efficiency can be specified, and it is obvious that the probability of becoming 0 can be defined not only for the second most significant bit but also for the lower bits specified above.

[0131] FIG. 9 illustrates the optimal value of the probability that the second MSB (most significant bit) for an MCS is 0 according to one embodiment of the present disclosure.

[0132] The table shown in FIG. 9 specifies the probability that the optimal most significant bit is 0 for each modulation order according to frequency efficiency. FIG. 9 specifies the probability that an optimal probability exists for each frequency efficiency, similar to the embodiment described in Table 8, and that it exhibits optimal performance in an AWGN (Additive White Gaussian Noise) channel environment.

[0133] Meanwhile, the numerical values ​​in the tables shown in FIGS. 8 and 9 are merely exemplary values ​​according to various embodiments. That is, the numerical values ​​and values ​​described in FIGS. 8 and 9 can, of course, be defined as different values ​​according to the embodiments proposed in this disclosure.

[0134] FIG. 10 is a block diagram of a terminal or user equipment (1000) according to one embodiment of the present disclosure.

[0135] The terminal (1000) is an electronic device capable of wireless communication and may have various form factors. Examples of the terminal may include at least one of a user device (UE), a mobile station (MS), a cellular phone, a smartphone, a computer, a tablet, a wearable device, an Internet of Things (IoT) device, or other devices / systems capable of performing wireless communication with a base station (BS) and / or other terminals via a wireless channel.

[0136] Referring to FIG. 10, the terminal (1000) may include at least one transceiver (1001) (hereinafter, transceiver), at least one processor (1002) (hereinafter, processor), and at least one memory (1003) (hereinafter, memory). According to at least one or a combination thereof of methods corresponding to embodiments of the present disclosure, the transceiver (1001), processor (1002), and memory (1003) of the terminal (1000) may be operated. However, the components of the terminal (1000) are not limited to the examples of components shown in FIG. 10. In other embodiments, the terminal (1000) may include additional components in addition to the aforementioned components, or some components may be omitted. Also, in some embodiments, any combination of the transceiver (1001), processor (1002), or memory (1003) may be integrated into a single component.

[0137] The transceiver (1001) may be a basic communication circuit or communication circuitry that enables a terminal (1000) to perform wireless communication with a node or entity of a network. For example, the transceiver (1001) may enable the terminal (1000) to transmit and receive signals via cellular wireless communication with a base station or to transmit and receive signals via cellular wireless communication with another terminal. For example, the transceiver (1001) may support at least one of various cellular wireless communication technologies including 3G (3rd generation), 4G (4th generation) LTE (long-term evolution), 5G (5th generation) NR (new radio), 6G (6th generation), etc., and the various cellular wireless communication technologies supported by the transceiver (1001) may include all subsequent evolved generations of wireless communication.

[0138] According to one embodiment, the terminal (1000) may include a plurality of transceivers, and for example, when supporting EN-DC (E-UTRA (evolved-universal terrestrial radio access) - NR dual connectivity), it may include a first transceiver supporting 4G LTE wireless communication and a second transceiver supporting 5G NR wireless communication. According to another embodiment, when the terminal (1000) supports NR-DC (NR Dual Connectivity), the terminal (1000) may include a plurality of transceivers supporting 5G NR wireless communication. According to another embodiment, if the terminal (1000) supports short-range wireless communication, the terminal (1000) may separately include a transceiver that supports at least one of a group of wireless communication protocol standards such as those defined by Bluetooth®, wireless LAN or WLAN (wireless local area network) network (including, but not limited to, 802.11ah, 802.11ad, 802.11ay, 802.11ax, 802.11az, 802.11ba and 802.11be).

[0139] According to one embodiment, the transceiver (1001) may include various circuit structures used to transmit and receive signals to and from a base station via a wireless channel. The signals may include control information and data. For example, the transceiver (1001) may be configured to include a radio frequency (RF) transmitter that up-converts and amplifies the frequency of a transmitted signal, and an RF receiver that low-noise amplifies a received signal and down-converts the frequency. The transceiver (1001) may output the signal received via the wireless channel to a processor (1002) and transmit the signal output from the processor (1002) via the wireless channel.

[0140] A processor (1002) can control the overall operation of a terminal (1000) according to an embodiment of the present disclosure. The processor (1002) may be implemented as one or more IC (integrated circuit (or circuitry)) chips and may execute various data processing operations. The processor (1002) may include at least one electrical circuit and may execute instructions (or programs, code, data, etc.) stored in memory (1003) individually, collectively, or in any combination. Additionally, the processor (1002) may include a single-core processor or a multi-core processor, and in a specific implementation, may be composed of a processor assembly including a plurality of processing circuits.

[0141] The processor (1002) is electrically, operatively, and / or communicatively coupled to the transceiver (1001) so as to control the transceiver (1001).

[0142] The processor (1002) may include at least one processor (or, processing circuitry), and at least one processor may perform the following operations individually, collectively, or in any combination. For example, the processor (1002) may include a communication processor (CP) that controls communication operations and an application processor (AP) that controls the execution of an upper layer (e.g., an application layer). In a specific embodiment, at least one part of the processor (1002) may be included in one chip (or, IC), and another part of the processor (1002) may be included in a separate chip (or, IC). Alternatively, at least one processor may be included in other components, e.g., a transceiver (1001) or a memory (1003).

[0143] The processor (1002) may perform, cause, or control the operation of a terminal to perform at least one or a combination of the methods according to the embodiments of the present disclosure. For example, the processor (1002) may control the operation of a terminal to process a downlink signal received from a base station or to generate an uplink signal and transmit it to a base station. To this end, the processor (1002) may control other components of the terminal (1000) to perform various operations by executing computer programs, code, or instructions stored in memory (1003).

[0144] Memory (1003) is a hardware storage device capable of storing information temporarily or permanently and may include one or more storage media. For example, memory (1003) may include a memory assembly comprising one or more storage media. For example, the one or more storage media may include a hard drive, flash memory, permanent memory such as ROM (read-only memory), semipermanent memory such as RAM (random access memory), cache memory, or any combination thereof.

[0145] The memory (1003) can be electrically, operatively, and / or communicatively coupled to the processor (1002) and can be accessed by the processor (1002).

[0146] A computer program, code, or instruction that can be executed by a processor (1002) may be stored in the memory (1003). According to one embodiment, the computer program, code, or instruction that can be executed by the processor (1002) may be stored in a single memory device or may be separated and distributed across two or more memory devices. The processor (1002) may perform various functions according to the embodiments of the present disclosure by executing the instruction stored in the memory (1003).

[0147] According to one embodiment of the present disclosure, the operation of the terminal (1000) may be caused to be performed based on at least one processor (or processing circuit) configured to perform the features of the present disclosure individually, collectively, or in any combination based on the execution of instructions (or computer program or code) stored in memory (1003), based on processing circuitry not configured to execute instructions, and / or based on components of a processing circuitry not configured to execute instructions.

[0148] FIG. 11 is a block diagram of a base station (1100) according to one embodiment of the present disclosure.

[0149] The base station (1100) can perform wireless communication with at least one terminal within the area of ​​the base station (1100) via a wireless channel. The base station (1100) can perform communication with a node or entity of a network via wired or wireless communication.

[0150] Referring to FIG. 11, a base station (1100) may include at least one transceiver (1101) (hereinafter, transceiver), at least one processor (1102) (hereinafter, processor), and at least one memory (1103) (hereinafter, memory). According to at least one or a combination thereof of methods corresponding to embodiments of the present disclosure, the transceiver (1101), processor (1102), and memory (1103) of the base station (1100) may be operated. However, the components of the base station (1100) are not limited to the examples of components shown in FIG. 11. In other embodiments, the base station (1100) may include additional components in addition to the aforementioned components, or some components may be omitted. Also, in some embodiments, any combination of the transceiver (1101), processor (1102), or memory (1103) may be integrated into a single component.

[0151] The transceiver (1101) may be a communication circuit or communication circuitry that enables the base station (1100) to perform wireless communication with a node or entity of the network. For example, the transceiver (1101) may enable the base station (1100) to transmit and receive signals to and from a terminal (1000) via cellular wireless communication or to transmit and receive signals to and from another network entity via wireless communication. For example, the transceiver (1101) may support various cellular wireless communication technologies including 3G (3rd generation), 4G (4th generation) LTE (long-term evolution), 5G (5th generation) NR (new radio), 6G (6th generation), etc., and the various cellular wireless communication technologies supported by the transceiver (1101) may include all subsequent generations of wireless communication. According to one embodiment, the transceiver (1101) may include various circuit structures used to transmit and receive signals to and from a terminal via a wireless channel. The signals may include control information and data. For example, the transceiver (1101) may be configured to include a radio frequency (RF) transmitter that up-converts and amplifies the frequency of a transmitted signal, and an RF receiver that low-noise amplifies a received signal and down-converts the frequency. The transceiver (1101) may output the signal received via the wireless channel to a processor (1102) and transmit the signal output from the processor (1102) via the wireless channel.

[0152] Meanwhile, according to one embodiment of the present disclosure, a base station (1100) may communicate with an entity or node of a network via wired or wireless communication. For example, the base station (1100) may communicate via wired or wireless communication with an entity or node of an adjacent base station or core network via a backhaul network. Although not shown in the drawings, when the base station (1100) performs wired communication, the base station (1100) may include a separate network interface for wired communication in addition to the transceiver (1101). The network interface may be referred to as network interface circuitry, communication interface circuitry, etc.

[0153] A processor (1102) can control the overall operation of a base station (1100) according to an embodiment of the present disclosure. The processor (1102) may be implemented as one or more IC (integrated circuit or circuitry) chips and may execute various data processing operations. The processor (1102) may include at least one electrical circuit and may execute instructions (or programs, code, data, etc.) stored in memory (1103) individually, collectively, or in any combination. Additionally, the processor (1102) may include a single-core processor or a multi-core processor, and in a specific implementation, may be composed of a processor assembly including a plurality of processing circuits.

[0154] The processor (1102) is electrically, operatively, and / or communicatively coupled to the transceiver (1101) so as to control the transceiver (1101).

[0155] The processor (1102) may include at least one processor (or processor circuitry), and at least one processor may perform the following operations individually, collectively, or in any combination. In a particular embodiment, at least one part of the processor (1102) may be included in one chip (or IC), and another part of the processor (1102) may be included in a separate chip (or IC). Alternatively, at least one processor may be included in other components, such as a transceiver (1101) or a memory (1103).

[0156] The processor (1102) may perform, cause, or control the operation of a base station to perform at least one or a combination of the methods according to the embodiments of the present disclosure. For example, the processor (1102) may control the operation of a base station to generate a downlink signal and transmit it to a terminal, or to process an uplink signal received from a terminal. Alternatively, the base station may transmit and receive signals with an adjacent base station, transmit a signal received from a terminal to an upper node of the network, or receive a signal from an upper node of the network and transmit it to a terminal. To this end, the processor (1102) may control other components of the base station (1100) to perform various operations by executing computer programs, codes, and instructions stored in memory (1103).

[0157] Memory (1103) is a hardware storage device capable of storing information temporarily or permanently and may include one or more storage media. For example, memory (1103) may include a memory assembly comprising one or more storage media. For example, the one or more storage media may include a hard drive, flash memory, permanent memory such as ROM (read-only memory), semi-permanent memory such as RAM (random access memory), cache memory, or any combination thereof.

[0158] The memory (1103) can be electrically, operatively, and / or communicatively coupled to the processor (1102) and can be accessed by the processor (1102).

[0159] A computer program, code, or instruction that can be executed by a processor (1102) may be stored in the memory (1103). According to one embodiment, the computer program, code, or instruction that can be executed by the processor (1102) may be stored in a single memory device or may be separated and distributed among two or more memory devices. The processor (1102) may perform various functions according to the embodiments of the present disclosure by executing the instruction stored in the memory (1103).

[0160] According to one embodiment of the present disclosure, the operation of a base station (1100) may be caused to be performed based on at least one processor (or processing circuit) configured to perform the features of the present disclosure individually, collectively, or in any combination based on the execution of instructions (or computer programs or code) stored in memory (1103), based on processing circuitry not configured to execute instructions, and / or based on components of a processing circuitry not configured to execute instructions.

[0161] A terminal or a base station can perform various communication procedures related to the control plane or user plane by interacting with network entities based on communication through a wireless channel. For example, a terminal can communicate with network entities such as an access and mobility management function (AMF) or a session management function (SMF) through a base station. Alternatively, the base station can perform at least one communication procedure by directly transmitting and receiving signals or relaying them with network entities. The structure of the above-mentioned network entities will be explained in more detail through the drawings below.

[0162] FIG. 12 is a block diagram of a network entity (1200) that performs network functions according to one embodiment of the present disclosure.

[0163] A network entity (1200) may include one or more network functions (NF) that constitute a core network (e.g., 5G (5th generation) core, 5GC) in a communication system, or entities (devices, devices, nodes, or servers, etc.) that perform part of a network function. In this case, multiple NFs may be implemented within a single network entity, or a single NF may be distributed and implemented across multiple network entities. Additionally, when an NF is implemented within a network entity, the NF may be implemented in the form of software, and in such cases, a program for running the NF may be loaded into the memory of the network entity (1200).

[0164] A single NF can be implemented as one or more instances and can operate by being distributed across the same network entity or multiple network entities. Here, the instance is a software unit that logically executes a specific network function and may be separate from physical hardware resources. Additionally, one or more NFs may be implemented as a single network slice to operate in order to satisfy the specifications required by a specific service.

[0165] The above NF may include any one of an access and mobility management function (AMF), a session management function (SMF), a local session management function (L-SMF), a user plane function (UPF), a local user plane function (L-UPF), a policy control function (PCF), unified data management (UDM), a unified data repository (UDR), a network exposure function (NEF), a network repository function (NRF), an application function (AF), a network slice selection function (NSSF), a network data analytics function (NWDAF), a network slice admission control function (NSACF), an authentication server function (AUSF), or a data network (DN).

[0166] Referring to FIG. 12, a network entity (1200) may include at least one network interface (1201), at least one processor (1202) (hereinafter referred to as processor), and at least one memory (1203) (hereinafter referred to as memory). As described above, the NF may be implemented in the form of a physical device such as the network entity (1200), or may be implemented and executed in the form of a virtualized instance. When the NF is implemented in the form of an instance, it may not necessarily include physical components as illustrated in FIG. 12. In such cases, the instance may be composed of one or more logical functional units and may be logically represented.

[0167] According to at least one or a combination thereof of the methods corresponding to the embodiments of the present disclosure, the network interface (1201), processor (1202), and memory (1203) of the network entity (1200) may be operated. However, the components of the network entity (1200) are not limited to the examples of components shown in FIG. 12. In other embodiments, the network entity (1200) may include additional components in addition to the aforementioned components, or some components may be omitted. Also, in one embodiment, the network interface (1201), processor (1202), or memory (1203) may be implemented as a single component.

[0168] The network interface (1201) is a collective term for the transmitting and receiving parts of a network entity and may be a communication circuit for transmitting and receiving signals with a terminal (user equipment, UE), a base station, or other network entities. In this case, the communication circuit may include both a communication circuit for wireless communication and a communication circuit for wired communication. For example, the network interface (1201) may include circuits, logic, hardware, etc. configured to exchange control plane messages or user plane messages with a terminal, a base station, or other core network entities via wireless or wired communication. The network interface (1201) may operate using various protocols (e.g., NAS (Non-Access Stratum) protocol). Depending on the convenience of explanation and technical implementation, the network interface (1201) may be referred to as a communication circuitry, a network interface circuitry, or a communication interface circuitry.

[0169] A processor (1202) may control the overall operation of a network entity (1200) according to an embodiment of the present disclosure. In one embodiment, the processor (1202) may be implemented as one or more IC (integrated circuit or circuitry) chips and may execute various data processing operations. The processor (1202) may include at least one electrical circuit and may execute instructions (or programs, code, data, etc.) stored in memory (1203) individually, collectively, or in any combination. Additionally, the processor (1202) may include a single-core processor or a multi-core processor, and in a specific implementation, may be composed of a processor assembly including a plurality of processing circuits. Additionally, it should be noted that the processor (1202) may not necessarily be composed of physical hardware when the network function (1200) is implemented in an instance form according to another embodiment.

[0170] According to one embodiment, the processor (1202) is electrically, operatively, and / or communicatively coupled to the network interface (1201) so as to control the network interface (1201).

[0171] The processor (1202) may include at least one processor (or processor circuitry), and at least one processor may perform the following operations individually, collectively, or in any combination. In a specific embodiment, at least one part of the processor (1202) may be included in one chip (or IC), and another part of the processor (1202) may be included in a separate chip (or IC). Alternatively, at least one processor may be included in other components, such as a network interface (1201) or memory (1203).

[0172] A processor (1202) may perform or control operations of a network entity (1200) to perform at least one or a combination thereof of methods according to embodiments of the present disclosure. For example, the processor (1202) may control operations of the network entity (1200) to exchange control plane messages or user plane messages with terminals, base stations, or other core network entities via wireless or wired communication using various protocols (e.g., NAS protocols). To this end, the processor (1202) may control other components of the network entity (1200) to perform various operations by executing computer programs, code, or instructions stored in memory (1203).

[0173] Memory (1203) is a hardware storage device capable of storing information temporarily or permanently and may include one or more storage media. For example, memory (1203) may include a memory assembly comprising one or more storage media. For example, the one or more storage media may include a hard drive, flash memory, permanent memory such as ROM (read-only memory), semipermanent memory such as RAM (random access memory), cache memory, or any combination thereof.

[0174] According to one embodiment, the memory (1203) may be electrically, operatively, and / or communicatively coupled to the processor (1202) and may be accessed by the processor (1202).

[0175] A computer program, code, or instruction that can be executed by a processor (1202) may be stored in the memory (1203). According to one embodiment, the computer program, code, or instruction that can be executed by the processor (1202) may be stored in a single memory or may be separated and distributed across two or more memories. The processor (1202) may perform various functions according to the embodiments of the present disclosure by executing the instruction stored in the memory (1203).

[0176] According to one embodiment of the present disclosure, the operation of a network entity (1200) may be caused to be performed based on at least one processor (or processing circuit) configured to perform the features of the present disclosure individually, collectively, or in any combination based on the execution of instructions (or computer program or code) stored in memory (1203), based on processing circuitry not configured to execute instructions, and / or based on components of a processing circuitry not configured to execute instructions.

[0177] Meanwhile, although specific embodiments have been described in the detailed description of the present disclosure, it is understood that various modifications are possible within the scope of the present disclosure. Therefore, the scope of the present disclosure should not be limited to the described embodiments, but should be defined by the claims set forth below as well as equivalents thereof.

Claims

1. A method performed by a UE (user equipment) of a wireless communication system, A step of generating multiple information bits; A step of adjusting the probability that the second MSB (most significant bit) among the plurality of information bits becomes 0 through a DM (distribution matcher); A step of generating a plurality of modulated symbols by performing modulation on the plurality of information bits including the second MSB, the probability of becoming 0 being adjusted; and A method comprising the step of transmitting the plurality of modulated symbols to a base station.

2. In Paragraph 1, The above adjusting step is performed prior to LDPC encoding for the plurality of information bits, and The above method further includes the step of performing LDPC encoding on the plurality of information bits including the second MSB output from the DM, and A method in which the above modulation is performed on the encoded plurality of information bits.

3. In Paragraph 1, The above adjustment step is performed after LDPC (low density parity check) encoding for the plurality of information bits, and A method in which the second MSB input to the above DM is the second MSB among the bits after interleaving the encoded bits.

4. In Paragraph 1, The probability that the second MSB becomes 0 is adjusted to a predetermined value for each spectral efficiency of a specific modulation order, and is adjusted to a value greater than 0.5 and less than 1, and The constellation map for the above modulation has non-uniform probabilistic shaping, and The above adjusting step is performed when the order of the modulation is greater than or equal to a predetermined value, and The above adjusting step includes a step of adjusting the probability that at least one lower bit for the second MSB among the plurality of information bits will also be 0. A method in which the probability that at least one lower bit becomes 0 is controlled independently of or together with the second MSB.

5. A method performed by a base station of a wireless communication system, A step of generating multiple information bits; A step of adjusting the probability that the second MSB (most significant bit) among the plurality of information bits becomes 0 through a DM (distribution matcher); A step of generating a plurality of modulated symbols by performing modulation on the plurality of information bits including the second MSB, the probability of becoming 0 being adjusted; and A method comprising the step of transmitting the above plurality of modulation symbols to UE (user equipment).

6. In Paragraph 5, The above adjusting step is performed prior to LDPC encoding for the plurality of information bits, and The above method further includes the step of performing LDPC encoding on the plurality of information bits including the second MSB output from the DM, and A method in which the above modulation is performed on the encoded plurality of information bits.

7. In Paragraph 5, The probability that the second MSB becomes 0 is adjusted to a predetermined value for each spectral efficiency of a specific modulation order, and is adjusted to a value greater than 0.5 and less than 1, and The constellation map for the above modulation has non-uniform probabilistic shaping, and The above adjusting step is performed when the order of the modulation is greater than or equal to a predetermined value, and The above adjusting step includes a step of adjusting the probability that at least one lower bit for the second MSB among the plurality of information bits will also be 0. A method in which the probability that at least one lower bit becomes 0 is controlled independently of or together with the second MSB.

8. Regarding UE (user equipment): At least one transceiver; At least one processor communicatively coupled to the above at least one transceiver; and It includes at least one memory that is communicationally coupled to the above at least one processor and stores instructions, and The above instructions are executed individually or in any combination by the above at least one processor, so that the UE: Generate multiple information bits, and Among the plurality of information bits mentioned above, for the second MSB (most significant bit), the probability of the second MSB becoming 0 is controlled through a DM (distribution matcher), and A plurality of modulated symbols are generated by performing modulation on the plurality of information bits, including the second MSB, for which the probability of becoming 0 is adjusted, and A UE that transmits the above plurality of modulated symbols to a base station.

9. In Paragraph 8, The above adjustment is performed prior to LDPC encoding for the plurality of information bits, and The above instructions cause the UE to perform the LDPC encoding on the plurality of information bits including the second MSB output from the DM, and The above modulation is performed on the encoded plurality of information bits, UE.

10. In Paragraph 8, The above adjustment is performed after LDPC (low density parity check) encoding for the plurality of information bits, and The second MSB input to the above DM is the second MSB among the bits after interleaving the encoded bits, UE.

11. In Paragraph 8, The probability that the second MSB becomes 0 is adjusted to a predetermined value for each spectral efficiency of a specific modulation order, and is adjusted to a value greater than 0.5 and less than 1, and The constellation map for the above modulation has non-uniform probabilistic shaping, and The above adjustment is performed when the order of the above modulation is greater than or equal to a predetermined value, and The above adjustment further includes a process of adjusting the probability that at least one lower bit for the second MSB among the plurality of information bits will also be 0, and The above at least one lower bit is a UE in which the probability of becoming 0 is controlled independently of or together with the second MSB.

12. Regarding base stations: At least one transceiver; At least one processor communicatively coupled to the above at least one transceiver; and It includes at least one memory that is communicationally coupled to the above at least one processor and stores instructions, and The above instructions are executed individually or in any combination by the above at least one processor, so that the base station: Generate multiple information bits, and Among the plurality of information bits mentioned above, for the second MSB (most significant bit), the probability of the second MSB becoming 0 is controlled through a DM (distribution matcher), and A plurality of modulated symbols are generated by performing modulation on the plurality of information bits, including the second MSB, for which the probability of becoming 0 is adjusted, and A base station that transmits the above plurality of modulated symbols to UE (user equipment).

13. In Paragraph 12, The above adjustment is performed prior to LDPC encoding for the plurality of information bits, and The above commands cause the base station to perform LDPC encoding on the plurality of information bits including the second MSB output from the DM, and The above modulation is performed on the encoded plurality of information bits, a base station.

14. In Paragraph 12, The above adjustment is performed after LDPC (low density parity check) encoding for the plurality of information bits, and The second MSB input to the above DM is the second MSB among the bits after interleaving the encoded bits, a base station.

15. In Paragraph 12, The probability that the second MSB becomes 0 is adjusted to a predetermined value for each spectral efficiency of a specific modulation order, and is adjusted to a value greater than 0.5 and less than 1, and The constellation map for the above modulation has non-uniform probabilistic shaping, and The above adjustment is performed when the order of the above modulation is greater than or equal to a predetermined value, and The above adjustment further includes a process of adjusting the probability that at least one lower bit for the second MSB among the plurality of information bits will also be 0, and A base station in which the probability that at least one lower bit becomes 0 is controlled independently of or together with the second MSB.