Multi-Level Cell Programming Algorithm for Flash Memory Patents

The dataset's assignee ranking is concentrated: the top five companies together account for 506 of the 1,026 records in scope, or 49.3% of the field, and the top ten extend that to 66.9%. The leader alone holds 170 records, well ahead of the fifth-ranked company at 68 and the tenth-ranked at 19. This is a field dominated by a handful of established memory and controller makers rather than a broad spread of independent filers, so any competitive review should start with those leaders' granted claims.

No — filing activity peaked well before the current search window, at 80 filings in 2008, and has trended down since. Using the most recent complete-year comparison available, filings fell 50% from 24 in 2021 to 12 in 2024. Note that 2025 and 2026 figures in any dataset will look artificially low because publication typically lags actual filing by around 18 months, so those years should not be read as confirming further decline.

G11C, covering static and digital memories, is the dominant classification at 73.4% of the 1,026 records in scope, followed by G06F for electric digital data processing at 41.6%. Smaller but still relevant classes include H03M (coding and code conversion), H10B (memory device manufacture), H10D and H01L (semiconductor devices), each under 3% of records. Because a single patent can carry multiple IPC codes, these shares add up to more than 100% and should be read as coverage rates, not a partition of the field.

US20110029718A1, filed by Intel NDTM US LLC and published in 2011, covers a method of confining metadata storage to the faster-programming lower pages of an MLC NAND flash device, specifically to improve quality of service. It does not claim MLC programming broadly — its scope is the specific technique of segregating metadata by page latency tier. Designs that store metadata differently, or that do not rely on a lower/upper page latency asymmetry, sit outside its claims, though a full freedom-to-operate check should compare exact claim language against your implementation.

The IPC composition points to several thinner branches: H03M (coding and code conversion), H10B (memory device manufacture), H10D, H01L and G07C each cover 3% or less of the 1,026 records in scope, compared with 73.4% for the dominant G11C class. That gap does not guarantee an easy filing, but it does suggest programming-adjacent coding schemes and manufacturing-process claims are less contested than core cell-array and controller architecture claims held by the ranked leaders. Any new filing strategy should combine this with a direct claims read of the leading assignees before committing scope.