DFIG Wind Turbines for Grid-Connected Wind Power Systems

Overview of Technical Issues:

During grid voltage dips, the power grid applies harmful voltage disturbances to the stator winding, inducing excessive transient currents in the rotor winding that exceed the rotor-side converter's current regulation capacity, forcing turbine disconnection and loss of power generation; additionally, the rotor current controller provides insufficient damping against sub-synchronous oscillations, causing unstable power fluctuations during grid interactions; the goal is to achieve continuous operation through voltage dips while maintaining stable power delivery and protecting converter components from overcurrent damage.

Solution directions generated for this problem

Problem Direction 1 :

ImproveRotor current regulation bandwidth
VS
ConstraintConverter power loss

Inspiration 1 : Cross-domain reference

Application Principle: #28 Mechanics substitution
Cross-domain applicability Assess applicability
Circuits for a hybrid switched capacitor converter
Innovative Solution Refine solution

Resonant soft-switching rotor-side converter for high-bandwidth low-loss current regulation

Replace hard-switching with resonant topology
How to solve :
  • Integrate LLC resonant tank (inductor 50-80μH, capacitor 2-5μF) in series with rotor winding to achieve zero-voltage switching (ZVS) across all IGBTs during turn-on and zero-current switching (ZCS) during turn-off, eliminating switching losses at transitions
  • Operate converter at resonant frequency 8-12kHz during steady state, boost to 15kHz during voltage dip transients detected by grid voltage RMS monitor — resonant operation maintains switching losses below 0.3% of rated power regardless of frequency
  • Implement frequency modulation control where current regulation bandwidth reaches 500Hz+ by varying switching frequency ±20% around resonance point, with digital phase-locked loop (PLL) maintaining ZVS/ZCS conditions within 50ns timing accuracy verified by oscilloscope measurement
Expected Effect : Bandwidth 500Hz+, losses +8% vs +45% hard-switching, efficiency 97.2% at 12kHz
Risk Control :
  • resonant parameter tolerance ±5% shifts ZVS point
  • PLL lock time 2-3 cycles delays transient response
  • magnetic component saturation under 2.5× overcurrent

Problem Direction 2 :

ImproveRotor current regulation bandwidth
VS
ConstraintControl system complexity

Inspiration 1 : Cross-domain reference

Application Principle: #1 Segmentation
Cross-domain applicability Assess applicability
Laser scanner
Innovative Solution Refine solution

Hierarchical dual-loop current regulation with independent fast transient layer

Separate fast and slow control functions into independent execution layers
How to solve :
  • Implement a dedicated inner fast current loop executing at 10kHz sampling rate with simple proportional gain (Kp=15-25 A/V) for transient regulation, achieving 500Hz+ bandwidth with 20μs response time
  • Maintain outer power and damping loops at standard 2kHz execution rate with PI control (Kp=0.8, Ti=15ms) for steady-state optimization, keeping main converter switching at 2-5kHz to preserve efficiency
  • Use dual-core DSP architecture (TMS320F28379D or equivalent) — Core-1 handles fast loop with deterministic 100μs interrupt, Core-2 manages slow loops and coordination via shared memory updated every 500μs, eliminating real-time computational bottleneck
Expected Effect : Bandwidth 500Hz, switching loss +8% only, response time <20ms
Risk Control :
  • fast-slow loop interaction stability
  • interrupt timing jitter >5μs
  • shared memory access conflict

Problem Direction 3 :

ImproveController damping coefficient
VS
ConstraintConverter power loss

Inspiration 1 : Cross-domain reference

Application Principle: #22 Blessing in disguise
Cross-domain applicability Assess applicability
Circuit and method for compensating the effect of equivalent series inductance (ESL) in a buck regulator
Innovative Solution Refine solution

Oscillation energy harvesting damper for sub-synchronous suppression

Transform harmful oscillation energy into useful damping
How to solve :
  • Install a tuned passive RLC damper circuit in parallel with rotor winding, resonant frequency set to 30Hz (center of 10-50Hz oscillation band), Q-factor 8-12 for broadband absorption
  • Use air-core inductor (15-25mH, tolerance ±2%) and film capacitor (50-80μF, ESR <0.05Ω) to form resonant tank, dissipate absorbed energy in water-cooled resistor (5-10Ω, 200W continuous rating)
  • Oscillation current flows preferentially through low-impedance resonant path rather than converter, reducing RMS rotor current by 18-25% during oscillation events while converter operates at normal duty cycle
Expected Effect : Damping ratio +0.15, converter loss unchanged, oscillation decay time -60%
Risk Control :
  • resonant frequency drift with temperature
  • inductor saturation under high transient current
  • resistor thermal management failure

Problem Direction 4 :

ImproveController damping coefficient
VS
ConstraintControl system complexity

Inspiration 1 : Cross-domain reference

Application Principle: #28 Mechanics substitution
Cross-domain applicability Assess applicability
Motion Control of a Robotic Load Handling Device
Innovative Solution Refine solution

Software-based virtual damping injection via field-oriented control restructuring

Replace multi-loop damping control with field-oriented restructuring
How to solve :
  • Restructure the existing field-oriented control (FOC) by embedding damping into the d-q axis current reference calculation — add a virtual resistance term (Rd = 0.15–0.25 pu) in the rotor voltage equation that naturally suppresses 10–50Hz oscillations without additional control loops
  • Implement damping as a single-line algebraic modification: id_ref = id_base - Rd×(ωslip - ωslip_ref), iq_ref = iq_base - Rd×Δω, where ωslip is slip frequency and Δω is grid frequency deviation — computation adds <5% CPU load
  • Tune Rd coefficient offline using eigenvalue analysis to ensure damping ratio ≥0.15 for sub-synchronous modes — no real-time FFT, bandpass filters, or mode detection required, controller executes at standard 5kHz rate with existing PI structure intact
Expected Effect : Damping ratio +120%, CPU load +4%, code +8 lines
Risk Control :
  • Rd tuning sensitivity to grid impedance variation
  • potential interaction with existing PI controller during large disturbances
  • damping effectiveness degradation under off-design operating points

Problem Direction 5 :

ImproveVoltage dip ride-through capability
VS
ConstraintConverter power loss

Inspiration 1 : Cross-domain reference

Application Principle: #11 Beforehand cushioning
Cross-domain applicability Assess applicability
Field-effect semiconductor devices and their manufacturing
Innovative Solution Refine solution

Pre-charged DC-link supercapacitor buffer for voltage dip ride-through

Pre-charge DC-link supercapacitor bank to absorb transient power imbalance
How to solve :
  • Install supercapacitor module (50-100 F, rated 1.2× DC-link voltage) in parallel with DC-link capacitor, pre-charged to nominal DC voltage during normal operation
  • During voltage dip detection (grid voltage drop ≥15% within 20 ms), supercapacitor automatically absorbs rotor transient power surge, maintaining DC-link voltage within ±10% and preventing converter duty cycle increase
  • After dip clearance, controlled recharge at 0.2 C-rate over 30-60 s restores supercapacitor energy without impacting normal operation
Expected Effect : Converter loss +3% vs +35% baseline; ride-through depth 0-90%; recharge time <60 s
Risk Control :
  • supercapacitor voltage balancing drift
  • pre-charge circuit failure
  • recharge current coordination error

Problem Direction 6 :

ImproveVoltage dip ride-through capability
VS
ConstraintControl system complexity

Inspiration 1 : Cross-domain reference

Application Principle: #1 Segmentation
Cross-domain applicability Assess applicability
Passive entry/passive start communication systems with selected antennas having multiple polarized axes
Innovative Solution Refine solution

Hierarchical ride-through control with independent fast-slow current regulation layers

Partition control into independent layers for simplicity
How to solve :
  • Divide ride-through control into three independent state machines: dip detection layer (voltage threshold comparator at 0.9/0.5/0.2 pu triggers severity flags), transient current regulation layer (hardware-based proportional controller with fixed gain K=50 A/V, 500Hz bandwidth, operates only during dip flag), and recovery sequencer (timer-based ramp from 1.5× to 1.0× rated current over 200ms post-dip)
  • Implement inner fast current loop as standalone FPGA module executing at 10kHz sampling with simple P-controller (no PI tuning, no state feedback), communicating dip-mode current limit to outer 2kHz DSP-based power controller via single register handshake, eliminating multi-variable coordination
  • Pre-program three fixed response profiles in lookup table indexed by dip severity: shallow dip applies 1.5× current limit + 0.3pu reactive injection, medium dip applies 1.8× limit + 0.6pu reactive, deep dip applies 2.0× limit + crowbar activation at 2.2× threshold, no real-time optimization or adaptive algorithms required
Expected Effect : Control code reduced 60%, ride-through success rate 98%, recovery time <300ms
Risk Control :
  • FPGA-DSP synchronization jitter
  • lookup table coverage gaps for atypical dips
  • crowbar reset timing coordination

Problem Direction 7 :

ImproveConverter overcurrent tolerance margin
VS
ConstraintConverter power loss

Inspiration 1 : Cross-domain reference

Application Principle: #10 Preliminary action
Cross-domain applicability Assess applicability
N-channel bipolar power semiconductor device with P-layer in the drift volume
Innovative Solution Refine solution

Pre-staged current limiting with predictive voltage dip detection for rotor overcurrent protection

Predictive limiter cuts current before spike
How to solve :
  • Deploy grid voltage derivative monitoring (dV/dt threshold ≥5%/ms) to detect voltage dip onset 2-5ms before rotor current spike initiates, triggering pre-emptive action
  • Upon detection, pre-reduce rotor current reference from rated to 1.4× rated within 3ms using fast PI controller (bandwidth 800Hz), preventing transient overshoot to 3× rated
  • Use standard-rated Si IGBT modules (1.7kV/1kA class) operating at normal 0.85× rated RMS current during steady-state, achieving ≤1.8% conduction loss without device oversizing
Expected Effect : Overcurrent margin +40%, losses unchanged, cost -20%
Risk Control :
  • dV/dt threshold false triggering
  • current reference step causing torque transient
  • grid noise affecting voltage derivative calculation

Problem Direction 8 :

ImproveConverter overcurrent tolerance margin
VS
ConstraintControl system complexity

Inspiration 1 : Cross-domain reference

Application Principle: #11 Beforehand cushioning
Cross-domain applicability Assess applicability
Hardening sensing equipment and systems and methods for protecting sensing equipment from catastrophic events
Innovative Solution Refine solution

Pre-staged hardware overcurrent bypass with automatic recovery for rotor protection

Install hardware bypass before fault occurs
How to solve :
  • Install a thyristor-based crowbar circuit (rated 3× nominal rotor current) in parallel with rotor winding terminals during turbine commissioning, creating a pre-staged protection path that activates automatically when rotor current exceeds 2.2× rated via analog comparator circuit (response time <5μs)
  • Use back-to-back thyristor pair (e.g., Infineon T1891N series) with series damping resistor (0.15Ω, 50kW pulse rating) to absorb transient energy — thyristor gate driven by current-sense transformer output through simple RC trigger circuit (no digital processing)
  • Implement passive auto-reset mechanism: crowbar conducts for 100-200ms until rotor current decays below 1.5× rated, then naturally commutates off when AC current crosses zero, allowing main converter to resume normal operation without software coordination or mode-switching logic
Expected Effect : Overcurrent tolerance 3× rated; control code unchanged; protection response <10μs; system availability +98%
Risk Control :
  • thyristor false triggering during normal transients
  • damping resistor thermal capacity insufficient
  • crowbar commutation failure prolonging bypass duration
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