How to Integrate Synchronous Rectifier in USB-PD Flyback
Overview of Technical Issues:
The secondary-side diode rectification structure provides insufficient efficiency due to forward voltage drop losses (0.4-0.7V), causing significant power dissipation and limiting USB-PD flyback converter performance; integrating synchronous rectification requires precise turn-off timing control to avoid harmful reverse current flow while achieving the efficiency improvement goal, but the switching control circuit currently provides insufficient timing synchronization with the transformer's current reversal point.
Solution directions generated for this problem
Problem Direction 1 :
ImproveTiming synchronization precision
VSConstraintMust not deteriorate
Inspiration 1 : Cross-domain reference
Application Principle: #10 Preliminary action
Cross-domain applicability
User equipment and method for adaptively selecting handover parameters in radio access network
Innovative Solution Refine solution
Startup-phase calibration with fixed-delay runtime control for synchronous rectification timing
Separate precision and robustness in time via calibration-then-execute strategy
How to solve :
- During startup phase (first 10–50ms), activate high-bandwidth current sensing (≥20MHz analog front-end) to measure transformer secondary current zero-crossing with <50ns resolution across 100 consecutive cycles, then calculate average turn-off delay from primary switch-off event
- Store calibrated delay value in digital timer register and switch to fixed-delay mode using simple RC timing network or microcontroller counter—no real-time sensing, immune to noise and transient interference during normal operation
- Trigger re-calibration routine automatically when output voltage deviation exceeds ±2% or load current step >30%, or periodically every 5 seconds under stable conditions—maintains <50ns timing accuracy while operating with robust fixed-delay 99% of the time
Expected Effect : Timing precision <50ns; noise immunity >40dB; component count +3 parts (comparator, ADC, MCU)
Risk Control :
- calibration convergence under light load
- temperature drift between calibration intervals
- transient detection threshold tuning
Problem Direction 2 :
ImproveRectification efficiency
VSConstraintControl circuit complexity
Inspiration 1 : Cross-domain reference
Application Principle: #1 Segmentation
Cross-domain applicability
High-frequency signal processing apparatus and wireless communication apparatus
Innovative Solution Refine solution
Modular secondary-side rectification with independent zero-crossing detection and gate drive stages
Partition control into independent modules
How to solve :
- Separate zero-crossing detection module using dedicated high-speed comparator IC (e.g., TLV3501, 4.5ns propagation delay) monitoring transformer secondary voltage for current reversal, outputting clean digital timing signal
- Implement standalone gate driver module (e.g., UCC27524, 18V/18V 5A peak drive) receiving timing signal and controlling MOSFET (e.g., IRFB4115PbF, 104A, 150V, 3.7mΩ Rds(on)) turn-off within 30ns window
- Connect modules via single-ended logic interface with 50Ω series termination resistor for signal integrity, each module optimized independently—comparator bandwidth >200MHz, gate driver slew rate >10V/ns—eliminating need for integrated multi-function controller
Expected Effect : Efficiency >95.5% at 65W; timing error <30ns; 4-component modular architecture
Risk Control :
- comparator threshold drift ±15mV over temperature
- gate driver propagation delay variation ±8ns across production lots
- PCB trace impedance mismatch causing signal reflection
Problem Direction 3 :
ImproveRectification efficiency
VSConstraintComponent count and cost
Inspiration 1 : Cross-domain reference
Application Principle: #6 Universality
Cross-domain applicability
A multiple output boost DC-DC power converter
Innovative Solution Refine solution
Self-Sensing MOSFET Body Diode Rectification with Integrated Gate Driver
Exploit MOSFET body diode as multi-function element
How to solve :
- Use MOSFET body diode as both startup rectifier and zero-crossing sensor—monitor drain-source voltage Vds polarity to detect current reversal without separate sense resistor or current transformer
- Integrate Vds-sensing gate driver IC (e.g., UCC27712 family) that directly reads MOSFET terminal voltage and generates adaptive turn-off timing within <50ns precision, replacing separate comparator, sense amplifier, and timing controller (eliminates 4-5 components)
- Employ logic-level N-channel MOSFET (Vth=2.5V, Rds(on)<20mΩ at Vgs=4.5V) driven directly from integrated driver's 5V rail, eliminating high-current external gate driver stage and reducing gate charge losses by 60%
Expected Effect : Efficiency >94%, component count +2 (MOSFET + driver IC only), BOM cost +15%, timing precision <40ns
Risk Control :
- Vds noise coupling during high dv/dt transitions
- body diode reverse recovery causing false triggers
- driver IC compatibility with flyback transformer turns ratio
Problem Direction 4 :
ImproveTiming synchronization precision
VSConstraintControl circuit complexity
Inspiration 1 : Cross-domain reference
Application Principle: #28 Mechanics substitution
Cross-domain applicability
Apparatus for a resonance circuit
Innovative Solution Refine solution
Frequency-domain zero-crossing prediction for synchronous rectification timing
Replace time-domain current sensing with frequency-domain prediction
How to solve :
- Monitor primary-side switching frequency and transformer magnetizing inductance to calculate secondary current zero-crossing time using f_zc = f_sw × (Lm/(Lm+Llk)), eliminating secondary-side high-speed sensing circuits
- Implement digital phase-locked loop (PLL) in existing microcontroller to track switching frequency drift (±2% tolerance) and auto-adjust turn-off delay by 5ns increments every 10 cycles, achieving <50ns steady-state precision
- Use primary-side reflected voltage zero-crossing as calibration reference every 100th cycle—compare predicted vs actual timing, update Lm/Llk ratio in lookup table to compensate for temperature drift (−40°C to +125°C range)
Expected Effect : Timing precision <50ns; zero added ICs; complexity reduction 60%
Risk Control :
- PLL convergence time during load transients
- transformer parameter variation across production batches
- microcontroller computation latency under interrupt load
Problem Direction 5 :
ImproveTiming synchronization precision
VSConstraintComponent count and cost
Inspiration 1 : Cross-domain reference
Application Principle: #6 Universality
Cross-domain applicability
Multicarrier communications employing time alignment timers
Innovative Solution Refine solution
Multi-function MOSFET self-sensing synchronous rectification with integrated timing detection
Exploit MOSFET as both rectifier and timing sensor via drain-source voltage monitoring
How to solve :
- Monitor MOSFET drain-source voltage (Vds) directly—when body diode conducts during current reversal, Vds snaps to -0.7V, providing inherent zero-crossing timing signal without separate current sense resistor, amplifier, or current transformer
- Integrate Vds comparator into existing gate driver IC (e.g., UCC27712 family)—single chip replaces sense resistor (0.01Ω/1W), dedicated sense amplifier IC, and timing logic, cutting 3 components while achieving <30ns propagation delay through internal high-speed comparator with -0.5V threshold
- Implement adaptive dead-time calibration using Vds zero-crossing feedback—measure body diode conduction duration every 50 cycles (10µs sampling at 100kHz), adjust turn-off timing by ±5ns increments to maintain <50ns steady-state error across 20-100% load range and -40 to +85°C temperature variation
Expected Effect : Timing precision <50ns; component count +2 (smart driver + MOSFET only); BOM cost +15%; efficiency >95%
Risk Control :
- Vds noise coupling during high dv/dt transitions
- body diode forward voltage temperature drift ±150mV
- comparator threshold calibration across production batches
