Patch Antenna Spurious Mode Suppression Using DGS Slots

Overview of Technical Issues:

The patch antenna system suffers from harmful spurious mode excitation where the dielectric substrate and continuous ground plane structure enable unintended higher-order resonant modes to propagate alongside the fundamental mode, causing radiation pattern distortion, reduced antenna efficiency, and impedance mismatch; the goal is to suppress these parasitic resonances using optimized DGS slot configurations in the ground plane while maintaining desired fundamental mode performance.

Solution directions generated for this problem

Problem Direction 1 :

ImproveSpurious mode suppression level
VS
ConstraintImpedance matching bandwidth

Inspiration 1 : Cross-domain reference

Application Principle: #35 Parameter changes
Cross-domain applicability Assess applicability
Wideband antenna
Innovative Solution Refine solution

Tunable dielectric-filled DGS slots with adaptive permittivity control for decoupled spurious suppression and impedance matching

Replace fixed DGS slots with tunable dielectric-filled cavities
How to solve :
  • Design coaxial DGS slot geometry (outer ring 12mm diameter, inner post 3mm diameter) etched with standard ±0.2mm tolerance, filled with voltage-tunable ferroelectric composite (BST-polymer blend, εr adjustable 8–28 via 0–40V bias)
  • At fundamental mode (2.4GHz), apply 0V bias to set εr=8, slot resonates at 4.2GHz appearing electromagnetically small (λ/14), preserving 8% impedance bandwidth and >85% efficiency
  • At spurious frequencies (3.8–5.2GHz), apply 25V bias to shift εr=22, slot resonates at 2.8GHz creating reactive loading zone that reflects spurious mode currents with >22dB suppression while fundamental mode sees capacitive compensation maintaining bandwidth
Expected Effect : Spurious suppression >22dB; impedance bandwidth maintained 7.8–8.2%; efficiency >84%; standard fabrication tolerance ±0.2mm
Risk Control :
  • BST-polymer composite aging under bias cycling
  • voltage supply stability ±0.5V required
  • dielectric loss tangent drift at elevated temperature

Problem Direction 2 :

ImproveSpurious mode suppression level
VS
ConstraintDGS geometry precision requirement

Inspiration 1 : Cross-domain reference

Application Principle: #35 Parameter changes
Cross-domain applicability Assess applicability
Sealing of an electronic lock
Innovative Solution Refine solution

Dielectric-filled DGS cavities with material-based mode suppression

Replace geometric resonance with material property control
How to solve :
  • Etch coarse-tolerance cavities (±0.2mm) in ground plane using standard PCB process, eliminating precision etching cost
  • Fill cavities with high-permittivity ceramic composite (εr=15-20, e.g., barium titanate-PTFE mixture) to shift resonance to spurious frequencies independent of cavity dimension variations
  • Apply screen-printed conductive paste borders (0.3mm width) around cavity perimeters to define electromagnetic boundaries, compensating for ±0.2mm etching variations through material loading rather than geometric precision
Expected Effect : Spurious suppression >22dB; fabrication tolerance relaxed to ±0.2mm; cost reduction 40%
Risk Control :
  • dielectric material εr consistency ±5%
  • paste-cavity interface air gaps
  • thermal expansion mismatch cracking

Problem Direction 3 :

ImproveFundamental mode selectivity
VS
ConstraintAntenna radiation efficiency

Inspiration 1 : Cross-domain reference

Application Principle: #1 Segmentation
Cross-domain applicability Assess applicability
Reconstituted substrate for radio frequency applications
Innovative Solution Refine solution

Spatially-segmented ground plane with mode-specific DGS zones for selective spurious suppression

Partition ground plane into functional zones
How to solve :
  • Divide ground plane into concentric segmented regions: inner circular zone (radius 0.6λ₀ at 2.4GHz fundamental) remains continuous solid copper with no slots, preserving fundamental mode current paths and maintaining >85% radiation efficiency
  • outer annular zones contain mode-specific DGS slot arrays positioned at spurious mode current maxima (identified via full-wave EM simulation at 3.8GHz TM₂₀ and 5.2GHz TM₃₀ modes) where fundamental mode current density <5% of peak value, achieving >20dB spurious suppression without fundamental mode coupling
  • Implement quarter-wave resonant slots in outer zones: slot length 18.5mm (λ/4 at 3.8GHz), width 0.8mm, depth through 1.6mm FR-4 substrate (εᵣ=4.4), positioned at patch edge corners where higher-order modes exhibit current antinodes
  • fabrication uses standard PCB etching with ±0.2mm tolerance, inner zone boundary defined by 0.3mm isolation gap to prevent slot coupling into fundamental region
  • quality control: measure S₁₁ bandwidth ≥8% at VSWR<2:0, radiation pattern cross-polarization <-20dB, spurious mode rejection verified by spectrum analyzer showing >20dB suppression at 3.8±0.2GHz and 5.2±0.3GHz bands
Expected Effect : Efficiency >85%, spurious suppression >22dB, bandwidth 8.2%, standard fabrication cost
Risk Control :
  • segmentation boundary position sensitivity to fundamental mode distribution
  • slot coupling through substrate surface waves
  • fabrication alignment between patch and segmented ground zones

Problem Direction 4 :

ImproveSpurious mode suppression level
VS
ConstraintMust not deteriorate

Inspiration 1 : Cross-domain reference

Application Principle: #3 Local quality
Cross-domain applicability Assess applicability
Resource allocation for D2D discovery in an LTE network
Innovative Solution Refine solution

Spatially-graded DGS slot array with mode-selective positioning

Position slots at mode-selective locations
How to solve :
  • Map current distribution via full-wave simulation at 2.4GHz fundamental and 3.8–5.2GHz spurious modes
  • identify spatial nodes where spurious mode current density ≥3× fundamental mode density (typically patch corners and edges within 2mm boundary zone)
  • Place λ/4 resonant slots (length 15–18mm for 3.8–5.2GHz) exclusively at these high-contrast locations where slots appear electromagnetically large to spurious modes (>20dB suppression) yet remain in fundamental mode null regions (coupling <−25dB, preserving >85% efficiency)
  • Implement graded slot density — 4 slots at patch corners (maximum spurious current), 2 slots at midpoint edges (moderate spurious current), zero slots in central region (fundamental mode maximum) — achieving spatial heterogeneity with ±0.2mm standard PCB tolerance since suppression depends on placement strategy rather than individual slot precision
Expected Effect : Spurious suppression >22dB; efficiency >86%; standard fabrication tolerance
Risk Control :
  • simulation accuracy of current distribution mapping
  • slot coupling to fundamental mode if misplaced by >1mm
  • multi-mode interaction causing unpredicted resonance shifts
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