Synchronous Rectifier Design Trade-offs for LLC Resonant

Overview of Technical Issues:

The control circuit insufficiently detects and commands the turn-off timing for the synchronous rectifying switch in the LLC resonant converter, especially under variable load and resonant frequency conditions; this timing insufficiency causes either body diode conduction losses from early turn-off or shoot-through current losses from delayed turn-off, preventing the synchronous rectification from achieving its target efficiency improvement over traditional diode rectification in low-voltage power supply applications.

Solution directions generated for this problem

Problem Direction 1 :

ImproveTurn-off timing precision
VS
ConstraintControl circuit complexity

Inspiration 1 : Cross-domain reference

Application Principle: #26 Copying
Cross-domain applicability Assess applicability
Synchronizing a base station in a wireless communication system
Innovative Solution Refine solution

Resonant transformer auxiliary winding zero-crossing replica signal for timing detection

Add auxiliary winding to resonant transformer replicating secondary current zero-crossing
How to solve :
  • Wind a low-turn auxiliary winding (3–5 turns) on the resonant transformer secondary side, magnetically coupled to replicate the resonant current waveform with 1:20 scaling ratio
  • Connect auxiliary winding to a single fast comparator (LMV7219, 7ns propagation delay) with adjustable threshold ±5mV to detect zero-crossing, generating turn-off trigger signal with ±10ns precision across 50–500kHz resonant frequency range
  • Use passive RC compensation network (R=100Ω, C=22pF) at comparator input to correct phase shift caused by winding parasitic inductance, maintaining timing accuracy under 10–100% load variation without active calibration circuits
Expected Effect : Timing precision ±10ns; component count 18 devices; efficiency 96.5%; PCB single-layer
Risk Control :
  • auxiliary winding coupling coefficient variation ±8%
  • comparator threshold drift over temperature ±15mV
  • RC compensation component tolerance ±5%

Problem Direction 2 :

ImproveDetection response speed
VS
ConstraintControl circuit power consumption

Inspiration 1 : Cross-domain reference

Application Principle: #19 Periodic action
Cross-domain applicability Assess applicability
Adaptive passive PING
Innovative Solution Refine solution

Burst-mode resonant zero-crossing detection for LLC synchronous rectification

Activate detection circuits only during predicted zero-crossing windows
How to solve :
  • Implement burst-mode detection: run high-speed comparators and sampling circuits only during the last 150ns window of each switching cycle predicted by previous cycle timing, keeping circuits in sub-threshold standby mode (≤5μA leakage) otherwise
  • Use a low-power timing predictor circuit (20mW, simple RC delay chain with temperature compensation) to estimate zero-crossing position based on resonant frequency measured every 10 cycles, triggering the burst window activation 200ns before predicted zero-crossing
  • During the 150ns active burst window, operate high-speed comparators at full bias current (8mA, 25ns propagation delay) to achieve ±12ns timing accuracy, then immediately return to standby after zero-crossing detection
Expected Effect : Detection speed 28ns, average power 0.25W, efficiency 95.8% at 30W load
Risk Control :
  • predictor accuracy drift over temperature range
  • burst window synchronization jitter under frequency variation
  • standby-to-active transition overshoot

Problem Direction 3 :

ImproveSynchronous rectification efficiency
VS
ConstraintControl circuit complexity

Inspiration 1 : Cross-domain reference

Application Principle: #26 Copying
Cross-domain applicability Assess applicability
Synchronous rectifier drive and soft-switching circuit
Innovative Solution Refine solution

Transformer-embedded current-replication timing control for LLC synchronous rectification

Replicate secondary current using auxiliary transformer winding to generate timing reference
How to solve :
  • Add a tertiary sense winding (3-turn, 0.2mm wire) on transformer secondary side, voltage proportional to di/dt provides zero-crossing prediction without direct current sensing
  • Feed sense winding output to single fast comparator (LMV7219, 7ns delay) with adaptive threshold set by RC network (R=10kΩ, C=100pF) tracking resonant frequency drift ±15%
  • Generate turn-off command when sense voltage crosses threshold, achieving ±10ns timing precision across 20-100% load with only 8 additional passive components plus comparator, total circuit stays under 25 devices
Expected Effect : Efficiency 96.2%, timing ±8ns, 22 total components
Risk Control :
  • sense winding coupling tolerance ±5%
  • comparator threshold drift over temperature
  • EMI coupling into sense winding

Problem Direction 4 :

ImproveSynchronous rectification efficiency
VS
ConstraintControl circuit power consumption

Inspiration 1 : Cross-domain reference

Application Principle: #19 Periodic action
Cross-domain applicability Assess applicability
Voltage conversion circuits, electronic devices, and control methods for voltage conversion circuits
Innovative Solution Refine solution

Duty-cycle-gated synchronous rectification control with adaptive sleep mode

Gate control circuit into sleep-active cycles
How to solve :
  • Divide each switching cycle into prediction window (active 200ns before estimated zero-crossing) and sleep window (remainder of cycle)
  • high-speed detection circuits operate only during prediction window, enter sub-10μA standby otherwise, reducing average control power from 1.2W to 0.25W while preserving <30ns response during active phases
  • Implement adaptive window positioning using a low-power 8-bit counter that tracks previous cycle resonant period (50-150kHz range) and predicts next zero-crossing timing with ±100ns margin, activating detection circuits 200ns before predicted event
  • the counter consumes <5mW continuously
  • Use fast-wake comparator architecture with pre-biased input stage that exits sleep to full-speed operation within 15ns upon enable signal, ensuring total detection-to-command delay remains under 30ns despite periodic operation
  • comparator bias current switches between 50μA (sleep) and 2mA (active) via MOSFET current mirror controlled by the prediction counter
Expected Effect : Efficiency 96.5% at ≥30W load; control power 0.25W; viable down to 25W converter power; timing precision ±12ns
Risk Control :
  • prediction window miss during rapid load transient
  • wake-up delay variation with temperature
  • counter overflow at frequency boundary
Patsnap Eureka Solution